sync: SHANGHAI-U9 2026-08-26 fpga_update/gen_update_mcs.py 的 REPO 改读 skills_env.md 的 SMOD_REPO_ROOT(0819 遗漏的第三个文件)

This commit is contained in:
bowei
2026-08-26 07:50:48 +08:00
parent 307bc38d36
commit 120dc66925
+12 -10
View File
@@ -26,16 +26,6 @@ import subprocess
import sys
import tempfile
REPO = r"E:\Xilinx_design\smod\SMOD_ATSC\my_exciter"
TCL_DIR = os.path.join(REPO, "my_exciter.srcs", "tcl_1")
BITSTREAM = os.path.join(REPO, "bitstream")
IMPL = os.path.join(REPO, "my_exciter.runs", "impl_1")
POST_BITSTREAM = os.path.join(TCL_DIR, "post_bitstream.tcl")
GEN_RU = os.path.join(TCL_DIR, "runScript_GenRu.tcl")
PERL_SCRIPT = os.path.join(TCL_DIR, "MakeSpiFlashProgrammerMcsFiles_backup.pl")
def _env_lookup(key, default=None):
"""Machine-local values (paths, IPs) live in ~/skills_env.md, never in git.
An OS environment variable of the same name overrides the file."""
@@ -56,6 +46,18 @@ def _env_lookup(key, default=None):
return default
# The my_exciter checkout root differs per machine; default keeps this machine's
# historical path so behaviour is unchanged when the key is absent.
REPO = _env_lookup("SMOD_REPO_ROOT", r"E:\Xilinx_design\smod\SMOD_ATSC\my_exciter")
TCL_DIR = os.path.join(REPO, "my_exciter.srcs", "tcl_1")
BITSTREAM = os.path.join(REPO, "bitstream")
IMPL = os.path.join(REPO, "my_exciter.runs", "impl_1")
POST_BITSTREAM = os.path.join(TCL_DIR, "post_bitstream.tcl")
GEN_RU = os.path.join(TCL_DIR, "runScript_GenRu.tcl")
PERL_SCRIPT = os.path.join(TCL_DIR, "MakeSpiFlashProgrammerMcsFiles_backup.pl")
def resolve_vivado():
"""Vivado's install path differs per machine -- never hardcode it."""
exe = _env_lookup("VIVADO_PATH")