Initial commit

vivado-sim-workspace/iteration-1/eval-counter/eval_metadata.json

@@ -0,0 +1,43 @@
+{
+  "eval_id": 0,
+  "eval_name": "counter8-auto-stim",
+  "prompt": "我有一个8位计数器模块，文件路径是 counter8.v，请帮我自动生成激励，运行仿真，并将波形保存到 D:/sim_results/counter_waves.csv",
+  "assertions": [
+    {
+      "id": "tb_file_exists",
+      "text": "生成了 tb_counter8.v testbench 文件"
+    },
+    {
+      "id": "tb_has_dumpfile",
+      "text": "testbench 包含 $dumpfile 和 $dumpvars，用于 VCD 波形记录"
+    },
+    {
+      "id": "tb_has_clkgen",
+      "text": "testbench 包含时钟生成逻辑（always #N clk = ~clk）"
+    },
+    {
+      "id": "tb_has_reset",
+      "text": "testbench 包含复位序列"
+    },
+    {
+      "id": "tb_has_finish",
+      "text": "testbench 包含 $finish 以正常结束仿真"
+    },
+    {
+      "id": "tcl_file_exists",
+      "text": "生成了 run_sim.tcl Vivado 批处理脚本"
+    },
+    {
+      "id": "tcl_batch_mode",
+      "text": "TCL 脚本使用批处理模式（-mode batch）运行"
+    },
+    {
+      "id": "vcd_to_csv_exists",
+      "text": "提供了 vcd_to_csv.py 波形转换脚本"
+    },
+    {
+      "id": "output_path_correct",
+      "text": "CSV 输出路径指向用户指定的 D:/sim_results/counter_waves.csv"
+    }
+  ]
+}