更新了skill

2026-06-22 16:41:44 +08:00
parent 48b965ec4e
commit 814dbf1681
13 changed files with 845 additions and 13 deletions
@@ -38,6 +38,21 @@ set_property PROGRAM.FILES [list $mcs_file] \
  [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a200t_0] 0]]
 refresh_hw_device [lindex [get_hw_devices xc7a200t_0] 0]

+# --- CRITICAL: load Vivado's flash-loader bitstream into the FPGA FIRST so it
+#     bridges JTAG<->SPI flash and takes over the SPI bus. Without this, the user
+#     design (or boot image) holds the SPI pins and the flash read returns
+#     "Mfg ID : 0 / Unable to read device properties" (program fails silently).
+#     This is exactly what the Vivado GUI "Program Configuration Memory Device"
+#     does under the hood before program_hw_cfgmem. ---
+set loader_bit [get_property PROGRAM.HW_CFGMEM_BITFILE [lindex [get_hw_devices xc7a200t_0] 0]]
+create_hw_bitstream -hw_device [lindex [get_hw_devices xc7a200t_0] 0] $loader_bit
+program_hw_devices [lindex [get_hw_devices xc7a200t_0] 0]
+
+# Erase + program + verify the SPI flash (this is the actual flash write).
+program_hw_cfgmem -hw_cfgmem [get_property PROGRAM.HW_CFGMEM [lindex [get_hw_devices xc7a200t_0] 0]]
+
+# Optionally reload the user bit + probes so the device runs the design (with ILA)
+# after flashing. A power-cycle will boot the same content from flash.
 if {$has_ltx} {
    set_property PROBES.FILE      $ltx_file [get_hw_devices xc7a200t_0]
    set_property FULL_PROBES.FILE $ltx_file [get_hw_devices xc7a200t_0]