sync: WIN11-BOWEI 2026-09-02 新增 bmem 记忆 skill；imx6-flow/plan-review 文档与脚本更新

远端 pack 服务仍故障（git-upload-pack 返回 0008NAK 后截断），push 待服务器恢复。
未跟踪的 5 个归档临时副本（rtl-ip-replace / sim-rtl-flow / simulink_rtl_dev /
simulink-rtl-redev / zynq-imx6-flow）刻意不入库，待 pull 后由远端提供。

Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_0135YszNe4pwwJxwaLqKTCKG

fpga-imx6-flow/SKILL.md

@@ -135,7 +135,7 @@ it, then resume the **same `--thread-id`** with a JSON payload. Repeat until exi
 
 | `action` | excalidraw node | What you (the session) do | Resume JSON |
 |---|---|---|---|
-| `analyze` | 通过ila/串口分析 | Grab imx6 serial log + pull ILA waveform (vivado-mcp); summarize | `{"analysis_log":"<摘要/路径>"}` |
+| `analyze` | 通过ila/串口分析 | Grab imx6 serial log + ILA; for RF/TX requirements also capture the requested analyzer spectrum; summarize all evidence | `{"analysis_log":"<摘要/路径>"}` |
 | `meets_requirement` | 符合设计要求? | Judge the analysis against the design requirement | `{"meets": true}` or `{"meets": false}` |
 | `propose` | 分析原因，提出修改方案 | Diagnose root cause; decide what to change + next program mode | `{"reason":"...","need_fpga": true/false,"need_imx6": true/false,"program_mode":"bitstream"或"flash"}` |
 | `modify_fpga` | 改 RTL→综合→出 bit/flash | Edit RTL, run Vivado synth/impl, produce bit + flash files | `{"bit_path":"...","flash_path":"...","program_mode":"flash"}` |
@@ -159,6 +159,33 @@ Notes:
   set in `propose`/`modify_fpga` chooses bitstream (download bit) vs flash (re-burn +
   full power/connect re-sequence). This is the big closed loop.
 
+### Spectrum-analyzer evidence during `analyze`
+
+When the requirement includes RF or transmitter output, augment the ILA/console evidence
+with a registered spectrum-analyzer MCP:
+
+- N9320B (tool prefix `mcp__mcp_n9320b__`): call `get_idn`, then `get_settings`,
+  then `get_spectrum` with `mark_peak=true` and a stable `csv_path`.
+- DSA815 (tool prefix `mcp__mcp_dsa815__`): call `dsa_get_identity`, then
+  `dsa_get_status`, then `dsa_capture_plot`.
+
+Use the analyzer named by the requirement. If none is named, prefer DSA815. Capture both
+only when the requirement asks for a cross-check or results need independent confirmation.
+For DSA815 specifically:
+
+1. Call `dsa_get_identity`, then `dsa_get_status` to verify serial `DSA8A194401321` and
+   record the current sweep/unit settings.
+2. Call `dsa_capture_plot` for the current Trace; use `dsa_capture_spectrum` only when
+   downstream numerical processing needs all 601 points.
+3. Put the PNG/CSV paths, peak frequency/power, span, RBW and VBW in `analysis_log`.
+4. Prefer read-only capture. If the requirement forces a frequency/bandwidth change,
+   save the original status, use the validated setting tools, and restore the original
+   values after capture. Never enable `dsa_scpi_write` for routine flow work.
+
+Always put the selected analyzer identity, artifact paths and measured settings in
+`analysis_log`. If identity/connectivity fails, record that the RF evidence is unavailable
+and do not claim the RF acceptance criterion passed from ILA or console data alone.
+
 ## Step 3 — Finish
 
 On exit 0 (`status: done`), report to the user: iterations completed and that the
@@ -274,7 +301,8 @@ Gotchas seen on a real install (2026-07-20):
    `imx_atsc_app.bak_pre_rx1`), md5-verify.
 5. Cold-boot (tools_hw blast_off→power_off→power_on, TX-safe) so rc.local runs the new app.
 6. Verify: network SSH grep `/var/module_log/imx_atsc_app.log` for `TALISE_radioOn` / `fb init state ok`
-   / `fpga[0xBB]=0x03` (sync=1/tvalid=1); spectrum for TX; (ILA needs an `.ltx` → skip unless re-impl).
+   / `fpga[0xBB]=0x03` (sync=1/tvalid=1); for TX use `mcp_dsa815.dsa_capture_plot`
+   and retain PNG/CSV + peak/settings; (ILA needs an `.ltx` → skip unless re-impl).
 
 > The `git HEAD` app (b07d73b) is the known-good **RX1-on-framerA (M=4/lane0x03/RX1RX2) + correct TX**
 > build. On-device `imx_atsc_app.rx1` and any `M=2/lane0x04` variant **break TX** — do not use them.