sync: BOWEI 2026-08-29 新增 dpd-mig-flow / sim-rtl-flow 两个 skill,去硬编码
- dpd-mig-flow、sim-rtl-flow 首次入库 - 两者的 LangGraph 检出路径、SMOD 参考工程路径、N9320B/板卡 IP 改为 引用 ~/skills_env.md(新增 DPD_MIG_FLOW_ROOT / SIM_RTL_FLOW_ROOT / XILINX_SMOD_ROOT / SMOD_ATSC_REF 等条目) - sim-rtl-flow 示例里写死的 /c/Users/Administrator 临时路径改为 $TMPDIR - 撤出上次遗留的误入库 __pycache__/run_fpga_local.cpython-311.pyc - .gitignore 忽略 orca-cli(指向 ~/.agents/skills 的外部链接)
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@@ -1,7 +1,8 @@
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---
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name: sim-rtl-flow
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description: >
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Run the sim-rtl-flow LangGraph workflow at E:\LangGraph_Design\sim-rtl-flow — the
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Run the sim-rtl-flow LangGraph workflow (checkout path 见 `~\skills_env.md` 的
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`SIM_RTL_FLOW_ROOT`) — the
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Simulink-to-RTL-to-hardware design pipeline: read the previous run's design version-tree
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doc xxx_tree.md to decide what may be reused → Simulink -x principle sim
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(sim-golden) → HUMAN sign-off on simulation performance → optional -q fixed-point →
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@@ -228,7 +229,7 @@ regenerated tree has lost last round's attributes. Default, as everywhere here,
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`<work_dir>/.sim_rtl_flow/`** — that is where `resume`/`record`/`status` will look.
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```bash
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cat > /c/Users/Administrator/AppData/Local/Temp/claude/input.json <<'EOF'
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cat > $TMPDIR/sim_rtl_flow_input.json <<'EOF'
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{
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"requirements_path": "Notes/requirements.md",
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"work_dir": "E:/Xilinx_design/my_project",
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@@ -257,7 +258,7 @@ EOF
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### 2. Start — exits 10 with a handoff
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```bash
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"$PY" "$RUN" --thread-id my-design-001 start --input /c/Users/Administrator/AppData/Local/Temp/claude/input.json
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"$PY" "$RUN" --thread-id my-design-001 start --input $TMPDIR/sim_rtl_flow_input.json
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```
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`start` takes `work_dir` from the input JSON and prints where state landed. Verified:
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