sync: SHANGHAI-U9 2026-07-27 三个 Simulink→RTL skill 转系统级 + 新增 simulink-rtl-redev

- simulink_rtl_dev / rtl-ip-replace: 从工程级 .claude/skills 迁到用户级并去工程耦合
  (模型名/Notes 文档依赖/工程实测基线移出; addpath 与脚本路径改用户级)
- rtl-ip-replace/scripts/gen_cmp_tb.py: Vivado 路径不再写死, 改读 VIVADO_PATH /
  XILINX_VIVADO (兼容 install root / bin / bin\vivado.bat 三种写法), 回落时提示
  去设 skills_env.md 的 VIVADO_PATH
- simulink-rtl-redev: 新增。原生模型改动后的仿真模型同步规范, 含两个实测过的工具
  check_sync.py (三条时序链新鲜度闸门) 与 measure_k.m (时域/频域/包络三估计器互证)
- sim-rtl-flow/SKILL.md: 加入 sync_sim:* 步骤, 引用上述三个 skill

rtl-ip-replace/scripts/namespace_ip.py

@@ -0,0 +1,38 @@
+#!/usr/bin/env python3
+"""Suffix every module in rtl_ip/ with _IP so original and IP-based RTL can
+coexist in one xsim `work` library for the dual-DUT cycle-true comparison.
+
+- renames `module X` -> `module X_IP` for every module DECLARED in rtl_ip/*.v
+- rewrites instantiations of those modules accordingly (word-boundary match)
+- IP core instances (dist_mem_gen/blk_mem_gen/... names from ip_manifest) are
+  left untouched -- they are not declared here.
+
+Run LAST, after rom_to_ip.py / ram_to_ip.py / any hand edits (CORDIC, FIFO).
+Idempotent: modules already ending in _IP are skipped.
+"""
+import argparse, os, re
+
+def main():
+    ap = argparse.ArgumentParser()
+    ap.add_argument('rtl_ip_dir')
+    a = ap.parse_args()
+    d = os.path.abspath(a.rtl_ip_dir)
+    files = [os.path.join(d, f) for f in os.listdir(d) if f.endswith('.v')]
+
+    mods = []
+    for p in files:
+        for m in re.finditer(r'^\s*module\s+(\w+)', open(p, encoding='utf-8', errors='replace').read(), re.M):
+            if not m.group(1).endswith('_IP'):
+                mods.append(m.group(1))
+    mods = sorted(set(mods), key=len, reverse=True)
+    print('modules:', mods)
+
+    for p in files:
+        txt = open(p, encoding='utf-8', errors='replace').read()
+        for mod in mods:
+            txt = re.sub(r'\b%s\b(?!_IP)' % re.escape(mod), mod + '_IP', txt)
+        open(p, 'w', encoding='utf-8').write(txt)
+    print(f'suffixed {len(mods)} modules across {len(files)} files')
+
+if __name__ == '__main__':
+    main()