diff --git a/src/atsc_app/bsp/eeprom.c b/src/atsc_app/bsp/eeprom.c
index 44a4634..22163b1 100755
--- a/src/atsc_app/bsp/eeprom.c
+++ b/src/atsc_app/bsp/eeprom.c
@@ -85,6 +85,26 @@ static const int32 we_power[]=
1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000, 1000
};
+/* Hardware V1.1 VHF calibration, channels 2..13. */
+static const uint16 we_power_v1_1_v[]=
+{
+ 143,98,66,38,28,52,52,59,62,64,66,74
+};
+
+/*
+ * Hardware V1.1 UHF calibration, channels 14..83 (473..887 MHz).
+ * Values are the raw WE register values measured with 563 MHz as 0 dB.
+ * 1 raw step = 0.05 dB; 300 = 0 dB. Values at the upper end are
+ * limited to WE_POWER_MAX (500).
+ */
+static const uint16 we_power_v1_1[]=
+{
+ 224,226,231,231,234,235,239,244,245,248,254,257,264,268,269,275,281,282,
+ 292,292,295,301,304,312,317,322,329,335,340,345,347,350,354,358,361,366,
+ 370,377,382,385,389,391,394,399,403,405,413,420,423,432,437,447,454,463,
+ 480,495,500,500,500,500,500,500,500,500,500,500,500,500,500,500
+};
+
/*auto ver
{
-405, -361, -349, -314, -332, -303, -295, -285, -172, -257,
@@ -192,6 +212,7 @@ void e2rom_save_sys(S_SYSTEM_PARA *ppara)
c256_bytewrite(EEPROM_ADRV9009_ORX_MANU_GAIN, ppara->orx_manu_gain&0xff);
c256_bytewrite(EEPROM_SPEC_ENABLE, ppara->spec_enable ? 1 : 0);
+ c256_bytewrite(EEPROM_HARDWARE_VERSION, ppara->hardware_version);
}
void e2rom_save_power(S_RF_PARA *ppara)
{
@@ -398,18 +419,26 @@ void e2rom_save_wd(S_WD_PARA *ppara)
c256_bytewrite(EEPROM_WD_ADDR+i,*pchar++);
}
}
+static uint16 e2rom_legacy_power_addr(void)
+{
+ return (atsc_para.wl_para.exc_5x == 0) ?
+ EEPROM_CH2_POWER_ADDR : EEPROM_CH1_POWER_ADDR;
+}
+
+static uint16 e2rom_active_power_addr(void)
+{
+ if(atsc_para.system_para.hardware_version == HARDWARE_VERSION_V1_1)
+ return EEPROM_CH_POWER_V1_1_ADDR;
+
+ return e2rom_legacy_power_addr();
+}
+
void e2rom_save_leak(uint32 ch, S_WE_PARA *ppara)
{
- if(atsc_para.wl_para.exc_5x==0)
- {
- c256_bytewrite(EEPROM_CH2_POWER_ADDR+ch*2+0,ppara->power>>8);
- c256_bytewrite(EEPROM_CH2_POWER_ADDR+ch*2+1,ppara->power);
- }
- else
- {
- c256_bytewrite(EEPROM_CH1_POWER_ADDR+ch*2+0,ppara->power>>8);
- c256_bytewrite(EEPROM_CH1_POWER_ADDR+ch*2+1,ppara->power);
- }
+ uint16 base = e2rom_active_power_addr();
+
+ c256_bytewrite(base+ch*2+0,ppara->power>>8);
+ c256_bytewrite(base+ch*2+1,ppara->power);
}
void e2rom_save_we(S_WE_PARA *ppara)
{
@@ -1145,8 +1174,16 @@ void e2rom_read_system(S_SYSTEM_PARA *ppara)
ppara->orx_manu_gain = orx_gain_max;
ppara->spec_enable = 1;
+ ppara->hardware_version = c256_byteread(EEPROM_HARDWARE_VERSION);
+ if(ppara->hardware_version >= HARDWARE_VERSION_END)
+ {
+ ppara->hardware_version = DEFAULT_HARDWARE_VERSION;
+ c256_bytewrite(EEPROM_HARDWARE_VERSION, ppara->hardware_version);
+ }
- printf("load agc_att=%d %fdb adrv9009_att=%d orx_manu_gain=%d spec_enable=%d\n", ppara->agc_att, -0.5*ppara->agc_att, ppara->adrv9009_att, ppara->orx_manu_gain, ppara->spec_enable);
+ printf("load agc_att=%d %fdb adrv9009_att=%d orx_manu_gain=%d spec_enable=%d hardware=V1.%d\n",
+ ppara->agc_att, -0.5*ppara->agc_att, ppara->adrv9009_att,
+ ppara->orx_manu_gain, ppara->spec_enable, ppara->hardware_version);
}
static void bak_e2rom_read_rf(S_RF_PARA *ppara)
{
@@ -2008,6 +2045,26 @@ static void e2rom_fac_power_rst_3x(void)
}
}
+static void e2rom_fac_power_rst_v1_1(void)
+{
+ uint32 i;
+ uint16 power;
+
+ for(i=FREQ_MIN_V1; i<=FREQ_MAX_V3; i++)
+ {
+ power = we_power_v1_1_v[i-FREQ_MIN_V1];
+ c256_bytewrite(EEPROM_CH_POWER_V1_1_ADDR+i*2+0, power>>8);
+ c256_bytewrite(EEPROM_CH_POWER_V1_1_ADDR+i*2+1, power);
+ }
+
+ for(i=FREQ_MIN_U; i<=FREQ_MAX_U; i++)
+ {
+ power = we_power_v1_1[i-FREQ_MIN_U];
+ c256_bytewrite(EEPROM_CH_POWER_V1_1_ADDR+i*2+0, power>>8);
+ c256_bytewrite(EEPROM_CH_POWER_V1_1_ADDR+i*2+1, power);
+ }
+}
+
static uint16 e2rom_read_fac_power_default_3x(uint32 chn)
{
uint16 power;
@@ -2860,6 +2917,7 @@ void e2rom_load_default_param(unsigned char menu)
atsc_para.system_para.gps = 0;
atsc_para.system_para.test = TEST_OFF;
atsc_para.system_para.spec_enable = 1;
+ atsc_para.system_para.hardware_version = DEFAULT_HARDWARE_VERSION;
//atsc_para.system_para.net = 1; //MFN;
atsc_para.system_para.ctrl = CTRL_REMOTE; // remote
@@ -3243,6 +3301,7 @@ void e2rom_load_default_param(unsigned char menu)
case MENU_POWER:
atsc_para.rf_para.power = RF_POWER_ZERO;
+ e2rom_fac_power_rst_v1_1();
if(atsc_para.wl_para.exc_5x==0)
{
atsc_para.rf_para.db = DEFAULT_RF_POWER_DB_3X;
@@ -3270,27 +3329,41 @@ void e2rom_load_default_param(unsigned char menu)
void e2rom_read_leak(uint32 chn,S_WE_PARA *ppara)
{
- uint8 data = 0;
+ uint8 data;
+ uint16 base = e2rom_active_power_addr();
- if(atsc_para.wl_para.exc_5x==0)
+ data = c256_byteread(base+chn*2+0);
+ ppara->power = (data<<8)|c256_byteread(base+chn*2+1);
+
+ /*
+ * Populate an upgraded unit's missing V1.1 entry from the measured
+ * V1.1 defaults and persist it in the independent V1.1 EEPROM table.
+ */
+ if((ppara->power>WE_POWER_MAX) &&
+ (atsc_para.system_para.hardware_version == HARDWARE_VERSION_V1_1))
{
- data = c256_byteread(EEPROM_CH2_POWER_ADDR+chn*2+0);
- ppara->power = (data<<8)|c256_byteread(EEPROM_CH2_POWER_ADDR+chn*2+1);
-
- if(ppara->power>WE_POWER_MAX)
+ if((chn>=FREQ_MIN_V1)&&(chn<=FREQ_MAX_V3))
{
- ppara->power = e2rom_read_fac_power_default_3x(chn);
+ ppara->power = we_power_v1_1_v[chn-FREQ_MIN_V1];
+ }
+ else if((chn>=FREQ_MIN_U)&&(chn<=FREQ_MAX_U))
+ {
+ ppara->power = we_power_v1_1[chn-FREQ_MIN_U];
+ }
+
+ if(ppara->power<=WE_POWER_MAX)
+ {
+ c256_bytewrite(EEPROM_CH_POWER_V1_1_ADDR+chn*2+0,ppara->power>>8);
+ c256_bytewrite(EEPROM_CH_POWER_V1_1_ADDR+chn*2+1,ppara->power);
}
}
- else
- {
- data = c256_byteread(EEPROM_CH1_POWER_ADDR+chn*2+0);
- ppara->power = (data<<8)|c256_byteread(EEPROM_CH1_POWER_ADDR+chn*2+1);
- if(ppara->power>WE_POWER_MAX)
- {
+ if(ppara->power>WE_POWER_MAX)
+ {
+ if(atsc_para.wl_para.exc_5x==0)
+ ppara->power = e2rom_read_fac_power_default_3x(chn);
+ else
ppara->power = e2rom_read_fac_power_default_5x(chn);
- }
}
}
extern void fpga_read_system(S_SYSTEM_PARA *ppara);
@@ -3443,6 +3516,7 @@ void e2rom_read_all_para(void)
e2rom_load_default_param(2);
e2rom_load_default_param(3);
+ e2rom_fac_power_rst_v1_1();
if(atsc_para.wl_para.exc_5x==0) //此处是将非当前标准的we功率也置为默认值.
{
e2rom_fac_power_rst_5x();
diff --git a/src/atsc_app/bsp/fpga.c b/src/atsc_app/bsp/fpga.c
index d29273d..e467d10 100755
--- a/src/atsc_app/bsp/fpga.c
+++ b/src/atsc_app/bsp/fpga.c
@@ -80,11 +80,26 @@ void uart_debug(uint8 *pbuf,uint32 len)
#define HMC472_STEP_MDB 500
#define HMC472_STEPS_MAX 63
#define ADRV9009_ATT_BASE 8000
+#define ADRV9009_ATT_MAX 40000
+
+/*
+ * The post-reset measurements were made in V1.0 software mode and established
+ * that LCD -11 dB produces 0 dBm at the 563 MHz reference point. Therefore
+ * V1.1 needs 11 dB additional attenuation for LCD 0 dB to map to the same
+ * physical 0 dBm output.
+ */
+#define V1_1_OUTPUT_GAIN_MDB 11000
static int32 g_last_total_mdb = -1;
static uint16 g_last_adrv9009_att = 0xFFFF;
static volatile uint8 g_adrv9009_ready = 0;
+static int32 hardware_output_gain_mdb(void)
+{
+ return atsc_para.system_para.hardware_version == HARDWARE_VERSION_V1_1
+ ? V1_1_OUTPUT_GAIN_MDB : 0;
+}
+
/*
* Validate a stored power command only after the current channel's WE power
* has been loaded. A raw attenuation of zero is a valid physical maximum;
@@ -98,6 +113,7 @@ static uint8 normalize_new_power_rf_db(S_WE_PARA *pwe, S_RF_PARA *prf)
raw_total_mdb = (int32)RAW_MAX_OUTPUT_MDB
- ((int32)prf->db + (int32)pwe->power - (int32)REF_POWER_UNITS)
* (int32)PWR_UNIT_TO_MDB;
+ raw_total_mdb += hardware_output_gain_mdb();
if(raw_total_mdb >= 0)
return 0;
@@ -1057,6 +1073,7 @@ uint16 fpga_limit_power_target(S_WE_PARA *pwe, S_RF_PARA *prf, uint16 target_pow
total_mdb = (int32)RAW_MAX_OUTPUT_MDB
- ((int32)prf->db + (int32)pwe->power - (int32)REF_POWER_UNITS)
* (int32)PWR_UNIT_TO_MDB;
+ total_mdb += hardware_output_gain_mdb();
if(total_mdb <= 0)
return prf->power;
@@ -1087,12 +1104,13 @@ void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf)
total_mdb = (int32)RAW_MAX_OUTPUT_MDB
- ((int32)prf->db + (int32)pwe->power - (int32)REF_POWER_UNITS)
* (int32)PWR_UNIT_TO_MDB;
+ total_mdb += hardware_output_gain_mdb();
if(total_mdb < 0)
total_mdb = 0;
- if(total_mdb > (int32)(ADRV9009_ATT_BASE + HMC472_STEPS_MAX * HMC472_STEP_MDB))
- total_mdb = ADRV9009_ATT_BASE + HMC472_STEPS_MAX * HMC472_STEP_MDB;
+ if(total_mdb > (int32)(ADRV9009_ATT_MAX + HMC472_STEPS_MAX * HMC472_STEP_MDB))
+ total_mdb = ADRV9009_ATT_MAX + HMC472_STEPS_MAX * HMC472_STEP_MDB;
if(total_mdb >= (int32)ADRV9009_ATT_BASE)
{
@@ -1100,7 +1118,13 @@ void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf)
agc_att_val = (uint8)(hmc_extra / HMC472_STEP_MDB);
if(agc_att_val > HMC472_STEPS_MAX)
agc_att_val = HMC472_STEPS_MAX;
- adrv9009_att_val = (uint16)(ADRV9009_ATT_BASE + (hmc_extra % HMC472_STEP_MDB));
+
+ /*
+ * Keep ADRV9009 near its 8000 mdB optimum while HMC472 has range.
+ * Once HMC472 reaches 63, use the remaining ADRV9009 range up to
+ * 40000 mdB instead of clipping the combined attenuation at 39500.
+ */
+ adrv9009_att_val = (uint16)(total_mdb - agc_att_val * HMC472_STEP_MDB);
}
else
{
@@ -1141,6 +1165,8 @@ void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf)
}
g_last_total_mdb = total_mdb;
+ printf("[power] hardware=V1.%d offset_mdb=%d\n",
+ atsc_para.system_para.hardware_version, hardware_output_gain_mdb());
printf("[power] we=%3d db=%3d total_mdb=%5d | agc_att=%d adrv_att=%d\n",
pwe->power, prf->db, total_mdb, agc_att_val, adrv9009_att_val);
diff --git a/src/atsc_app/inc/config.h b/src/atsc_app/inc/config.h
index 966bc40..3a0d8c5 100755
--- a/src/atsc_app/inc/config.h
+++ b/src/atsc_app/inc/config.h
@@ -272,7 +272,7 @@
#define USE_NETWORK_DNS 0 // 是否配置dns
#define USE_NEW_POWER_CFG 1 // HMC472 + ADRV9009 power allocation
-#define USE_FREQ_CHANGE_RESET_PWR 1 // 切换频点后是否先将输出功率降到-25dB
+#define USE_FREQ_CHANGE_RESET_PWR 0 // 切换频点后是否先将输出功率降到-25dB
#if USE_BIG_LCD
diff --git a/src/atsc_app/inc/eeprom.h b/src/atsc_app/inc/eeprom.h
index 2f0bf91..05ad7fd 100755
--- a/src/atsc_app/inc/eeprom.h
+++ b/src/atsc_app/inc/eeprom.h
@@ -38,6 +38,7 @@ typedef enum
EEPROM_ADRV9009_ATT_L,
EEPROM_ADRV9009_ORX_MANU_GAIN,
EEPROM_SPEC_ENABLE,
+ EEPROM_HARDWARE_VERSION,
EEPROM_CHANNEL_ADDR = 0x50, //RF 相关
@@ -188,6 +189,8 @@ typedef enum
//工厂菜单当前WK为0x220, 工厂菜单power定义到0x300,中间预留部分空间
EEPROM_CH1_POWER_ADDR = 0x300, //约60多字节
EEPROM_CH2_POWER_ADDR = 0X400, //1.42(3X+)功率控制字
+ // V1.1独立频点WE表；0x500~0x5A7，未配置项回退到V1.0表
+ EEPROM_CH_POWER_V1_1_ADDR = 0x500,
EEPROM_PSTS_TS_EDIT = 0x600, //开关
EEPROM_PSTS_TSIDH, //tsid
diff --git a/src/atsc_app/inc/lcd_task.h b/src/atsc_app/inc/lcd_task.h
index 415cee7..6611046 100755
--- a/src/atsc_app/inc/lcd_task.h
+++ b/src/atsc_app/inc/lcd_task.h
@@ -106,6 +106,15 @@
#define WE_POWER_MIN 0
#define WE_POWER_MAX 500
+typedef enum
+{
+ HARDWARE_VERSION_V1_0 = 0,
+ HARDWARE_VERSION_V1_1,
+ HARDWARE_VERSION_END
+} HARDWARE_VERSION;
+
+#define DEFAULT_HARDWARE_VERSION HARDWARE_VERSION_V1_1
+
#define OCXO_MAX 10 //单位0.1hz system菜单
#define OCXO_UNIT 106 //保存时的放大倍数
#define LOG_RSSI_ADJUST 107 //读取tuner的rssi修正值
@@ -372,6 +381,7 @@ typedef struct
uint8 agc_att;
uint16 adrv9009_att;
uint8 orx_manu_gain;
+ uint8 hardware_version;
}S_SYSTEM_PARA,*PS_SYSTEM_PARA;
typedef struct
diff --git a/src/atsc_app/inc/web_server.h b/src/atsc_app/inc/web_server.h
index 3b5461a..88a041c 100755
--- a/src/atsc_app/inc/web_server.h
+++ b/src/atsc_app/inc/web_server.h
@@ -225,6 +225,7 @@ typedef struct
uint8 agc_att;
uint16 adrv9009_att;
uint8 orx_manu_gain;
+ uint8 hardware_version;
}S_CGI_SET,*PS_CGI_SET;
typedef struct
diff --git a/src/atsc_app/task/http_get.c b/src/atsc_app/task/http_get.c
index 0bf84ea..436e36e 100755
--- a/src/atsc_app/task/http_get.c
+++ b/src/atsc_app/task/http_get.c
@@ -272,6 +272,7 @@ void http_load_sys(S_CGI_SET *ppara)
ppara->agc_att = atsc_para.system_para.agc_att;
ppara->adrv9009_att = atsc_para.system_para.adrv9009_att;
ppara->orx_manu_gain = atsc_para.system_para.orx_manu_gain;
+ ppara->hardware_version = atsc_para.system_para.hardware_version;
}
#if ERR_TO_LCM
@@ -975,6 +976,25 @@ void http_write_sys(S_CGI_SET *ppara)
c256_bytewrite(EEPROM_ADRV9009_ATT_L, ppara->adrv9009_att&0xff);
}
#endif
+ if(ppara->hardware_version < HARDWARE_VERSION_END &&
+ ppara->hardware_version != atsc_para.system_para.hardware_version)
+ {
+ /*
+ * V1.1 -> V1.0 removes 13 dB of compensation. Always switch
+ * RF off before applying a hardware profile change.
+ */
+ atsc_para.rf_para.rf = 0;
+ c256_bytewrite(EEPROM_RF_ADDR, 0);
+ fpga_set_rf_output(0);
+ atsc_para.system_para.hardware_version = ppara->hardware_version;
+ c256_bytewrite(EEPROM_HARDWARE_VERSION, ppara->hardware_version);
+ atsc_para.we_para.ch = atsc_para.rf_para.txfreq;
+ e2rom_read_leak(atsc_para.we_para.ch, &atsc_para.we_para);
+ fpga_save_we(&atsc_para.we_para);
+ log_printf(LOG_INFO, I_USER_CFG,
+ "hardware version changed to V1.%d; RF forced off; WE=%u reloaded\n",
+ ppara->hardware_version, atsc_para.we_para.power);
+ }
if(ppara->orx_manu_gain!=atsc_para.system_para.orx_manu_gain){
cfg_adrv_orx_manu_gain(ppara->orx_manu_gain);
atsc_para.system_para.orx_manu_gain = ppara->orx_manu_gain;
diff --git a/src/atsc_app/task/iweb_task.c b/src/atsc_app/task/iweb_task.c
index b660b40..05fd1f1 100755
--- a/src/atsc_app/task/iweb_task.c
+++ b/src/atsc_app/task/iweb_task.c
@@ -788,6 +788,11 @@ int get_sys_cfg(char *pbuf,short bufMaxLen)
atsc_para.system_para.adrv9009_att,
atsc_para.system_para.orx_manu_gain
);
+ {
+ size_t used = strlen(pbuf);
+ if(used < (size_t)bufMaxLen)
+ snprintf(pbuf + used, (size_t)bufMaxLen - used, "#%u", atsc_para.system_para.hardware_version);
+ }
#if CGI_PRINT
//printf("[%s,%d] %s\n", __FUNCTION__,__LINE__,pbuf);
@@ -888,6 +893,12 @@ int set_sys_cfg(char *pbuf, short bufMaxLen)
p_cgi_sys_para->adrv9009_att = (uint16)atoi(paraBuf[13]);
#endif
p_cgi_sys_para->orx_manu_gain = (uint16)atoi(paraBuf[14]);
+ if(paraNum > 15)
+ {
+ uint8 hardware_version = (uint8)atoi(paraBuf[15]);
+ if(hardware_version < HARDWARE_VERSION_END)
+ p_cgi_sys_para->hardware_version = hardware_version;
+ }
}
#if 1
diff --git a/src/web/www/sys_set.html b/src/web/www/sys_set.html
index b4b60f8..c4383b7 100755
--- a/src/web/www/sys_set.html
+++ b/src/web/www/sys_set.html
@@ -230,6 +230,7 @@ function SetFormDefaults(){
cf0.agc_att.value = Number(syspara[i++])*(-0.5);
cf0.adrv9009_att.value = syspara[i++];
cf0.orx_manu_gain.value = syspara[i++];
+ cf0.hardware_version.value = (syspara[i] === undefined || Number(syspara[i]) !== 0) ? 1 : 0;
// sysnet form1
i = 1;
@@ -478,6 +479,7 @@ function set_syspara() {
postData += "#"+cf.agc_att.value;
postData += "#"+cf.adrv9009_att.value;
postData += "#"+cf.orx_manu_gain.value;
+ postData += "#"+cf.hardware_version.value;
if(cf.ab_mode.value == "1" && Number(cf.adp.value) > 0) {
alert("The ADPC cannot be set to Hold or Update or UpdateLIN/UpdateNLIN mode when 'FSSI Refresh' switch is 'On'. Please change 'FSSI Refresh' to 'Off'.");
@@ -675,7 +677,10 @@ function uploadfile(){
// 1. Update the Text (You already have this)
result.innerHTML = "Uploading package ... " + percent + '%';
- // 2. ADD THIS LINE to update the Green Bar visual
+ // 2. Show + update the Green Bar. Starts display:none so it is not an empty
+ // grey bar at rest (matches the sibling #prog_id / #rst_progid pattern);
+ // revealed here when upload begins, hidden again on completion below.
+ $("#progress").show();
document.getElementById('progress').value = percent;
if(e.loaded == e.total){
@@ -751,6 +756,7 @@ function uploadFpgaFile(){
xhr.upload.onprogress = function(e){
var percent = Math.round(e.loaded / e.total * 100);
result.innerHTML = "Uploading .mcs ... " + percent + '%';
+ $("#fpga_progress").show(); // reveal on upload start (starts display:none, sibling pattern)
document.getElementById('fpga_progress').value = percent;
if(e.loaded == e.total){
// upload done -> the board now erases+writes the flash; track its progress
@@ -1612,6 +1618,16 @@ function set_timezone() {
(195~255)
+
+ | HardwareVersion |
+
+
+ |
+ Changing this setting turns RF output Off. |
+
|
@@ -1825,7 +1841,7 @@ function set_timezone() {
-
+
@@ -1844,7 +1860,7 @@ function set_timezone() {