/* extern : void cfg_adrv_att(uint16 set_att); void cfg_adrv_orx_manu_gain(uint8 orx_manu_gain_index); void chang_freq(uint8 radio_ctl, int freq_changed); */ #include #include #include #include #include #include #include #include #include #include #include #include #include "../inc/type.h" #include "../inc/lcd_task.h" #include "../inc/i2c_drv.h" #include "../inc/isys_config.h" #include "adrv9009.h" #include "ad9009_fun.h" #include "talise_config.h" #include "../talise/talise_hal.h" #include "../talise/talise_arm_macros.h" #include "../talise/talise_reg_addr_macros.h" #include "adrv9009_config.h" #include "talise_arm_binary.h" #include "talise_stream_binary.h" #include "jesd204b_config.h" #include "../inc/adrv9009_ext.h" //--------------------------------------------- extern pthread_mutex_t g_orx_gain_lock; taliseDevice_t myTaliseDevice; taliseDevice_t *p_myTaliseDevice = &myTaliseDevice; taliseDevice_t *p_myTaliseDevice_shm; taliseInit_t myTalInit; taliseInit_t *p_myTalInit = &myTalInit; ST_REG_STATUS reg_info; extern unsigned int firmware_TaliseTDDArmFirmware_bin_len; extern uint16 get_loop_fbw_value(); extern uint16 get_loop_fbw_stable(); extern void cfg_adrv_att(uint16 set_att); extern volatile uint8 _g_adrv9009_spi_src; void cfg_adrv_rx1_manu_gain(uint8 rx1_manu_gain_index); /* PR06-2 forward decl */ u32 jesd204b_fb0_rd(u32 addr); extern S_ATSC_PARA atsc_para; void fpga_write_axi0(uint32 addr, uint32 pdata, uint32 count); int fpga_read_axi0(uint32 addr, uint32 *pdata, uint32 count); static int adrv9009_chip_no(int which_9009) { return (which_9009 == ADRV9009_0) ? 1 : 2; } int adrv9009_set_tx_path_enable(uint8 enable) { uint32_t ret; taliseRxORxChannels_t rx_orx = TAL_RXOFF_EN; taliseTxChannels_t tx = TAL_TXOFF; taliseTxChannels_t requested_tx = enable ? TAL_TX1 : TAL_TXOFF; if(p_myTaliseDevice_shm == NULL) { printf("Err: ADRV9009 device is not ready, keep TX path off\n"); return ERROR; } ret = TALISE_setRxTxEnable(p_myTaliseDevice_shm, TAL_ORX1_EN, requested_tx); if(ret != TALACT_NO_ACTION) { printf("Err: TALISE_setRxTxEnable TX%s failed, ret=%u\n", enable ? "ON" : "OFF", ret); return ERROR; } ret = TALISE_getRxTxEnable(p_myTaliseDevice_shm, &rx_orx, &tx); if((ret != TALACT_NO_ACTION) || (rx_orx != TAL_ORX1_EN) || (tx != requested_tx)) { printf("Err: ADRV9009 TX%s readback failed, ret=%u rx_orx=0x%x tx=0x%x\n", enable ? "ON" : "OFF", ret, rx_orx, tx); return ERROR; } printf("ADRV9009 TX path %s, ORX1 enabled\n", enable ? "ON" : "OFF"); return OK; } static int adrv9009_scratch_check(int chip_no) { u32 wr = 0; u32 rd = 0; wr = 0xB6; rd = 0; ad9009_write_spi(chip_no, TALISE_ADDR_SCRATCH_PAD, &wr, 1); usleep(1000); ad9009_read_spi(chip_no, TALISE_ADDR_SCRATCH_PAD, &rd, 1); if ((rd & 0xFF) != 0xB6) { printf("[adrv9009_reset] scratch check fail: wr=0xB6 rd=0x%02x\n", rd & 0xFF); return -1; } wr = 0x49; rd = 0; ad9009_write_spi(chip_no, TALISE_ADDR_SCRATCH_PAD, &wr, 1); usleep(1000); ad9009_read_spi(chip_no, TALISE_ADDR_SCRATCH_PAD, &rd, 1); if ((rd & 0xFF) != 0x49) { printf("[adrv9009_reset] scratch check fail: wr=0x49 rd=0x%02x\n", rd & 0xFF); return -1; } return 0; } static int adrv9009_force_clean_reset(int chip_no) { int i; cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_MCU); for (i = 0; i < 3; i++) { printf("[adrv9009_reset] force clean reset chip=%d try=%d\n", chip_no, i); ad9009_reset(chip_no); usleep(300 * 1000); if (adrv9009_scratch_check(chip_no) == 0) { printf("[adrv9009_reset] scratch check ok after reset\n"); return 0; } usleep(300 * 1000); } printf("[adrv9009_reset] force clean reset failed\n"); return -1; } int TALISE_Ext_LOL_Cal_1(int which_9009) { #if 1 uint8_t errorFlag = 0; uint8_t errorCode = 0; int i; //uint32_t enableMask = 0xF3; uint32_t initCalMask = 0x0200; taliseErr_t mykError = TAL_ERR_OK; //TALISE_runInitCals(p_myTaliseDevice_shm,initCalMask); printf("[%s] come in TALISE_Ext_LOL_Cal_1! \r\n",which_9009==ADRV9009_0?"ADRV9009_0":"ADRV9009_1"); //swtich setting,tx connect to orx if(which_9009==ADRV9009_0) { p_myTaliseDevice_shm = taliseDeviceInfo1.ptalDevice; } else { p_myTaliseDevice_shm = taliseDeviceInfo2.ptalDevice; } usr_printf_radiooff("TALISE_Ext_LOL_Cal_1"); TALISE_radioOff(p_myTaliseDevice_shm); TALISE_setTxToOrxMapping(p_myTaliseDevice_shm,1,TAL_MAP_TX1_ORX,TAL_MAP_NONE); for (i = 0; i < 3; i++) { mykError = (taliseErr_t)TALISE_runInitCals(p_myTaliseDevice_shm, initCalMask); printf("cfg 9009 70,%d! \r\n",mykError); mykError = (taliseErr_t)TALISE_waitInitCals(p_myTaliseDevice_shm, 60000, &errorFlag); printf("cfg 9009 71,%d! \r\n",mykError); if (errorFlag) { printf("FAIL: runInitCals time %d fail,errorFlag=0x%x! \r\n", i, errorFlag); } else if (errorCode) { printf("FAIL: runInitCals time %d fail,errorCode=0x%x! \r\n", i, errorCode); } else { break; } } if (i >= 3) { TALISE_radioOn(p_myTaliseDevice_shm); printf("[%s] FAIL: runInitCals beyond 3 times fail! \r\n",which_9009==ADRV9009_0?"ADRV9009_0":"ADRV9009_1"); return mykError; } /* enable tracking calibrations,���ʵ�����ȷ��enableMaskֵ */ //TALISE_enableTrackingCals(p_myTaliseDevice_shm, enableMask); /* enable radio on */ TALISE_radioOn(p_myTaliseDevice_shm); // TALISE_setObsRxPathSource(p_myTaliseDevice_shm, OBS_INTERNALCALS); printf("[%s] TALISE_Ext_LOL_Cal_1 finish! \r\n", which_9009==ADRV9009_0?"ADRV9009_0":"ADRV9009_1"); return mykError; #endif } int TALISE_Ext_LOL_Cal_2(int which_9009) { #if 1 uint8_t errorFlag = 0; uint8_t errorCode = 0; int i; //uint32_t enableMask = 0xF3; uint32_t initCalMask = 0x0200; taliseErr_t mykError = TAL_ERR_OK; //TALISE_runInitCals(p_myTaliseDevice_shm,initCalMask); printf("come in TALISE_Ext_LOL_Cal_2! \r\n"); if(which_9009==ADRV9009_0) { p_myTaliseDevice_shm = taliseDeviceInfo1.ptalDevice; } else { p_myTaliseDevice_shm = taliseDeviceInfo2.ptalDevice; } //swtich setting,tx connect to orx usr_printf_radiooff("TALISE_Ext_LOL_Cal_2"); TALISE_radioOff(p_myTaliseDevice_shm); TALISE_setTxToOrxMapping(p_myTaliseDevice_shm,1,TAL_MAP_NONE,TAL_MAP_TX2_ORX); //TALISE_setTxToOrxMapping(p_myTaliseDevice_shm,1,TAL_MAP_TX2_ORX,TAL_MAP_NONE); for (i = 0; i < 3; i++) { mykError = (taliseErr_t)TALISE_runInitCals(p_myTaliseDevice_shm, initCalMask); printf("cfg 9009 Ext_LOL_Cal 1,%d! \r\n",mykError); mykError = (taliseErr_t)TALISE_waitInitCals(p_myTaliseDevice_shm, 60000, &errorFlag); printf("cfg 9009 Ext_LOL_Cal 2,%d! \r\n",mykError); if (errorFlag) { printf("FAIL: runInitCals time %d fail,errorFlag=0x%x! \r\n", i, errorFlag); } else if (errorCode) { printf("FAIL: runInitCals time %d fail,errorCode=0x%x! \r\n", i, errorCode); } else { break; } } if (i >= 3) { TALISE_radioOn(p_myTaliseDevice_shm); printf("FAIL: runInitCals beyond 3 times fail! \r\n"); return mykError; } /* enable tracking calibrations,���ʵ�����ȷ��enableMaskֵ */ //TALISE_enableTrackingCals(p_myTaliseDevice_shm, enableMask); /* enable radio on */ TALISE_radioOn(p_myTaliseDevice_shm); // TALISE_setObsRxPathSource(p_myTaliseDevice_shm, OBS_INTERNALCALS); printf("TALISE_Ext_LOL_Cal_2 finish! \r\n"); return mykError; #endif } int adrv9009_cfg(int which_9009) { #if 1 uint8_t pllLockStatus = 0; uint8_t *pbuff_s = NULL; uint32_t num_s = 0; uint32_t nbytes_s = 4096; uint32_t count = firmware_TaliseTDDArmFirmware_bin_len; uint8_t *pbuff_f = NULL; uint32_t num_f = 0; uint32_t nbytes_f = 114688; int file_hd_s = -1; int file_hd_f = -1; uint16_t loopBandwidth_kHz=get_loop_fbw_value(); //700;//loopBandwidth_kHz=700;// 500K-有效果 uint8_t stability =get_loop_fbw_stable();//15; //stability =15; taliseArmGpioConfig_t armGpio = { {TAL_GPIO_02,0,1}, {TAL_GPIO_03,0,1}, {TAL_GPIO_00,0,0}, {TAL_GPIO_00,0,0}, {TAL_GPIO_00,0,0} }; uint32_t initCalMask = TAL_TX_BB_FILTER | TAL_ADC_TUNER | TAL_TIA_3DB_CORNER | TAL_DC_OFFSET | TAL_TX_ATTENUATION_DELAY | TAL_RX_GAIN_DELAY | TAL_FLASH_CAL | TAL_PATH_DELAY | TAL_TX_LO_LEAKAGE_INTERNAL | TAL_TX_QEC_INIT | TAL_LOOPBACK_RX_LO_DELAY | TAL_LOOPBACK_RX_RX_QEC_INIT | TAL_RX_LO_DELAY| TAL_RX_QEC_INIT | TAL_ADC_STITCHING| TAL_ORX_LO_DELAY | //add 260518 ORx 专用初始化校准 TAL_ORX_QEC_INIT //add 260518 ORx 专用初始化校准 ; uint8_t errorFlag = 0; taliseErr_t mykError = TAL_ERR_OK; uint8_t i; uint8_t multStatus; int ret = 0; uint32_t talAction = TALACT_NO_ACTION; if(which_9009==ADRV9009_0){ printf("adrv9009_cfg(ADRV9009_0) start.\n"); p_myTaliseDevice_shm = taliseDeviceInfo1.ptalDevice; memcpy(p_myTalInit, (taliseDeviceInfo1.ptalInit), sizeof(myTalInit)); } else{ printf("adrv9009_cfg(ADRV9009_1) start.\n"); p_myTaliseDevice_shm = taliseDeviceInfo2.ptalDevice; memcpy(p_myTalInit, (taliseDeviceInfo2.ptalInit), sizeof(myTalInit)); } printf("\nTALISE_openHw\r\n"); talAction = TALISE_openHw(p_myTaliseDevice_shm); if (talAction != TALACT_NO_ACTION){ printf("Err: openhw faile %d! \r\n", talAction); } /* cold reset dev */ printf("\nTALISE_resetDevice\r\n"); talAction=TALISE_resetDevice(p_myTaliseDevice_shm); if (talAction != TALACT_NO_ACTION){ printf("Err: reset faile %d! \r\n", talAction); } printf(">> \ntalise init\n"); /* initialization dev */ for (i = 0; i < 3; i++) { printf("\nTALISE_initialize time=[%d]\r\n",i); talAction = TALISE_initialize(p_myTaliseDevice_shm, &myTalInit); printf("TALISE_initialize! \r\n"); if (talAction != TALACT_NO_ACTION){ printf("Err: initialize times %d error code is %d! (Next)\r\n\n", i, talAction); TALISE_resetDevice(p_myTaliseDevice_shm); sleep(1); } else /* init dev success */ { /* CLKPLL lock status check */ pllLockStatus = 0; printf("\n[ adrv9009_cfg ]->TALISE_getPllsLockStatus time=%d\r\n",i); talAction = TALISE_getPllsLockStatus(p_myTaliseDevice_shm, &pllLockStatus); //0x01-CLKPLL 0x03-CLKPLL+RFPLL 0x07-CLKPLL+RFPLL+AUXPLL printf("checkPllsLockStatus is 0x%x ! \r\n", pllLockStatus); if (pllLockStatus & 0x01) /* CLKPLL locked */ { #if 0 //commented by @cc0423 printf("\n[ adrv9009_cfg ]->TALISE_enableMultichipSync enableMcs=1 time=%d\r\n",i); talAction =TALISE_enableMultichipSync(p_myTaliseDevice_shm, 1, &multStatus); if (talAction != TALACT_NO_ACTION){ printf("FAIL: enableMultichipSync 1 %d error code is %d! \r\n", i, talAction); return talAction; } /*#if ENSYSREFS //open sysref addr = 0x0D<<2; //change to logic addr data = 0x1100; write_axireg(addr,&data); #endif*/ printf("\n[ adrv9009_cfg ]->TALISE_enableMultichipSync enableMcs=0 time=%d\r\n",i); talAction = TALISE_enableMultichipSync(p_myTaliseDevice_shm, 0, &multStatus); if ((multStatus & 0x0B) != 0x0B){ printf("FAIL: enableMultichipSync 0 %d error code is %d! \r\n", i, talAction); return talAction; } printf("SUCCESS: i =%d multStatus =0x%x ! \r\n",i,multStatus); #else //TALISE_serializerReset(p_myTaliseDevice_shm); #endif /*#if ENSYSREFS addr = 0x0D<<2; //change to logic addr data = 0x0000; write_axireg(addr,&data); #endif*/ printf("\nTALISE_initArm time=%d\r\n",i); talAction = TALISE_initArm(p_myTaliseDevice_shm, &myTalInit); printf("\nTALISE_loadStreamFromBinary time=%d\r\n",i); talAction = TALISE_loadStreamFromBinary(p_myTaliseDevice_shm, (uint8_t *)&streamBinary[0]); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_loadStreamFromBinary %d! \r\n", talAction); } printf("\nTALISE_loadArmFromBinary time=%d\r\n",i); talAction = TALISE_loadArmFromBinary(p_myTaliseDevice_shm, (uint8_t *)&armBinary[0], count); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_loadArmFromBinary %d! \r\n", talAction); } /* TALISE_verifyArmChecksum() will timeout after 200ms * if ARM checksum is not computed */ printf("\nTALISE_verifyArmChecksum time=%d\r\n",i); talAction = TALISE_verifyArmChecksum(p_myTaliseDevice_shm); if (talAction != TAL_ERR_OK){ /*< user code- ARM did not load properly - check armBinary & clock/profile settings >*/ printf("Err: TALISE_verifyArmChecksum %d! (return -1)\r\n", talAction); return -1; } if (talAction == TALACT_NO_ACTION){ printf("BREAK for loop\n"); break; } } else{ printf("Err: CLKPLL times %d is 0x%x unlocked! \r\n", i, pllLockStatus); } } } if (i >= 3){ printf("Err: initialize beyond 3 times fail! (return)\n"); return talAction; } #if 0//for test /* set RF freq and check lock */ for (i = 0; i < 3; i++) { printf("\n[ adrv9009_cfg ]->TALISE_setRfPllFrequency to %dMHz time=%d\r\n",i); talAction = TALISE_setRfPllFrequency(p_myTaliseDevice_shm, TAL_RF_PLL, TX_FREQ_IN_HZ); if (talAction != TALACT_NO_ACTION){ // < User: decide what to do based on Talise recovery action returned > printf("Err: TALISE_setRfPllFrequency talAction=%d times=%d\r\n", talAction, i); } // delay 200ms usleep(200*1000); // CLKPLL lock status check printf("\n[ adrv9009_cfg ]->TALISE_getPllsLockStatus time=%d\r\n",i); talAction = TALISE_getPllsLockStatus(p_myTaliseDevice_shm, &pllLockStatus); printf("PLL lockStatus=0x%x\n", pllLockStatus); if (0x07 == (pllLockStatus & 0x07)){ printf("PLL locked\n"); break; } } if (i >= 3){ printf("Err: setRfPllFrequency beyond 3 times fail,talAction=%d! (return )\r\n", talAction); return talAction; } #endif TALISE_setRfPllLoopFilter(p_myTaliseDevice_shm, loopBandwidth_kHz, stability); printf("setRfPllLoopFilter lp_bw_khz=%d stable=%d\n", loopBandwidth_kHz, stability ); printf(">> \nset freq\n"); chang_freq(0, 1); printf(">> \nrunInitCals\n"); #if 1 /* runInitCals */ for (i = 0; i < 3; i++) { printf("\nTALISE_runInitCals time=%d\r\n",i); talAction = TALISE_runInitCals(p_myTaliseDevice_shm, initCalMask); if (talAction != TALACT_NO_ACTION){ printf("Err: TALISE_runInitCals talAction=%d! \r\n", talAction); printf("cfg 9009 70,%d! \r\n", talAction); } printf("\nTALISE_waitInitCals time=%d\r\n",i); talAction = TALISE_waitInitCals(p_myTaliseDevice_shm, 20000, &errorFlag); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_waitInitCals talAction=%d! errorFlag=0x%02x\r\n", talAction, errorFlag); printf("cfg 9009 71,%d! \r\n", talAction); } uint32_t calsSincePowerUp=0; uint32_t calsLastRun=0; uint32_t calsMinimum=0; uint8_t initErrCal =0; uint8_t initErrCode=0; TALISE_getInitCalStatus(p_myTaliseDevice_shm, &calsSincePowerUp, &calsLastRun, &calsMinimum, &initErrCal, &initErrCode); printf("TALISE_getInitCalStatus :calsSincePowerUp=0x%02x, calsLastRun=0x%02x, calsMinimum=0x%02x, initErrCal=0x%02x, initErrCode=0x%02x\n", calsSincePowerUp, calsLastRun, calsMinimum, initErrCal, initErrCode ); if (talAction != TALACT_NO_ACTION){ printf("FAIL: runInitCals time %d fail,errorFlag=0x%x! \r\n", i, talAction); } else{ break; } } if (i >= 3){ printf("Err: runInitCals beyond 3 times fail! (return )\r\n"); return talAction; } #endif //------------------------------------------------------------------------------------- printf("\n>> \nFor Framer A:\n"); /* Enable sysRef to mykonos jesd204b framer */ printf("\nTALISE_enableFramerLink disable\r\n"); talAction = TALISE_enableFramerLink(p_myTaliseDevice_shm, TAL_FRAMER_A, 0); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_enableFramerLink talAction=%d\r\n", talAction); } printf("\nTALISE_enableFramerLink enable\r\n"); talAction |= TALISE_enableFramerLink(p_myTaliseDevice_shm, TAL_FRAMER_A, 1); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_enableFramerLink talAction=%d\r\n", talAction); } printf("\nTALISE_enableSysrefToFramer \r\n"); talAction = TALISE_enableSysrefToFramer(p_myTaliseDevice_shm, TAL_FRAMER_A, 1); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_enableSysrefToFramer talAction=%d\r\n", talAction); } //------------------------------------------------------------------------------------- printf("\n>> \nFor Deframer A:\n"); printf("\nTALISE_enableDeframerLink disable\r\n"); talAction = TALISE_enableDeframerLink(p_myTaliseDevice_shm, TAL_DEFRAMER_A, 0); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_enableDeframerLink talAction=%d\r\n", talAction); } printf("\nTALISE_enableDeframerLink enable\r\n"); talAction |= TALISE_enableDeframerLink(p_myTaliseDevice_shm, TAL_DEFRAMER_A, 1); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_enableDeframerLink talAction=%d\r\n", talAction); } printf("\nTALISE_enableSysrefToDeframer enable\r\n"); talAction = TALISE_enableSysrefToDeframer(p_myTaliseDevice_shm, TAL_DEFRAMER_A, 1); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_enableSysrefToDeframer talAction=%d\r\n", talAction); } //------------------------------------------------------------------------------------- uint16_t deframerStatus = 0; uint8_t framerStatus = 0; printf("\n>> \nTALISE_readDeframerStatus \r\n"); talAction = TALISE_readDeframerStatus(p_myTaliseDevice_shm, TAL_DEFRAMER_A, &deframerStatus); if (talAction != TALACT_NO_ACTION){ printf("Err: TALISE_readDeframerStatus talAction=%d\r\n", talAction); } printf("DeframerStatus,0x%x! \r\n",deframerStatus); printf("\nTALISE_readFramerStatus \r\n"); talAction = TALISE_readFramerStatus(p_myTaliseDevice_shm, TAL_FRAMER_A, &framerStatus); if (talAction != TALACT_NO_ACTION){ printf("Err: TALISE_readFramerStatus talAction=%d\r\n", talAction); } printf("framerStatus,0x%x! \r\n",framerStatus); //------------------------------------------------------------------------------------- #if ENSYSREFS //open sysref addr = 0x0D<<2; //change to logic addr data = 0x1100; write_axireg(addr,&data); #endif /* uint32_t trackingCalMask = TAL_TRACK_NONE; talAction = TALISE_enableTrackingCals(&talDevice, trackingCalMask); if (talAction != TALACT_NO_ACTION){ } talAction = TALISE_radioOn(&talDevice); if (talAction != TALACT_NO_ACTION){ } talAction = TALISE_shutdown(p_myTaliseDevice_shm); if (talAction != TALACT_NO_ACTION){ } printf("come in cfg 9009 9,%d! \r\n",talAction); talAction = TALISE_closeHw(p_myTaliseDevice_shm); if(talAction != TALACT_NO_ACTION){ } */ printf("\nTALISE_radioOn \r\n"); talAction = TALISE_radioOn(p_myTaliseDevice_shm); if (talAction != TALACT_NO_ACTION){ /*** < User: decide what to do based on Talise recovery action returned > ***/ printf("Err: TALISE_radioOn talAction=%d\r\n", talAction); } #define _TETST_DISABLE_PINMOD (1) #if _TETST_DISABLE_PINMOD //PR06-2: 使能 RX1（o_rx/framerA 经外部 TX->RX1 电缆干净观测 TX 输出；ILA 改抓 o_rx） printf("\nTALISE_setRadioCtlPinMode _TETST_DISABLE_PINMOD\r\n"); TALISE_setRadioCtlPinMode(p_myTaliseDevice_shm, 0, TAL_ORX1ORX2_PAIR_NONE_SEL); #if 0//add for test /* Keep TX1 off until FPGA/JESD/DPD/FAGC boot configuration is complete. */ adrv9009_set_tx_path_enable(0); #else TALISE_setRxTxEnable(p_myTaliseDevice_shm, TAL_ORX1_EN, TAL_TX1); /* PR06-2 ORx-only: 使能 ORx1 观测 TX */ #endif /* PR06-2: 运行态设 TX1->ORX1 映射(cal时的不保持到运行态), ORx 才观测到 TX */ TALISE_setTxToOrxMapping(p_myTaliseDevice_shm, 1, TAL_MAP_TX1_ORX, TAL_MAP_NONE); /* PR06-2: 走 SPI3(imx6仲裁)设 RX1 手动增益去饱和(profile的rx1GainIndex因SPI3归FPGA不生效) */ /* PR06-2: imx6 keeps control of RX1 gain — takes SPI3 (E_CTRL_SRC_MCU), writes an initial gain, immediately releases to FPGA (E_CTRL_SRC_FPGA). The FPGA AGC then servos from there, but imx6 can reclaim SPI3 anytime (cfg_adrv9009_spi_ctrl_source). */ /* PR06-2 ORx-only: 照参考工程(ATSC_260703) — imx6设初值后把SPI3交还FPGA常驻, FPGA的ORx AGC(agc_spi_ctrl_gen 写 0x05D3 原始195..255)接管伺服去饱和。 注意: TALISE_setObsRxManualGain 走-128转换(195->67), 只作初值, 会被FPGA AGC覆盖。 */ /* PR06-2 ORx-only: 设初值后把SPI3交还FPGA常驻, FPGA的ORx AGC(读120M fb_idata)接管 */ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_MCU); TALISE_setObsRxManualGain(p_myTaliseDevice_shm, TAL_ORX1, 255); /* 初值(会被FPGA AGC覆盖) */ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_FPGA); /* 交还SPI3给FPGA: ORx AGC 接管 */ printf("[orx] SPI3 released to FPGA; FPGA ORx AGC (reads 120M fb_idata) takes over\n"); #else printf("\nTALISE_setRadioCtlPinMode \r\n"); TALISE_setRadioCtlPinMode(p_myTaliseDevice_shm, TAL_TXRX_PIN_MODE|TAL_ORX_PIN_MODE, TAL_ORX1ORX2_PAIR_89_SEL); #endif printf("\nTALISE_setArmGpioPins \r\n"); TALISE_setArmGpioPins(p_myTaliseDevice_shm, &armGpio); printf("\n[ adrv9009_cfg ] end. \r\n"); //[TALISE_getRfPllLoopFilter] lp_bw_khz=50 stable=3 TALISE_getRfPllLoopFilter(p_myTaliseDevice_shm, &loopBandwidth_kHz, &stability); printf("[getRfPllLoopFilter] lp_bw_khz=%d stable=%d\n", loopBandwidth_kHz, stability ); #if 0 TALISE_radioOff(p_myTaliseDevice_shm); TALISE_setRadioCtlPinMode(p_myTaliseDevice_shm, 0, TAL_ORX1ORX2_PAIR_NONE_SEL); TALISE_setRxTxEnable(p_myTaliseDevice_shm, TAL_ORX1_EN, TAL_TX1); TALISE_radioOn(p_myTaliseDevice_shm); #endif return talAction; #endif } int Adrv9009_Ext_LOL_Cal_1(int which_9009) //for tx1 ext lol cal { fpga_write_axi0(0x17,0x0,1); if(which_9009==ADRV9009_0) { fpga_write_axi0(0x18,0x02,1); } else { fpga_write_axi0(0x1a,0x02,1); } TALISE_Ext_LOL_Cal_1(which_9009); fpga_write_axi0(0x17,0x0f,1); } int Adrv9009_Ext_LOL_Cal_2(int which_9009)//for tx2 ext lol cal { fpga_write_axi0(0x17,0x0,1); if(which_9009==ADRV9009_0) { fpga_write_axi0(0x19,0x02,1); } else { fpga_write_axi0(0x1b,0x02,1); } TALISE_Ext_LOL_Cal_2(which_9009); fpga_write_axi0(0x17,0x0f,1); } /*void read_fpga_version(char *pVer) { u32 u32data = 0; if(pVer==NULL) return ; fpga_read(0x86, &u32data, 1); int y = u32data>>16 & 0xFFFF; int m = u32data>>8 & 0xFF; int d = u32data>>0 & 0xFF; fpga_read(0x87, &u32data, 1); sprintf(pVer, "%d%d%d-%d", y, m, d, u32data&0xffff); return; }*/ #if 1 void cfr_clip_config(double set_clip_amp) { u16 d_clip_amp, d_clip_amp_sqr; u32 v_conf; d_clip_amp = set_clip_amp * 4096.0*0.95; // fixdt(0,16,12) d_clip_amp_sqr = set_clip_amp * set_clip_amp *256.0; // fixdt(0,16,8); v_conf = (d_clip_amp_sqr<<16) | d_clip_amp; fpga_write_axi0(AXI_ADDR_CFR_CTRL1,v_conf,1); } static const int CRST_REFAD_TAB[][6] = { {1,2,2,3,1,3}, //0 {0,2,0,3,2,3}, //1 {1,3,0,1,3,4}, //2 {2,4,1,2,4,5}, //3 {3,4,5,4,4,4}, //4 {4,5,6,5,5,5}, //5 {5,6,7,6,6,6}, //6 {6,7,8,7,7,7}, //7 {7,8,9,8,8,8}, //8 {8,9,10,9,9,9}, //9 {9,10,11,10,10,10}, //10 {10,12,9,10,12,13}, //11 {11,13,10,11,13,14}, //12 {12,14,11,12,14,11}, //13 {13,12,12,11,13,11} //14 }; int dpd_powon() { /* int i = 0; fpga_write_axi0(AXI_ADDR_BW_MODE, DPD_SET_100M,1); fpga_write_axi0(AXI_ADDR_CRST_TAP_MAP, 0x07f0 ,1); // 0x07f0: +-3; 0x7fff: +-7 for(i=0;i<15;i++) // set CRST REF AD { fpga_write_axi0(AXI_ADDR_CRST_ADREF_TAP0+i, DPD_SET_CRST_REFAD(CRST_REFAD_TAB[i]),1); } fpga_write_axi0(AXI_ADDR_DPD_FIXDLY, 0,1); fpga_write_axi0(AXI_ADDR_AMP_SAT, DPD_MAX_TX_AMP_SAT, 1); //set maximum tx amp fpga_write_axi0(AXI_ADDR_DPD_CTRL1, DPD_CTRL1_ALL_BYPS, 1); fpga_write_axi0(AXI_ADDR_DPD_CTRL2, 0, 1); fpga_write_axi0(AXI_ADDR_DPD_CTRL3, 0, 1); cfr_clip_config(2.59); // 6.17 -> 8.5dB@0.01% fpga_write_axi0(AXI_ADDR_CFR_CTRL2, 0x00, 1); // enable CFR fpga_write_axi0(AXI_ADDR_SIG_SHIFT, DPD_SET_DGAIN(4096), 1); // fixdt(0,16,12) fpga_write_axi0(AXI_ADDR_DPD_TEST,0x1000,1); // 1: slow update; 0: fast update */ } void usr_Adrv9009_Ext_Lol_Cal(void) { printf("\n\n==>>>==Start. Adrv9009 Ext LOL Cal...\n"); //external LOL calibration -ad9009 TX1 Adrv9009_Ext_LOL_Cal_1(ADRV9009_0); Adrv9009_Ext_LOL_Cal_1(ADRV9009_1); fpga_write_axi0(0x18, 0x03, 1);//ADV9009_1 0RX RF_SWITCH ON fpga_write_axi0(0x17, 0x0f, 1);//ADV9009_1 TX RF_SWITCH ON printf("==<<<==Finish. Adrv9009 Ext LOL Cal\n"); } void set_pa_output(u8 set_enable) { fpga_write_axi0(0x100, set_enable, 1); printf("set pa output=%d\n", set_enable); } #define TEST_JESD204B_CFG 0 #define TIME_WAIT 5 #define DBG_DISABLE_SINGLE_AXI_WR (0) //typedef unsigned char uint8_t; //typedef unsigned short uint16_t; void usr_check_state() { uint32_t talAction = TALACT_NO_ACTION; uint8_t pllLockStatus = 0; uint32_t radioStatus = 0; printf("\n\n===============check state...==============\n\n"); //1. talAction = TALISE_getPllsLockStatus(p_myTaliseDevice_shm, &pllLockStatus); printf("ck1. PLLs lockStatus=0x%x(bit210) ret=%d LocK[CLK_PLL=%d RF_PLL=%d AUX_PLL=%d]\n", pllLockStatus, talAction, pllLockStatus&0x1, (pllLockStatus>>1)&0x1, (pllLockStatus>>2)&0x1 ); //2. talAction = TALISE_getRadioState(p_myTaliseDevice_shm, &radioStatus); if (radioStatus == TALISE_ARM_RADIO_STATUS_POWERUP){ printf("ck2. radioState=0x%x powerup\n", radioStatus); } else if (radioStatus == TALISE_ARM_RADIO_STATUS_READY){ printf("ck2. radioState=0x%x rdy\n", radioStatus); } else if (radioStatus == TALISE_ARM_RADIO_STATUS_IDLE){ printf("ck2. radioState=0x%x idle\n", radioStatus); } else if (radioStatus == TALISE_ARM_RADIO_STATUS_RADIO_ON){ printf("ck2. radioState=0x%x radio on\n", radioStatus); } else if (radioStatus == TALISE_ARM_RADIO_STATUS_PROFILE_ERROR){ printf("ck2. radioState=0x%x profile_err\n", radioStatus); } else{ printf("ck2. radioState=0x%x reset_err\n", radioStatus); } //3. uint32_t calsSincePowerUp=0; uint32_t calsLastRun=0; uint32_t calsMinimum=0; uint8_t initErrCal =0; uint8_t initErrCode=0; TALISE_getInitCalStatus(p_myTaliseDevice_shm, &calsSincePowerUp, &calsLastRun, &calsMinimum, &initErrCal, &initErrCode); printf("ck3. TALISE_getInitCalStatus :calsSincePowerUp=0x%02x, calsLastRun=0x%02x, calsMinimum=0x%02x, initErrCal=0x%02x, initErrCode=0x%02x\n", calsSincePowerUp, calsLastRun, calsMinimum, initErrCal, initErrCode ); //4. taliseTxLolStatus_t result; talAction = TALISE_getTxLolStatus(p_myTaliseDevice_shm, (taliseTxChannels_t)TAL_TX1, &result); printf("ck4. TxLolStatus=0x%x ret=%d\n", result, talAction); //5. taliseTxQecStatus_t txQecStatus; talAction = TALISE_getTxQecStatus(p_myTaliseDevice_shm, (taliseTxChannels_t)TAL_TX1, &txQecStatus); printf("ck5. TxQecStatus=0x%x ret=%d\n", txQecStatus, talAction); //6. uint8_t framerStatus; talAction = TALISE_readFramerStatus(p_myTaliseDevice_shm, (taliseFramerSel_t)TAL_FRAMER_A, &framerStatus); printf("ck6. framerAStatus=0x%x ret=%d\n", framerStatus, talAction); //7. //uint8_t framerStatus; talAction = TALISE_readFramerStatus(p_myTaliseDevice_shm, (taliseFramerSel_t)TAL_FRAMER_B, &framerStatus); printf("ck7. framerBStatus=0x%x ret=%d\n", framerStatus, talAction); //8. uint16_t deframerStatus; talAction = TALISE_readDeframerStatus(p_myTaliseDevice_shm, (taliseFramerSel_t)TAL_FRAMER_A, &deframerStatus); printf("ck8. DeframerAStatus=0x%x ret=%d\n", deframerStatus, talAction); //9. //uint16_t deframerStatus; talAction = TALISE_readDeframerStatus(p_myTaliseDevice_shm, (taliseFramerSel_t)TAL_FRAMER_B, &deframerStatus); printf("ck9. DeframerBStatus=0x%x ret=%d\n", deframerStatus, talAction); printf("\n\n===============check done...==============\n\n"); } void adrv9009_init(void) { u32 readdat; u32 datbuf[32]; int i = 0; int ret; uint32 tmp_data; uint8 time_wait; static uint8_t stc_spi_init = 0; printf("\n\n\n=============================adrv9009 init start.=====>>>======================\n\n"); if(stc_spi_init==0){ stc_spi_init=1; spi_9009_init(); } #if 0 fpga_write_axi0(0xB1, 0x06, 1); fpga_read_axi0(0xB1, &readdat, 1); printf("boot rst_set wr_axi addr=0xB1 wdata=0x06 rdata=0x%x\n", readdat); fpga_write_axi0(0xB1, 0x00, 1); fpga_read_axi0(0xB1, &readdat, 1); printf("boot rst_clr wr_axi addr=0xB1 wdata=0x00 rdata=0x%x\n", readdat); #endif set_pa_output(0); #if 1//CH0 printf("\n\nch0 start...----------------------------------------------------------------------\n"); memset(datbuf, 0x0, sizeof(datbuf)); fpga_read_axi0(0x80, datbuf, 0x10); for(i = 0; i < 0x10; i++) { printf("fpga_read_axi0(0x%x)=0x%x.\n", 0x80+i, datbuf[i]); } jesd204b_tx0_cfg(); #if TEST_JESD204B_CFG time_wait=TIME_WAIT; jesd204b_rd_test(); while(time_wait--){ sleep(1); printf("[1/3] waiting 204b tx0_cfg for continue %d\n", time_wait);///////////////////////////////////////////// 1 } printf("\n\n"); #endif readdat = 0; ret = ad9009_read_spi(1, 0x100, &readdat, 1); if(ret == OK) { printf("ad9009_read_spi(1,0x%x)=0x%x.\n", 0x100, readdat); } else { printf("ERROR:ad9009_read_spi(1,0x%x) fail.\n",0x100); } ret = adrv9009_cfg(ADRV9009_0); if(ret == 0) { printf("adrv9009_cfg(ADRV9009_0) successful.\n\n"); } else { printf("adrv9009_cfg(ADRV9009_0) fail.\n\n"); } #if !DBG_DISABLE_SINGLE_AXI_WR //------------------------------------------------------ fpga_write_axi0(0x13, 3, 1); fpga_write_axi0(0x14, 3, 1); #endif jesd204b_fb0_cfg(); jesd204b_rx0_cfg(); /*reset gt*/ /*tx-bit0 rx-bit4 fb-bit8 */ fpga_write_axi0(0x78, 0x111, 1); fpga_write_axi0(0x78, 0x0, 1); //----------------------------------------------------------------------- //cfg tx 9009*/ jesd204b_tx0_wr(0x04, 0x01); #if TEST_JESD204B_CFG time_wait=TIME_WAIT; jesd204b_rd_test(); while(time_wait--){ sleep(1); printf("[3/3] waiting 204b tx0_wr for continue %d\n", time_wait);///////////////////////////////////////////// 3 } printf("\n\n"); #endif //----------------------------------------------------------------------- //cfg rx 9009 jesd204b_rx0_wr(0x04, 0x01); //cfg fb 9009 //temp disable, wait for song to confirm 260514 // jesd204b_fb0_wr(0x04, 0x01); memset(datbuf, 0x0, sizeof(datbuf)); //jesd204b rd sync b0-ad b1-fb b2-tx check =3 ret = fpga_read_axi0(0xb0, &datbuf[0], 3); if(ret == OK) { printf("\n\n\nfpga_read_axi0(0x%02x)=0x%x.\n", 0xb0, datbuf[0]); printf("fpga_read_axi0(0x%02x)=0x%x.\n", 0xb1, datbuf[1]); printf("fpga_read_axi0(0x%02x)=0x%x.\n\n\n", 0xb2, datbuf[2]); } else { printf("ERROR:fpga_read_axi0(0x02%) fail.\n", 0xb0); } printf("ch0 finished.----------------------------------\n"); #endif//CH0 #if 1 #if !DBG_DISABLE_SINGLE_AXI_WR fpga_write_axi0(0x16, 0x0f, 1);//ADV9009_1 RX RF_SWITCH ON fpga_read_axi0(0x16, &tmp_data, 1); fpga_write_axi0(0x17, 0x0f, 1);//ADV9009_1 TX RF_SWITCH ON fpga_read_axi0(0x16, &tmp_data, 1); fpga_write_axi0(0x18, 0x03, 1);//ADV9009_1 0RX RF_SWITCH ON fpga_read_axi0(0x16, &tmp_data, 1); fpga_write_axi0(0x1a, 0x03, 1);//ADV9009_1 0RX3 RF_SWITCH ON fpga_read_axi0(0x16, &tmp_data, 1); fpga_write_axi0(0x7a, 0x10, 1);//ORX loopback to TX change IQ fpga_read_axi0(0x16, &tmp_data, 1); fpga_write_axi0(0x59, 0x10, 1);//ORX loopback to TX change IQ fpga_read_axi0(0x16, &tmp_data, 1); fpga_write_axi0(0x5a, 0x10, 1);//ORX loopback to TX change IQ fpga_read_axi0(0x16, &tmp_data, 1); //@h210810 (0x0a, 0x01, 1) => (0x0a, 0x03, 1) //@h210811 (0x0a, 0x03, 1) => (0x0a, 0x02, 1) fpga_write_axi0(0x0a, 0x02, 1); //ADV9009_1 0: cw; 1 : RX loopback to TX; 2 fb loopback to TX; 3 dtmb 03 printf("add 0x0a, data = 0x02\n"); fpga_write_axi0(0x0b, 0x00, 1);//ADV9009_2 RX loopback to TX #endif //Adrv9009_Ext_LOL_Cal_1(ADRV9009_0); //remove 250708 //------------------------------------------------------ //ad9009-tx1 // PR06-2 修复①: 注释掉运行态8dB TX衰减(同260702:974) → TX满功率, ORx内部环回观测+8dB //usr_set_ad9009_TxAttenuation(D_SET_ATT, 1); usr_get_ad9009_getTxAttenuation(1); // uint16 adrv_att = 0;//8000; // cfg_adrv_att(adrv_att); fpga_read_axi0(AXI_ADDR_VERSION1, &readdat, 1); printf("Current FPGA version is 0x%x \n", readdat&0xffff); //initialize DPD dpd_powon(); // PR06: 重新启用 DPD 自适应(配合FPGA DPDENABLE). 若降速DPD导致boot挂起可回退注释掉. // turn on fpga tx signal fpga_write_axi0(AXI_ADDR_FBROUTE, 0x10, 1); //cleanup_platform(); printf("\n\n\n===========================adrv9009 init end.===============================<<<============\n\n"); //------------------------------------------------------ u32 cfg_cw=1; cfg_cw = 1; fpga_write_axi0(0x0001, (u32)cfg_cw, 1); printf("SET CW %d\n", cfg_cw); //set_pa_output(1); jesd204b_tx0_wr(0x002c, 0); jesd204b_fb0_wr(0x002c, 0);//add 260514 usr_check_state(); // PR06 fix(A) 对齐260702: 晚一次接收侧GT复位。早期唯一的GT复位(0x78=0x111)在framer B // 被拉起(radioOn/setRxTxEnable)之前; Subclass-0需"framer先发→再复位对齐接收端GT"。 // 补一次 rx(bit4)+fb(bit8) 复位(保TX framer bit0=0), 让FPGA FB-RX GT对着已在发送的 // framer B重新comma对齐。(260702实测: 从fb_sync=0变0xBB=0x03。) fpga_write_axi0(0x78, 0x110, 1); usleep(2000); fpga_write_axi0(0x78, 0x0, 1); sleep(1); readdat=0; for(int j=0;j<20;j++){ fpga_read_axi0(0xBB, &readdat, 1); printf("rd reg=0xBB data=0x%x\n", readdat); } if((readdat==0x07) || (readdat==0x03)) printf("ok, fb init state ok!\n\n"); else printf("err, fb init state failed!\n\n"); //260514 add 0xB9 bit1: rfmon en / 0xB9 bit0: rxrf loop fpga_write_axi0(0xB9, 0x2, 1); printf("wr reg=0xB9 data=0x2\n\n"); //move to fpga_save_sys //cfg_adrv_orx_manu_gain(cttb_para.system_para.orx_manu_gain); /*talRecoveryActions_t retVal; retVal = (talRecoveryActions_t)TALISE_setObsRxManualGain(p_myTaliseDevice_shm, TAL_ORX1, 255); if (retVal == OK){ printf("SUCCESS:ad9009 TAL_ORX1 setObsManualGain 255! \r\n"); } else{ printf("FAIL: ad9009 TAL_ORX1 setObsRxManualGain!errorcode =%d \r\n", ret); } retVal = (talRecoveryActions_t)TALISE_setObsRxManualGain(p_myTaliseDevice_shm, TAL_ORX2, 255); if (retVal == OK){ printf("SUCCESS:ad9009 TAL_ORX2 setObsManualGain 255! \r\n"); } else{ printf("FAIL: ad9009 TAL_ORX2 setObsRxManualGain!errorcode =%d \r\n", ret); }*/ #if 1 // for test and read (later can be removed) //----------------------------------------------------------------------- // test frame B start /* 目标：让 ADRV9009 Framer B 本身输出确定性测试数据 测试前确认 JESD FB 链路正常 先读取： fpga[0xBB] FB0[0x38] FB0[0x2C] 期望： fpga[0xBB] bit1 = 1 // fb_sync fpga[0xBB] bit0 = 1 // fb_tvalid FB0[0x38] bit0 = 1 // in_sync FB0[0x2C] bit[1:0] = 0 // subclass 0，不使用 SYSREF DRV9009 Framer B test data: 由 ADRV9009 通过 JESD lane 发出测试数据。 用于验证 ADRV9009 Framer B -> FPGA JESD RX -> demap 这条完整接收链路。 Link.Talise.EnableFramerTestData( Talise.FramerSelect.FramerB, Talise.FramerDataSource.FtdAdcData, Talise.FramerInjectPoint.FtdFramerInput ) */ //// Framer B test data (Task11-3) { u32 fb_mon, fb_sta; u32 retVal; fpga_read_axi0(0xBB, &fb_mon, 1); fb_sta = jesd204b_fb0_rd(0x038); printf("\n---- Framer B test mode ----\n"); printf("fpga[0xBB] = 0x%02x (bit1=sync=%d, bit0=tvalid=%d)\n", fb_mon, (fb_mon >> 1) & 1, fb_mon & 1); printf("FB0[0x38] = 0x%08x (bit0=in_sync=%d)\n", fb_sta, fb_sta & 1); if ((fb_mon & 0x03) != 0x03) { printf("WARN: JESD FB link not fully ready, continue anyway\n"); } #if 0 //Enable Framer Test -- Ramp only for test retVal = TALISE_enableFramerTestData(p_myTaliseDevice_shm, TAL_FRAMER_B, TAL_FTD_RAMP, TAL_FTD_FRAMERINPUT); if (retVal == TALACT_NO_ACTION) { printf("TEST: Framer B RAMP enabled, check fb_idata/qdata via ILA\n"); } else { printf("FAIL: TALISE_enableFramerTestData err=0x%x\n", retVal); } #endif // === check 1: TALISE_readFramerStatus === { uint8_t framerStatus; u32 statusRet = TALISE_readFramerStatus(p_myTaliseDevice_shm, TAL_FRAMER_B, &framerStatus); if (statusRet == TALACT_NO_ACTION) { printf("RD: Framer B status = 0x%02x (bit[1:0]=sysref, bit[3:2]=sync, bit5=cfgSts3, bit6=cfgSts4)\n", framerStatus); } else { printf("RD: TALISE_readFramerStatus err=0x%x\n", statusRet); } } // === check 2: readback test data source register (0x1534+0x28=0x155C for Framer B) === { uint8_t regVal; adiHalErr_t halErr = talSpiReadByte(p_myTaliseDevice_shm->devHalInfo, TALISE_ADDR_JESD_FRAMER_TEST_CFG_0 + TALISE_JESD_FRAMERB_OFFSET, ®Val); if (halErr == ADIHAL_OK) { const char *srcName; switch (regVal & 0x0F) { case 0: srcName = "ADC_DATA(0)"; break; case 1: srcName = "CHECKERBOARD"; break; case 2: srcName = "TOGGLE"; break; case 3: srcName = "PRBS31"; break; case 4: srcName = "PRBS23"; break; case 5: srcName = "PRBS15"; break; case 6: srcName = "PRBS9"; break; case 7: srcName = "PRBS7"; break; case 8: srcName = "RAMP"; break; default: srcName = "UNKNOWN"; break; } printf("RD: Framer B test cfg reg[0x%04X] = 0x%02x (dataSrc=%s, injPt=%d)\n", TALISE_ADDR_JESD_FRAMER_TEST_CFG_0 + TALISE_JESD_FRAMERB_OFFSET, regVal, srcName, (regVal >> 4) & 0x0F); if ((regVal & 0x0F) != 8) { printf("WARN: data source 0x%x != RAMP(0x8), test pattern NOT active!\n", regVal & 0x0F); } } else { printf("RD: spiRead Framer B test cfg reg failed, halErr=%d\n", halErr); } } // === check 3: warn if later init overwrites this register === printf("NOTE: If ILA still shows only small ADC data, verify later init steps\n"); printf(" (TALISE_radioOn, initCals, or profile reload) do not overwrite\n"); printf(" the test data source register at 0x%04X.\n", TALISE_ADDR_JESD_FRAMER_TEST_CFG_0 + TALISE_JESD_FRAMERB_OFFSET); printf("---- Framer B test mode end ----\n\n"); } //test_frameB end //----------------------------------------------------------------------- // === ORx config summary (for small I/Q debug) === { uint8_t orxGain; uint64_t pllFreq; printf("\n---- ORx config summary ----\n"); printf("ORx FIR gain_dB = %d (from profile)\n", p_myTalInit->obsRx.orxProfile.rxFir.gain_dB); printf("ORx rxFirDecimation = %u, rxDec5Decimation = %u, rhb1Decimation = %u\n", p_myTalInit->obsRx.orxProfile.rxFirDecimation, p_myTalInit->obsRx.orxProfile.rxDec5Decimation, p_myTalInit->obsRx.orxProfile.rhb1Decimation); printf("obsRxChannelsEnable = 0x%x %s\n", p_myTalInit->obsRx.obsRxChannelsEnable, p_myTalInit->obsRx.obsRxChannelsEnable == TAL_ORX1 ? "(ORX1)" : p_myTalInit->obsRx.obsRxChannelsEnable == TAL_ORX2 ? "(ORX2)" : p_myTalInit->obsRx.obsRxChannelsEnable == (TAL_ORX1|TAL_ORX2) ? "(ORX1|ORX2)" : "(other)"); printf("ORx framerSel = %s\n", p_myTalInit->obsRx.framerSel == TAL_FRAMER_B ? "FRAMER_B" : p_myTalInit->obsRx.framerSel == TAL_FRAMER_A ? "FRAMER_A" : "other"); if (TALISE_getObsRxGain(p_myTaliseDevice_shm, TAL_ORX1, &orxGain) == TALACT_NO_ACTION) printf("ORx1 gain index (readback from chip) = %u\n", orxGain); else printf("ORx1 gain readback FAILED\n"); if (TALISE_getRfPllFrequency(p_myTaliseDevice_shm, TAL_RF_PLL, &pllFreq) == TALACT_NO_ACTION) printf("TX PLL freq = %llu Hz (ORx uses same PLL)\n", pllFreq); else printf("TX PLL freq readback FAILED\n"); printf("---- ORx config end ----\n\n"); } printf("\n\n==================================================\n\n"); //------------------------------------------------------ #endif /* 建议继续读这些： 0x155F // Framer B SYSREF/status cfg2 0x1559 // Framer B CFG3，bit0 是 configStatus3 0x155A // Framer B CFG4，bit0 是 invalid config status，C0 以后有效 0x1554 // Framer B ASYNC_PTR_DBG 判断： 0x1559 bit0 应为 0 0x155A bit0 应为 0 0x1554 如果周期性异常，可能指向 Framer B async FIFO / pointer 问题 */ // === Framer B status debug registers === { printf("\n\n==================================================\n\n"); uint8_t reg155F, reg1559, reg155A, reg1554; // 0x155F: Framer B SYSREF/status cfg2 reg155F = 0; talSpiReadByte(p_myTaliseDevice_shm->devHalInfo, TALISE_ADDR_JESD_FRAMER_SYSREF_CFG2_0 + TALISE_JESD_FRAMERB_OFFSET, ®155F); printf("RD: Framer B SYSREF/status cfg2 [0x155F] = 0x%02x\n", reg155F); // 0x1559: Framer B CFG3, bit0 = configStatus3 reg1559 = 0; talSpiReadByte(p_myTaliseDevice_shm->devHalInfo, TALISE_ADDR_JESD_FRAMER_CFG3_0 + TALISE_JESD_FRAMERB_OFFSET, ®1559); printf("RD: Framer B CFG3 [0x1559] = 0x%02x (configStatus3 bit0=%d)\n", reg1559, reg1559 & 0x01); if (reg1559 & 0x01) printf("ERR: Framer B CFG3 bit0(configStatus3) expected 0!\n"); // 0x155A: Framer B CFG4, bit0 = invalid config status (valid after C0) reg155A = 0; talSpiReadByte(p_myTaliseDevice_shm->devHalInfo, TALISE_ADDR_JESD_FRAMER_CFG4_0 + TALISE_JESD_FRAMERB_OFFSET, ®155A); printf("RD: Framer B CFG4 [0x155A] = 0x%02x (invalidCfgSts bit0=%d)\n", reg155A, reg155A & 0x01); if (reg155A & 0x01) printf("ERR: Framer B CFG4 bit0(invalid config status) expected 0!\n"); // 0x1554: Framer B ASYNC_PTR_DBG reg1554 = 0; talSpiReadByte(p_myTaliseDevice_shm->devHalInfo, TALISE_ADDR_JESD_FRAMER_ASYNC_PTR_DBG_1, ®1554); printf("RD: Framer B ASYNC_PTR_DBG [0x1554] = 0x%02x\n", reg1554); printf("NOTE: if 0x1554 toggles periodically, may indicate Framer B async FIFO / pointer issue\n"); printf("\n\n==================================================\n\n"); } /* 然后看 TALISE_getInitCalStatus() 的： initErrCal initErrCode calsLastRun */ // === Init cal status check === { printf("\n\n==================================================\n\n"); uint32_t calsSincePowerUp = 0; uint32_t calsLastRun = 0; uint32_t calsMinimum = 0; uint8_t initErrCal = 0; uint8_t initErrCode = 0; uint32_t calRet = TALISE_getInitCalStatus(p_myTaliseDevice_shm, &calsSincePowerUp, &calsLastRun, &calsMinimum, &initErrCal, &initErrCode); printf("RD: TALISE_getInitCalStatus ret=0x%x, calsSincePowerUp=0x%x, calsLastRun=0x%x, calsMinimum=0x%x\n", calRet, calsSincePowerUp, calsLastRun, calsMinimum); printf("RD: initErrCal=%u, initErrCode=%u\n", initErrCal, initErrCode); if (initErrCal != 0) printf("WARN: initErrCal=%u, initErrCode=%u — init cal error detected!\n",initErrCal, initErrCode); printf("\n\n==================================================\n\n"); } #endif // for test and read } uint8_t swap_6bits_simple(uint8_t x) { // 只关注低6位 x &= 0x3F; // 提取各对位 uint8_t b0 = (x & 0x01); // bit0 uint8_t b1 = (x & 0x02); // bit1 uint8_t b2 = (x & 0x04); // bit2 uint8_t b3 = (x & 0x08); // bit3 uint8_t b4 = (x & 0x10); // bit4 uint8_t b5 = (x & 0x20); // bit5 // 重新组装：b0去bit5, b1去bit4... return (b0 << 5) | (b1 << 3) | (b2 << 1) | (b3 >> 1) | (b4 >> 3) | (b5 >> 5); } void cfg_fpga_agc_att(uint8 agc_att) { uint8 cfg_att = (~agc_att)&0x3f; uint8 dat = swap_6bits_simple(cfg_att); fpga_byte_write(0x01,0xBA,dat); uint8 rd_att; rd_att = fpga_byte_read(0x01,0xBA); printf("cfg att_fpga wr=%d rd=%d [%d] (%d / %f db)\n", dat, rd_att, dat, agc_att, -0.5*agc_att); } void cfg_adrv_att(uint16 set_att) { uint8 chg_src = 0; if(_g_adrv9009_spi_src!=E_CTRL_SRC_MCU){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_MCU); chg_src = 1; } usr_set_ad9009_TxAttenuation(set_att, 1); usr_get_ad9009_getTxAttenuation(1); if(chg_src==1){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_FPGA); } printf("cfg att_adrv %d\n", set_att); } void get_adrv9009_c0_orx_range(uint8 *pmin ,uint8 *pmax) { *pmin = 195; *pmax = 255; } void cfg_adrv_orx_manu_gain(uint8 orx_manu_gain_index) { talRecoveryActions_t retVal; uint8 min; uint8 max; uint8 chg_src = 0; if(_g_adrv9009_spi_src!=E_CTRL_SRC_MCU){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_MCU); chg_src = 1; } get_adrv9009_c0_orx_range(&min, &max); printf("cfg orx_manu_gain %d (%d ~ %d)\n", orx_manu_gain_index,min,max); retVal = (talRecoveryActions_t)TALISE_setObsRxManualGain(p_myTaliseDevice_shm, TAL_ORX1, orx_manu_gain_index); if (retVal == OK){ printf("SUCCESS:ad9009 TAL_ORX1 setObsManualGain %d! \r\n", orx_manu_gain_index); } else{ printf("FAIL: ad9009 TAL_ORX1 setObsRxManualGain!errorcode =%d \r\n", retVal); } retVal = (talRecoveryActions_t)TALISE_setObsRxManualGain(p_myTaliseDevice_shm, TAL_ORX2, orx_manu_gain_index); if (retVal == OK){ printf("SUCCESS:ad9009 TAL_ORX2 setObsManualGain %d! \r\n", orx_manu_gain_index); } else{ printf("FAIL: ad9009 TAL_ORX2 setObsRxManualGain!errorcode =%d \r\n", retVal); } if(chg_src==1){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_FPGA); } } /* PR06-2: RX1 手动增益走 SPI3(与 ORx 一样, imx6 仲裁 SPI3 控制权)。 profile 的 rx1GainIndex 不生效是因为 SPI3 归 FPGA; 必须 imx6 拿 MCU 控制权再设。 */ void cfg_adrv_rx1_manu_gain(uint8 rx1_manu_gain_index) { talRecoveryActions_t retVal; uint8 chg_src = 0; if(_g_adrv9009_spi_src!=E_CTRL_SRC_MCU){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_MCU); /* imx6 拿 SPI3 控制权 */ chg_src = 1; } printf("cfg rx1_manu_gain %d\n", rx1_manu_gain_index); retVal = (talRecoveryActions_t)TALISE_setRxManualGain(p_myTaliseDevice_shm, TAL_RX1, rx1_manu_gain_index); if (retVal == OK){ printf("SUCCESS:ad9009 TAL_RX1 setRxManualGain %d! \r\n", rx1_manu_gain_index); } else{ printf("FAIL: ad9009 TAL_RX1 setRxManualGain!errorcode =%d \r\n", retVal); } if(chg_src==1){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_FPGA); /* 释放 SPI3 回 FPGA */ } } /* PR06-2: read back where the FPGA RF-AGC has driven the RX1 gain index (0x0686). imx6 takes SPI3 (MCU), reads, releases to FPGA. Used to check if AGC hit floor 195. */ extern int usr_get_ad9009_RxGain(uint8_t *prxGainIndex, uint8_t channel); void cfg_adrv_rx1_read_gain(void) { uint8_t g = 0; uint8 chg_src = 0; if(_g_adrv9009_spi_src!=E_CTRL_SRC_MCU){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_MCU); chg_src = 1; } usr_get_ad9009_RxGain(&g, 1); /* channel 1 = TAL_RX1 */ printf("[rx1_agc] readback RX1 gain index = %d\n", g); if(chg_src==1){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_FPGA); } } static const uint16 s_loop_bw_value[3]={300,500,700}; static const uint8 s_loop_stable_value[3]={3,8,15}; uint16 get_loop_fbw_value() { /*if(atsc_para.rf_para.loop_fbw>2){ atsc_para.rf_para.loop_fbw = 2; }*/ uint8 loop_fbw = 2; return s_loop_bw_value[loop_fbw]; } uint16 get_loop_fbw_stable() { /*if(atsc_para.rf_para.loop_fpara>2){ atsc_para.rf_para.loop_fpara = 2; }*/ uint8 loop_fpara = 2; return s_loop_stable_value[loop_fpara]; } void chang_freq(uint8 radio_ctl, int freq_changed) { uint32_t talAction = TALACT_NO_ACTION; uint8_t pllLockStatus = 0; int i=0; int ret; uint8_t lock_sta = 0; uint32 fFreqMHz ; uint8 chg_src = 0; if(_g_adrv9009_spi_src!=E_CTRL_SRC_MCU){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_MCU); chg_src = 1; } fFreqMHz = txfreq_to_hz(atsc_para.rf_para.txfreq); if(radio_ctl==1){ pthread_mutex_lock(&g_orx_gain_lock); usr_printf_radiooff("chang_freq"); ret = TALISE_radioOff(p_myTaliseDevice_shm); if (ret != TALACT_NO_ACTION){ pthread_mutex_unlock(&g_orx_gain_lock); printf("chang_freq: TALISE_radioOff error!\n"); return ; } pthread_mutex_unlock(&g_orx_gain_lock); } for (i = 0; i < 3; i++) { //printf("\nTALISE_setRfPllFrequency to %dMHz time=%d\r\n", fFreqMHz, i); pthread_mutex_lock(&g_orx_gain_lock); talAction = TALISE_setRfPllFrequency(p_myTaliseDevice_shm, TAL_RF_PLL, fFreqMHz*1000000);//TX_FREQ_IN_HZ pthread_mutex_unlock(&g_orx_gain_lock); if (talAction == TALACT_NO_ACTION){ printf("\nchang_freq: set rf pll freq=%d succeed! cnt%d\r\n", fFreqMHz, i); } else{ printf("\nchang_freq: set rf pll freq=%d failed! (%d) cnt%d\n", fFreqMHz, talAction, i); } usleep(200*1000); pthread_mutex_lock(&g_orx_gain_lock); talAction = TALISE_getPllsLockStatus(p_myTaliseDevice_shm, &pllLockStatus); pthread_mutex_unlock(&g_orx_gain_lock); printf("PLL lockStatus=0x%x(bit210) ret=%d cnt%d\n", pllLockStatus, talAction, i); if (0x07 == (pllLockStatus & 0x07)){ printf("PLL locked\n"); lock_sta = 1; break; } } if(radio_ctl==1){ pthread_mutex_lock(&g_orx_gain_lock); ret = TALISE_radioOn(p_myTaliseDevice_shm); if (ret != TALACT_NO_ACTION){ pthread_mutex_unlock(&g_orx_gain_lock); printf("chang_freq: TALISE_radioOn error! ret=0x%x\n", ret); } pthread_mutex_unlock(&g_orx_gain_lock); } if (lock_sta==0){ printf("chang_freq: pll lock failed!\r\n\n"); } else{ printf("chang_freq: pll lock succeed!\r\n\n"); } if(chg_src==1){ cfg_adrv9009_spi_ctrl_source(E_CTRL_SRC_FPGA); } return ; } void chang_cw(int cw_changed) { //todo : //just for temp build } void jesd204b_tx0_test(void) { //jesd204b_tx0_wr(0x04, 0x01); //jesd204b_tx0_wr(0x81c,0x0); /*fpga_write_axi0(0xB5,0x0,1); fpga_write_axi0(0xB7,0x0,1); fpga_write_axi0(0xB6,0x0,1); fpga_write_axi0(0xB8,0x0,1); jesd204b_tx0_wr(0x04,0x01); jesd204b_tx0_wr(0x08,0x01); jesd204b_tx0_wr(0x0c,0x0); jesd204b_tx0_wr(0x10,0x01); jesd204b_tx0_wr(0x14,0x03); jesd204b_tx0_wr(0x18,0x0); jesd204b_tx0_wr(0x20,0x01); jesd204b_tx0_wr(0x24,0x1f); jesd204b_tx0_wr(0x28,0xf); jesd204b_tx0_wr(0x2c,0x01); jesd204b_tx0_wr(0x80c,0x01000a55); jesd204b_tx0_wr(0x810,0x000f0d03); jesd204b_tx0_wr(0x814,0x0); jesd204b_tx0_wr(0x818,0x0); jesd204b_tx0_wr(0x81c,0x0); uint8 time_wait=30; while(time_wait--){ sleep(1); printf("wait for jesd204b_tx0_test to continue %d...\n", time_wait); }*/ } #endif