#include <stdlib.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <fcntl.h>  //define O_WRONLY and O_RDONLY
#include <pthread.h>        /* mux-  */
#include <unistd.h>         /* -System V */
#include <sys/ioctl.h>      /* ioctl - BSD and Linux */
#include <stropts.h>        /* -XSI STREAMS */
#include <linux/spi/spidev.h>

#include <sys/types.h>
#include <sys/socket.h>
#include <netinet/in.h>
#include <sys/time.h>
#include <errno.h>
#include <sys/select.h>
#include <math.h>
#include <netinet/in.h>
#include <arpa/inet.h>

#include <stdio.h>
#include <string.h>
#include <unistd.h>
#include <net/if.h>
#include <sys/ioctl.h>
#include <arpa/inet.h>
#include <linux/sockios.h>
#include <linux/ethtool.h>





#include "../inc/config.h"
#include "../inc/type.h"
#include "../inc/igpio.h"
#include "../inc/isys_config.h"
#include "../inc/ispi.h"
#include "../inc/delay.h"
#include "../inc/ii2c.h"
#include "../inc/lcd_task.h"
#include "../inc/eeprom.h"
#include "../inc/i2c_drv.h"
#include "../inc/dac38j82.h"
#include "../inc/dpd_proc.h"
#include "../inc/uart_user.h"
#include "../inc/isys_com.h"
#include "../inc/tsoip.h"
#include "../inc/adrv9009_ext.h"
#include "../inc/fpga.h"


#if USE_TUNER_18273
#include "../tuner/tuner_conf.h"
#elif USE_TUNER_88436
#include "../tuner/tuner_conf.h"
#include "../mn88436/include/MN_DMD_driver.h"
#endif
//PR04: Sony CXD2878(FREIA) tuner driver ported from EMV9.3
#include "../sonytuner/sony_cxd6801gl.h"

#if 1
//extern S_CTTB_PARA cttb_para;
extern S_IP2TS_PARA ip2ts[2]; // 20220214 add by oneshu
extern char release_ver[30];
extern pthread_mutex_t mux_i2c_tuner;
extern void inset_tsoip_instance(TSOIP_INSTANCE *p_tsoip_instance, S_TSOIP_CONFIG_PARA *p_tsoip_cfg_param);
extern void ts_load_default_para(int tsoip_index, S_TSOIP_CONFIG_PARA *p_tsoip_config_param);
extern void reset_dpd_to_normal_state(void);
extern pthread_mutex_t mux_dpd_wr_ck;
extern TS_NET_STRUCT  ts_net_para;
extern pthread_mutex_t mtx_phase78910_again;
#endif

#if ___spi_dev__

//-------------------------------------
#define FPGA_SPI_NODE                   "/dev/spidev0.0"


//-------------------------------------

static  int fpga_spi_fd = -1;



//-------------------------------------

static void spi_fpga_gpio_init(void)
{
    log_printf(LOG_INFO, I_SYS_STATUS, "init spi gpio export\n");
    set_gpio_export(SPI1_MISO_GP_NUM);
    log_printf(LOG_INFO, I_SYS_STATUS, "over. init spi gpio export\n");


    log_printf(LOG_INFO, I_SYS_STATUS, "init spi gpio output\n");
    set_gpio_io_direct(SPI1_MISO_GP_NUM,E_IO_IN);
    log_printf(LOG_INFO, I_SYS_STATUS, "over. init spi gpio output\n");
}

uint8 GET_FPGA_SPI_MISO(void)
{
    //#define GET_FPGA_SPI_MISO()   GPIO_ReadInputDataBit(GPIOB,GPIO_Pin_14)
    uint8 u8val;
    int   ret;

    ret = get_gpio_value(SPI1_MISO_GP_NUM, &u8val);
    //ret = get_goio_value_by_shell(SPI1_MISO_GP_NUM, &u8val);
    return u8val;
}

void ad9528_reset_gpio(void)
{
    set_gpio_export(AD9528_RESET_GPIO_NUM);
    set_gpio_io_direct(AD9528_RESET_GPIO_NUM, E_IO_OUT);
    set_gpio_value(AD9528_RESET_GPIO_NUM, E_IO_H);
}

void spi_fpga_init(void)
{
    unsigned char mode = SPI_MODE_3 ;
    unsigned char bits = 8;
    unsigned int speed = 100000;

    init_spi_dev(FPGA_SPI_NODE, &fpga_spi_fd, mode, bits, speed);

    spi_fpga_gpio_init();
}

/*****************************************************************************
 * Function      : ispi_fpga_send_buf_4Byte
 * Description   : wr 4byte data
 * Input         : uint8 *puc
 * Output        : None
 * Return        :
 * Others        :
 * Record
 * 1.Date        : 20220211
 *   Author      : Shu.Wang
 *   Modification: Created function

*****************************************************************************/
void ispi_fpga_send_buf_4Byte(uint8 *puc)
{
    int ret = iSPI_I2S_Send4Byte(fpga_spi_fd, puc);
    if( ret < 0)
        printf("iSPI_I2S_Send4Byte err\n");
}

void ispi_tx_big_block(uint8 *pdata, int bytelen)
{
    int offset = 0;
    int ret = 0;
    int txlen = bytelen;
    while(1) {

        if((offset+SPI_BUFF_MAX)< txlen) {
            ret = spi_transfer_big_block(fpga_spi_fd, pdata+offset, SPI_BUFF_MAX);
            if(ret < 0){
                printf(" spi transfer big block err\n");
            }
            txlen  -= SPI_BUFF_MAX;
			offset += SPI_BUFF_MAX;
        }
        else {
            ret = spi_transfer_big_block(fpga_spi_fd, pdata+offset, txlen);
            if(ret < 0){
                printf(" Err. spi transfer big block err!\n");
            }
            txlen = 0;
            break;
        }
    }
}


void ispi_rx_big_block(uint8 *pdata, int bytelen)
{
    int ret   = 0;
    int rxlen = bytelen;

    ret = spi_receiver_big_block(fpga_spi_fd, pdata, rxlen);
    if(ret < 0){
        printf(" Err. spi transfer big block err!\n");
    }
}


#endif//___spi_dev__

void TXEN_SET(int en)
{
    if(en)
        fpga_byte_write(JESD_SEG_ADDR, JESD204B_RESET_STATUS_OFFSET_ADDR, 0x011); // set txen
    else
        fpga_byte_write(JESD_SEG_ADDR, JESD204B_RESET_STATUS_OFFSET_ADDR, 0x001); // clear txen
}


void jesd_reset_by_fpga(void)
{
    fpga_i2c_sim_spi_write(0x004, 0x01);
}


void cfg_jesd204b(void)
{
    uint32 u32data = 0;
    uint8 u8data = 0;


    /* rst jesd_axi jesd_phy jesd_phy_tx_gt jesd_tx ,  en 38j82_exen    */
    SET_BIT(u8data, 3);
    SET_BIT(u8data, 2);
    SET_BIT(u8data, 1);
    CLR_BIT(u8data, 0);
    fpga_byte_write(JESD_SEG_ADDR, JESD204B_RESET_STATUS_OFFSET_ADDR, u8data); // 0x00E
    u8data = 0;
    CLR_BIT(u8data, 3);
    CLR_BIT(u8data, 2);
    CLR_BIT(u8data, 1);
    SET_BIT(u8data, 0);
    fpga_byte_write(JESD_SEG_ADDR, JESD204B_RESET_STATUS_OFFSET_ADDR, u8data); // 0x001
    //TXEN_SET(0);// clear . remove this line case hw pin has disconnect by lujingkan @20220120

    fpga_i2c_sim_spi_write(0x004, 0x01); // jesd reset_by fpga
    log_printf(LOG_DEBUG,I_NOUSED,"jesd204b reset (0 jesd_axi, 1 jesd_phy, 2 jesd_phy_tx_gt, 3 jesd_tx )Done\n");

    fpga_i2c_sim_spi_write(0x02c, 0x02);        // suuclass 0x01-->0x02 0x00 0x02
    fpga_i2c_sim_spi_write(0x810, 0x000f0f01);  // 0x000f0d03 ---> 0x000f0f01
    log_printf(LOG_DEBUG,I_NOUSED,"jesd204b init cfg Done\n");

#if 1
    fpga_i2c_sim_spi_read(0x08,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x08  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x0c,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x0c  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x10,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x10  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x1C,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x1C  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x20,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x20  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x24,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x24  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x28,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x28  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x2C,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x2C  = 0x%x\n", u32data);
    fpga_i2c_sim_spi_read(0x38,&u32data);
    log_printf(LOG_DEBUG,I_NOUSED,"read jesd204b 0x38  = 0x%x\n", u32data);
#endif
}

#if 0
void tuner_gpio_init(void)
{
	set_gpio_export(TUNER_RST_GP_NUM);
    set_gpio_io_direct(TUNER_RST_GP_NUM,E_IO_OUT);
    log_printf(LOG_INFO, I_SYS_STATUS, "tuner_gpio_init finished.\n");
}
#endif
/*****************************************************************************
 * Function      : hw_per_init
 * Description   :  init i2c /spi /gpio lcd /gpio key

 * Input         : void
 * Output        : None
 * Return        :
 * Others        :
 * Record
 * 1.Date        : 20220117
 *   Author      : Shu.Wang
 *   Modification: Created function

*****************************************************************************/
void hw_per_init(void)
{
	gpio_mutex_init();

    pthread_mutex_init(&mtx_phase78910_again, NULL);
    pthread_mutex_init(&mux_i2c_tuner, NULL);

	//tuner_gpio_init();//@DIF_UNUSED

	e_map_init();

	// i2c init
	ii2c_hw_init();

	// spi init
	spi_fpga_init();

	// key init
	key_gpio_init();

	// lcd init
	lcd_gpio_init();
	lcd_gpio_init();
	fpga_reset_gpio_init();

	light_off();
	lcd_init();
	light_on();
}


void local_ip_change_admin(S_CONFIG_PARA *ppara)
{
    char cmd[100] = {0};
    int ret = 0;


    // delete default route
    log_printf(LOG_INFO, I_SYS_STATUS, "del old default route\n");
    ret = system("route del -net default eth0");
    if(ret==127) {
        ret = system("route del -net default eth0");
        log_printf(LOG_INFO, I_SYS_STATUS, "again, del old default route on eth0, ret=%d\n", ret);
    }


    memset(cmd, 0, sizeof(cmd));
    sprintf(cmd, "ifconfig %s %d.%d.%d.%d netmask %d.%d.%d.%d up ",
            ADMIN_ETH,
            ppara->ip[0], ppara->ip[1], ppara->ip[2], ppara->ip[3],
            ppara->mask[0], ppara->mask[1], ppara->mask[2], ppara->mask[3]);
    system(cmd);
    log_printf(LOG_INFO, I_SYS_STATUS, "management interface set:%s\n", cmd);


    // add default route
    memset(cmd, 0, sizeof(cmd));
    sprintf(cmd, "route add default gw %d.%d.%d.%d ", ppara->gateway[0], ppara->gateway[1],
                                                      ppara->gateway[2], ppara->gateway[3]);

    log_printf(LOG_INFO, I_SYS_STATUS, "add new default route :%s\n", cmd);
    ret = system(cmd);
    if(ret == 127) {
        ret = system(cmd);
        log_printf(LOG_INFO, I_SYS_STATUS, "again, add new default route :%s, ret=%d\\n", cmd, ret);
    }

}

void local_ip_change_tsoip(S_TSOIP_CONFIG_PARA *ppara,ETH_INDEX ethindex)
{
    if(ethindex >= ADMIN_ETH_INDEX)
        return;


    char cmd[100] = {0};
    memset(cmd, 0, sizeof(cmd));

    switch (ethindex) {
        case TSOIP_1_ETH_INDEX:
            sprintf(cmd, "ifconfig %s %d.%d.%d.%d netmask %d.%d.%d.%d ",
                    TSOIP_1_ETH,
                    ppara->ip[0],
                    ppara->ip[1],
                    ppara->ip[2],
                    ppara->ip[3],
                    ppara->mask[0],
                    ppara->mask[1],
                    ppara->mask[2],
                    ppara->mask[3]);
            log_printf(LOG_DEBUG,I_NOUSED,"TSOIP 1, cmd=%s\n", cmd);
            break;
        case TSOIP_2_ETH_INDEX:
            sprintf(cmd, "ifconfig %s %d.%d.%d.%d netmask %d.%d.%d.%d ",
                    TSOIP_2_ETH,
                    ppara->ip[0],
                    ppara->ip[1],
                    ppara->ip[2],
                    ppara->ip[3],
                    ppara->mask[0],
                    ppara->mask[1],
                    ppara->mask[2],
                    ppara->mask[3]);
            log_printf(LOG_DEBUG,I_NOUSED,"TSOIP 2, cmd=%s\n", cmd);
            break;
    }

    system(cmd);
}



void tsoip_multi_addr_net_set(int index)
{
    index = index & 0x01;

    TSOIP_INSTANCE *p_tsoip1 = NULL;
    p_tsoip1 = (TSOIP_INSTANCE *)malloc(sizeof(TSOIP_INSTANCE));
    log_printf(LOG_DEBUG,I_NOUSED,"index=%d\n", index);
    inset_tsoip_instance(p_tsoip1, &ip2ts[index].tsoip_config_para);
    p_tsoip1->index = index;
    udp_imgp_init((uint32) p_tsoip1); // function 内部有free(p_tsoip1)
}


void sys_net_init(void)
{
    if(1){

        //@(atsc) eth1 for tsoip1
        local_ip_change_tsoip(&ip2ts[TSOIP_1].tsoip_config_para,TSOIP_1_ETH_INDEX);

        //@(atsc) eth0 for management interface
        local_ip_change_admin(&atsc_para.config_para);

        //@(atsc) eth1 for tsoip1 multi
        tsoip_multi_addr_net_set(TSOIP_1); // multi group
    }
}
int getMacByName(char * ifname, uint8 *macaddr)
{
    if(macaddr==NULL || ifname==NULL)
        return -1;

    struct ifreq ifr;

    int sock = socket(AF_INET, SOCK_DGRAM, IPPROTO_IP);
    if (sock == -1) {
        log_printf(LOG_ERR,I_NOUSED,"socket error\n");
        return -1;
    }


    strcpy(ifr.ifr_name, ifname);
    if (ioctl(sock, SIOCGIFFLAGS, &ifr) == 0) {
        if (! (ifr.ifr_flags & IFF_LOOPBACK)) { // don't count loopback
            if (ioctl(sock, SIOCGIFHWADDR, &ifr) == 0) {
                unsigned char * ptr;
                ptr = (unsigned char  *)&ifr.ifr_ifru.ifru_hwaddr.sa_data[0];
                //snprintf(macaddr,64,"%02X:%02X:%02X:%02X:%02X:%02X",*ptr,*(ptr+1),*(ptr+2),*(ptr+3),*(ptr+4),*(ptr+5));
                //printf("Interface name : %s , Mac address : %s \n",ifr.ifr_name, macaddr);
                macaddr[0] = (uint8)(*(ptr+3));
                macaddr[1] = (uint8)*(ptr+4);
                macaddr[2] = (uint8)*(ptr+5);
            }
        }
    }else{
        log_printf(LOG_ERR,I_NOUSED,"get [%s] mac info error\n", ifname);
        return -1;
    }

    return 0;
}





#define __main_check__      1
#if __main_check__
extern S_ATSC_PARA atsc_para;
uint8 check_fpga_boot(void)
{
    char cttb_zero[20]={0};
    char cttb_ff[20]={"15.7 12153131"};

    memset(&atsc_para.rg_para.fpga, 0, sizeof(atsc_para.rg_para.fpga));

    init_version_info();

    if((memcmp(atsc_para.rg_para.fpga,cttb_zero,sizeof(atsc_para.rg_para.fpga))==0)||
        (memcmp(atsc_para.rg_para.fpga,cttb_ff,sizeof(atsc_para.rg_para.fpga))==0))
    {
        return 0;
    }
    else{
        return 1;
    }
}

void lcd_refresh_string(char *str, uint8 line )
{
    //char out_str[40];
    //memcpy((char *)out_str, str, sizeof(out_str));//拷贝一下，直接str待验证
    lcd_write_string(line,0,"                                        ");
    lcd_write_string(line,0,str);
}

#if BAK_PARA_CHECK
void infor_exit_quit(uint8 number)
{

#if !DEBUG_ERR_CHECK
    static uint32 tick_bak;
    static BOOL refresh;
#endif

    while(get_key_value() != KEY_EXIT)
    {
    #if !DEBUG_ERR_CHECK
        if(check_delay_over(&tick_bak,50))
        {
            refresh=refresh?FALSE:TRUE;
            if(refresh)
                lcd_write_string(1,number, "Press  ESC");
            else
                lcd_write_string(1,number, "          ");
        }
    #endif
    }
}
void eebak_clear(uint8 standard)
{
    uint32 i;

    c256_bytewrite(EEPROM_FQPW_CHECK_FLAG,0xff);

    for(i=BAK_E2_DEFAULT_PARAM_ADDR;i<=END_BAK_EEPROM_ADDR;i++)
        c256_bytewrite2(i,0xff);//除载漏外参数,可用256字节
}

void bak_error_warn(uint8 flag)
{
    #define INF_NUM  5
    #define PRE_INF  0
    #define FIR_INF  1
    #define SEC_INF1 2
    #define SEC_INF2 3
    #define EMPY_INF 4

    char *out_str[3]={"OK","ERR","NULL"};
    char *infor_str[INF_NUM] ={
                               "    Backup  Parameters  Checking ...   ",
                               " Txfreq Rxfreq  Power                  ",
                               " Check And Confirm Parameters Legal    ",
                               " Then Cycle Power ...     Press  ESC   ",
                               "                                       "
                              };
#if DEBUG_ERR_CHECK
    char  str[4];
    uint8 freq;
    uint16 power;
    uint32 offset;
    flag |=BAK_ERR_DEBUG; //to wait
#endif
    log_printf(LOG_DEBUG,I_NOUSED,"Bak para check begin !\n");

    lcd_refresh_string(((char *)infor_str[EMPY_INF]),LINE_1);//打空字符
    lcd_refresh_string(((char *)infor_str[EMPY_INF]),LINE_2);//打空字符

    lcd_refresh_string(((char *)infor_str[PRE_INF]),LINE_1);//提示1
    delay_ms(500);//sleep(1);

#if !USE_TUNER
    clrbit(flag,2);
    if(1 == (flag&0x7f))
        clrbit(flag,0);
#endif

    if(flag)
    {
        lcd_refresh_string(infor_str[FIR_INF],LINE_1);//提示2
        if(flag&BAK_ERR_TXFREQ)
            lcd_write_string(1,1,out_str[1]);
        else
            lcd_write_string(1,1,out_str[0]);

    #if USE_TUNER
        if(flag&BAK_ERR_RXFREQ)
            lcd_write_string(1,8,out_str[1]);
        else
            lcd_write_string(1,8,out_str[0]);
    #else
        lcd_write_string(1,8,out_str[2]);
    #endif

        if(flag&(BAK_ERR_POWER | BAK_ERR_DB ))
            lcd_write_string(1,16,out_str[1]);
        else
            lcd_write_string(1,16,out_str[0]);


    #if DEBUG_ERR_CHECK
        sprintf((char *)str,"%02X",flag);
        lcd_write_string(1,37,str);

        power = (c256_byteread2(BAK_EEPROM_POWER_UIH_ADDR)<< 8) \
                    | c256_byteread2(BAK_EEPROM_POWER_UIL_ADDR) ;
        sprintf((char *)str,"%02X_%02X",power>>8,power&0xff);
        lcd_write_string(0,24,str);
        sprintf((char *)str,"%02X_%02X",atsc_para.rf_para.power>>8,atsc_para.rf_para.power&0xff);
        lcd_write_string(1,24,str);

        freq = c256_byteread2(BAK_EEPROM_CHANNEL_ADDR);
        sprintf((char *)str,"%02X",freq);
        lcd_write_string(0,31,str);
        sprintf((char *)str,"%02X",atsc_para.rf_para.txfreq);
        lcd_write_string(1,31,str);

        freq = c256_byteread2(BAK_EEPROM_RXCHANNEL_ADDR);
        sprintf((char *)str,"%02X",freq);
        lcd_write_string(0,34,str);
        //sprintf((char *)str,"%02X",dvbt_para.rf_para.rxfreq);
        //lcd_write_string(1,34,str);
    #else
        lcd_write_string(1,26,"Press  ESC");
    #endif
        infor_exit_quit(26);//等待EXIT键退出
        delay_ms(300);
        lcd_refresh_string(infor_str[SEC_INF1],LINE_1);//提示3
        lcd_refresh_string(infor_str[SEC_INF2],LINE_2);//提示4
        infor_exit_quit(26);//等待EXIT键退出
    }
    log_printf(LOG_DEBUG,I_NOUSED,"bak para check end !\n");
}
#endif//BAK_PARA_CHECK




#if USE_TUNER
int8 tuner_read_rssi(void)
{
#if USE_SONYCXD6801GL
    int rssi = 0;

    sonytuner_rssi(&rssi, 1);
    return (int8)rssi;
#else
    uint32 ret = 0;
    int8 rssi = 0;
    uint8 data = 0;

    ret= TunerReadRSSI(&data);
    if(ret)
    {
        data = 0;
    }
#if USE_SNR_ADJ
    data+=0;//data+=atsc_para.wd_para.sd;
#endif
    rssi = data/2-LOG_RSSI_ADJUST;
    return rssi;
#endif
}

uint32 tuner_get_snr(void)
{
    int snr = 0;
#if USE_SONYCXD6801GL
    sonytuner_snr(&snr, 1);
#elif USE_TUNER_18273
#else
    float ret = DMD_get_cnr();

    snr = (uint32)ret;
#endif
    return snr;
}

//lock:1  unlock:0;
//tmbslTDA18273_GetLockStatus
uint32 tuner_get_lock(void)
{
#if USE_SONYCXD6801GL
    uint8 tslocked = 0;
    uint8 sync_state = 0;
    uint8 alp_lock_all = 0;
    uint8 plperr = 0;

    sonytuner_tslock(&tslocked, 1, &sync_state, &alp_lock_all, &plperr);
    return (uint32)tslocked;
#elif USE_TUNER_18273
    return 1;
#else
    return DMD_get_lock();
    //return TunerRead18273mode();
#endif
}

uint32 get_tuner_init_ok_flag(void)
{
    return atsc_para.tuner_status_flag;
}

//外部已经调用 停止秒消息函数,此处延时使用delay_ticks
void tuner_init(uint32 channel)
{
#if !USE_DBG_PASS_TUNER_INIT
#if 1
    uint32 rx_freq;
    int err;
    uint8 buf[24];
    uint32 loop = 0;
    uint32 power_time = 0;

#if USE_TUNER_18273
#else
//    if(atsc_para.system_para.input!=ASI_INPUT_TUNER)
//    {
//        return;
//    }
#endif
    //return;   //ldl 18-09-12
LBL_RESTART:
    delay_ticks(5);

    rx_freq = txfreq_to_hz(channel);
    rx_freq = rx_freq * 1000000;
    do
    {
    	printf("tuner init %d times\n", loop);
        fpga_byte_write(0x01,0x61,0);
        fpga_byte_write(0x01,0x61,1);   //配置前后写0,1
    #if USE_TUNER_18273    //要根据tuner的类型,做出判断
        err = TunerConf(rx_freq);
    #else
        //PR04: Sony CXD2878(FREIA) demod, ATSC1.0; sonytuner_init takes freq in MHz
        err = sonytuner_init(txfreq_to_hz(channel), 1);
    #endif
        lcd_write_string(0,0,"                                          ");
        lcd_write_string(1,0,"                                          ");
        if(!err)
            sprintf((char *)buf, "Tuner Ret:Succ %03dM ",rx_freq/1000000);
        else
            sprintf((char *)buf, "Tuner Ret:Err(%d)%03dM ",loop+1,rx_freq/1000000);
        lcd_write_string(1,0,buf);

        if(err)
            atsc_para.tuner_status_flag = 0;
        else
            atsc_para.tuner_status_flag = 1;

        lcd_write_cache();
        delay_ticks(20);
    }while((err!=0)&&(++loop<2));

    if(err!=0)
    {
    	lcd_write_string(0,0,"SYSTEM INIT...                          ");
		lcd_write_string(1,0,"                                        ");
		lcd_write_cache();
		printf("Init tuner timeout exit.\n");
        return;
    }

	lcd_write_string(0,0,"SYSTEM INIT...                          ");
    lcd_write_string(1,0,"                                        ");
	lcd_write_cache();
	printf("Init tuner normal exit.\n");
	
    #endif
#endif
}


void tuner_config_power_on(void)
{//低电平复位tuner,
#if 0//@TMP_UNUSED_TUNER
    GPIO_ResetBits(GPIOG, GPIO_Pin_1);
    delay_ticks(5);
    GPIO_SetBits(GPIOG, GPIO_Pin_1);
#endif

	set_gpio_value(TUNER_RST_GP_NUM, E_IO_L);
	delay_ticks(5);
	set_gpio_value(TUNER_RST_GP_NUM, E_IO_H);
}

void tuner_config_power_reset(void)
{
#if 0//@TMP_UNUSED_TUNER
    GPIO_ResetBits(GPIOG, GPIO_Pin_1);
    delay_ticks(300);
    GPIO_SetBits(GPIOG, GPIO_Pin_1);

	set_gpio_value(TUNER_RST_GP_NUM, E_IO_L);
	delay_ticks(300);
	set_gpio_value(TUNER_RST_GP_NUM, E_IO_H);
#endif
}


#endif//USE_TUNER

#endif//__main_check__

#if 1
#define MODIFY_IP_SHELL         "sh /usr/anywave/modify_ip_addr.sh"

void config_imx_ip_addr(void)
{
    char msg[20] = {0};
    int ret = 0;
    int result = 0;

    system(MODIFY_IP_SHELL);
}
#endif
void check_fpga_i2c()
{
	printf("--------------------------------------------------------\n\n");

	uint8 tmp_data = fpga_byte_read(0x01,0x26);
	printf("ck rd addr=0x26 data=0x%x\n", tmp_data);
	fpga_set_rf_output(0);
	tmp_data = fpga_byte_read(0x01,0x26);
	printf("ck rd addr=0x26 data=0x%x [0]\n", tmp_data);
	
	fpga_set_rf_output(1);
	tmp_data = fpga_byte_read(0x01,0x26);
	printf("ck rd addr=0x26 data=0x%x [1]\n", tmp_data);

	fpga_set_rf_output(0);
	tmp_data = fpga_byte_read(0x01,0x26);
	printf("ck rd addr=0x26 data=0x%x [0]\n", tmp_data);

	fpga_set_rf_output(1);
	tmp_data = fpga_byte_read(0x01,0x26);
	printf("ck rd addr=0x26 data=0x%x [1]\n", tmp_data);
	

	printf("--------------------------------------------------------\n\n");
}
void dpd_boot_run_init(void)
{
    //uint8 dpd_ctl3_reg = 0;

    pthread_mutex_init(&mux_dpd_wr_ck, NULL);

    //dpd_ctl3_reg  = (DPD_CTRL3_FAGC_UPDATE | DPD_CTRL3_FAGC_SLOWDN );  // 注意.h文件中AXI_ADDR_DPD_CTRL2 和AXI_ADDR_DPD_CTRL3地址包含的寄存器
    //fpga_byte_write(5, FPGA_ADDR_DPD_CTRL3, dpd_ctl3_reg);
}
void fpga_para_init(void)
{
    uint16 time_delay   =60;
    uint8  fpga_boot_flg=0;

#if USE_DELAYED_RF_ENABLE
    fpga_boot_rf_hold_begin();
#endif

    lcd_write_string(1,0, "                                        ");
    lcd_write_string(0,0, "Initializing.                           ");

    delay_ms(100);
    memset(&atsc_para,0,sizeof(atsc_para));//系统全局参数

#if 0
#if AW_ATSC_5X  // Choose Rource
    fpga_byte_write(0x1,0x65 ,0x1); //国内 国外版本区分
#else
    fpga_byte_write(0x1,0x65 ,0x0);
#endif
#endif

    atsc_para.ad3_para.cor = c256_byteread(EEPROM_AD3_TYPE);
    if(atsc_para.ad3_para.cor>1)
    {
        atsc_para.ad3_para.cor = 0;
    }

    //fpga_save_agc_vol();

    e2rom_read_all_para();

    atsc_para.system_para.ab_mode = 0;
    log_printf(LOG_DEBUG,I_NOUSED,"default ABmode = 0 \n");

	ts_load_default_para(TSOIP_1, &ip2ts[TSOIP_1].tsoip_config_para);

    sys_net_init();


#if 1// @check_fpga_boot

	while(time_delay--) { // wait for : FPGA start OK.
        log_printf(LOG_DEBUG,I_NOUSED,"lcd init cnt=%d\n",time_delay);
        if(time_delay%3==0)
        {
            lcd_write_string(LINE_1,0,"SYSTEM INIT...                          ");
            lcd_write_string(LINE_2,0,"                                        ");
        }
        else if(time_delay%3==1)
        {
            lcd_write_string(LINE_1,0,"SYSTEM INIT..                           ");
            lcd_write_string(LINE_2,0,"                                        ");
        }
        else{
            lcd_write_string(LINE_1,0,"SYSTEM INIT.                            ");
            lcd_write_string(LINE_2,0,"                                        ");
        }
        lcd_write_cache();

        if(check_fpga_boot())
        {
            log_printf(LOG_DEBUG,I_NOUSED,"===========================\n");
            log_printf(LOG_DEBUG,I_NOUSED," ck_fpga_ver : %s, FPGA BOOT SUCCESS.\n",atsc_para.rg_para.fpga);
            log_printf(LOG_DEBUG,I_NOUSED,"===========================\n\n");
            fpga_boot_flg=1;
            break;
        }

        delay_ms(200);
    }

    if(fpga_boot_flg==0){
        lcd_write_string(LINE_1,0, "FPGA BOOT FAILED!                       ");
        lcd_write_string(LINE_2,0, "                                        ");
        lcd_write_cache();
        delay_ms(3000);
        lcd_write_string(LINE_1,0, "                                        ");
        lcd_write_string(LINE_2,0, "                                        ");
        lcd_write_cache();
    }
#if USE_DELAYED_RF_ENABLE
    else
    {
        /* Mute immediately after FPGA boot, before restoring saved parameters. */
        fpga_set_rf_output(0);
    }
#endif
#endif// @check_fpga_boot

#if BAK_PARA_CHECK
    if(atsc_para.wl_para.eebak)
        bak_error_warn(atsc_para.bak_err_flag);
#endif

#if USE_DRY_LOOP  // dryloop 才有延迟开机
    if(atsc_para.wh_para.func == 0) // TX模式缓开机  等待2秒
    {                               // RF屏 dryloop.c 有单独处理
        atsc_para.fpga_load_wait_flag =0;
    }
#endif

    config_fpga_para();

#if USE_NEW_AGC
    fpga_byte_write(0x01,0x4A,agc_value[atsc_para.rf_para.agc] );  //这是否移动到read后
#else
    //fpga_byte_write(0x01,0x4A,atsc_para.rf_para.agc);
	fpga_byte_write(0x01,0x02, atsc_para.rf_para.agc);
#endif

    lcd_write_string(0,0,"Initialize OK                           ");
    lcd_write_string(1,0,"                                        ");
    //delay_ms(100);
    init_version_info();

#if 1//NEED_TO_EN//@EN_DPD_ONBOOT
    set_dpd_unit_area_auto_inc(1);
    dpd_boot_run_init();
	reset_dpd_to_normal_state();
	boot_cfg_fagc_update();
#endif

#if USE_DELAYED_RF_ENABLE
    /*
     * Enable the ADRV9009 TX path only after FPGA/JESD/DPD/FAGC boot
     * configuration is complete.  The physical RF output remains muted for
     * RF_BOOT_STABLE_DELAY_MS inside fpga_boot_rf_hold_release().
     */
    if(fpga_boot_flg)
    {
		if(atsc_para.rf_para.rf && (adrv9009_set_tx_path_enable(1) != OK))
		{
			log_printf(LOG_ERR, I_SYS_STATUS,
					   "ADRV9009 TX enable failed, continue restoring requested RF state\n");
		}
		fpga_boot_rf_hold_release();
    }
    else
    {
        log_printf(LOG_DEBUG, I_NOUSED,
                   "FPGA boot failed, keep RF output muted\n");
    }
#endif
}

#if 1//spect  @NEED_ADD_FUNC @SPI_SPECT_READ
void spect_spi_read(uint32 len,void *pdata,uint32 restart)
{
    #if 0//@NEED_ADD_FUNC @SPI_SPECT_READ
    uint8 *pchar = (uint8*)pdata;

    if((len==0)||(pdata==0))
        return;

    GPIO_ResetBits(GPIOB, GPIO_Pin_12);
    if(restart==1)
    {
        //while (SPI_I2S_GetFlagStatus(FPGA_SPI, SPI_I2S_FLAG_TXE) == RESET);
        while (__HAL_SPI_GET_FLAG(&hspi2, SPI_FLAG_TXE) == RESET);
        SPI_I2S_SendData(FPGA_SPI, 0xA5);    //若需要重新读取数据,发送a5

        //while (SPI_I2S_GetFlagStatus(FPGA_SPI, SPI_I2S_FLAG_RXNE) == RESET);
        while (__HAL_SPI_GET_FLAG(&hspi2, SPI_FLAG_RXNE) == RESET);
        (void)SPI_I2S_ReceiveData(FPGA_SPI);
    }

    while(len--)
    {
        //while (SPI_I2S_GetFlagStatus(FPGA_SPI, SPI_I2S_FLAG_TXE) == RESET);
        while (__HAL_SPI_GET_FLAG(&hspi2, SPI_FLAG_TXE) == RESET);
        SPI_I2S_SendData(FPGA_SPI, 0xFF);

        //while (SPI_I2S_GetFlagStatus(FPGA_SPI, SPI_I2S_FLAG_RXNE) == RESET);
        while (__HAL_SPI_GET_FLAG(&hspi2, SPI_FLAG_RXNE) == RESET);
        *pchar++ = SPI_I2S_ReceiveData(FPGA_SPI);
    }
    //while (SPI_I2S_GetFlagStatus(FPGA_SPI, SPI_I2S_FLAG_TXE) == RESET);
    while (__HAL_SPI_GET_FLAG(&hspi2, SPI_FLAG_TXE) == RESET);

    delay_us(5);
    GPIO_SetBits(GPIOB, GPIO_Pin_12);

    #endif
}


#endif

/*
 end ,free the input point
*/
void udp_imgp_init(const uint32 p_tsoip_ins)
{
    struct ip_mreq group;
    static S_PER_IGMP_INFO igmpinfo;
    struct sockaddr_in mcu_addr;
    int err;

    static uint32 multi_ip_inited[2] = {0};
    static uint16 port_inited[2] = {0};

    char unicast_ip_str[20] = {0};
    uint32 multi_ip_addr = 0;
    TSOIP_INSTANCE *p_ts = NULL;

    p_ts = (TSOIP_INSTANCE*)p_tsoip_ins;

    IP_DATA(multi_ip_addr, p_ts->multicast_ip[0], p_ts->multicast_ip[1], p_ts->multicast_ip[2], p_ts->multicast_ip[3]);

    sprintf(unicast_ip_str, "%d.%d.%d.%d", p_ts->ip[0],p_ts->ip[1],p_ts->ip[2],p_ts->ip[3]);

    uint16 rec_port = p_ts->port;
    log_printf(LOG_DEBUG,I_NOUSED,"tsoip_%d  %s multiaddr:%d.%d.%d.%d ip:%d.%d.%d.%d, port:%d\n",
            p_ts->index,
            p_ts->enable_multicast==IP2TS_REC_TYPE_MULTI?"enable group":"disable group",
            p_ts->multicast_ip[0], p_ts->multicast_ip[1], p_ts->multicast_ip[2], p_ts->multicast_ip[3],
            p_ts->ip[0],p_ts->ip[1],p_ts->ip[2],p_ts->ip[3],
            p_ts->port);

    //原先配置的有
    if(multi_ip_inited[p_ts->index] != 0) {

        if((multi_ip_inited[p_ts->index] == multi_ip_addr) && (port_inited[p_ts->index] == rec_port) && (p_ts->enable_multicast==IP2TS_REC_TYPE_MULTI))  {
            return;
        }
        group.imr_multiaddr.s_addr = htonl(multi_ip_inited[p_ts->index]);
        group.imr_interface.s_addr = inet_addr(unicast_ip_str);//htonl(INADDR_ANY);

        setsockopt(igmpinfo.socket,IPPROTO_IP, IP_DROP_MEMBERSHIP, &group, sizeof(group));
        close(igmpinfo.socket);
        log_printf(LOG_DEBUG,I_NOUSED,"close igmpsocket\n");
    }

    // 组播地址合规，且 组播模式
    if(IS_MULTI_ADDRESS(multi_ip_addr) && p_ts->enable_multicast==IP2TS_REC_TYPE_MULTI)
    {
        igmpinfo.socket = socket(AF_INET, SOCK_DGRAM, 0);
        if(igmpinfo.socket < 0) {
            log_printf(LOG_ERR,I_NOUSED,"failed to create udp sock_fd!\n");
            return;
        }

        memset(&mcu_addr, 0, sizeof(mcu_addr));
        mcu_addr.sin_family = AF_INET;
        mcu_addr.sin_port = htons(rec_port);
        mcu_addr.sin_addr.s_addr =  inet_addr(unicast_ip_str);//htonl(INADDR_ANY);      //htonl(rec_ip_addr);//INADDR_ANY;

        err = bind(igmpinfo.socket, (struct sockaddr *)&mcu_addr, sizeof(mcu_addr));
        if (err < 0) {
            log_printf(LOG_ERR,I_NOUSED,"failed to bind sock_fd!\n");
            return;
        }
        multi_ip_inited[p_ts->index]   = multi_ip_addr;
        port_inited[p_ts->index] = rec_port;

        igmpinfo.port = port_inited[p_ts->index];
        igmpinfo.ip   = multi_ip_inited[p_ts->index];

        group.imr_multiaddr.s_addr = htonl(igmpinfo.ip);
        group.imr_interface.s_addr = inet_addr(unicast_ip_str);//htonl(INADDR_ANY);

        err = setsockopt(igmpinfo.socket, IPPROTO_IP, IP_ADD_MEMBERSHIP, &group, sizeof(group));
        if(err < 0) {
            log_printf(LOG_ERR,I_NOUSED,"failed to ADD_MEMBERSHIP!code:%d\n", err);
            return;
        }
        log_printf(LOG_DEBUG,I_NOUSED,"bin igmpsocket success\n");
    }

    free((char*)p_tsoip_ins);
}

//lPara:ip(组播地址) wPara:port(接收端口)
void udp_imgp_reinit(MSG *pmsg)
{
    udp_imgp_init(pmsg->lPara);
}


uint8_t get_temp_unit(void)
{
	return atsc_para.wh_para.temp_unit;
}