#ifndef __FPGA_H_
#define __FPGA_H_
#include "type.h"
#include "lcd_task.h"

#define I2C_REG_ADDRES                  (0xE0)

#define FPGA_UPGRADE_I2C_REG_ADDRES    (0xE0)

#define RW_ADPC_SAVE      0        //保存ADPC数据 读FPGA,写E2/FLASH
#define RW_ADPC_LOAD      1        //加载ADPC数据 读E


//新平台ADPC曲线配置 线性区还是只有一条,非线性区有多条
#define FPGA_ADPC_DATA_NUM               7

//每条曲线非线性大概16k,线性400多字节
#define FPGA_ADPC_CURRENT_NONLINER_SIZE  16         //当前实际的非线性区大小(KB)


#define FPGA_ADPC_NONLINER_DATA_ADDRESS  (0)
#define FPGA_ADPC_NONLINER_DATA_SIZE     (16*1024)
#define E2_FPGA_ADPC_NONLINER_DATA_ADDRESS  (FPGA_ADPC_NONLINER_DATA_SIZE*7)

#if 1//@MK_MTB_TSOIP
typedef enum{IP2TS_SEL_IP1=1,IP2TS_SEL_IP2=2,IP2TS_SEL_IP_AUTO}en_IP2TS_SEL;

typedef union
{
    struct
    {
        unsigned char port   :1;//0:asi 1:ip
        unsigned char ret    :1;
        unsigned char asi_sel:2;//00:asi1 01:asi2 other:auto
    }bitFiled;
    unsigned char asi_s;
}UN_ASI_SEL;

typedef enum
{
    FPGA_IP_ADDR1    = 0X01,
    FPGA_IP_ADDR2    = 0X02,
    FPGA_IP_ADDR3    = 0X03,
    FPGA_IP_ADDR4    = 0X04,  //单播与组播IP地址复用  收端

    FPGA_REC_PORT_HIGH   = 0X05,
    FPGA_REC_PORT_LOW    = 0X06,

    FPGA_BROAD_TYPE     = 0X07,   //单/组播
    FPGA_TS_PACKET_LEN  = 0X08,   //对外播放时的TS包长
    FPGA_TS_PACKET_TYPE = 0X09,   //PACK_UDP 0  PACK_RTP 1

    FPGA_HW_VER         = 0X0A,   //VER

    FPGA_TS_FEC         = 0X0b,   //收端只读
    FPGA_TS_ROW         = 0X0c,
    FPGA_TS_COL         = 0X0d,
    FPGA_DELAY_H        = 0X0E,
    FPGA_DELAY_L        = 0X0F,

    FPGA_LED_STATUS     = 0X10,  //bit0: ts err  bit1:ts out  bit2:ip in  bit3: MCU的MAC未响应FPGA发来的包(1,错误)
                                 //bit4: ip err(网线没连,收不到网络包)

    FPGA_VER_YY         = 0X11,
    FPGA_VER_MM         = 0X12,
    FPGA_VER_DD         = 0X13,

    FPGA_IP_PK_NUM_H    = 0X14,
    FPGA_IP_PK_NUM_L    = 0X15,

    FPGA_IP_CTIME_H     = 0X16,
    FPGA_IP_CTIME_M     = 0X17,
    FPGA_IP_CTIME_L     = 0X18, //用于计算IP输入码率
                                //rate = (pk_num*188*8)/(ctime*12.5*1e-9)bit/s

//    FPGA_ASI_RATE_HH    = 0X19,
//    FPGA_ASI_RATE_HL    = 0X1A,
//    FPGA_ASI_RATE_LH    = 0X1B,
//    FPGA_ASI_RATE_LL    = 0X1C,//asi输入码率 bps

    FPGA_TSIO_STATE     = 0X19,//获取到ip12的选择和锁定状态  //h20190221

    FPGA_PHY_RST        = 0X1F,

    FPGA_IP_DEST1       = 0X20,
    FPGA_IP_DEST2       = 0X21,
    FPGA_IP_DEST3       = 0X22,
    FPGA_IP_DEST4       = 0X23,  //ip流目标地址

    FPGA_MAC_SOURCE1    = 0X24,
    FPGA_MAC_SOURCE2    = 0X25,
    FPGA_MAC_SOURCE3    = 0X26,
    FPGA_MAC_SOURCE4    = 0X27,
    FPGA_MAC_SOURCE5    = 0X28,
    FPGA_MAC_SOURCE6    = 0X29,

    FPGA_MAC_DEST1      = 0X2A,
    FPGA_MAC_DEST2      = 0X2B,
    FPGA_MAC_DEST3      = 0X2C,
    FPGA_MAC_DEST4      = 0X2D,
    FPGA_MAC_DEST5      = 0X2E,
    FPGA_MAC_DEST6      = 0X2F,

    FPGA_PHY_TYPE       = 0X30,   //0:100M  1:GB  2:AUTO

    FPGA_DEST_PORT_HIGH = 0X31,
    FPGA_DEST_PORT_LOW  = 0X32,

    FPGA_RTP_UDP        = 0X33,    //还未用

    FPGA_DEST_LCL_ADDR1 = 0X34,
    FPGA_DEST_LCL_ADDR2 = 0X35,
    FPGA_DEST_LCL_ADDR3 = 0X36,
    FPGA_DEST_LCL_ADDR4 = 0X37,    //固定向FPGA配置本地IP地址,作为发端时,FPGA必须要用该值

    FPGA_IP12_SELECT    = 0X38,    //选择IP1或IP2作为输入(该参数由激励器端接收到，并向IP端的FPGA设置) //h20190221
    FPGA_SFN_MFN_SELECT = 0x39,
}E_FPGA_IP2TS_PARA_ADDRESS;

extern uint8  send_ip12sel_tsoip(uint8 ip_sel);
extern void fpga_save_dpd_para(S_DPD_PARA *ppara);
extern void fpga_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *ppara);
extern void fpga_save_dest_mac(void);
extern uint32 internal_set_base_delay(uint32 delay);
#endif//@MK_MTB_TSOIP

void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf);
uint16 fpga_limit_power_target(S_WE_PARA *pwe, S_RF_PARA *prf, uint16 target_power);
void fpga_set_rf_output(uint8 rf);
void fpga_boot_rf_hold_begin(void);
void fpga_boot_rf_hold_release(void);
void erase_adpc_data(void);
void config_fpga_para(void);


#if 1//@ALD_UP
void fpga_save_wl(S_WL_PARA *ppara);

void fpga_save_dest_mac(void);
void fpga_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *ppara);
void boot_reset_for_test(void);
void boot_cfg_fagc_update();

#endif

#endif