/*------------------------------------------------------------------------------ Copyright 2016-2019 Sony Semiconductor Solutions Corporation Last Updated : 2019/02/14 Modification ID : 83dbabba2734697e67e3d44647acf57b272c2caf ------------------------------------------------------------------------------*/ #include "sony_demod_j83b.h" #include "sony_demod_j83b_monitor.h" /*------------------------------------------------------------------------------ Static Function Prototypes ------------------------------------------------------------------------------*/ /** @brief Configure the demodulator from Sleep to Active for J.83B */ static sony_result_t SLtoACC(sony_demod_t * pDemod); /** @brief Configure the demodulator for tuner optimisations and bandwidth specific settings. */ static sony_result_t SLtoACC_BandSetting(sony_demod_t * pDemod); /** @brief Configure the demodulator from Active J.83B to Active to J.83B. Used for changing channel parameters. */ static sony_result_t ACCtoACC(sony_demod_t * pDemod); /** @brief Configure the demodulator from Active J.83B to Sleep. */ static sony_result_t ACCtoSL(sony_demod_t * pDemod); /*------------------------------------------------------------------------------ Functions ------------------------------------------------------------------------------*/ sony_result_t sony_demod_j83b_Tune (sony_demod_t * pDemod, sony_j83b_tune_param_t * pTuneParam) { sony_result_t result = SONY_RESULT_OK; SONY_TRACE_ENTER ("sony_demod_j83b_Tune"); if ((!pDemod) || (!pTuneParam)) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } if ((pTuneParam->bandwidth != SONY_DTV_BW_J83B_5_06_5_36_MSPS) && (pTuneParam->bandwidth != SONY_DTV_BW_J83B_5_60_MSPS)) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } if ((pDemod->state == SONY_DEMOD_STATE_ACTIVE) && (pDemod->system == SONY_DTV_SYSTEM_J83B)) { /* Demodulator Active and set to J.83B mode */ pDemod->bandwidth = pTuneParam->bandwidth; result = ACCtoACC (pDemod); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } } else if((pDemod->state == SONY_DEMOD_STATE_ACTIVE) && (pDemod->system != SONY_DTV_SYSTEM_J83B)){ /* Demodulator Active but not J.83B mode */ result = sony_demod_Sleep (pDemod); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } pDemod->system = SONY_DTV_SYSTEM_J83B; pDemod->bandwidth = pTuneParam->bandwidth; result = SLtoACC (pDemod); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } } else if (pDemod->state == SONY_DEMOD_STATE_SLEEP) { /* Demodulator in Sleep mode */ pDemod->system = SONY_DTV_SYSTEM_J83B; pDemod->bandwidth = pTuneParam->bandwidth; result = SLtoACC (pDemod); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } } else { SONY_TRACE_RETURN (SONY_RESULT_ERROR_SW_STATE); } /* Update demodulator state */ pDemod->state = SONY_DEMOD_STATE_ACTIVE; SONY_TRACE_RETURN (result); } sony_result_t sony_demod_j83b_Sleep (sony_demod_t * pDemod) { sony_result_t result = SONY_RESULT_OK; SONY_TRACE_ENTER ("sony_demod_j83b_Sleep"); if (!pDemod) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } if ((pDemod->state != SONY_DEMOD_STATE_SLEEP) && (pDemod->state != SONY_DEMOD_STATE_ACTIVE)) { /* This api is accepted in Sleep and Active states only */ SONY_TRACE_RETURN (SONY_RESULT_ERROR_SW_STATE); } result = ACCtoSL (pDemod); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } SONY_TRACE_RETURN (result); } sony_result_t sony_demod_j83b_CheckTSLock (sony_demod_t * pDemod, sony_demod_lock_result_t * pLock) { sony_result_t result = SONY_RESULT_OK; uint8_t arLock = 0; uint8_t tsLock = 0; uint8_t unlockDetected = 0; SONY_TRACE_ENTER ("sony_demod_j83b_CheckTSLock"); if ((!pDemod) || (!pLock)) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } if (pDemod->state != SONY_DEMOD_STATE_ACTIVE) { /* This api is accepted in Active state only */ SONY_TRACE_RETURN (SONY_RESULT_ERROR_SW_STATE); } result = sony_demod_j83b_monitor_SyncStat (pDemod, &arLock, &tsLock, &unlockDetected); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } if (pDemod->scanMode) { if (unlockDetected == 1) { *pLock = SONY_DEMOD_LOCK_RESULT_UNLOCKED; SONY_TRACE_RETURN (SONY_RESULT_OK); } } if (arLock == 0) { *pLock = SONY_DEMOD_LOCK_RESULT_NOTDETECT; SONY_TRACE_RETURN (SONY_RESULT_OK); } *pLock = tsLock ? SONY_DEMOD_LOCK_RESULT_LOCKED : SONY_DEMOD_LOCK_RESULT_NOTDETECT; SONY_TRACE_RETURN (result); } /*------------------------------------------------------------------------------ Static Functions ------------------------------------------------------------------------------*/ static sony_result_t SLtoACC (sony_demod_t * pDemod) { sony_result_t result = SONY_RESULT_OK; SONY_TRACE_ENTER ("SLtoACC"); if (!pDemod) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } /* Configure TS clock Mode and Frequency */ result = sony_demod_SetTSClockModeAndFreq (pDemod, SONY_DTV_SYSTEM_J83B); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } /* Set SLV-X Bank : 0x00 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVX, 0x00, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set demod mode */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVX, 0x17, 0x08) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x00 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set TS/TLV mode */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xA9, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Enable demod clock */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x2C, 0x01) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* TADC setting */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x4B, 0x74) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* TADC setting */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x49, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* TADC setting */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVX, 0x18, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x11 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x11) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* BBAGC TARGET level setting * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 11h 6Ah [7:0] 8'h50 8'h48 OREG_ITB_DAGC_TRGT[7:0] */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x6A, 0x48) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x10 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x10) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->tunerOptimize == SONY_DEMOD_TUNER_OPTIMIZE_SONYSILICON) { /* ASCOT setting ON * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 10h A5h [0] 8'h01 8'h01 OREG_ITB_GDEQ_EN */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xA5, 0x01) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } else { /* ASCOT setting OFF * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 10h A5h [0] 8'h01 8'h00 OREG_ITB_GDEQ_EN */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xA5, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } /* Set SLV-T Bank : 0x40 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x40) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* J.83B initial setting * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------- * 40h 21h [2] 8'h00 8'h04 OREG_DISABLE_CSI * 40h B3h [2:0] 8'h02 8'h05 OREG_LMS_MU_TRK[2:0] */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x21, 0x04) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xB3, 0x05) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Settings for Transmission Parameters * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 40h 1Eh [7] 8'h00 8'h80 OREG_DISCRETE_SEARCH */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x1E, 0x80) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* J.83B 24MHz Xtal setting * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 40h 8Eh [7:0] 8'h0E 8'h58 OREG_AR_FEC_TIMER[7:0] */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x8E, 0x58) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x41 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x41) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* J.83B initial setting * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 41h CFh [7:0] 8'h77 8'h99 OREG_FFE_LEAK[3:0],OREG_FBE_LEAK[3:0] */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xCF, 0x99) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x11 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x11) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* IMR Filter Bandwidth setting * slave Bank Addr Bit default Value Name * --------------------------------------------------------------------------------- * 11h A3h [4:0] 8'h00 8'h14 OREG_IMR_FORCE_CHANNEL_WIDTH,1'b0,OREG_IMR_CHANNEL_WIDTH[2:0] */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xA3, 0x14) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } { /* J.83B 24MHz Xtal setting * Slave Bank Addr Bit Default Value Name * --------------------------------------------------------------------------------- * 11h 33h [7:0] 8'hC8 8'h00 OCTL_IFAGC_INITWAIT[7:0] * 11h 34h [7:0] 8'h02 8'h03 OCTL_IFAGC_MINWAIT[7:0] * 11h 35h [7:0] 8'h32 8'h3B OCTL_IFAGC_MAXWAIT[7:0] */ const uint8_t data[3] = { 0x00, 0x03, 0x3B }; if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x33, data, sizeof (data)) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } /* Set SLV-T Bank : 0x00 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* TSIF setting * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 00h CEh [0] 8'h01 8'h01 ONOPARITY * 00h CFh [0] 8'h01 8'h01 ONOPARITY_MANUAL_ON */ { const uint8_t data[] = { 0x01, 0x01 }; if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xCE, data, sizeof (data)) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } /* Set SLV-T Bank : 0x10 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x10) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* * Filter settings for Sony silicon tuners * slave bank addr bit default name * ------------------------------------------------------------------ * 10h A6h [7:0] 8'h1E OREG_ITB_COEF01[7:0] * 10h A7h [7:0] 8'h1D OREG_ITB_COEF02[7:0] * 10h A8h [7:0] 8'h29 OREG_ITB_COEF11[7:0] * 10h A9h [7:0] 8'hC9 OREG_ITB_COEF12[7:0] * 10h AAh [7:0] 8'h2A OREG_ITB_COEF21[7:0] * 10h ABh [7:0] 8'hBA OREG_ITB_COEF22[7:0] * 10h ACh [7:0] 8'h29 OREG_ITB_COEF31[7:0] * 10h ADh [7:0] 8'hAD OREG_ITB_COEF32[7:0] * 10h AEh [7:0] 8'h29 OREG_ITB_COEF41[7:0] * 10h AFh [7:0] 8'hA4 OREG_ITB_COEF42[7:0] * 10h B0h [7:0] 8'h29 OREG_ITB_COEF51[7:0] * 10h B1h [7:0] 8'h9A OREG_ITB_COEF52[7:0] * 10h B2h [7:0] 8'h28 OREG_ITB_COEF61[7:0] * 10h B3h [7:0] 8'h9E OREG_ITB_COEF62[7:0] */ if (pDemod->tunerOptimize == SONY_DEMOD_TUNER_OPTIMIZE_SONYSILICON) { const uint8_t itbCoef[14] = { /* COEF01 COEF02 COEF11 COEF12 COEF21 COEF22 COEF31 COEF32 COEF41 COEF42 COEF51 COEF52 COEF61 COEF62 */ 0x31, 0xA8, 0x29, 0x9B, 0x27, 0x9C, 0x28, 0x9E, 0x29, 0xA4, 0x29, 0xA2, 0x29, 0xA8 }; if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xA6, itbCoef, 14) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } /* Set tuner and bandwidth specific settings */ result = SLtoACC_BandSetting (pDemod); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } /* Set SLV-T Bank : 0x00 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Disable HiZ Setting 1 (TAGC, SAGC(Hi-Z), TSVALID, TSSYNC, TSCLK) */ if (sony_i2c_SetRegisterBits (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x80, 0x08, 0x1F) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Disable HiZ Setting 2 */ result = sony_demod_SetTSDataPinHiZ (pDemod, 0); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } SONY_TRACE_RETURN (result); } static sony_result_t SLtoACC_BandSetting(sony_demod_t * pDemod) { SONY_TRACE_ENTER ("SLtoACC_BandSetting"); if (!pDemod) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } /* Set SLV-T Bank : 0x10 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x10) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } switch (pDemod->bandwidth) { case SONY_DTV_BW_J83B_5_06_5_36_MSPS: { /* * * slave bank addr bit default value name * --------------------------------------------------------------------------------- * 10h B6h [7:0] 8'h1F user defined OREG_DNCNV_LOFRQ_T[23:16] * 10h B7h [7:0] 8'h38 user defined OREG_DNCNV_LOFRQ_T[15:8] * 10h B8h [7:0] 8'h32 user defined OREG_DNCNV_LOFRQ_T[7:0] */ uint8_t data[3]; data[0] = (uint8_t) ((pDemod->iffreqConfig.configJ83B_5_06_5_36 >> 16) & 0xFF); data[1] = (uint8_t) ((pDemod->iffreqConfig.configJ83B_5_06_5_36 >> 8) & 0xFF); data[2] = (uint8_t) (pDemod->iffreqConfig.configJ83B_5_06_5_36 & 0xFF); if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xB6, data, sizeof (data)) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } { /* * Settings for Transmission Parameters * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 40h 14h [4:0] 8'h1F 8'h14 OREG_QAM_ENABLE[4:0] * 40h 26h [3:0] 8'h09 8'h07 OREG_TRIAL_SRATE0[11:8] * 40h 27h [7:0] 8'h9A 8'h26 OREG_TRIAL_SRATE0[7:0] * 40h 28h [3:0] 8'h00 8'h06 OREG_TRIAL_SRATE1[11:8] * 40h 29h [7:0] 8'hEE 8'hBE OREG_TRIAL_SRATE1[7:0] */ const uint8_t symRate[4] = { /* tsrate1 tsrate2 tsrate3 tsrate4 */ 0x07, 0x26, 0x06, 0xBE }; /* Set SLV-T Bank : 0x40 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x40) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x14, 0x14) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x26, symRate, 4) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } break; case SONY_DTV_BW_J83B_5_60_MSPS: { /* * * slave bank addr bit default value name * --------------------------------------------------------------------------------- * 10h B6h [7:0] 8'h1F user defined OREG_DNCNV_LOFRQ_T[23:16] * 10h B7h [7:0] 8'h38 user defined OREG_DNCNV_LOFRQ_T[15:8] * 10h B8h [7:0] 8'h32 user defined OREG_DNCNV_LOFRQ_T[7:0] */ uint8_t data[3]; data[0] = (uint8_t) ((pDemod->iffreqConfig.configJ83B_5_60 >> 16) & 0xFF); data[1] = (uint8_t) ((pDemod->iffreqConfig.configJ83B_5_60 >> 8) & 0xFF); data[2] = (uint8_t) (pDemod->iffreqConfig.configJ83B_5_60 & 0xFF); if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xB6, data, sizeof (data)) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } { /* * Settings for Transmission Parameters * slave Bank Addr Bit default Value Name * ---------------------------------------------------------------------------------- * 40h 14h [4:0] 8'h1F 8'h10 OREG_QAM_ENABLE[4:0] * 40h 26h [3:0] 8'h09 8'h07 OREG_TRIAL_SRATE0[11:8] * 40h 27h [7:0] 8'h9A 8'h77 OREG_TRIAL_SRATE0[7:0] * 40h 28h [3:0] 8'h00 8'h07 OREG_TRIAL_SRATE1[11:8] * 40h 29h [7:0] 8'hEE 8'h77 OREG_TRIAL_SRATE1[7:0] */ const uint8_t symRate[4] = { /* tsrate1 tsrate2 tsrate3 tsrate4 */ 0x07, 0x77, 0x07, 0x77 }; /* Set SLV-T Bank : 0x40 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x40) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x14, 0x10) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x26, symRate, 4) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } break; default: SONY_TRACE_RETURN (SONY_RESULT_ERROR_SW_STATE); } SONY_TRACE_RETURN (SONY_RESULT_OK); } static sony_result_t ACCtoACC (sony_demod_t * pDemod) { sony_result_t result = SONY_RESULT_OK; SONY_TRACE_ENTER ("ACCtoACC"); if (!pDemod) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } /* Disable TS output */ result = sony_demod_SetStreamOutput (pDemod, 0); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } /* Set tuner and bandwidth specific settings */ result = SLtoACC_BandSetting (pDemod); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } SONY_TRACE_RETURN (result); } static sony_result_t ACCtoSL (sony_demod_t * pDemod) { sony_result_t result = SONY_RESULT_OK; SONY_TRACE_ENTER ("ACCtoSL"); if (!pDemod) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_ARG); } /* Disable TS output */ result = sony_demod_SetStreamOutput (pDemod, 0); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } /* Set SLV-T Bank : 0x00 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Enable Hi-Z setting 1 (TAGC, SAGC, TSVALID, TSSYNC, TSCLK) */ if (sony_i2c_SetRegisterBits (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x80, 0x1F, 0x1F) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Enable Hi-Z setting 2 */ result = sony_demod_SetTSDataPinHiZ (pDemod, 1); if (result != SONY_RESULT_OK) { SONY_TRACE_RETURN (result); } /* Cancel J.83B Demod parameter Setting * slave Bank Addr Bit default Value Name * --------------------------------------------------------------------------------- * 11h A3h [4:0] 8'h00 8'h00 OREG_IMR_FORCE_CHANNEL_WIDTH,1'b0,OREG_IMR_CHANNEL_WIDTH[2:0] * 40h 21h [2] 8'h00 8'h00 OREG_DISABLE_CSI * 40h C3h [2] 8'h00 8'h00 OREG_BNDET_EN_64 * 40h B3h [2:0] 8'h02 8'h02 OREG_LMS_MU_TRK[2:0] * 40h 1Eh [7] 8'h00 8'h00 OREG_DISCRETE_SEARCH * 40h 8Eh [7:0] 8'h0E 8'h0E OREG_AR_FEC_TIMER[7:0] * 41h CFh [7:0] 8'h77 8'h77 OREG_FFE_LEAK[3:0],OREG_FBE_LEAK[3:0] * 40h 14h [4:0] 8'h1F 8'h1F OREG_QAM_ENABLE[4:0] * 40h 26h [3:0] 8'h09 8'h09 OREG_TRIAL_SRATE0[11:8] * 40h 27h [7:0] 8'h9A 8'h9A OREG_TRIAL_SRATE0[7:0] * 40h 28h [3:0] 8'h00 8'h00 OREG_TRIAL_SRATE1[11:8] * 40h 29h [7:0] 8'hEE 8'hEE OREG_TRIAL_SRATE1[7:0] */ /* Set SLV-T Bank : 0x11 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x11) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xA3, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x40 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x40) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x21, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xC3, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xB3, 0x02) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x1E, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x8E, 0x0E) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x41 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x41) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xCF, 0x77) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x40 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x40) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x14, 0x1F) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } { uint8_t data[4] = {0x09, 0x9A, 0x00, 0xEE}; if (pDemod->pI2c->WriteRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x26, data, 4) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } } /* Set SLV-X Bank : 0x00 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVX, 0x00, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* TADC setting */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVX, 0x18, 0x01) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set SLV-T Bank : 0x00 */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x00, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* TADC setting */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x49, 0x33) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* TADC setting */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x4B, 0x21) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Demodulator SW reset */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xFE, 0x01) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Disable demodulator clock */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0x2C, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set tstlv mode to default */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVT, 0xA9, 0x00) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } /* Set demodulator mode to default */ if (pDemod->pI2c->WriteOneRegister (pDemod->pI2c, pDemod->i2cAddressSLVX, 0x17, 0x01) != SONY_RESULT_OK) { SONY_TRACE_RETURN (SONY_RESULT_ERROR_I2C); } SONY_TRACE_RETURN (SONY_RESULT_OK); }