505 lines
18 KiB
C
505 lines
18 KiB
C
/*
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Copyright (C) 2010 NXP B.V., All Rights Reserved.
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This source code and any compilation or derivative thereof is the proprietary
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information of NXP B.V. and is confidential in nature. Under no circumstances
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is this software to be exposed to or placed under an Open Source License of
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any type without the expressed written permission of NXP B.V.
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*
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* \file tmbslTDA18273.h
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*
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* %version: CFR_FEAP#21 %
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*
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* \date %modify_time%
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*
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* \author David LEGENDRE
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* Michael VANNIER
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* Christophe CAZETTES
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*
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* \brief Describe briefly the purpose of this file.
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*
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* REFERENCE DOCUMENTS :
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* TDA18273_Driver_User_Guide.pdf
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*
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* TVFE SW Arch V4 Template: Author Christophe CAZETTES
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*
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* \section info Change Information
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*
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*/
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#pragma once
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#ifndef _TMBSL_TDA18273_H
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#define _TMBSL_TDA18273_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/*============================================================================*/
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/* TDA18273 Error Codes */
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/*============================================================================*/
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#define TDA18273_ERR_BASE (CID_COMP_TUNER | CID_LAYER_BSL)
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#define TDA18273_ERR_COMP (CID_COMP_TUNER | CID_LAYER_BSL | TM_ERR_COMP_UNIQUE_START)
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#define TDA18273_ERR_BAD_UNIT_NUMBER (TDA18273_ERR_BASE + TM_ERR_BAD_UNIT_NUMBER)
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#define TDA18273_ERR_ERR_NO_INSTANCES (TDA18273_ERR_BASE + TM_ERR_NO_INSTANCES)
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#define TDA18273_ERR_NOT_INITIALIZED (TDA18273_ERR_BASE + TM_ERR_NOT_INITIALIZED)
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#define TDA18273_ERR_ALREADY_SETUP (TDA18273_ERR_BASE + TM_ERR_ALREADY_SETUP)
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#define TDA18273_ERR_INIT_FAILED (TDA18273_ERR_BASE + TM_ERR_INIT_FAILED)
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#define TDA18273_ERR_BAD_PARAMETER (TDA18273_ERR_BASE + TM_ERR_BAD_PARAMETER)
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#define TDA18273_ERR_NOT_SUPPORTED (TDA18273_ERR_BASE + TM_ERR_NOT_SUPPORTED)
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#define TDA18273_ERR_NULL_CONTROLFUNC (TDA18273_ERR_BASE + TM_ERR_NULL_CONTROLFUNC)
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#define TDA18273_ERR_HW_FAILED (TDA18273_ERR_COMP + 0x0001)
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#define TDA18273_ERR_NOT_READY (TDA18273_ERR_COMP + 0x0002)
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#define TDA18273_ERR_BAD_VERSION (TDA18273_ERR_COMP + 0x0003)
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#define TDA18273_ERR_STD_NOT_SET (TDA18273_ERR_COMP + 0x0004)
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#define TDA18273_ERR_RF_NOT_SET (TDA18273_ERR_COMP + 0x0005)
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/*============================================================================*/
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/* Types and defines: */
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/*============================================================================*/
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typedef enum _TDA18273PowerState_t {
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TDA18273_PowerNormalMode = 0, /* Device normal mode */
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TDA18273_PowerStandbyWithXtalOn, /* Device standby mode with Xtal Output */
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TDA18273_PowerStandby, /* Device standby mode */
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TDA18273_PowerMax
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} TDA18273PowerState_t, *pTDA18273PowerState_t;
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typedef enum _TDA18273StandardMode_t {
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TDA18273_StandardMode_Unknown = 0, /* Unknown standard */
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TDA18273_QAM_6MHz, /* Digital TV QAM 6MHz */
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TDA18273_QAM_8MHz, /* Digital TV QAM 8MHz */
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TDA18273_ATSC_6MHz, /* Digital TV ATSC 6MHz */
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TDA18273_ISDBT_6MHz, /* Digital TV ISDBT 6MHz */
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TDA18273_DVBT_1_7MHz, /* Digital TV DVB-T/T2 6MHz */
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TDA18273_DVBT_6MHz, /* Digital TV DVB-T/T2 6MHz */
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TDA18273_DVBT_7MHz, /* Digital TV DVB-T/T2 7MHz */
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TDA18273_DVBT_8MHz, /* Digital TV DVB-T/T2 8MHz */
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TDA18273_DVBT_10MHz, /* Digital TV DVB-T/T2 10MHz */
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TDA18273_DMBT_8MHz, /* Digital TV DMB-T 8MHz */
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TDA18273_FM_Radio, /* Analog FM Radio */
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TDA18273_ANLG_MN, /* Analog TV M/N */
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TDA18273_ANLG_B, /* Analog TV B */
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TDA18273_ANLG_GH, /* Analog TV G/H */
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TDA18273_ANLG_I, /* Analog TV I */
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TDA18273_ANLG_DK, /* Analog TV D/K */
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TDA18273_ANLG_L, /* Analog TV L */
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TDA18273_ANLG_LL, /* Analog TV L' */
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TDA18273_Scanning, /* Analog Preset Blind Scanning */
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TDA18273_ScanXpress, /* ScanXpress */
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TDA18273_StandardMode_Max
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} TDA18273StandardMode_t, *pTDA18273StandardMode_t;
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#define isTDA18273_DGTL_STD(_CURSTD) ( (((_CURSTD)>=TDA18273_QAM_6MHz) && ((_CURSTD)<=TDA18273_DMBT_8MHz)) || ((_CURSTD)==TDA18273_ScanXpress) )
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#define isTDA18273_ANLG_STD(_CURSTD) ( ((_CURSTD)>=TDA18273_FM_Radio) && ((_CURSTD)<=TDA18273_Scanning) )
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/* TDA18273 specific IRQ clear: */
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typedef enum _TDA18273IRQ_t {
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TDA18273_IRQ_MSM_RCCal = 0x01, /* MSM_RCCal bit */
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TDA18273_IRQ_MSM_IRCAL = 0x02, /* MSM_IRCAL bit */
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TDA18273_IRQ_MSM_RFCal = 0x04, /* MSM_RFCal bit */
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TDA18273_IRQ_MSM_LOCalc = 0x08, /* MSM_LOCalc bit */
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TDA18273_IRQ_MSM_RSSI = 0x10, /* MSM_RSSI bit */
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TDA18273_IRQ_XtalCal = 0x20, /* XtalCal bit */
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TDA18273_IRQ_Global = 0x80, /* IRQ_status bit */
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TDA18273_IRQ_HwInit = TDA18273_IRQ_MSM_RCCal\
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|TDA18273_IRQ_MSM_RFCal\
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|TDA18273_IRQ_MSM_LOCalc\
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|TDA18273_IRQ_MSM_RSSI,
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TDA18273_IRQ_IrCal = TDA18273_IRQ_MSM_IRCAL\
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|TDA18273_IRQ_MSM_LOCalc\
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|TDA18273_IRQ_MSM_RSSI,
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TDA18273_IRQ_SetRF = TDA18273_IRQ_MSM_RFCal\
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|TDA18273_IRQ_MSM_LOCalc,
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TDA18273_IRQ_GetPowerLevel = TDA18273_IRQ_MSM_RSSI
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} TDA18273IRQ_t, *pTDA18273IRQ_t;
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/* Register Bit-Field Definition */
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typedef struct _TDA18273_BitField_t
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{
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UInt8 Address;
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UInt8 PositionInBits;
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UInt8 WidthInBits;
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UInt8 Attributes;
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}
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TDA18273_BitField_t, *pTDA18273_BitField_t;
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/* Bus Access */
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typedef enum _eBusAccess_t
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{
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/* RW Bus access */
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Bus_RW = 0x00,
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/* No Read Bus access */
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Bus_NoRead = 0x01,
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/* No Write Bus access */
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Bus_NoWrite = 0x02,
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/* No Bus access. Update RegMap only */
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Bus_None = Bus_NoRead|Bus_NoWrite,
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Bus_Max
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} eBusAccess_t;
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/*============================================================================*/
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/* Exported functions: */
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/*============================================================================*/
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tmErrorCode_t
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tmbslTDA18273_Open(
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tmUnitSelect_t tUnit, /* I: Unit number */
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tmbslFrontEndDependency_t* psSrvFunc /* I: setup parameters */
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);
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tmErrorCode_t
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tmbslTDA18273_Close(
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tmUnitSelect_t tUnit /* I: Unit number */
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);
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tmErrorCode_t
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tmbslTDA18273_GetSWVersion(
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ptmSWVersion_t pSWVersion /* I: Receives SW Version */
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);
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tmErrorCode_t
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tmbslTDA18273_GetSWSettingsVersion(
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ptmSWSettingsVersion_t pSWSettingsVersion /* O: Receives SW Settings Version */
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);
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tmErrorCode_t
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tmbslTDA18273_CheckHWVersion(
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tmUnitSelect_t tUnit /* I: Unit number */
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);
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tmErrorCode_t
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tmbslTDA18273_SetPowerState(
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tmUnitSelect_t tUnit, /* I: Unit number */
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tmPowerState_t powerState /* I: Power state */
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);
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tmErrorCode_t
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tmbslTDA18273_GetPowerState(
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tmUnitSelect_t tUnit, /* I: Unit number */
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tmPowerState_t* pPowerState /* O: Power state */
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);
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tmErrorCode_t
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tmbslTDA18273_SetLLPowerState(
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tmUnitSelect_t tUnit, /* I: Unit number */
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TDA18273PowerState_t powerState /* I: Power state of TDA18273 */
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);
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tmErrorCode_t
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tmbslTDA18273_GetLLPowerState(
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tmUnitSelect_t tUnit, /* I: Unit number */
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TDA18273PowerState_t* pPowerState /* O: Power state of TDA18273 */
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);
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tmErrorCode_t
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tmbslTDA18273_SetStandardMode(
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tmUnitSelect_t tUnit, /* I: Unit number */
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TDA18273StandardMode_t StandardMode /* I: Standard mode of this device */
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);
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tmErrorCode_t
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tmbslTDA18273_GetStandardMode(
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tmUnitSelect_t tUnit, /* I: Unit number */
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TDA18273StandardMode_t *pStandardMode /* O: Standard mode of this device */
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);
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tmErrorCode_t
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tmbslTDA18273_SetRF(
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tmUnitSelect_t tUnit, /* I: Unit number */
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UInt32 uRF /* I: RF frequency in hertz */
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);
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tmErrorCode_t
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tmbslTDA18273_GetRF(
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tmUnitSelect_t tUnit, /* I: Unit number */
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UInt32* pRF /* O: RF frequency in hertz */
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);
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tmErrorCode_t
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tmbslTDA18273_HwInit(
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tmUnitSelect_t tUnit /* I: Unit number */
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);
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tmErrorCode_t
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tmbslTDA18273_GetIF(
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tmUnitSelect_t tUnit, /* I: Unit number */
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UInt32* puIF /* O: IF Frequency in hertz */
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);
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tmErrorCode_t
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tmbslTDA18273_SetIF(
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tmUnitSelect_t tUnit, /* I: Unit number */
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UInt32 uIF /* I: IF Frequency in hertz */
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);
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tmErrorCode_t
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tmbslTDA18273_GetCF_Offset(
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tmUnitSelect_t tUnit, /* I: Unit number */
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UInt32* puOffset /* O: Center frequency offset in hertz */
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);
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tmErrorCode_t
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tmbslTDA18273_GetLockStatus(
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tmUnitSelect_t tUnit, /* I: Unit number */
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tmbslFrontEndState_t* pLockStatus /* O: PLL Lock status */
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);
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tmErrorCode_t
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tmbslTDA18273_GetPowerLevel(
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tmUnitSelect_t tUnit, /* I: Unit number */
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UInt8* pPowerLevel /* O: Power Level in 1/2 steps dBµV */
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);
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tmErrorCode_t
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tmbslTDA18273_SetInternalVsync(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool bEnabled /* I: Enable of disable the internal VSYNC */
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);
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tmErrorCode_t
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tmbslTDA18273_GetInternalVsync(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool* pbEnabled /* O: current status of the internal VSYNC */
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);
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tmErrorCode_t
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tmbslTDA18273_SetIRQWait(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool bWait /* I: Determine if we need to wait IRQ in driver functions */
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);
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tmErrorCode_t
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tmbslTDA18273_GetIRQWait(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool* pbWait /* O: Determine if we need to wait IRQ in driver functions */
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);
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tmErrorCode_t
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tmbslTDA18273_SetPllManual(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool bOverridePLL /* I: Determine if we need to put PLL in manual mode in SetRF */
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);
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tmErrorCode_t
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tmbslTDA18273_GetPllManual(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool* pbOverridePLL /* O: Determine if we need to put PLL in manual mode in SetRF */
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);
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tmErrorCode_t
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tmbslTDA18273_SetIRQWaitHwInit(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool bWait /* I: Determine if we need to wait IRQ in driver functions */
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);
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tmErrorCode_t
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tmbslTDA18273_GetIRQWaitHwInit(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Bool* pbWait /* O: Determine if we need to wait IRQ in driver functions */
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);
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tmErrorCode_t
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tmbslTDA18273_GetIRQ(
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tmUnitSelect_t tUnit /* I: Unit number */,
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Bool* pbIRQ /* O: IRQ triggered */
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);
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tmErrorCode_t
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tmbslTDA18273_WaitIRQ(
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tmUnitSelect_t tUnit, /* I: Unit number */
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UInt32 timeOut, /* I: timeOut for IRQ wait */
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UInt32 waitStep, /* I: wait step */
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UInt8 irqStatus /* I: IRQs to wait */
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);
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tmErrorCode_t
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tmbslTDA18273_GetXtalCal_End(
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tmUnitSelect_t tUnit /* I: Unit number */,
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Bool* pbXtalCal_End /* O: XtalCal_End triggered */
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);
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/* You can only add one step (-1 or +1) at a time along -125 KHz <-> -62.5 KHz <-> 0 <-> 62.5 KHz <-> 125 KHz */
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/* After calling tmbslTDA18273_SetRF, step is reset at 0 */
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tmErrorCode_t
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tmbslTDA18273_SetFineRF(
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tmUnitSelect_t tUnit, /* I: Unit number */
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Int8 step /* I: step (-1, +1) */
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);
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tmErrorCode_t
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tmbslTDA18273_Write(
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tmUnitSelect_t tUnit, /* I: Unit number */
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const TDA18273_BitField_t* pBitField, /* I: Bitfield structure */
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UInt8 uData, /* I: Data to write */
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eBusAccess_t eBusAccess /* I: Access to bus */
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);
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tmErrorCode_t
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tmbslTDA18273_Read(
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tmUnitSelect_t tUnit, /* I: Unit number */
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const TDA18273_BitField_t* pBitField, /* I: Bitfield structure */
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UInt8* puData, /* I: Data to read */
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eBusAccess_t eBusAccess /* I: Access to bus */
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);
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/*============================================================================*/
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/* Legacy compatibility: */
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/*============================================================================*/
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#ifndef tmbslTDA18273Init
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#define tmbslTDA18273Init tmbslTDA18273_Open
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#endif
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#ifndef tmbslTDA18273DeInit
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#define tmbslTDA18273DeInit tmbslTDA18273_Close
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#endif
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#ifndef tmbslTDA18273GetSWVersion
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#define tmbslTDA18273GetSWVersion tmbslTDA18273_GetSWVersion
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#endif
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#ifndef tmbslTDA18273GetSWSettingsVersion
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#define tmbslTDA18273GetSWSettingsVersion tmbslTDA18273_GetSWSettingsVersion
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#endif
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#ifndef tmbslTDA18273CheckHWVersion
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#define tmbslTDA18273CheckHWVersion tmbslTDA18273_CheckHWVersion
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#endif
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#ifndef tmbslTDA18273SetPowerState
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#define tmbslTDA18273SetPowerState tmbslTDA18273_SetLLPowerState
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#endif
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#ifndef tmbslTDA18273GetPowerState
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#define tmbslTDA18273GetPowerState tmbslTDA18273_GetLLPowerState
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#endif
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#ifndef tmbslTDA18273SetLLPowerState
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#define tmbslTDA18273SetLLPowerState tmbslTDA18273_SetLLPowerState
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#endif
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#ifndef tmbslTDA18273GetLLPowerState
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#define tmbslTDA18273GetLLPowerState tmbslTDA18273_GetLLPowerState
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#endif
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#ifndef tmbslTDA18273SetStandardMode
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#define tmbslTDA18273SetStandardMode tmbslTDA18273_SetStandardMode
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#endif
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#ifndef tmbslTDA18273GetStandardMode
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#define tmbslTDA18273GetStandardMode tmbslTDA18273_GetStandardMode
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#endif
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#ifndef tmbslTDA18273SetRf
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#define tmbslTDA18273SetRf tmbslTDA18273_SetRF
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#endif
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#ifndef tmbslTDA18273GetRf
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#define tmbslTDA18273GetRf tmbslTDA18273_GetRF
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#endif
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#ifndef tmbslTDA18273Reset
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#define tmbslTDA18273Reset tmbslTDA18273_HwInit
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#endif
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#ifndef tmbslTDA18273GetIF
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#define tmbslTDA18273GetIF tmbslTDA18273_GetIF
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#endif
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#ifndef tmbslTDA18273GetCF_Offset
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#define tmbslTDA18273GetCF_Offset tmbslTDA18273_GetCF_Offset
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#endif
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#ifndef tmbslTDA18273GetLockStatus
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#define tmbslTDA18273GetLockStatus tmbslTDA18273_GetLockStatus
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#endif
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#ifndef tmbslTDA18273GetPowerLevel
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#define tmbslTDA18273GetPowerLevel tmbslTDA18273_GetPowerLevel
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#endif
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#ifndef tmbslTDA18273GetRSSI
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#define tmbslTDA18273GetRSSI tmbslTDA18273_GetRSSI
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#endif
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#ifndef tmbslTDA18273SetIRQWait
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#define tmbslTDA18273SetIRQWait tmbslTDA18273_SetIRQWait
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#endif
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#ifndef tmbslTDA18273GetIRQWait
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#define tmbslTDA18273GetIRQWait tmbslTDA18273_GetIRQWait
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#endif
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#ifndef tmbslTDA18273SetIRQWaitHwInit
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#define tmbslTDA18273SetIRQWaitHwInit tmbslTDA18273_SetIRQWaitHwInit
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#endif
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#ifndef tmbslTDA18273GetIRQWaitHwInit
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#define tmbslTDA18273GetIRQWaitHwInit tmbslTDA18273_GetIRQWaitHwInit
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#endif
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#ifndef tmbslTDA18273GetIRQ
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#define tmbslTDA18273GetIRQ tmbslTDA18273_GetIRQ
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#endif
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#ifndef tmbslTDA18273WaitIRQ
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#define tmbslTDA18273WaitIRQ tmbslTDA18273_WaitIRQ
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#endif
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#ifndef tmbslTDA18273GetXtalCal_End
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#define tmbslTDA18273GetXtalCal_End tmbslTDA18273_GetXtalCal_End
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#endif
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#ifndef tmbslTDA18273RFFineTuning
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#define tmbslTDA18273RFFineTuning tmbslTDA18273_SetFineRF
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#endif
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#ifndef tmbslTDA18273Write
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#define tmbslTDA18273Write tmbslTDA18273_Write
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#endif
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#ifndef tmbslTDA18273Read
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#define tmbslTDA18273Read tmbslTDA18273_Read
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#endif
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#define tmTDA18273PowerState_t TDA18273PowerState_t
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#define tmTDA18273_PowerNormalMode TDA18273_PowerNormalMode
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#define tmTDA18273_PowerStandbyWithXtalOn TDA18273_PowerStandbyWithXtalOn
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#define tmTDA18273_PowerStandby TDA18273_PowerStandby
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#define tmTDA18273_PowerMax TDA18273_PowerMax
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#define tmTDA18273StandardMode_t TDA18273StandardMode_t
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#define tmTDA18273_QAM_6MHz TDA18273_QAM_6MHz
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#define tmTDA18273_QAM_8MHz TDA18273_QAM_8MHz
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#define tmTDA18273_ATSC_6MHz TDA18273_ATSC_6MHz
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#define tmTDA18273_ISDBT_6MHz TDA18273_ISDBT_6MHz
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#define tmTDA18273_DVBT_1_7MHz TDA18273_DVBT_1_7MHz
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#define tmTDA18273_DVBT_6MHz TDA18273_DVBT_6MHz
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#define tmTDA18273_DVBT_7MHz TDA18273_DVBT_7MHz
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#define tmTDA18273_DVBT_8MHz TDA18273_DVBT_8MHz
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#define tmTDA18273_DVBT_10MHz TDA18273_DVBT_10MHz
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#define tmTDA18273_DMBT_8MHz TDA18273_DMBT_8MHz
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#define tmTDA18273_FM_Radio TDA18273_FM_Radio
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#define tmTDA18273_ANLG_MN TDA18273_ANLG_MN
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#define tmTDA18273_ANLG_B TDA18273_ANLG_B
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#define tmTDA18273_ANLG_GH TDA18273_ANLG_GH
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#define tmTDA18273_ANLG_I TDA18273_ANLG_I
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#define tmTDA18273_ANLG_DK TDA18273_ANLG_DK
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#define tmTDA18273_ANLG_L TDA18273_ANLG_L
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#define tmTDA18273_ANLG_LL TDA18273_ANLG_LL
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#define tmTDA18273_Scanning TDA18273_Scanning
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#define tmTDA18273_ScanXpress TDA18273_ScanXpress
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#define tmTDA18273_StandardMode_Max TDA18273_StandardMode_Max
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#ifdef __cplusplus
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}
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#endif
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#endif /* _TMBSL_TDA18273_H */
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