smod_atsc_app/atsc_app/sonytuner/sony_cxd6801gl.h

#ifndef __SONY_CXD6801GL_H__
#define __SONY_CXD6801GL_H__

#include "sony_integ.h"
#include "./sony_demod.h"
#include "./sony_i2c.h"
#include "tuner/sony_tuner.h"
#include "sat_device_ctrl/lnb_controller/sony_lnbc.h"
#include "tuner/terr_cable_ascot3/refcode/sony_ascot3.h"
#include "tuner/terr_cable_sat_freia/refcode/sony_freia.h"

#include "../inc/type.h"

#define LLS_SRC_NUM_MAX	5


//#define TUNER_LOCK_LED_GPIO_NUM   45    //GPIO5_5
//#define TUNER_RST_GPIO_NUM        50    //GPIO6_2
//#define SONY_CXD_I2C_NUM                        0
#define USR_PR_TUNER_INFO           1
#define CMP_VALUE(x,y,val_name) \
do\
{\
   if(x!=y){\
        printf(" chg [%6d, %6d] %s\r\n",x,y,val_name);\
   }\
}while(0);

#define  TUNER_LOCK_CHECK_WAIT_SEC      2

typedef struct
{
    u32 rssi_tuner;
    s32 rssi_db_tuner;
    u32 rssi_demond;
    s32 snr;
    u32 locked;
    u32 freqM;
    u32 sqi;
}S_TUNER_INFO;

// Tuner chip type enumeration
typedef enum {
    TUNER_TYPE_UNKNOWN = 0,
    TUNER_TYPE_CXD6821 = 1,  /**< CXD6821 with FREIA tuner, demod I2C addr 0xC8 */
    TUNER_TYPE_CXD6801 = 2   /**< CXD6801 with ASCOT3 tuner, demod I2C addr 0xD8 */
} tuner_chip_type_t;

typedef struct {
    sony_demod_t             demod;          /**< Demod IC driver struct instance */
    sony_integ_t             integ;          /**< Integ struct instance */
    sony_i2c_t               i2c;            /**< I2C struct instance */
    sony_tuner_t             tuner;          /**< Tuner driver instance */
    sony_lnbc_t              lnbc;           /**< LNB controller driver instance */
    sony_ascot3_t            ascot3;         /**< Sony ASCOT3 tuner driver instance (SiP internal) */
	sony_freia_t             freia;          /**< Sony FREIA tuner driver instance */
} sony_driver_instance_t;


typedef struct{
	sony_atsc3_l1detail_common_t	l1DCommon;
	sony_atsc3_l1detail_subframe_t	l1DSubframe[2];
	sony_atsc3_l1detail_plp_t		l1DPlp[2][4];
}S_USR_L1D_INFO;

typedef struct{
	u8 preamble_pilot_dx;
}S_USR_OTHMORE_INFO;

typedef struct{
	sony_atsc3_bootstrap_t boots;
	sony_atsc3_l1basic_t   l1b;
	S_USR_L1D_INFO         l1d;
	S_USR_OTHMORE_INFO     oth;
	u16                    snd_cnt;
}S_TUN_INFO;


//--------------------------------------------------------
typedef struct{
	u8   version_major;
	u8   version_minor;
	u8   system_bandwidth;
	u8   preamble_dx;
	u8   rev[4];
}S_USR_BOOTSTRAP;

typedef struct stc_Boot_Strap {
	//>>> all bootstrap para---
	u8 version_major;
	u8 version_minor;
	//maj_log_rep_cnt_pre
	//maj_log_rep_cnt_tim
	//bootstrap_major
	//bootstrap_minor
	uint8_t min_time_to_next;
    uint8_t system_bandwidth;//0-6M,1-7M,2-8M
    //bsr_coefficient
    uint8_t preamble_structure;
    uint8_t ea_wakeup;
	//num_emission_tim
	//num_xmtrs_in_group_mins_1
	//xmtrs_group_num
	//maj_log_override
	//num_miso_filt_codes
	//tx_carrier_offset
	//reserved
	
	//Bootstrap_Timing_Data
	//Per_Transmitter_Data
	//Packet_Release_Time
	//-----------<<<-------------
} S_BOOT_STRAP;


typedef sony_atsc3_l1basic_t  S_USR_L1B_INFO;

#define PLP_MAPLIST_MAX		20

typedef struct{
	//u8   valid;
	u8   subfrm;
	u8   plp;
	u32  dst_ip;
	u16  dst_port;
	u32  src_ip;
	u16  src_port;
}S_PLP_MAPLIST_ELEMET;


typedef struct{
	S_PLP_MAPLIST_ELEMET list[PLP_MAPLIST_MAX];
	u8                   list_num;
}S_PLP_MAPLIST;

typedef struct{
	u32  plp_frame_time[4];
	u32  plp_capacity[4];
	u32  plp_bitrate[4];
	u32  plp_size_max[4];
	u32  ofdm_symbol_max;
}S_GW_SUB_STA;

typedef struct{
	u32          frame_time;
	u32          gateway_state;
	S_GW_SUB_STA sub[2];
}S_GW_STA;

typedef struct{
	u8  lls_src_num;
	u8  lls_src_select;
	u8  ret[2];
	u32 lls_src_ip[LLS_SRC_NUM_MAX];
	u16 lls_src_port[LLS_SRC_NUM_MAX];
}S_LLS_SRC;

typedef struct{
	S_BOOT_STRAP 	       usr_boots;
	S_USR_L1B_INFO         l1b;
	S_USR_L1D_INFO         l1d;
	u8                     preamble_pilot_dx;
	u8 					   preamble_l1b_fec_type;
	u8 					   preamble_fft_size;
	u8 					   preamble_gi;
	S_PLP_MAPLIST   	   plp_maplist;
	u8                     output_en;
	S_LLS_SRC              lls_src;
	u16                    snd_cnt;
	S_GW_STA               sta;
}S_GATEWAY_PARA;


//--------------------------------------------------------

extern void sony_cxd6801gl_init(void);
extern int sonytuner_init(u32 freqMHz, u8 atsc_ver);
extern int sonytuner_rssi(int *p_rssi, u8 atsc_ver);
extern int sonytuner_snr(int *p_snr, u8 atsc_ver);
extern int sonytuner_tslock(uint8 *p_lock, u8 atsc_ver, u8 *p_sync_state, u8* p_alp_lock_all, u8* p_plperr);
extern sony_result_t i2c_drv_imx_init(sony_i2c_t* pI2c);
extern int sonytuner_plperr(u8* p_plperr);

extern int  usr_update_atsc3_monitor_plpid(void);
extern int  usr_sony_tuner_l1b_l1d_update();
extern void usr_check_and_tun_tuner();
extern void tun_tuner_1plp_once();

#endif // __SONY_CXD6801GL_H__