1735 lines
62 KiB
C
Executable File
1735 lines
62 KiB
C
Executable File
/*
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@NOT_ACT_USED: @NEED_CHECK_FUNC
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*/
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#include <string.h>
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#include "type.h"
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#include "delay.h"
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#include "os_task.h"
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#include "lcd_task.h"
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#include "uart_user.h"
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#include "sys_config.h"
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#include "i2c_drv.h"
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#include "eeprom.h"
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#include "fpga.h"
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#include "general_api.h"
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#include "stdlib.h"
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extern S_DRYLOOP dryloop_status;
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extern uint32 auto_update;
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extern uint32 Net_write_RF(uint8 param);
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extern void set_menu_init(void);
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extern void enter_menu(uint32 index);
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void enter_update_lcd(void);
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extern uint8 agc_value[];
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extern uint8 off_rf;
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char std_w[5]={0};
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char std_r[5]={0};
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static uint8 uart_outbuf[100] = {0};
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uint32 uart_init_set_result_frame(uint8 *pin,uint8 *pout,uint32 err)
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{
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pout[0] = pin[1]|0x80;
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pout[1] = 0x07;
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pout[2] = pin[0];
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pout[3] = pin[3];
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pout[4] = (uint8)err;
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pout[5] = get_check_sum(pout,5);
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pout[6] = 0x96;
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return 7;
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}
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void agc_auto_switch(void)
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{
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if(atsc_para.rf_para.agc && atsc_para.wh_para.pac != 1)
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{
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uint8 para_middle[64] = {0,};
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S_WH_PARA *ppara = (S_WH_PARA *)para_middle;
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memcpy(para_middle,&atsc_para.wh_para,sizeof(atsc_para.wh_para));
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ppara->pac = 1;
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e2rom_save_wh(ppara);
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fpga_save_wh(ppara);
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memcpy(&atsc_para.wh_para,ppara,sizeof(atsc_para.wh_para));
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}
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}
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#define PA_CONN_DELAY 10
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static uint32 pa_conn_status = 0;
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static uint32 pa_conn_cnt = 0;
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void pa_conn_chk(void)
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{
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if ( pa_conn_cnt )
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{
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pa_conn_cnt --;
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pa_conn_status = 1;
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agc_auto_switch();
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}
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else
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{
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pa_conn_status = 0;
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}
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}
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uint32 pa_conn_sta(void)
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{
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return pa_conn_status;
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}
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static void pa_conn_refresh(void)
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{
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pa_conn_cnt = PA_CONN_DELAY;
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}
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//************************************************************************/
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typedef struct{
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uint16 pa_link_cnt;
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uint16 pa_link_err;
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}S_UART_DEV_LINK;
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#if USE_UART_DEV_LINK
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S_UART_DEV_LINK uart_dev_link;
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#endif
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static void uart_Remote(MSG *pmsg)
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{
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uint32 len = 0;
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uint32 set_result = 0;
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uint8 *pinbuf;
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uint32 port;
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if(!pmsg->wPara)
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{
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return;
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}
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if(!pmsg->lPara)
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{
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return;
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}
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port = pmsg->rPara;
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if((port!=UART_USER_232_COM)&&(port!=UART_USER_485_COM))
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{
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return;
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}
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pinbuf = (uint8 *)pmsg->lPara;
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if(memcmp(std_r,pinbuf,3)==0) //头部检查
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{
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if(get_check_sum(pinbuf,4)==pinbuf[4])//查询命令
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{
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len = protocol_read(pinbuf,uart_outbuf);//回复
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#if USE_UART_DEV_LINK
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uart_dev_link.pa_link_cnt = 0;
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uart_dev_link.pa_link_err = 0;
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#endif
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}
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}
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if(memcmp(std_w,pinbuf,3)==0)
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{
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if(get_check_sum(pinbuf,8)==pinbuf[8])//设置命令
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{
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set_result = protocol_write(pinbuf,uart_outbuf);//配置本地参数
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}
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else
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set_result = UART_PARA_SET_ERR_SUM;
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len = uart_init_set_result_frame(pinbuf,uart_outbuf,set_result);
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}
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if(len)
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{
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uart_send_string(port,uart_outbuf,len);//发送N字节
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}
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}
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uint32 protocol_read(uint8 *pbufin,uint8 *pbufout)
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{
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uint32 i;
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uint32 count = 0;
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//#if TEMPREATURE_DEGREE==0
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int32 ltemp = 0;
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uint32 ultemp = 0;
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//#endif
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uint32 temp =0;
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switch(pbufin[3])
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{
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case 0x31:
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pbufout[0] = 0X76;
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pbufout[1] = 0X2A;
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pbufout[2] = atsc_para.config_para.id;
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pbufout[3] = 0x31;
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for(i=4;i<40;i++) //inbuf1[4] ~ inbuf1[39]
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{
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pbufout[i] = 0XFF;
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}
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pbufout[4] = atsc_para.rf_para.txfreq;
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pbufout[5] = atsc_para.rf_para.rxfreq;
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pbufout[6] = atsc_para.system_para.ctrl;
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pbufout[7] = atsc_para.system_para.input;
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pbufout[8] = atsc_para.system_para.adpc;
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if(off_rf)
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pbufout[10] = 1 | off_rf;
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else
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pbufout[10] = off_rf;
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pbufout[11] = fpga_byte_read(0x1,0x25);
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pbufout[12] = fpga_byte_read(0x1,0x23) & 0X03 ; //high 8 bit
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pbufout[13] = fpga_byte_read(0x1,0x24); //low 8 bit
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//#if TEMPREATURE_DEGREE==0
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if(get_temp_unit()==0){
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ultemp = (pbufout[12]<<8)|pbufout[13];
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ultemp = ultemp&0x3ff;
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if(ultemp&0x200) //-
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{
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ultemp = 1024-ultemp;
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ltemp = ultemp/4*100+ultemp%4*25;
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ltemp = -ltemp;
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ltemp = degree2fah(ltemp);
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}
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else
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{
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ultemp &=0x1ff;
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ltemp = ultemp/4*100+ultemp%4*25;
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ltemp = degree2fah(ltemp);
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}
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pbufout[12] = ltemp/100;
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pbufout[13] = ltemp%100;
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}
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//#endif
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pbufout[14]= atsc_para.config_para.bps;
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pbufout[15]= atsc_para.rf_para.rf;
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if(atsc_para.system_para.net == 0)
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{
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pbufout[16] = atsc_para.network_para.delay>>16;
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pbufout[17] = atsc_para.network_para.delay>>8;
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pbufout[18] = atsc_para.network_para.delay;
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}
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pbufout[19] = atsc_para.rf_para.power>>8;
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pbufout[20] = atsc_para.rf_para.power;
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pbufout[21] = atsc_para.system_para.adpc_err;
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pbufout[22] = atsc_para.rf_para.hz>>16;
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pbufout[23] = atsc_para.rf_para.hz>>8;
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pbufout[24] = atsc_para.rf_para.hz;
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pbufout[25] = atsc_para.rf_para.cw;
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if(atsc_para.system_para.net == 0)
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{
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pbufout[26] = atsc_para.network_para.txid>>8;
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pbufout[27] = atsc_para.network_para.txid;
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pbufout[28] = atsc_para.network_para.netid>>8;
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pbufout[29] = atsc_para.network_para.netid;
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}
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pbufout[30] = atsc_para.rf_para.agc?1:0;
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if(atsc_para.system_para.net==0)
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{
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pbufout[31] = atsc_para.network_para.bratio;
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}
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if(get_menu_index()>=SYS_LCD) //非LOG屏,立即刷新
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update_log_para();
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pbufout[9] =(atsc_para.log_para.asi_input<<4)|atsc_para.log_para.input_ok_flag;
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pbufout[32] = 0x14; //硬件版本
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pbufout[35] = atsc_para.log_para.rsnr;
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pbufout[36] = atsc_para.log_para.tsnr;
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pbufout[37] = atsc_para.log_para.l_imd;
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pbufout[38] = atsc_para.log_para.u_imd;
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pbufout[39] = atsc_para.log_para.gps;
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pbufout[40] = get_check_sum(pbufout,40);
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pbufout[41] = 0X96;
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count = 42;
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break;
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case 0x32:
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pbufout[0] = 0x76;
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pbufout[1] = 0x23;
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pbufout[2] = atsc_para.config_para.id;
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pbufout[3] = 0x32;
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for(i=4;i<40;i++) //inbuf1[4] ~ inbuf1[39]
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{
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pbufout[i] = 0XFF;
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}
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if(atsc_para.log_para.mode)
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{
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pbufout[4]=atsc_para.mode_para.sync;
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pbufout[5]=atsc_para.mode_para.zp1f;
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pbufout[6]=atsc_para.mode_para.tcp_c;
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pbufout[7]=(atsc_para.mode_para.pid_det&0x1fff)>>8;
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pbufout[8]=atsc_para.mode_para.pid_det;
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}
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pbufout[9] =atsc_para.log_para.syserr;
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//pbufout[10]=0;
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pbufout[11]=atsc_para.log_para.mode;
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if(atsc_para.system_para.mode == 2)
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pbufout[11] |= 1<<1;
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pbufout[12]=atsc_para.system_para.net;
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if(get_menu_index()>=SYS_LCD) //非LOG屏,立即刷新
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update_log_para();
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if((atsc_para.system_para.gps)&&(atsc_para.log_para.use_gps)) //INT
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{
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GPGSA_T *gps_gsa = gps_get_sa();
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S_SYS_TIME time;
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get_sys_time(&time);
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pbufout[13] = time.year>>8;
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pbufout[14] = time.year;
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pbufout[15] = time.month;
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pbufout[16] = time.date;
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pbufout[17] = time.hour;
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pbufout[18] = time.min;
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pbufout[19] = time.sec;
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pbufout[20] = gps_gsa->sv;
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pbufout[21] = atsc_para.log_para.gps_status;
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pbufout[22] = atsc_para.log_para.gps_freq[0];
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pbufout[23] = atsc_para.log_para.gps_freq[1];
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}
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#if USE_GPS
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pbufout[25] = atsc_para.system_para.gps;
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#endif
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if(atsc_para.log_para.ts_rate&1)
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pbufout[26] = 1;
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else if(atsc_para.log_para.ts_under)
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pbufout[26] = 2;
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else
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pbufout[26] = 0;
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pbufout[27]=atsc_para.log_para.ts_rate/1000000;
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i = atsc_para.log_para.ts_rate%1000000;
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pbufout[28]= i>>16;
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pbufout[29]= i>>8;
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pbufout[30]= i;
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pbufout[31]= atsc_para.log_para.gps_1pps;
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pbufout[33]= get_check_sum(pbufout,33);
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pbufout[34] = 0X96;
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count = 35;//
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break;
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case 0x33:
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pbufout[0]=0x76;
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pbufout[1]=0x26;
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pbufout[2]=atsc_para.config_para.id;
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pbufout[3] = 0x33;
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for(i=4;i<40;i++) //inbuf1[4] ~ inbuf1[39]
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{
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pbufout[i] = 0XFF ;
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}
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pbufout[4] =(atsc_para.ad_para.pcr&0X07); //ad1
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pbufout[5] =atsc_para.ad_para.slow_up;
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pbufout[6] =atsc_para.ad_para.slow_down;
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pbufout[7] =atsc_para.ad3_para.cw;
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#if USE_GPS
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#endif
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pbufout[9] =atsc_para.ad2_para.m_ts; //ad2
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pbufout[10]=atsc_para.ad2_para.m_10m;
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pbufout[11]=atsc_para.ad2_para.m_1pps;
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pbufout[12]=atsc_para.ad2_para.m_dly_hh;
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pbufout[13]=atsc_para.ad2_para.m_dly_mm;
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pbufout[14]=atsc_para.ad2_para.m_dly_ss;
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#if USE_DRY_LOOP
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pbufout[15]=atsc_para.ad3_para.rc_cmd; //ad3
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#endif
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pbufout[16]=atsc_para.ad3_para.fwd_cal;
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//pbufout[17]=atsc_para.ad3_para.cor;
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pbufout[18]=atsc_para.ad4_para.pdt&0x0F; //ad4
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pbufout[19]=atsc_para.ad4_para.cfr&0x0F;
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pbufout[20]=atsc_para.system_para.adpc;
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pbufout[21]=atsc_para.ad5_para.time; //ad5即wk
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pbufout[22]=atsc_para.ad5_para.a_snr;
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pbufout[23]=atsc_para.ad5_para.a_imd;
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pbufout[24]=atsc_para.ad5_para.r_snr;
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pbufout[25]=atsc_para.ad5_para.r_imd;
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pbufout[26]=atsc_para.ad5_para.dpd;
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#if !AW_ATSC_5X
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#if ERR_TO_LCM
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update_latch_para();
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pbufout[27]=atsc_para.latch_para.u1;
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pbufout[28]=atsc_para.latch_para.u2;
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pbufout[29]=atsc_para.latch_para.rf;
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pbufout[30]=atsc_para.latch_para.gps;
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pbufout[31]=atsc_para.latch_para.ts;
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pbufout[32]=atsc_para.latch_para.sys;
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pbufout[33]=atsc_para.latch_para.m_1pps;
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pbufout[34]=atsc_para.latch_para.sfn;
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#endif
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pbufout[35]= atsc_para.rf_para.tx;
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#endif
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pbufout[36]= get_check_sum(pbufout,36);
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pbufout[37] = 0X96;
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count = 38;
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break;
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case 0x34:
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pbufout[0] = 0x76;
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pbufout[1] = 18;
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pbufout[2] = atsc_para.config_para.id;
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pbufout[3] = 0x34;
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pbufout[4] = 0x94;
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pbufout[5] = 0x40;
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pbufout[6] = 0xa2;
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pbufout[7] = (uint8)(0xff & ((atsc_para.wk_para.mac&0xff0000)>>16));
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pbufout[8] = (uint8)(0xff & ((atsc_para.wk_para.mac&0xff00)>>8));
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pbufout[9] = (uint8)(atsc_para.wk_para.mac&0xff);
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temp=(atsc_para.sn_para.sn>>32);
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pbufout[10] = 0xff & (temp>>8);
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pbufout[11] = 0xff & (temp);
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temp=atsc_para.sn_para.sn&0xffffffff;
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pbufout[12] = 0xff & (temp>>24);
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pbufout[13] = 0xff & (temp>>16);
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pbufout[14] = 0xff & (temp>>8);
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pbufout[15] = 0xff & (temp);
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pbufout[16]= get_check_sum(pbufout,16);
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pbufout[17] = 0X96 ;
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count = 18;
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break;
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#if ATSC_USA_AMP
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case 0x60:
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pa_conn_refresh();
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pbufout[0] = 0x76; //激励器代号
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pbufout[2] = atsc_para.config_para.id;
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pbufout[3] = 0x60;//命令
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for(i=4;i<30;i++) //inbuf1[4] ~ inbuf1[39]
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{
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pbufout[i] = 0XFF ;
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}
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pbufout[4] = 0x00;// ATSC
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pbufout[5] = atsc_para.rf_para.txfreq;//频点
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pbufout[6] = 0x0c;//6M
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#if USE_NEW_DIO_MODE
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pbufout[7] =atsc_para.ad3_para.mptv;
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if(atsc_para.ad3_para.mptv==1)
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{
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pbufout[8] = atsc_para.mptv.dio_tx;
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pbufout[9] = atsc_para.mptv.power_diff;
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if((atsc_para.system_para.ctrl==CTRL_REMOTE)&&(atsc_para.ad3_para.rc_cmd==0))
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{
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pbufout[10] = 1;
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}
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else
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{
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pbufout[10] = 0;
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}
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atsc_para.mptv.power_diff = 0;
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}
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#endif
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//pbufout[7] = atsc_para.pa_config_para.ip[3];
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//pbufout[8] = atsc_para.pa_config_para.ip[2];
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//pbufout[9] = atsc_para.pa_config_para.ip[1];
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//pbufout[10]= atsc_para.pa_config_para.ip[0];
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|
|
//pbufout[11] =atsc_para.pa_config_para.mask[3];
|
|
//pbufout[12] =atsc_para.pa_config_para.mask[2];
|
|
//pbufout[13] =atsc_para.pa_config_para.mask[1];
|
|
//pbufout[14] =atsc_para.pa_config_para.mask[0];
|
|
|
|
//pbufout[15] =atsc_para.pa_config_para.gateway[3];
|
|
//pbufout[16] =atsc_para.pa_config_para.gateway[2];
|
|
//pbufout[17] =atsc_para.pa_config_para.gateway[1];
|
|
//pbufout[18] =atsc_para.pa_config_para.gateway[0];
|
|
pbufout[19] =atsc_para.log_para.tsnr;
|
|
pbufout[20] =atsc_para.log_para.l_imd;
|
|
pbufout[21] =atsc_para.log_para.u_imd;
|
|
pbufout[22] =atsc_para.rf_para.power;
|
|
pbufout[23] =atsc_para.rf_para.power>>8;
|
|
|
|
pbufout[1]=26; //必须放在校验和执行前
|
|
pbufout[24] = get_check_sum(pbufout,24);
|
|
pbufout[25] = 0x96;
|
|
count = 26;
|
|
|
|
atsc_para.pac_flag = 1;
|
|
break;
|
|
#endif
|
|
}
|
|
|
|
return count;
|
|
}
|
|
|
|
void rf_power_set_new(uint16 new_power)
|
|
{
|
|
if(new_power>=atsc_para.rf_para.power)
|
|
{ //增加
|
|
if(atsc_para.rf_para.db+ (new_power-atsc_para.rf_para.power)<RF_POWER_DB_MAX)
|
|
atsc_para.rf_para.db =atsc_para.rf_para.db+ (new_power-atsc_para.rf_para.power);
|
|
else
|
|
{
|
|
if(atsc_para.rf_para.db < RF_POWER_DB_MAX)
|
|
{
|
|
new_power = RF_POWER_DB_MAX-atsc_para.rf_para.db+atsc_para.rf_para.power;
|
|
}
|
|
else
|
|
{
|
|
new_power = atsc_para.rf_para.power;
|
|
}
|
|
atsc_para.rf_para.db = RF_POWER_DB_MAX;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if(atsc_para.rf_para.db>(atsc_para.rf_para.power-new_power))
|
|
atsc_para.rf_para.db = atsc_para.rf_para.db-(atsc_para.rf_para.power-new_power);
|
|
else
|
|
{
|
|
atsc_para.rf_para.db = 0;
|
|
new_power = 0;
|
|
}
|
|
}
|
|
|
|
if(new_power!=atsc_para.rf_para.power){
|
|
turn_off_rf_agc_state(E_CHG_TX_POWER);
|
|
}
|
|
|
|
atsc_para.rf_para.power = new_power;
|
|
fpga_save_we(&atsc_para.we_para);
|
|
e2rom_save_power(&atsc_para.rf_para);
|
|
/*if(atsc_para.rf_para.agc)
|
|
{
|
|
fpga_save_agc_vol();
|
|
}*/
|
|
}
|
|
uint32 protocol_write(uint8 *pbufin,uint8 *pbufout)
|
|
{
|
|
uint8 power_chg=0;
|
|
uint32 UI_temp = 0;
|
|
uint32 result = UART_PARA_SET_ERR_OK;
|
|
#if ATSC_USA_AMP
|
|
uint16 temp=0;
|
|
int8 power_fine = 0;
|
|
#endif
|
|
uint16 mode_temp = 0;
|
|
|
|
#if USE_CTRL_MODE
|
|
#if ATSC_USA_AMP
|
|
if((pbufin[3] >= 0xa0) && (pbufin[3] <= 0xbf))
|
|
{
|
|
pa_conn_refresh(); //功放
|
|
}
|
|
else
|
|
#endif
|
|
{
|
|
if(atsc_para.system_para.ctrl==CTRL_LOCAL)
|
|
{
|
|
result = UART_PARA_SET_ERR_LOCAL;
|
|
return result;
|
|
}
|
|
}
|
|
#endif
|
|
switch(pbufin[3])
|
|
{
|
|
case 0x30: //Control
|
|
if( (pbufin[4] <=1)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.system_para.ctrl = pbufin[4];
|
|
|
|
if(atsc_para.system_para.ctrl == CTRL_REMOTE)
|
|
fpga_byte_write(0x01,0x27,1);
|
|
else
|
|
fpga_byte_write(0x01,0x27,0);
|
|
|
|
c256_bytewrite(EEPROM_CTRL_ADDR,atsc_para.system_para.ctrl);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x31: //ID
|
|
if((0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
atsc_para.config_para.id = std_w[0] = std_r[0] = pbufin[4];
|
|
c256_bytewrite(EEPROM_ID_ADDR,atsc_para.config_para.id);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x32: //TUNER TS EAS
|
|
if((pbufin[4]<ASI_INPUT_END)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
uint8 data;
|
|
|
|
if((pbufin[4]==ASI_INPUT_EAS)&&(atsc_para.sn_para.eas_key_valid==0))
|
|
{
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
}
|
|
else
|
|
{
|
|
atsc_para.system_para.input = pbufin[4];
|
|
data = ((pbufin[4]+1)&3)<<2;
|
|
fpga_byte_write(0x01,0x50,data);
|
|
c256_bytewrite(EEPROM_SYS_INPUT,pbufin[4]);
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x33:
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
|
|
case 0x34: //ADPC
|
|
if((pbufin[4]<=ADPC_UPDATE1)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) ) // need to open whlie release
|
|
{
|
|
uint8 bak_adpc = atsc_para.system_para.adpc;
|
|
|
|
switch(pbufin[4])
|
|
{
|
|
case ADPC_OFF:
|
|
set_force_stop_adpc(TRUE);
|
|
atsc_para.system_para.adpc = ADPC_OFF;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //清错误标志位
|
|
delay_us(200);
|
|
fpga_byte_write(0x5,0x31,0x07);
|
|
break;
|
|
case ADPC_HOLD:
|
|
atsc_para.system_para.adpc = ADPC_HOLD;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //清错误标志位
|
|
fpga_byte_write(0x5,0x31,0x00);
|
|
light_on();
|
|
adpc_load_data(1,ADPC_HOLD);
|
|
set_menu_init(); //运行中,切换到主屏幕显示
|
|
break;
|
|
case ADPC_UPDATE1:
|
|
atsc_para.system_para.adpc = ADPC_UPDATE1;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //开始update1时清错误标志位
|
|
if(atsc_para.system_para.adpc!=bak_adpc)
|
|
{
|
|
if(bak_adpc==ADPC_OFF)
|
|
{
|
|
atsc_para.ad5_para.use_dpd = 1;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
else
|
|
{
|
|
atsc_para.ad5_para.use_dpd = atsc_para.ad5_para.dpd ;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
atsc_para.system_para.adpc_step = 0;
|
|
auto_update = TRUE;
|
|
enter_update_lcd();
|
|
}
|
|
break;
|
|
default:
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
}
|
|
c256_bytewrite(EEPROM_DPD_ADDR,atsc_para.system_para.adpc);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x35: //RST
|
|
if((1==pbufin[4])&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
uint8 txfreqbak= atsc_para.rf_para.txfreq;
|
|
uint8 rxfreqbak= atsc_para.rf_para.rxfreq;
|
|
e2rom_load_default_param(1);
|
|
freq_nochange(txfreqbak,rxfreqbak);
|
|
fpga_save_all_para(FALSE);
|
|
turn_off_rf_agc_state(E_CHG_TX_POWER);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x36: //freq
|
|
if((pbufin[4]>=FREQ_MIN_V1)&&(pbufin[4]<=FREQ_MAX_U)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
if(pbufin[4]!=atsc_para.rf_para.txfreq){
|
|
turn_off_rf_agc_state(E_CHG_TX_FREQ);
|
|
}
|
|
atsc_para.rf_para.txfreq = pbufin[4];
|
|
atsc_para.we_para.ch = pbufin[4];
|
|
|
|
fpga_save_we(&atsc_para.we_para);
|
|
c256_bytewrite(EEPROM_CHANNEL_ADDR,atsc_para.rf_para.txfreq);
|
|
#if BAK_PARA_CHECK
|
|
c256_bytewrite2(BAK_EEPROM_CHANNEL_ADDR,atsc_para.rf_para.txfreq);
|
|
#endif
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x37:
|
|
if( (pbufin[4]>=FREQ_MIN_V1)&&(pbufin[4]<=FREQ_MAX_U)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
#if USE_TUNER
|
|
if(pbufin[4]!=atsc_para.rf_para.rxfreq)
|
|
{
|
|
tuner_init(pbufin[4]);
|
|
}
|
|
#endif
|
|
atsc_para.rf_para.rxfreq = pbufin[4];
|
|
atsc_para.we_para.ch = atsc_para.rf_para.txfreq;
|
|
fpga_save_we(&atsc_para.we_para);
|
|
c256_bytewrite(EEPROM_RXCHANNEL_ADDR,atsc_para.rf_para.rxfreq);
|
|
#if BAK_PARA_CHECK
|
|
c256_bytewrite2(BAK_EEPROM_RXCHANNEL_ADDR,atsc_para.rf_para.rxfreq);
|
|
#endif
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x38: //Hz
|
|
if((0xf0==pbufin[7]))
|
|
{
|
|
//协议更改: byte1 正负 0正 1负 byte2,byte3 数据 0-50000
|
|
UI_temp = (pbufin[5]<<8)|pbufin[6]; //数据 0-50000
|
|
if( UI_temp>RF_MAX_HZ)
|
|
{
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
}
|
|
else
|
|
{
|
|
atsc_para.rf_para.hz = UI_temp;
|
|
if(pbufin[4]) //- 高3byte置1
|
|
atsc_para.rf_para.hz |= 0x10000;
|
|
|
|
c256_bytewrite(EEPROM_HZ_UIH_ADDR,atsc_para.rf_para.hz>>16); //+ -
|
|
c256_bytewrite(EEPROM_HZ_UIM_ADDR,atsc_para.rf_para.hz>>8); //Hz display high 8 bit
|
|
c256_bytewrite(EEPROM_HZ_UIL_ADDR,atsc_para.rf_para.hz); //Hz display low 8 bit
|
|
|
|
fpga_byte_write(0x1,0x4c,atsc_para.rf_para.hz>>16); //+ -
|
|
fpga_byte_write(0x1,0x4d,atsc_para.rf_para.hz>>8);
|
|
fpga_byte_write(0x1,0x4e,atsc_para.rf_para.hz);
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x39: //Power
|
|
if( (0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
#if USA_ATSC_5X
|
|
if((dryloop_status.rf!=INVALID_DATA) && (atsc_para.ad3_para.rc_cmd==0))
|
|
{
|
|
result = UART_PARA_SET_ERR_DRYLOOP;
|
|
break;
|
|
}
|
|
#else
|
|
#if USE_NEW_DIO_MODE
|
|
if(atsc_para.ad3_para.mptv==1) //MPTV下,不能通过串口改功率
|
|
{
|
|
result = UART_PARA_SET_ERR_DRYLOOP;
|
|
break;
|
|
}
|
|
else //LPTV可改. 不考虑dryloop
|
|
{
|
|
|
|
}
|
|
#else
|
|
if((dryloop_status.rf!=INVALID_DATA) && (atsc_para.ad3_para.rc_cmd==0))
|
|
{
|
|
result = UART_PARA_SET_ERR_DRYLOOP;
|
|
break;
|
|
}
|
|
#endif
|
|
#endif
|
|
UI_temp = pbufin[4];
|
|
UI_temp = (UI_temp<<8)|pbufin[5];
|
|
if(atsc_para.wj_para.p_c)
|
|
{
|
|
if(UI_temp>RF_POWER_P_C_ON)
|
|
UI_temp = RF_POWER_P_C_ON;
|
|
}
|
|
else
|
|
{
|
|
if(UI_temp>RF_POWER_MAX)
|
|
UI_temp = RF_POWER_MAX;
|
|
}
|
|
rf_power_set_new(UI_temp);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
|
|
/* case 0x3A: //CW
|
|
if( (pbufin[4]<2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
atsc_para.rf_para.cw = pbufin[4] ;
|
|
FPGA_bytewrite(0x0 ,0x0);
|
|
FPGA_bytewrite(0xfe,atsc_para.rf_para.cw<<7); //CW:ON/OFF
|
|
c256_bytewrite(EEPROM_PARA_CW_ADDR,atsc_para.rf_para.cw); //CW
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break; */
|
|
case 0x3B: //TXID
|
|
if((0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
/* UI_temp = pbufin[4] ;
|
|
UI_temp=(UI_temp<<8)|pbufin[5];
|
|
atsc_para.network_para.txid =UI_temp;
|
|
|
|
FPGA_bytewrite(0x0 ,0x5);
|
|
FPGA_bytewrite(0xa,UI_temp>>8);
|
|
FPGA_bytewrite(0xb,UI_temp);
|
|
c256_bytewrite(EEPROM_NET_TXID_ADDR,UI_temp>>8);
|
|
c256_bytewrite(EEPROM_NET_TXID_ADDR+1,UI_temp);*/
|
|
}
|
|
break;
|
|
case 0x3C: //NETID
|
|
if((0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
// save_Netid =Netid
|
|
/* UI_temp = pbufin[4] ;
|
|
UI_temp=(UI_temp<<8)|pbufin[5];
|
|
atsc_para.network_para.netid = UI_temp;
|
|
FPGA_bytewrite(0x0 ,0x5);
|
|
FPGA_bytewrite(0x8,UI_temp>>8);
|
|
FPGA_bytewrite(0x9,UI_temp);
|
|
c256_bytewrite(EEPROM_NET_NETID_ADDR,UI_temp>>8);
|
|
c256_bytewrite(EEPROM_NET_NETID_ADDR+1,UI_temp);*/
|
|
}
|
|
break;
|
|
case 0x3D: //DELAY
|
|
if((0xf0==pbufin[7]))
|
|
{
|
|
UI_temp = pbufin[4] ;
|
|
UI_temp = (UI_temp<<8) | pbufin[5] ;
|
|
UI_temp = (UI_temp<<8) | pbufin[6] ;
|
|
if(UI_temp>NET_MAX_DELAY)
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
else
|
|
{
|
|
atsc_para.network_para.delay =UI_temp;
|
|
|
|
c256_bytewrite(EEPROM_NET_DELAY_ADDR, (UI_temp>>16)&0x00ff);
|
|
c256_bytewrite(EEPROM_NET_DELAY_ADDR+1,(UI_temp>>8)&0x00ff);
|
|
c256_bytewrite(EEPROM_NET_DELAY_ADDR+2,UI_temp&0x00ff);
|
|
|
|
fpga_byte_write(0x01,0x3f,(UI_temp>>16)&0x00ff);
|
|
fpga_byte_write(0x01,0x40,(UI_temp>>8)&0x00ff);
|
|
fpga_byte_write(0x01,0x41,UI_temp&0x00ff);
|
|
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x3E: //bps
|
|
if( (pbufin[4]<3)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
atsc_para.config_para.bps = pbufin[4] ;
|
|
c256_bytewrite(EEPROM_BPS_ADDR,atsc_para.config_para.bps);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0X3F: //RF
|
|
if( (pbufin[4]<2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
#if 1//_USE_RVL_
|
|
result = Net_write_RF(pbufin[4]);
|
|
#endif//_USE_RVL_
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0X40: //set Custom AGC control
|
|
if(atsc_para.wf_para.agc)
|
|
{
|
|
if( (pbufin[4]<2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
if(atsc_para.rf_para.agc!=pbufin[4])
|
|
{
|
|
/*atsc_para.rf_para.agc = pbufin[4];
|
|
if(atsc_para.ad3_para.cor==0)
|
|
c256_bytewrite(EEPROM_AGC_ADDR,atsc_para.rf_para.agc);
|
|
else
|
|
c256_bytewrite2(E2_AGC_ADDR,atsc_para.rf_para.agc);
|
|
if(atsc_para.rf_para.agc)
|
|
{
|
|
fpga_save_agc_vol();
|
|
}
|
|
fpga_byte_write(0x1,0x4A,agc_value[atsc_para.rf_para.agc]);*/
|
|
log_printf(LOG_INFO, I_USER_CFG, "uart agc=%d\n",pbufin[4]);
|
|
|
|
if(pbufin[4]==0){
|
|
set_sys_rf_agc(0);
|
|
printf(">> cfg set rf agc off\n");
|
|
}
|
|
else{
|
|
printf(">> cfg trigger rf agc on proc\n");
|
|
trigger_rf_agc_proc(1);
|
|
}
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_AGC_ON;
|
|
break;
|
|
/*case 0x41:
|
|
if((0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
atsc_para.network_para.bratio = pbufin[4] ;
|
|
fpga_byte_write(0x0 ,0x5);
|
|
fpga_byte_write(0x7,atsc_para.network_para.bratio);
|
|
c256_bytewrite(EEPROM_NET_BRATIO_ADDR,atsc_para.network_para.bratio);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
*/
|
|
case 0x42: //SYNC
|
|
if( (pbufin[4]<2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
mode_temp = fpga_byte_read(0x1,55) & 2 ;
|
|
if(mode_temp)
|
|
{
|
|
atsc_para.mode_para.sync=pbufin[4];
|
|
c256_bytewrite(EEPROM_MODE_SYNC,pbufin[4]);
|
|
fpga_byte_write(0x3,0x5,pbufin[4]);
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x43: //ZP1F
|
|
if( (pbufin[4]<2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
mode_temp = fpga_byte_read(0x1,55)&2;
|
|
|
|
if((mode_temp)&&(atsc_para.system_para.net==0))
|
|
{
|
|
atsc_para.mode_para.zp1f=pbufin[4];
|
|
c256_bytewrite(EEPROM_MODE_ZP1F,pbufin[4]);
|
|
fpga_byte_write(0x3,0x4,pbufin[4]);
|
|
}
|
|
else
|
|
{
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x44: //TCP_C
|
|
if( (pbufin[4]<2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
mode_temp = fpga_byte_read(0x1,55) & 2;
|
|
if((mode_temp)&&(atsc_para.system_para.net==0))
|
|
{
|
|
atsc_para.mode_para.tcp_c = pbufin[4];
|
|
c256_bytewrite(EEPROM_MODE_TCP_C,pbufin[4]);
|
|
fpga_byte_write(0x3,0xb,pbufin[4]);
|
|
}
|
|
else
|
|
{
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
/*
|
|
case 0x45: //PID
|
|
if( (0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
|
|
unsigned long temp;
|
|
|
|
temp=(pbufin[4]<<8)|pbufin[5];
|
|
if(temp>0x1fff)
|
|
temp = 0x1fff;
|
|
atsc_para.mode_para.pid =temp;
|
|
c256_bytewrite(EEPROM_PID_H_ADDR,temp>>8);
|
|
c256_bytewrite(EEPROM_PID_L_ADDR,temp);
|
|
FPGA_bytewrite(0x0 ,0x3);
|
|
FPGA_bytewrite(0x2,temp>>8);
|
|
FPGA_bytewrite(0x3,temp);
|
|
}
|
|
break;*/
|
|
/*
|
|
case 0x46: //FUNCTION
|
|
if( (pbufin[4]<3)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
#if 0
|
|
save_fpga_pid(pbufin[4]);
|
|
if(pbufin[4]==1) //start;
|
|
{
|
|
detect_id();
|
|
}
|
|
else
|
|
{
|
|
if(pbufin[4]==2)//clear
|
|
{
|
|
atsc_para.mode_para.pid_det = 0;
|
|
c256_bytewrite(EEPROM_PIDDET_H_ADDR,0);
|
|
c256_bytewrite(EEPROM_PIDDET_L_ADDR,0);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
break;*/
|
|
case 0x47:
|
|
if((pbufin[4]<3)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.system_para.mode=pbufin[4];
|
|
c256_bytewrite(EEPROM_MODE_ADDR,atsc_para.system_para.mode);
|
|
fpga_byte_write(0x3,0x01,atsc_para.system_para.mode);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x48:
|
|
if( (pbufin[4]<2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
atsc_para.system_para.net=pbufin[4];
|
|
//c256_bytewrite(EEPROM_NET_ADDR,atsc_para.system_para.net);
|
|
//fpga_byte_write(0x1,0x02,atsc_para.system_para.net);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x49:
|
|
if( (pbufin[4]<=2)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.system_para.gps=pbufin[4];
|
|
c256_bytewrite(EEPROM_GPS_ADDR,atsc_para.system_para.gps);
|
|
fpga_byte_write(0x01,0x08,atsc_para.system_para.gps);//0x05->0x08
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x50:
|
|
if( (pbufin[4]<3)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) )
|
|
{
|
|
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
// 高级菜单
|
|
case 0x60: //pcr
|
|
if( (pbufin[4]<8) &&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad_para.pcr= pbufin[4]&0x07;
|
|
c256_bytewrite(EEPROM_PCR_ADDR,atsc_para.ad_para.pcr);
|
|
fpga_byte_write(0x1,0x51,atsc_para.ad_para.pcr);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x61://slow_up
|
|
if( (pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
uint8 data;
|
|
|
|
atsc_para.ad_para.slow_up= pbufin[4]&0x01;
|
|
c256_bytewrite(EEPROM_SLOW_UP_ADDR, atsc_para.ad_para.slow_up);
|
|
data = atsc_para.ad_para.slow_down?1<<0:0;
|
|
data |= atsc_para.ad_para.slow_up?1<<1:0;
|
|
fpga_byte_write(0x1,0x25,data);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x62: //slow_down
|
|
if( (pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
uint8 data;
|
|
|
|
atsc_para.ad_para.slow_down= pbufin[4]&0x01;
|
|
c256_bytewrite(EEPROM_SLOW_DOWN_ADDR,atsc_para.ad_para.slow_down);
|
|
data = atsc_para.ad_para.slow_up?1<<1:0;
|
|
data |= atsc_para.ad_para.slow_down?1<<0:0;
|
|
fpga_byte_write(0x1,0x25,data);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x63: //cw
|
|
if((pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
if(pbufin[4]&0x01!=atsc_para.ad3_para.cw){
|
|
turn_off_rf_agc_state(E_CHG_CW);
|
|
}
|
|
atsc_para.ad3_para.cw = pbufin[4]&0x01;
|
|
c256_bytewrite(EEPROM_PARA_CW_ADDR,atsc_para.ad3_para.cw); //CW
|
|
fpga_save_ad3(&atsc_para.ad3_para);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x64: //gps_v
|
|
if( (pbufin[4]<=0x0c) && (pbufin[4]>=5) && (0xf0==pbufin[5]) && (0xf0==pbufin[6]) && (0xf0==pbufin[7]) )
|
|
{
|
|
;
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x65: //M_ts
|
|
if((pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad2_para.m_ts= pbufin[4]&0x01;
|
|
|
|
e2rom_save_ad2(&atsc_para.ad2_para);
|
|
fpga_save_ad2(&atsc_para.ad2_para);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x66: // m_10m
|
|
if((pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad2_para.m_10m= pbufin[4]&0x01;
|
|
|
|
e2rom_save_ad2(&atsc_para.ad2_para);
|
|
fpga_save_ad2(&atsc_para.ad2_para);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x67: //m_1pps
|
|
if((pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad2_para.m_1pps= pbufin[4]&0x01;
|
|
|
|
e2rom_save_ad2(&atsc_para.ad2_para);
|
|
fpga_save_ad2(&atsc_para.ad2_para);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x68: //m_dly_hh mm ss
|
|
if((pbufin[5]<=59)&&(pbufin[6]<=59)&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad2_para.m_dly_hh = pbufin[4];
|
|
atsc_para.ad2_para.m_dly_mm = pbufin[5];
|
|
atsc_para.ad2_para.m_dly_ss = pbufin[6];
|
|
|
|
e2rom_save_ad2(&atsc_para.ad2_para);
|
|
fpga_save_ad2(&atsc_para.ad2_para);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
|
|
case 0x69: //RC_CMD
|
|
if((pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
|
|
atsc_para.ad3_para.rc_cmd= pbufin[4]&0x01;
|
|
c256_bytewrite(EEPROM_AD3_RC_CMD,atsc_para.ad3_para.rc_cmd);
|
|
fpga_save_ad3(&atsc_para.ad3_para);
|
|
}
|
|
else
|
|
{
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
}
|
|
break;
|
|
case 0x6a: //FWD_CAL
|
|
if( (pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
|
|
atsc_para.ad3_para.fwd_cal= pbufin[4]&0x01;
|
|
e2rom_save_ad3(&atsc_para.ad3_para);
|
|
fpga_save_ad3(&atsc_para.ad3_para);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
#if USA_ATSC_5X
|
|
case 0x6b: //COR
|
|
if((pbufin[4]<2) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
if(atsc_para.ad3_para.cor!=(pbufin[4]&0x01))
|
|
{
|
|
atsc_para.ad3_para.cor = pbufin[4]&0x01;
|
|
c256_bytewrite(EEPROM_AD3_TYPE,atsc_para.ad3_para.cor);
|
|
save_new_cor(atsc_para.ad3_para.cor);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
}
|
|
break;
|
|
#endif
|
|
|
|
case 0x6c: //pdt
|
|
if((pbufin[4]<0x10) &&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad4_para.pdt = (atsc_para.ad4_para.pdt&0xf0)|(pbufin[4]&0x0f);
|
|
c256_bytewrite(EEPROM_WF_ADDR+OFFSET_OF_STRUCT(S_WF_PARA,pdt),atsc_para.ad4_para.pdt);
|
|
atsc_para.wf_para.pdt = atsc_para.ad4_para.pdt;
|
|
fpga_byte_write(0x5,0x32,atsc_para.ad4_para.pdt);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x6d: //cfr
|
|
if((pbufin[4]<0x10) &&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad4_para.cfr= (atsc_para.ad4_para.cfr&0xf0)|(pbufin[4]&0x0f);
|
|
/*c256_bytewrite(EEPROM_WB_ADDR+OFFSET_OF_STRUCT(S_WB_PARA,cfr),atsc_para.ad4_para.cfr);
|
|
atsc_para.wb_para.cfr = atsc_para.ad4_para.cfr;
|
|
fpga_byte_write(0x0,0x48,atsc_para.ad4_para.cfr);*/
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x6e: //adpc
|
|
if((pbufin[4]<=ADPC_UPDATE3)&&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]) ) // need to open whlie release
|
|
{
|
|
uint8 bak_adpc = atsc_para.system_para.adpc;
|
|
|
|
switch(pbufin[4])
|
|
{
|
|
case ADPC_OFF :
|
|
set_force_stop_adpc(TRUE);
|
|
atsc_para.system_para.adpc = ADPC_OFF;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //清错误标志位
|
|
fpga_byte_write(0x5,0x0,0x05);
|
|
delay_us(200);
|
|
fpga_byte_write(0x5,0x31,0x07);
|
|
break;
|
|
case ADPC_HOLD:
|
|
atsc_para.system_para.adpc = ADPC_HOLD;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //清错误标志位
|
|
fpga_byte_write(0x5,0x0,0x5 );
|
|
fpga_byte_write(0x5,0x31,0x00);
|
|
light_on();
|
|
adpc_load_data(1,ADPC_HOLD);
|
|
set_menu_init(); //运行中,切换到主屏幕显示
|
|
break;
|
|
case ADPC_UPDATE1 :
|
|
atsc_para.system_para.adpc = ADPC_UPDATE1;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //开始update1时清错误标志位
|
|
if(atsc_para.system_para.adpc!=bak_adpc)
|
|
{
|
|
if(bak_adpc==ADPC_OFF)
|
|
{
|
|
atsc_para.ad5_para.use_dpd = 1;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
else
|
|
{
|
|
atsc_para.ad5_para.use_dpd = atsc_para.ad5_para.dpd ;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
atsc_para.system_para.adpc_step = 0;
|
|
auto_update = FALSE;
|
|
enter_update_lcd();
|
|
}
|
|
break;
|
|
case ADPC_UPDATE2 :
|
|
atsc_para.system_para.adpc = ADPC_UPDATE2;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //开始update1时清错误标志位
|
|
if(atsc_para.system_para.adpc!=bak_adpc)
|
|
{
|
|
if(bak_adpc==ADPC_OFF)
|
|
{
|
|
atsc_para.ad5_para.use_dpd = 1;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
else
|
|
{
|
|
atsc_para.ad5_para.use_dpd = atsc_para.ad5_para.dpd ;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
atsc_para.system_para.adpc_step = 0;
|
|
auto_update = FALSE;
|
|
enter_update_lcd();
|
|
}
|
|
break;
|
|
case ADPC_UPDATE3 :
|
|
atsc_para.system_para.adpc = ADPC_UPDATE3;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //开始update1时清错误标志位
|
|
if(atsc_para.system_para.adpc!=bak_adpc)
|
|
{
|
|
if(bak_adpc==ADPC_OFF)
|
|
{
|
|
atsc_para.ad5_para.use_dpd = 1;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
else
|
|
{
|
|
atsc_para.ad5_para.use_dpd = atsc_para.ad5_para.dpd ;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
atsc_para.system_para.adpc_step = 0;
|
|
auto_update = FALSE;
|
|
enter_update_lcd();
|
|
}
|
|
break;
|
|
#if USE_UPDATA5
|
|
case ADPC_UPDATE4:
|
|
atsc_para.system_para.adpc = ADPC_UPDATE4;
|
|
atsc_para.system_para.adpc_err = ADPC_STATUS_OK; //开始update1时清错误标志位
|
|
if(atsc_para.system_para.adpc!=bak_adpc)
|
|
{
|
|
if(bak_adpc==ADPC_OFF)
|
|
{
|
|
atsc_para.ad5_para.use_dpd = 1;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
else
|
|
{
|
|
atsc_para.ad5_para.use_dpd = atsc_para.ad5_para.dpd ;
|
|
fpga_write_adpc(atsc_para.system_para.adpc);
|
|
}
|
|
atsc_para.system_para.adpc_step = 0;
|
|
auto_update = FALSE;
|
|
enter_update_lcd();
|
|
}
|
|
break;
|
|
#endif
|
|
default:
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
}
|
|
atsc_para.ad4_para.adpc = pbufin[4];
|
|
c256_bytewrite(EEPROM_DPD_ADDR,atsc_para.system_para.adpc);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x6f: //time
|
|
if((pbufin[4]<=10) &&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad5_para.time = pbufin[4] & 0x0f ;
|
|
c256_bytewrite(EEPROM_AD5_TIME_ADDR,atsc_para.ad5_para.time);
|
|
atsc_para.ad5_para.c_t = atsc_para.ad5_para.time;
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x70: //a_snr
|
|
if((pbufin[4]<=99) &&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad5_para.a_snr= pbufin[4];
|
|
e2rom_save_ad5(&atsc_para.ad5_para);
|
|
c256_bytewrite(EEPROM_AD5_TSNR_ADDR,atsc_para.ad5_para.a_snr);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x71: //a_imd
|
|
if((pbufin[4]<=99) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad5_para.a_imd= pbufin[4] ;
|
|
c256_bytewrite(EEPROM_AD5_IMD_ADDR,atsc_para.ad5_para.a_imd);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x72: //r_snr
|
|
if( (pbufin[4]<=99) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad5_para.r_snr= pbufin[4] ;
|
|
c256_bytewrite(EEPROM_AD5_RSNR_ADDR,atsc_para.ad5_para.r_snr);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x73: //r_imd
|
|
if((pbufin[4]<=99) &&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.ad5_para.r_imd= pbufin[4];
|
|
c256_bytewrite(EEPROM_AD5_RIMD_ADDR,atsc_para.ad5_para.r_imd);
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
case 0x74: //dpd
|
|
if((pbufin[4]<=2) &&(0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
//uint8 data;
|
|
//data = pbufin[4] ;
|
|
//atsc_para.ad5_para.dpd = pbufin[4] ;
|
|
if(pbufin[4] == 0) //当由DPD变为0时,清除本地ADPC数据
|
|
{
|
|
show_wait_info(" ");
|
|
erase_adpc_data();
|
|
//data = atsc_para.ad5_para.dpd; // use data
|
|
}
|
|
else
|
|
{
|
|
atsc_para.ad5_para.dpd = pbufin[4];
|
|
c256_bytewrite(EEPROM_AD5_DPD_ADDR,atsc_para.ad5_para.dpd);
|
|
atsc_para.ad5_para.use_dpd =atsc_para.ad5_para.dpd;
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
#if USA_ATSC_5X
|
|
// RESET LATCH 屏
|
|
#if ERR_TO_LCM
|
|
case 0x75:
|
|
if( (pbufin[4] <=1 ) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
atsc_para.latch_para.reset= pbufin[4];
|
|
if(atsc_para.latch_para.reset)
|
|
{
|
|
memset(&atsc_para.latch_para,0,sizeof(atsc_para.latch_para));
|
|
atsc_para.rf_para.ssref = atsc_para.latch_para.u1;
|
|
if(get_menu_index() == ADV_LCD+7) //被复位后,其他数据被清0显示,U1,U2被刷新的还是中间变量,所以重新进一下该屏.
|
|
enter_menu(ADV_LCD+7);
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
#endif
|
|
|
|
#if USE_DRY_LOOP
|
|
case 0x76:
|
|
if( (pbufin[4] <=1 ) && (0xf0==pbufin[5])&&(0xf0==pbufin[6])&&(0xf0==pbufin[7]))
|
|
{
|
|
if(atsc_para.wh_para.func)
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
else
|
|
{
|
|
#if USE_DRYLOOP_I2C
|
|
if((atsc_para.rf_para.tx==0)&&(pbufin[4]==1)) //OFF->ON //要执行某些动作
|
|
{
|
|
dryloop_write(DRYLOOP_I2C_RF_LED,1);
|
|
show_wait_info_with_sec(atsc_para.wj_para.rf_dly);
|
|
atsc_para.rf_para.rf = 1;
|
|
fpga_set_rf_output(1);
|
|
c256_bytewrite(EEPROM_RF_ADDR,atsc_para.rf_para.rf);
|
|
off_rf = 0;
|
|
//clrbit(off_rf,2);
|
|
}
|
|
else if((atsc_para.rf_para.tx==1)&&(pbufin[4]==0)) //ON->OFF
|
|
{
|
|
atsc_para.rf_para.rf = 0;
|
|
fpga_set_rf_output(0);
|
|
show_wait_info_with_sec(atsc_para.wj_para.rf_dly);
|
|
c256_bytewrite(EEPROM_RF_ADDR,atsc_para.rf_para.rf);
|
|
dryloop_write(DRYLOOP_I2C_RF_LED,0);
|
|
atsc_para.latch_para.rf = 1;
|
|
setbit(off_rf,_KEY_TX);
|
|
}
|
|
atsc_para.rf_para.tx = pbufin[4];
|
|
#else
|
|
if((atsc_para.rf_para.tx==0)&&(pbufin[4]==1)) //OFF->ON //要执行某些动作
|
|
{
|
|
//dryloop_write(DRYLOOP_I2C_RF_LED,1);
|
|
dryloop_amp_on(TRUE);
|
|
show_wait_info_with_sec(atsc_para.wj_para.rf_dly);
|
|
atsc_para.rf_para.rf = 1;
|
|
off_rf = 0;
|
|
fpga_set_rf_output(1);
|
|
c256_bytewrite(EEPROM_RF_ADDR,atsc_para.rf_para.rf);
|
|
}
|
|
else if((atsc_para.rf_para.tx==1)&&(pbufin[4]==0)) //ON->OFF
|
|
{
|
|
atsc_para.rf_para.rf = 0;
|
|
fpga_set_rf_output(0);
|
|
show_wait_info_with_sec(atsc_para.wj_para.rf_dly);
|
|
dryloop_amp_on(FALSE);
|
|
atsc_para.latch_para.rf = 1;
|
|
setbit(off_rf,_KEY_TX);
|
|
c256_bytewrite(EEPROM_RF_ADDR,atsc_para.rf_para.rf);
|
|
}
|
|
atsc_para.rf_para.tx = pbufin[4];
|
|
#endif
|
|
c256_bytewrite(EEPROM_RF_TX,atsc_para.rf_para.tx);
|
|
}
|
|
}
|
|
else
|
|
result = UART_PARA_SET_ERR_INVALID;
|
|
break;
|
|
#endif
|
|
#endif
|
|
|
|
|
|
//////////////////////// 功放代码 已预留空间 0xA0 ~ 0xBF ////////////////////////
|
|
|
|
#if ATSC_USA_AMP
|
|
case 0xa0: //9v电压
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.vol_9v, &pbufin[4],sizeof(atsc_para.avr_pa_para.vol_9v));
|
|
break;
|
|
|
|
case 0xa1: //50v电压
|
|
atsc_para.pac_flag = 1;
|
|
atsc_para.avr_pa_para.tick_cnt++;
|
|
memcpy(&atsc_para.avr_pa_para.vol_50v, &pbufin[4],sizeof(atsc_para.avr_pa_para.vol_50v));
|
|
break;
|
|
|
|
case 0xa2: //50v电流
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.cur_50v ,&pbufin[4],sizeof(atsc_para.avr_pa_para.cur_50v));
|
|
break;
|
|
case 0xa3: //栅极电压
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.gv_881,&pbufin[4],sizeof(atsc_para.avr_pa_para.gv_881));
|
|
break;
|
|
case 0xa4: //发射功率
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.pa_fwd,&pbufin[4],sizeof(atsc_para.avr_pa_para.pa_fwd));
|
|
break;
|
|
case 0xa5: //反射功率
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.pa_reflect,&pbufin[4],sizeof(atsc_para.avr_pa_para.pa_reflect));
|
|
break;
|
|
case 0xa6: //驻波比
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.swr,&pbufin[4],sizeof(atsc_para.avr_pa_para.swr));
|
|
break;
|
|
case 0xa7: //功放温度
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.temp_pa,&pbufin[4],sizeof(atsc_para.avr_pa_para.temp_pa));
|
|
break;
|
|
case 0xa8: //反射功率异常信号
|
|
atsc_para.pac_flag = 1;
|
|
atsc_para.avr_pa_para.signal_reflect= pbufin[4]?1:0;
|
|
break;
|
|
case 0xa9: //发射功率异常信号
|
|
atsc_para.pac_flag = 1;
|
|
atsc_para.avr_pa_para.signal_fwd = pbufin[4]?1:0;
|
|
break;
|
|
case 0xaa: //温度异常信号
|
|
atsc_para.pac_flag = 1;
|
|
atsc_para.avr_pa_para.signal_temp= pbufin[4]?1:0;
|
|
break;
|
|
case 0xab:
|
|
//50V电流2 200M才有
|
|
atsc_para.pac_flag = 1;
|
|
memcpy(&atsc_para.avr_pa_para.cur_50V_2,&pbufin[4],sizeof(atsc_para.avr_pa_para.cur_50V_2));
|
|
break;
|
|
case 0xac: //AMP功率等级 加一处理 /1:100M /2:200M /3:400M
|
|
atsc_para.pac_flag = 1;
|
|
atsc_para.avr_pa_para.pac_lev= pbufin[4]+1;
|
|
break;
|
|
case 0xad: //发射功率发送给FPGA 实现AGC 同50V电压
|
|
atsc_para.pac_flag = 1;
|
|
temp = ( pbufin[4] | ( (pbufin[5]&0x0f)<<8) ) << 4;
|
|
fpga_byte_write(0x1,0x81,temp>>8 );
|
|
fpga_byte_write(0x1,0x82,temp&0xff);
|
|
temp = 0;
|
|
break;
|
|
case 0xae:
|
|
atsc_para.pac_flag =1;
|
|
atsc_para.pa_config_para.ip[3] = pbufin[4];
|
|
atsc_para.pa_config_para.ip[2] = pbufin[5];
|
|
atsc_para.pa_config_para.ip[1] = pbufin[6];
|
|
atsc_para.pa_config_para.ip[0] = pbufin[7];
|
|
break;
|
|
case 0xaf:
|
|
atsc_para.pac_flag =1;
|
|
atsc_para.pa_config_para.mask[3] = pbufin[4];
|
|
atsc_para.pa_config_para.mask[2] = pbufin[5];
|
|
atsc_para.pa_config_para.mask[1] = pbufin[6];
|
|
atsc_para.pa_config_para.mask[0] = pbufin[7];
|
|
break;
|
|
case 0xb0:
|
|
atsc_para.pac_flag =1;
|
|
atsc_para.pa_config_para.gateway[3] = pbufin[4];
|
|
atsc_para.pa_config_para.gateway[2] = pbufin[5];
|
|
atsc_para.pa_config_para.gateway[1] = pbufin[6];
|
|
atsc_para.pa_config_para.gateway[0] = pbufin[7];
|
|
break;
|
|
case 0xb1:
|
|
memcpy(&atsc_para.avr_pa_para.cur_50v_3,&pbufin[4],sizeof(atsc_para.avr_pa_para.cur_50v_3));
|
|
break;
|
|
case 0xb2:
|
|
memcpy(&atsc_para.avr_pa_para.cur_50v_4,&pbufin[4],sizeof(atsc_para.avr_pa_para.cur_50v_4));
|
|
break;
|
|
case 0xb3:
|
|
memcpy(&atsc_para.avr_pa_para.pa_in,&pbufin[4],sizeof(atsc_para.avr_pa_para.pa_in));
|
|
break;
|
|
case 0xb4:
|
|
memcpy(&atsc_para.avr_pa_para.vol_12v,&pbufin[4],sizeof(atsc_para.avr_pa_para.vol_12v));
|
|
break;
|
|
case 0xb5: //配置agc使能 缓启动过程中暂停agc,否则正常配置agc
|
|
if(pbufin[4]==1)
|
|
{
|
|
fpga_byte_write(0x1,0x4A,agc_value[atsc_para.rf_para.agc]|(1<<5));//agc bit 5 发1 表示暂停agc,发0,开始
|
|
}
|
|
else if(pbufin[4]==0)
|
|
{
|
|
fpga_byte_write(0x1,0x4A,agc_value[atsc_para.rf_para.agc]|(0<<5));
|
|
}
|
|
break;
|
|
case 0xb6: //功率微调
|
|
power_fine = (int8)pbufin[4];
|
|
if(power_fine==0)
|
|
break;
|
|
if(abs(power_fine)>5)
|
|
break;
|
|
if(power_fine>0)
|
|
{ //增加
|
|
if(atsc_para.wj_para.p_c)
|
|
{
|
|
if((atsc_para.rf_para.power+power_fine< RF_POWER_P_C_ON)&&(atsc_para.rf_para.db+power_fine<RF_POWER_DB_MAX))
|
|
{
|
|
atsc_para.rf_para.power+=power_fine;
|
|
atsc_para.rf_para.db+=power_fine;
|
|
power_chg=1;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if((atsc_para.rf_para.power+power_fine< RF_POWER_MAX)&&(atsc_para.rf_para.db+power_fine<RF_POWER_DB_MAX))
|
|
{
|
|
atsc_para.rf_para.power+=power_fine;
|
|
atsc_para.rf_para.db+=power_fine;
|
|
power_chg=1;
|
|
}
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if((atsc_para.rf_para.power-abs(power_fine)>0)&&(atsc_para.rf_para.db-abs(power_fine)>0))
|
|
{
|
|
atsc_para.rf_para.power-=abs(power_fine);
|
|
atsc_para.rf_para.db-=abs(power_fine);
|
|
power_chg=1;
|
|
}
|
|
}
|
|
if(power_chg){
|
|
turn_off_rf_agc_state(E_CHG_TX_POWER);
|
|
}
|
|
fpga_save_we(&atsc_para.we_para);
|
|
e2rom_save_power(&atsc_para.rf_para);
|
|
/*if(atsc_para.rf_para.agc)
|
|
{
|
|
fpga_save_agc_vol();
|
|
}*/
|
|
break;
|
|
#if USE_NEW_DIO_MODE
|
|
case CMMB_CONFIG_STEP_ALARM: //0xb7
|
|
atsc_para.mptv.alarm = pbufin[4];
|
|
atsc_para.mptv.tx_crm_is_dio= pbufin[5];
|
|
atsc_para.mptv.tx_open = pbufin[6];
|
|
break;
|
|
#endif
|
|
|
|
case CMMB_CONFIG_EXC_RESET: //0xb8
|
|
if(pbufin[4]==0x5a&&pbufin[5]==0x5a&&pbufin[6]==0xa5&&pbufin[7]==0xa5)
|
|
{
|
|
//set_exc_reset();
|
|
}
|
|
break;
|
|
#endif
|
|
default:
|
|
result = UART_PARA_SET_ERR_UNKNOW_CMD;
|
|
break;
|
|
}
|
|
return result;
|
|
}
|
|
|
|
|
|
static const uint16 uart_bps[4] = {9600,19200,38400,38400};
|
|
|
|
static void uart_hw_init(void)
|
|
{
|
|
uint8 bps = atsc_para.config_para.bps;
|
|
|
|
#if !USE_DEBUG_UART
|
|
uart_com_init(UART_USER_232_COM,uart_bps[bps&3],PARITY_NO,INT_ON);
|
|
#endif
|
|
uart_com_init(UART_USER_485_COM,uart_bps[bps&3],PARITY_NO,INT_ON);
|
|
}
|
|
|
|
|
|
static void info_init_ok(void)
|
|
{
|
|
#if !USE_DEBUG_UART
|
|
uart_send_string(UART_USER_232_COM," Initialize OK ",strlen(" Initialize OK "));
|
|
#endif
|
|
uart_send_string(UART_USER_485_COM," Initialize OK ",strlen(" Initialize OK "));
|
|
}
|
|
|
|
void uart_task(void * pvParameters)
|
|
{
|
|
MSG *pmsg = NULL;
|
|
uint32 sec_cnt;
|
|
(void)pvParameters;
|
|
//uart_hw_init();
|
|
config_time_msg(MSG_SEC);
|
|
|
|
task_is_ok();
|
|
info_init_ok();
|
|
|
|
while((pmsg = get_msg(OS_WAIT_FOREVER))!=NULL)
|
|
{
|
|
switch(pmsg->type)
|
|
{
|
|
case MSG_RS232:
|
|
uart_Remote(pmsg);
|
|
break;
|
|
case MSG_SEC:
|
|
pa_conn_chk();
|
|
task_is_ok();
|
|
|
|
#if USE_UART_DEV_LINK
|
|
sec_cnt++;
|
|
if(sec_cnt>=40){
|
|
sec_cnt = 40;
|
|
|
|
if(uart_dev_link.pa_link_cnt<=20){
|
|
uart_dev_link.pa_link_cnt++;
|
|
}
|
|
else{
|
|
uart_dev_link.pa_link_err = 1;
|
|
if(atsc_para.config_para.pa_link_ctrl_rf==1){//使能开关
|
|
if(atsc_para.rf_para.rf==1)
|
|
Net_write_RF(0);
|
|
}
|
|
}
|
|
}
|
|
#endif
|
|
|
|
break;
|
|
case MSG_UART_RE_INIT:
|
|
uart_hw_init();
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
if(MSG_NEED_TO_FREE(pmsg))
|
|
free_msg(pmsg);
|
|
}
|
|
}
|