335 lines
12 KiB
C
335 lines
12 KiB
C
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/*
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@NOT_ACT_USED
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*/
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/**
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******************************************************************************
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* @file stm32f4x7_eth_bsp.c
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* @author MCD Application Team
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* @version V1.0.0
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* @date 31-October-2011
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* @brief STM32F4x7 Ethernet hardware configuration.
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******************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include <stdio.h>
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#include "stm32f4x7_eth.h"
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#include "stm32f4x7_eth_bsp.h"
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#include "web_server.h"
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void delay_ms(uint32 nms);
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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__IO uint32_t EthInitStatus = 0;
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/* Private function prototypes -----------------------------------------------*/
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static void ETH_GPIO_Config(void);
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static void ETH_NVIC_Config(void);
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static void ETH_MACDMA_Config(void);
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/* Private functions ---------------------------------------------------------*/
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/**
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* @brief ETH_BSP_Config
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* @param None
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* @retval None
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*/
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void ETH_BSP_Config(void)
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{
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/* Configure the GPIO ports for ethernet pins */
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ETH_GPIO_Config();
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/* Config NVIC for Ethernet */
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ETH_NVIC_Config();
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/* Configure the Ethernet MAC/DMA */
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ETH_MACDMA_Config();
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if (EthInitStatus != 0)
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{
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printf("%s init failed! Err Num:%d.\n",__FUNCTION__,EthInitStatus);
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//delay_ms(100);
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}
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/* Configure the PHY to generate an interrupt on change of link status */
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//Eth_Link_PHYITConfig(DP83848_PHY_ADDRESS);
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/* Configure the EXTI for Ethernet link status. */
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//Eth_Link_EXTIConfig(); //取消外部中断配置
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}
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/**
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* @brief Configures the Ethernet Interface
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* @param None
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* @retval None
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*/
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static void ETH_MACDMA_Config(void)
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{
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ETH_InitTypeDef ETH_InitStructure;
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/* Enable ETHERNET clock */
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx |
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RCC_AHB1Periph_ETH_MAC_Rx, ENABLE);
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/* Reset ETHERNET on AHB Bus */
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ETH_DeInit();
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/* Software reset */
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ETH_SoftwareReset();
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/* Wait for software reset */
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while (ETH_GetSoftwareResetStatus() == SET);
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/* ETHERNET Configuration --------------------------------------------------*/
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/* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
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ETH_StructInit(Ð_InitStructure);
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/* Fill ETH_InitStructure parametrs */
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/*------------------------ MAC -----------------------------------*/
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//ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
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ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable;
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ETH_InitStructure.ETH_Speed = ETH_Speed_100M;
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ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
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ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
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ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
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ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
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ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
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ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
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ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
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ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
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ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
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#ifdef CHECKSUM_BY_HARDWARE
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ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
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#endif
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/*------------------------ DMA -----------------------------------*/
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/* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
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the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
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if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
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ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
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ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
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ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
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ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
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ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
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ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
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ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
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ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
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ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
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ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
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ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
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/* Configure Ethernet */
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EthInitStatus = ETH_Init(Ð_InitStructure, DP83848_PHY_ADDRESS);
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/* Enable the Ethernet Rx Interrupt */
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ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R, ENABLE);
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}
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/**
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* @brief Configures the different GPIO ports.
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* @param None
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* @retval None
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*/
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void ETH_GPIO_Config(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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/* Enable GPIOs clocks */
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RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
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RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOE |
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RCC_AHB1Periph_GPIOG , ENABLE);
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/* Enable SYSCFG clock */
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
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/* MII/RMII Media interface selection --------------------------------------*/
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#ifdef MII_MODE
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#ifdef PHY_CLOCK_MCO
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/* Configure MCO (PA8) */
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/* Output HSE clock (25MHz) on MCO pin (PA8) to clock the PHY */
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RCC_MCO1Config(RCC_MCO1Source_HSE, RCC_MCO1Div_1);
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#endif /* PHY_CLOCK_MCO */
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SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII);
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#elif defined RMII_MODE
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SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
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#endif
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/* Ethernet pins configuration ************************************************/
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/*
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ETH_MDIO -------------------------> PA2
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ETH_MDC --------------------------> PC1
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ETH_PPS_OUT ----------------------> 未连接
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ETH_MII_CRS ----------------------> PA0
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ETH_MII_COL ----------------------> PA3
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ETH_MII_RX_ER --------------------> PB10
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ETH_MII_RXD2 ---------------------> PB0
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ETH_MII_RXD3 ---------------------> PB1
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ETH_MII_TX_CLK -------------------> PC3
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ETH_MII_TXD2 ---------------------> PC2
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ETH_MII_TXD3 ---------------------> PE2
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ETH_MII_RX_CLK/ETH_RMII_REF_CLK---> PA1
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ETH_MII_RX_DV/ETH_RMII_CRS_DV ----> PA7
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ETH_MII_RXD0/ETH_RMII_RXD0 -------> PC4
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ETH_MII_RXD1/ETH_RMII_RXD1 -------> PC5
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ETH_MII_TX_EN/ETH_RMII_TX_EN -----> PG11
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ETH_MII_TXD0/ETH_RMII_TXD0 -------> PG13
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ETH_MII_TXD1/ETH_RMII_TXD1 -------> PG14
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*/
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 |GPIO_Pin_1| GPIO_Pin_2 |GPIO_Pin_3|GPIO_Pin_7;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource0, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_10;
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GPIO_Init(GPIOB, &GPIO_InitStructure);
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource0, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource1, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOB, GPIO_PinSource10, GPIO_AF_ETH);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
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GPIO_Init(GPIOC, &GPIO_InitStructure);
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource2, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource3, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
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GPIO_Init(GPIOE, &GPIO_InitStructure);
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GPIO_PinAFConfig(GPIOE, GPIO_PinSource2, GPIO_AF_ETH);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_13 | GPIO_Pin_14;
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GPIO_Init(GPIOG, &GPIO_InitStructure);
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GPIO_PinAFConfig(GPIOG, GPIO_PinSource11, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOG, GPIO_PinSource13, GPIO_AF_ETH);
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GPIO_PinAFConfig(GPIOG, GPIO_PinSource14, GPIO_AF_ETH);
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}
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/**
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* @brief Configures and enable the Ethernet global interrupt.
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* @param None
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* @retval None
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*/
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void ETH_NVIC_Config(void)
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{
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NVIC_InitTypeDef NVIC_InitStructure;
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/* 2 bit for pre-emption priority, 2 bits for subpriority */
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//NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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/* Enable the Ethernet global Interrupt */
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NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 13;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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/**
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* @brief Configure the PHY to generate an interrupt on change of link status.
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* @param PHYAddress: external PHY address
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* @retval None
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*/
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uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress)
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{
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uint32_t tmpreg = 0;
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/* Read MICR register */
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tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MICR);
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/* Enable output interrupt events to signal via the INT pin */
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tmpreg |= (uint32_t)PHY_MICR_INT_EN | PHY_MICR_INT_OE;
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if(!(ETH_WritePHYRegister(PHYAddress, PHY_MICR, tmpreg)))
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{
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/* Return ERROR in case of write timeout */
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return ETH_ERROR;
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}
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/* Read MISR register */
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tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MISR);
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/* Enable Interrupt on change of link status */
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tmpreg |= (uint32_t)PHY_MISR_LINK_INT_EN;
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if(!(ETH_WritePHYRegister(PHYAddress, PHY_MISR, tmpreg)))
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{
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/* Return ERROR in case of write timeout */
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return ETH_ERROR;
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}
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/* Return SUCCESS */
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return ETH_SUCCESS;
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}
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/**
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* @brief EXTI configuration for Ethernet link status.
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* @param PHYAddress: external PHY address
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* @retval None
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*/
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void Eth_Link_EXTIConfig(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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EXTI_InitTypeDef EXTI_InitStructure;
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NVIC_InitTypeDef NVIC_InitStructure;
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/* Enable the INT (PB14) Clock */
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RCC_AHB1PeriphClockCmd(ETH_LINK_GPIO_CLK, ENABLE);
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
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/* Configure INT pin as input */
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_InitStructure.GPIO_Pin = ETH_LINK_PIN;
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GPIO_Init(ETH_LINK_GPIO_PORT, &GPIO_InitStructure);
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/* Connect EXTI Line to INT Pin */
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SYSCFG_EXTILineConfig(ETH_LINK_EXTI_PORT_SOURCE, ETH_LINK_EXTI_PIN_SOURCE);
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/* Configure EXTI line */
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EXTI_InitStructure.EXTI_Line = ETH_LINK_EXTI_LINE;
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EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
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EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
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EXTI_InitStructure.EXTI_LineCmd = ENABLE;
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EXTI_Init(&EXTI_InitStructure);
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/* Enable and set the EXTI interrupt to the highest priority */
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//NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
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NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn;
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NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
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NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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NVIC_Init(&NVIC_InitStructure);
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}
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/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
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