sync: WIN-BOWEI 2026-08-10 硬编码审计:两个 flow driver 的工程根改读 skills_env.md
- run_fpga_local.py: FPGA_FLOW_ROOT 写死 E:\LangGraph_Design\fpga-goldenref-flow -> _env_lookup(FPGA_GOLDENREF_ROOT),未配置时给出明确提示。 - run_imx6_flow.py: DEFAULT_PROJECT 写死 -> _env_lookup(FPGA_IMX6_FLOW_ROOT), --project-dir 为空时报错而不是拿错路径继续。 与 sim-rtl-flow / zynq-imx6-flow 已有写法一致。 Co-Authored-By: Claude Opus 5 (1M context) <noreply@anthropic.com>
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@@ -18,14 +18,42 @@ removed). CLI + exit codes:
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Exit codes: 0 complete · 1 error · 2 interrupted (human action needed)
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Exit codes: 0 complete · 1 error · 2 interrupted (human action needed)
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"""
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"""
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import os
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import os
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import re
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import sys
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import sys
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import json
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import json
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import uuid
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import uuid
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import argparse
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import argparse
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import sqlite3
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import sqlite3
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def _env_lookup(key, default=None):
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"""Read KEY from the OS environment, else from a ``KEY = value`` line in
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~/skills_env.md. Machine-local paths are never hardcoded in a skill; see
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the same helper in fpga_flash/scripts/vivado_env.py."""
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value = os.environ.get(key)
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if value:
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return value
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path = os.path.join(os.path.expanduser("~"), "skills_env.md")
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try:
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with open(path, encoding="utf-8") as handle:
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for line in handle:
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match = re.match(rf"\s*{re.escape(key)}\s*=\s*(.+?)\s*(?:#.*)?$", line)
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if match:
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found = match.group(1).strip()
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if found and not found.startswith("<"):
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return found
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except OSError:
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pass
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return default
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# Drive the graph in-process: import the app package.
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# Drive the graph in-process: import the app package.
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FPGA_FLOW_ROOT = r"E:\LangGraph_Design\fpga-goldenref-flow"
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FPGA_FLOW_ROOT = _env_lookup("FPGA_GOLDENREF_ROOT")
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if not FPGA_FLOW_ROOT:
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raise SystemExit(
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"fpga-goldenref-flow 工作流仓库路径未配置:请在 ~/skills_env.md 增加\n"
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" FPGA_GOLDENREF_ROOT = <fpga-goldenref-flow 检出目录>"
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)
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if FPGA_FLOW_ROOT not in sys.path:
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if FPGA_FLOW_ROOT not in sys.path:
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sys.path.insert(0, FPGA_FLOW_ROOT)
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sys.path.insert(0, FPGA_FLOW_ROOT)
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@@ -19,6 +19,7 @@ from __future__ import annotations
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import argparse
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import argparse
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import json
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import json
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import os
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import os
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import re
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import sys
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import sys
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from pathlib import Path
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from pathlib import Path
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@@ -27,7 +28,30 @@ try:
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except Exception:
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except Exception:
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pass
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pass
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DEFAULT_PROJECT = r"E:\LangGraph_Design\FPGA-imx6-flow"
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def _env_lookup(key: str, default: str | None = None) -> str | None:
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"""Read KEY from the OS environment, else from a ``KEY = value`` line in
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~/skills_env.md. Machine-local paths are never hardcoded in a skill; see
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the same helper in fpga_flash/scripts/vivado_env.py."""
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value = os.environ.get(key)
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if value:
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return value
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path = os.path.join(os.path.expanduser("~"), "skills_env.md")
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try:
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with open(path, encoding="utf-8") as handle:
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for line in handle:
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match = re.match(rf"\s*{re.escape(key)}\s*=\s*(.+?)\s*(?:#.*)?$", line)
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if match:
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found = match.group(1).strip()
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if found and not found.startswith("<"):
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return found
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except OSError:
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pass
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return default
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# The fpga-imx6-flow checkout: FPGA_IMX6_FLOW_ROOT in ~/skills_env.md.
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DEFAULT_PROJECT = _env_lookup("FPGA_IMX6_FLOW_ROOT", "")
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def _emit(obj: dict, code: int) -> None:
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def _emit(obj: dict, code: int) -> None:
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@@ -57,6 +81,11 @@ def main() -> None:
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ap.add_argument("--max-hw-retry", type=int, default=3)
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ap.add_argument("--max-hw-retry", type=int, default=3)
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args = ap.parse_args()
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args = ap.parse_args()
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if not args.project_dir:
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_emit({"status": "error",
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"error": "fpga-imx6-flow 工作流仓库路径未配置:在 ~/skills_env.md 增加 "
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"FPGA_IMX6_FLOW_ROOT = <检出目录>,或用 --project-dir 显式指定"}, 1)
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project = Path(args.project_dir)
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project = Path(args.project_dir)
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if not (project / "app" / "main_graph.py").exists():
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if not (project / "app" / "main_graph.py").exists():
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_emit({"status": "error",
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_emit({"status": "error",
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