vivado: resolve install path from ~/skills_env.md instead of hardcoding D:\Xilinx

The Vivado install root differs per machine (C:\Xilinx here, D:\Xilinx on the
box these skills were written on), so every hardcoded path was already wrong
on this machine.

- new fpga_flash/scripts/vivado_env.py: resolves --vivado-dir > env var >
  VIVADO_ROOT (falling back to VIVADO_PATH) from ~/skills_env.md
- gen_mcs / program_flash / check_flash_csv: --vivado-dir now optional
- fpga_update/gen_update_mcs.py: same precedence for --vivado
- fpga_flash / smod_atsc_dev / vivado-prj-create SKILL.md: document the
  lookup instead of naming a drive letter
- skills_env template: VIVADO_ROOT/VIVADO_PATH are now blanks to fill in,
  so a new machine can't inherit a wrong default

Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
This commit is contained in:
Myfro9
2026-07-20 07:48:04 -05:00
co-authored by Claude Opus 4.8
parent fbfa060b67
commit 88f96fa5fa
9 changed files with 138 additions and 32 deletions
+1 -1
View File
@@ -29,7 +29,7 @@ FPGA 做 8VSB 调制 / DPD / AGC / TS 前处理,imx6 跑 `atsc_app`(配置 A
| 激励器 Vivado 工程 | `E:\Xilinx_design\smod\SMOD_ATSC\my_exciter\my_exciter.xpr`(top = `smod_top`,也是 **git 仓库根**) |
| 打底 golden 工程 | `E:\Xilinx_design\smod\SMOD_ATSC\RU_golden\RU_golden.xpr`(top = `RU_golden_top`) |
| FPGA / Flash | `xc7a200tfbg676-2` / Winbond **w25q128bv**(128 Mbit = 16 MB,SPIx1) |
| Vivado | `D:\Xilinx\Vivado\2018.1`(`bin\vivado.bat`) |
| Vivado | 见 `~\skills_env.md` 的 `VIVADO_ROOT`(其下 `bin\vivado.bat`)——路径因机器而异,不要写死盘符 |
| imx6 源码 | `my_exciter\imx6\src\atsc_app`(Makefile 在该目录根) |
| imx6 设备 | `192.168.1.143`,用户 `root`,密码见 `~\skills_env.md` 的 `SMOD_SSH_PASS`(网页 + SSH;Windows 主机 `192.168.1.125` 同网段) |
| 交叉编译 VM | `bowei@192.168.223.128`,密码见 `~\skills_env.md` 的 `CROSS_VM_PASS`,构建目录 `~/atsc_head_build` |