提交SMOD ATSC IMX APP版本 V122
This commit is contained in:
@@ -0,0 +1,987 @@
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/* **************************************************** */
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/*!
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@file MN88436_reg.c
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@brief Reg. settings of MN88436 for 24MHz IF 44MHz
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@author Simon
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@date 2012/10/9
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@param
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(c) Panasonic
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*/
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/* **************************************************** */
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#include "../include/MN_DMD_driver.h"
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#include "../include/MN88436_reg.h"
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DMD_u32_t DMD_RegSet_Rev = 1;
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// Mode : ATSC
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DMD_u8_t DMD_REG_ATSC[]={
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0 ,0x0 ,0x50 ,
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0 ,0x1 ,0x0 ,
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0 ,0x2 ,0xC0 ,
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0 ,0x3 ,0x0 ,
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0 ,0x4 ,0x0 ,
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0 ,0x5 ,0x0 ,
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0 ,0x6 ,0x0 ,
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0 ,0x7 ,0x0 ,
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0 ,0x8 ,0x0 ,
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0 ,0x9 ,0x0 ,
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0 ,0xA ,0x1E ,
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0 ,0xB ,0x2A ,
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0 ,0xC ,0xAB ,
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0 ,0xD ,0x8E ,
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0 ,0xE ,0xB9 ,
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0 ,0xF ,0x72 ,
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0 ,0x10 ,0x0 ,
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0 ,0x11 ,0x14 ,
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0 ,0x12 ,0xE3 ,
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0 ,0x13 ,0x4E ,
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0 ,0x14 ,0x8 ,
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0 ,0x15 ,0x5 ,
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0 ,0x16 ,0x63 ,
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0 ,0x17 ,0x0 ,
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0 ,0x18 ,0x0 ,
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0 ,0x19 ,0x0 ,
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0 ,0x1A ,0x0 ,
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0 ,0x1B ,0x0 ,
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0 ,0x1C ,0x0 ,
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0 ,0x1D ,0x0 ,
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0 ,0x1E ,0x0 ,
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0 ,0x1F ,0x0 ,
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0 ,0x20 ,0x0 ,
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0 ,0x21 ,0x50 ,
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0 ,0x22 ,0x60 ,
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0 ,0x23 ,0x36 ,
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0 ,0x24 ,0x2 ,
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0 ,0x25 ,0x0 ,
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0 ,0x26 ,0x0 ,
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0 ,0x27 ,0x0 ,
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0 ,0x28 ,0x0 ,
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0 ,0x29 ,0x0 ,
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0 ,0x2A ,0x20 ,
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0 ,0x2B ,0xC0 ,
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0 ,0x2C ,0x23 ,
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0 ,0x2D ,0x3F ,
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0 ,0x2E ,0x3F ,
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0 ,0x2F ,0x0 ,
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0 ,0x30 ,0x2E ,
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0 ,0x31 ,0x0 ,
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0 ,0x32 ,0x0 ,
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0 ,0x33 ,0x81 ,
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0 ,0x34 ,0x0 ,
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||||
0 ,0x35 ,0x26 ,
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0 ,0x36 ,0x21 ,
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0 ,0x37 ,0x88 ,
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0 ,0x38 ,0x3 ,
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0 ,0x39 ,0x19 ,
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0 ,0x3A ,0x85 ,
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0 ,0x3B ,0x5 ,
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0 ,0x3C ,0xC9 ,
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0 ,0x3D ,0x2 ,
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0 ,0x3E ,0x30 ,
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0 ,0x3F ,0x69 ,
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0 ,0x40 ,0x1F ,
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0 ,0x41 ,0xF0 ,
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0 ,0x42 ,0x0 ,
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0 ,0x43 ,0x96 ,
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0 ,0x44 ,0x72 ,
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0 ,0x45 ,0x1B ,
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0 ,0x46 ,0x2D ,
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0 ,0x47 ,0x1A ,
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0 ,0x48 ,0x31 ,
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0 ,0x49 ,0xFE ,
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0 ,0x4A ,0x96 ,
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0 ,0x4B ,0x7 ,
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0 ,0x4C ,0x26 ,
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0 ,0x4D ,0xE3 ,
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0 ,0x4E ,0x22 ,
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0 ,0x4F ,0x1B ,
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0 ,0x50 ,0x26 ,
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0 ,0x51 ,0x12 ,
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0 ,0x52 ,0x40 ,
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0 ,0x53 ,0x50 ,
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0 ,0x54 ,0x60 ,
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0 ,0x55 ,0x40 ,
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0 ,0x56 ,0xED ,
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0 ,0x57 ,0x96 ,
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0 ,0x58 ,0x4A ,
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0 ,0x59 ,0xDE ,
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0 ,0x5A ,0x88 ,
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0 ,0x5B ,0xC8 ,
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0 ,0x5C ,0x2D ,
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0 ,0x5D ,0x1 ,
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0 ,0x5E ,0x0 ,
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0 ,0x5F ,0xB8 ,
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0 ,0x60 ,0x40 ,
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0 ,0x61 ,0x14 ,
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0 ,0x62 ,0x13 ,
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0 ,0x63 ,0x30 ,
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0 ,0x64 ,0x59 ,
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0 ,0x65 ,0x7 ,
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0 ,0x66 ,0xF0 ,
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0 ,0x67 ,0x47 ,
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0 ,0x68 ,0xA1 ,
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0 ,0x69 ,0x80 ,
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0 ,0x6A ,0x0 ,
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0 ,0x6B ,0x0 ,
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0 ,0x6C ,0xC0 ,
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0 ,0x6D ,0x0 ,
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0 ,0x6E ,0x0 ,
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||||
0 ,0x6F ,0x0 ,
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0 ,0x70 ,0x0 ,
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0 ,0x71 ,0x0 ,
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0 ,0x72 ,0x0 ,
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0 ,0x73 ,0x0 ,
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0 ,0x74 ,0x2F ,
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0 ,0x75 ,0x0 ,
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0 ,0x76 ,0x0 ,
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0 ,0x77 ,0x0 ,
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||||
0 ,0x78 ,0x0 ,
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||||
0 ,0x79 ,0x40 ,
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||||
0 ,0x7A ,0x20 ,
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0 ,0x7B ,0x40 ,
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0 ,0x7C ,0x80 ,
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0 ,0x7D ,0xFF ,
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0 ,0x7E ,0x20 ,
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0 ,0x7F ,0x40 ,
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||||
0 ,0x80 ,0x10 ,
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||||
0 ,0x81 ,0x0 ,
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||||
0 ,0x82 ,0xE5 ,
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||||
0 ,0x83 ,0xC4 ,
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||||
0 ,0x84 ,0xE9 ,
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||||
0 ,0x85 ,0x52 ,
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||||
0 ,0x86 ,0x5F ,
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||||
0 ,0x87 ,0x53 ,
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||||
0 ,0x88 ,0x20 ,
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||||
0 ,0x89 ,0x43 ,
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||||
0 ,0x8A ,0x11 ,
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||||
0 ,0x8B ,0x8 ,
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||||
0 ,0x8C ,0x43 ,
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||||
0 ,0x8D ,0x11 ,
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||||
0 ,0x8E ,0x8 ,
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||||
0 ,0x8F ,0x0 ,
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||||
0 ,0x90 ,0x60 ,
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||||
0 ,0x91 ,0x5B ,
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||||
0 ,0x92 ,0x80 ,
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||||
0 ,0x93 ,0xE4 ,
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||||
0 ,0x94 ,0x34 ,
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||||
0 ,0x95 ,0x0 ,
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||||
0 ,0x96 ,0x0 ,
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||||
0 ,0x97 ,0x7 ,
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||||
0 ,0x98 ,0x0 ,
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||||
0 ,0x99 ,0xB0 ,
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||||
0 ,0x9A ,0x68 ,
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||||
0 ,0x9B ,0x50 ,
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||||
0 ,0x9C ,0x84 ,
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||||
0 ,0x9D ,0xA9 ,
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||||
0 ,0x9E ,0x11 ,
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||||
0 ,0x9F ,0x4 ,
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||||
0 ,0xA0 ,0x44 ,
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||||
0 ,0xA1 ,0x14 ,
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||||
0 ,0xA2 ,0x9C ,
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||||
0 ,0xA3 ,0x15 ,
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||||
0 ,0xA4 ,0xF6 ,
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||||
0 ,0xA5 ,0x36 ,
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||||
0 ,0xA6 ,0x16 ,
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||||
0 ,0xA7 ,0x3F ,
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||||
0 ,0xA8 ,0x1 ,
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||||
0 ,0xA9 ,0x8 ,
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||||
0 ,0xAA ,0x0 ,
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||||
0 ,0xAB ,0x0 ,
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||||
0 ,0xAC ,0x0 ,
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||||
0 ,0xAD ,0x65 ,
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||||
0 ,0xAE ,0x87 ,
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||||
0 ,0xAF ,0x56 ,
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||||
0 ,0xB0 ,0x52 ,
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||||
0 ,0xB1 ,0x55 ,
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||||
0 ,0xB2 ,0x35 ,
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||||
0 ,0xB3 ,0x13 ,
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||||
0 ,0xB4 ,0x88 ,
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||||
0 ,0xB5 ,0x23 ,
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||||
0 ,0xB6 ,0x28 ,
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||||
0 ,0xB7 ,0x3C ,
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||||
0 ,0xB8 ,0x1 ,
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||||
0 ,0xB9 ,0x5B ,
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||||
0 ,0xBA ,0x0 ,
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||||
0 ,0xBB ,0x0 ,
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||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
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||||
0 ,0xC0 ,0x0 ,
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||||
0 ,0xC1 ,0x0 ,
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||||
0 ,0xC2 ,0x0 ,
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||||
0 ,0xC3 ,0x0 ,
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||||
0 ,0xC4 ,0x0 ,
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||||
0 ,0xC5 ,0x0 ,
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||||
0 ,0xC6 ,0x0 ,
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||||
0 ,0xC7 ,0x0 ,
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||||
0 ,0xC8 ,0x0 ,
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||||
0 ,0xC9 ,0x0 ,
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||||
0 ,0xCA ,0x0 ,
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||||
0 ,0xCB ,0x0 ,
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||||
0 ,0xCC ,0x0 ,
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||||
0 ,0xCD ,0x0 ,
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||||
0 ,0xCE ,0x0 ,
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||||
0 ,0xCF ,0x0 ,
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||||
0 ,0xD0 ,0x0 ,
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||||
0 ,0xD1 ,0x0 ,
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||||
0 ,0xD2 ,0x0 ,
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||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
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||||
0 ,0xD5 ,0x0 ,
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||||
0 ,0xD6 ,0x0 ,
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||||
0 ,0xD7 ,0x0 ,
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||||
0 ,0xD8 ,0x0 ,
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||||
0 ,0xD9 ,0xA0 ,
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||||
0 ,0xDA ,0x0 ,
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||||
0 ,0xDB ,0x0 ,
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||||
0 ,0xDC ,0x0 ,
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||||
0 ,0xDD ,0x0 ,
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||||
0 ,0xDE ,0x0 ,
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||||
0 ,0xDF ,0x9 ,
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||||
0 ,0xE0 ,0x8 ,
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||||
0 ,0xE1 ,0x8 ,
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||||
0 ,0xE2 ,0xA8 ,
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||||
0 ,0xE3 ,0x0 ,
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||||
0 ,0xE4 ,0x0 ,
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||||
0 ,0xE5 ,0x0 ,
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||||
0 ,0xE6 ,0x0 ,
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||||
0 ,0xE7 ,0xB4 ,
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||||
0 ,0xE8 ,0xA ,
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||||
0 ,0xE9 ,0x0 ,
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||||
0 ,0xEA ,0x0 ,
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||||
0 ,0xEB ,0x0 ,
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||||
0 ,0xEC ,0x0 ,
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||||
0 ,0xED ,0x0 ,
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||||
0 ,0xEE ,0x0 ,
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||||
0 ,0xEF ,0xB4 ,
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||||
0 ,0xF0 ,0x91 ,
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||||
0 ,0xF1 ,0x0 ,
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||||
0 ,0xF2 ,0x0 ,
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||||
0 ,0xF3 ,0x0 ,
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||||
0 ,0xF4 ,0x0 ,
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||||
0 ,0xF5 ,0x0 ,
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||||
0 ,0xF6 ,0x0 ,
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||||
0 ,0xF7 ,0x0 ,
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||||
0 ,0xF8 ,0x0 ,
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||||
0 ,0xF9 ,0x0 ,
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||||
0 ,0xFA ,0x0 ,
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||||
0 ,0xFB ,0x80 ,
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||||
0 ,0xFC ,0x10 ,
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||||
0 ,0xFD ,0x2 ,
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||||
0 ,0xFE ,0x20 ,
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||||
0 ,0xFF ,0xAA ,
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||||
1 ,0x9 ,0x0 ,
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||||
1 ,0xA ,0x0 ,
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||||
1 ,0xB ,0x0 ,
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||||
1 ,0xC ,0x8 ,
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||||
1 ,0xD ,0x0 ,
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||||
1 ,0x14 ,0x8 ,
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||||
1 ,0x5A ,0x3C ,
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||||
1 ,0x5B ,0x0 ,
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||||
1 ,0x5C ,0x0 ,
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||||
1 ,0x5D ,0x0 ,
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||||
1 ,0x5E ,0x0 ,
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||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
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||||
1 ,0x61 ,0xAC ,
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||||
1 ,0x62 ,0x24 ,
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||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
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||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
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||||
1 ,0x69 ,0x0 ,
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||||
1 ,0x6A ,0x0 ,
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||||
1 ,0x6B ,0x0 ,
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||||
1 ,0x74 ,0x0 ,
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||||
1 ,0x79 ,0x0 ,
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||||
1 ,0x80 ,0x5 ,
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||||
1 ,0x81 ,0x0 ,
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||||
1 ,0x82 ,0x40 ,
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||||
1 ,0x83 ,0x0 ,
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||||
1 ,0x84 ,0x40 ,
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||||
1 ,0x85 ,0x37 ,
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||||
1 ,0x86 ,0x2 ,
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||||
1 ,0x87 ,0x20 ,
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||||
1 ,0x88 ,0x0 ,
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||||
1 ,0x89 ,0x20 ,
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||||
1 ,0x8A ,0x0 ,
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||||
1 ,0x8B ,0x3 ,
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||||
1 ,0x8C ,0x60 ,
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||||
1 ,0x8D ,0x30 ,
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||||
1 ,0x8E ,0x88 ,
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||||
1 ,0x8F ,0x11 ,
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||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
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||||
1 ,0x93 ,0xA6 ,
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||||
1 ,0x94 ,0x19 ,
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||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0x9E ,
|
||||
1 ,0x99 ,0x69 ,
|
||||
1 ,0x9A ,0xFA ,
|
||||
1 ,0x9B ,0x8F ,
|
||||
1 ,0x9C ,0x2E ,
|
||||
1 ,0x9D ,0x8E ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
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||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_64QAM
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DMD_u8_t DMD_REG_QAM_B_64QAM[]={
|
||||
0 ,0x0 ,0x51 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x16 ,
|
||||
0 ,0xB ,0x2A ,
|
||||
0 ,0xC ,0xAB ,
|
||||
0 ,0xD ,0x97 ,
|
||||
0 ,0xE ,0xDE ,
|
||||
0 ,0xF ,0xD8 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x71 ,
|
||||
1 ,0x93 ,0xE7 ,
|
||||
1 ,0x94 ,0x23 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_256QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_256QAM[]={
|
||||
0 ,0x0 ,0x53 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x16 ,
|
||||
0 ,0xB ,0x2A ,
|
||||
0 ,0xC ,0xAB ,
|
||||
0 ,0xD ,0x8F ,
|
||||
0 ,0xE ,0x44 ,
|
||||
0 ,0xF ,0xED ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x4F ,
|
||||
1 ,0x96 ,0x27 ,
|
||||
1 ,0x97 ,0x49 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
+987
@@ -0,0 +1,987 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN88436_reg.c
|
||||
@brief Reg. settings of MN88436 for 24MHz IF 44MHz
|
||||
@author Simon
|
||||
@date 2012/10/17
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
DMD_u32_t DMD_RegSet_Rev = 1;
|
||||
|
||||
|
||||
// Mode : ATSC
|
||||
DMD_u8_t DMD_REG_ATSC[]={
|
||||
0 ,0x0 ,0x50 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x1E ,
|
||||
0 ,0xB ,0x2A ,
|
||||
0 ,0xC ,0xAB ,
|
||||
0 ,0xD ,0x8E ,
|
||||
0 ,0xE ,0xB9 ,
|
||||
0 ,0xF ,0x72 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE3 ,
|
||||
0 ,0x13 ,0x4E ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x80 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0x9E ,
|
||||
1 ,0x99 ,0x69 ,
|
||||
1 ,0x9A ,0xFA ,
|
||||
1 ,0x9B ,0x8F ,
|
||||
1 ,0x9C ,0x2E ,
|
||||
1 ,0x9D ,0x8E ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_64QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_64QAM[]={
|
||||
0 ,0x0 ,0x51 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x16 ,
|
||||
0 ,0xB ,0x2A ,
|
||||
0 ,0xC ,0xAB ,
|
||||
0 ,0xD ,0x97 ,
|
||||
0 ,0xE ,0xDE ,
|
||||
0 ,0xF ,0xD8 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x80 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x71 ,
|
||||
1 ,0x93 ,0xE7 ,
|
||||
1 ,0x94 ,0x23 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_256QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_256QAM[]={
|
||||
0 ,0x0 ,0x53 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x16 ,
|
||||
0 ,0xB ,0x2A ,
|
||||
0 ,0xC ,0xAB ,
|
||||
0 ,0xD ,0x8F ,
|
||||
0 ,0xE ,0x44 ,
|
||||
0 ,0xF ,0xED ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x80 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x4F ,
|
||||
1 ,0x96 ,0x27 ,
|
||||
1 ,0x97 ,0x49 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
@@ -0,0 +1,987 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN88436_reg.c
|
||||
@brief Reg. settings of MN88436 for 24MHz IF 5MHz
|
||||
@author Simon
|
||||
@date 2012/7/24
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
DMD_u32_t DMD_RegSet_Rev = 1;
|
||||
|
||||
|
||||
// Mode : ATSC
|
||||
DMD_u8_t DMD_REG_ATSC[]={
|
||||
0 ,0x0 ,0x50 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x1E ,
|
||||
0 ,0xB ,0x35 ,
|
||||
0 ,0xC ,0x56 ,
|
||||
0 ,0xD ,0x8E ,
|
||||
0 ,0xE ,0xB9 ,
|
||||
0 ,0xF ,0x72 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE3 ,
|
||||
0 ,0x13 ,0x4E ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0x9E ,
|
||||
1 ,0x99 ,0x69 ,
|
||||
1 ,0x9A ,0xFA ,
|
||||
1 ,0x9B ,0x8F ,
|
||||
1 ,0x9C ,0x2E ,
|
||||
1 ,0x9D ,0x8E ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_64QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_64QAM[]={
|
||||
0 ,0x0 ,0x51 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x16 ,
|
||||
0 ,0xB ,0x35 ,
|
||||
0 ,0xC ,0x56 ,
|
||||
0 ,0xD ,0x97 ,
|
||||
0 ,0xE ,0xDE ,
|
||||
0 ,0xF ,0xD8 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x71 ,
|
||||
1 ,0x93 ,0xE7 ,
|
||||
1 ,0x94 ,0x23 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_256QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_256QAM[]={
|
||||
0 ,0x0 ,0x53 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x16 ,
|
||||
0 ,0xB ,0x35 ,
|
||||
0 ,0xC ,0x56 ,
|
||||
0 ,0xD ,0x8F ,
|
||||
0 ,0xE ,0x44 ,
|
||||
0 ,0xF ,0xED ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x4F ,
|
||||
1 ,0x96 ,0x27 ,
|
||||
1 ,0x97 ,0x49 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
@@ -0,0 +1,987 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN88436_reg.c
|
||||
@brief Reg. settings of MN88436 for 24MHz IF 5MHz
|
||||
@author Simon
|
||||
@date 2012/7/24
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
DMD_u32_t DMD_RegSet_Rev = 1;
|
||||
|
||||
|
||||
// Mode : ATSC
|
||||
DMD_u8_t DMD_REG_ATSC[]={
|
||||
0 ,0x0 ,0x50 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x21 ,
|
||||
0 ,0xC ,0x48 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x03 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_64QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_64QAM[]={
|
||||
0 ,0x0 ,0x51 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x21 ,
|
||||
0 ,0xC ,0x48 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_256QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_256QAM[]={
|
||||
0 ,0x0 ,0x53 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x21 ,
|
||||
0 ,0xC ,0x48 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
@@ -0,0 +1,987 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN88436_regset.c
|
||||
@brief Register settings for MN88436 , 25MHz, IF 44MHz
|
||||
@author Simon
|
||||
@date 2012/7/24
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
DMD_u32_t DMD_RegSet_Rev = 1;
|
||||
|
||||
|
||||
// Mode : ATSC
|
||||
DMD_u8_t DMD_REG_ATSC[]={
|
||||
0 ,0x0 ,0x50 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x6 ,
|
||||
0 ,0xB ,0x3D ,
|
||||
0 ,0xC ,0x71 ,
|
||||
0 ,0xD ,0x7 ,
|
||||
0 ,0xE ,0x7 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_64QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_64QAM[]={
|
||||
0 ,0x0 ,0x51 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x6 ,
|
||||
0 ,0xB ,0x3D ,
|
||||
0 ,0xC ,0x71 ,
|
||||
0 ,0xD ,0x7 ,
|
||||
0 ,0xE ,0x7 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_256QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_256QAM[]={
|
||||
0 ,0x0 ,0x53 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x6 ,
|
||||
0 ,0xB ,0x3D ,
|
||||
0 ,0xC ,0x71 ,
|
||||
0 ,0xD ,0x7 ,
|
||||
0 ,0xE ,0x7 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
@@ -0,0 +1,987 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN88436_reg.c
|
||||
@brief Reg. settings of MN88436 for 24MHz IF 5MHz
|
||||
@author Simon
|
||||
@date 2012/7/24
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
DMD_u32_t DMD_RegSet_Rev = 1;
|
||||
|
||||
|
||||
// Mode : ATSC
|
||||
DMD_u8_t DMD_REG_ATSC[]={
|
||||
0 ,0x0 ,0x50 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x33 ,
|
||||
0 ,0xC ,0x34 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x03 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_64QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_64QAM[]={
|
||||
0 ,0x0 ,0x51 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x33 ,
|
||||
0 ,0xC ,0x34 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_256QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_256QAM[]={
|
||||
0 ,0x0 ,0x53 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x33 ,
|
||||
0 ,0xC ,0x34 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
@@ -0,0 +1,360 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN88436_reg.h
|
||||
@brief reg multiple DMD
|
||||
@author Simon
|
||||
@date 2012/4/9
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
|
||||
#ifndef DMD_MN88436_REG_H
|
||||
#define DMD_MN88436_REG_H
|
||||
|
||||
//for recomendation register setting
|
||||
extern DMD_u8_t DMD_REG_ATSC[];
|
||||
extern DMD_u8_t DMD_REG_QAM_B_64QAM[];
|
||||
extern DMD_u8_t DMD_REG_QAM_B_256QAM[];
|
||||
extern DMD_u8_t DMD_BANK_MAIN(DMD_u8_t id);
|
||||
extern DMD_u8_t DMD_BANK_USR(DMD_u8_t id);
|
||||
|
||||
//PSEQ
|
||||
extern DMD_u8_t MN88436_REG_AUTOCTRL[];
|
||||
extern DMD_u32_t MN88436_REG_AUTOCTRL_SIZE;
|
||||
|
||||
/* **************************************************** */
|
||||
/* I2C Register Name */
|
||||
/* **************************************************** */
|
||||
#define DMD_MAX_DEVICE 4
|
||||
#define DMD_REG_BANK 2
|
||||
extern DMD_u8_t DMD_I2C_SLAVE[DMD_MAX_DEVICE][DMD_REG_BANK];
|
||||
|
||||
//For Main
|
||||
#define DMD_MAIN_IBMOD 0x0
|
||||
#define DMD_MAIN_CPOSET1 0x1
|
||||
#define DMD_MAIN_CPOSET2 0x2
|
||||
#define DMD_MAIN_HIZSET 0x3
|
||||
#define DMD_MAIN_INVSET 0x4
|
||||
#define DMD_MAIN_GPSET1 0x5
|
||||
#define DMD_MAIN_GPSET2 0x6
|
||||
#define DMD_MAIN_GPSET3 0x7
|
||||
#define DMD_MAIN_MDADATL 0x8
|
||||
#define DMD_MAIN_MDADATU 0x9
|
||||
#define DMD_MAIN_IQDSET 0xA
|
||||
#define DMD_MAIN_FOFFSET1U 0xB
|
||||
#define DMD_MAIN_FOFFSET1L 0xC
|
||||
#define DMD_MAIN_SRATEIN1 0xD
|
||||
#define DMD_MAIN_SRATEIN2 0xE
|
||||
#define DMD_MAIN_SRATEIN3 0xF
|
||||
#define DMD_MAIN_RSTSET1 0x10
|
||||
#define DMD_MAIN_RSTSET2 0x11
|
||||
#define DMD_MAIN_FOFFSET2U 0x12
|
||||
#define DMD_MAIN_FOFFSET2L 0x13
|
||||
#define DMD_MAIN_I2CSET 0x14
|
||||
#define DMD_MAIN_TCBSET 0x15
|
||||
#define DMD_MAIN_TCBRT 0x16
|
||||
#define DMD_MAIN_TCBADR 0x17
|
||||
#define DMD_MAIN_TCBDT0 0x18
|
||||
#define DMD_MAIN_TCBDT1 0x19
|
||||
#define DMD_MAIN_TCBDT2 0x1A
|
||||
#define DMD_MAIN_TCBDT3 0x1B
|
||||
#define DMD_MAIN_TCBDT4 0x1C
|
||||
#define DMD_MAIN_TCBDT5 0x1D
|
||||
#define DMD_MAIN_TCBDT6 0x1E
|
||||
#define DMD_MAIN_TCBDT7 0x1F
|
||||
#define DMD_MAIN_TCBCOM 0x20
|
||||
#define DMD_MAIN_VAGCREF 0x21
|
||||
#define DMD_MAIN_QAGCREF 0x22
|
||||
#define DMD_MAIN_AGCCO1 0x23
|
||||
#define DMD_MAIN_AGCSET1 0x24
|
||||
#define DMD_MAIN_VAGCDLY1L 0x25
|
||||
#define DMD_MAIN_VQAGCDLY1U 0x26
|
||||
#define DMD_MAIN_QAGCDLY1L 0x27
|
||||
#define DMD_MAIN_ERRCNTTHU 0x28
|
||||
#define DMD_MAIN_ERRCNTTHL 0x29
|
||||
#define DMD_MAIN_ALCSET1 0x2A
|
||||
#define DMD_MAIN_ALCSET2 0x2B
|
||||
#define DMD_MAIN_ALCSET3 0x2C
|
||||
#define DMD_MAIN_CLIPVUL 0x2D
|
||||
#define DMD_MAIN_CLIPVL 0x2E
|
||||
#define DMD_MAIN_PIRETH2U 0x2F
|
||||
#define DMD_MAIN_PIRETH2L 0x30
|
||||
#define DMD_MAIN_PIRETH3U 0x31
|
||||
#define DMD_MAIN_PIRETH3L 0x32
|
||||
#define DMD_MAIN_PAFCSGSET1 0x33
|
||||
#define DMD_MAIN_PAFCSGSET2 0x34
|
||||
#define DMD_MAIN_PAFCLPFSET1 0x35
|
||||
#define DMD_MAIN_PAFCLPFSETA2 0x36
|
||||
#define DMD_MAIN_PAFCLPFSETA3 0x37
|
||||
#define DMD_MAIN_PAFCLPFSETA4 0x38
|
||||
#define DMD_MAIN_PAFCLPFSETB2 0x39
|
||||
#define DMD_MAIN_PAFCLPFSETB3 0x3A
|
||||
#define DMD_MAIN_PAFCLPFSETB4 0x3B
|
||||
#define DMD_MAIN_AFCSET1 0x3C
|
||||
#define DMD_MAIN_AFCCO 0x3D
|
||||
#define DMD_MAIN_AFCADD 0x3E
|
||||
#define DMD_MAIN_APCSET1 0x3F
|
||||
#define DMD_MAIN_APCSET2 0x40
|
||||
#define DMD_MAIN_APCSET4 0x41
|
||||
#define DMD_MAIN_APCSET5 0x42
|
||||
#define DMD_MAIN_APCCO1 0x43
|
||||
#define DMD_MAIN_APCCO2 0x44
|
||||
#define DMD_MAIN_APCCO3 0x45
|
||||
#define DMD_MAIN_APCCO4 0x46
|
||||
#define DMD_MAIN_VCKRSET1 0x47
|
||||
#define DMD_MAIN_VCKRSET2 0x48
|
||||
#define DMD_MAIN_VCKRCOUL 0x49
|
||||
#define DMD_MAIN_VCKRCOL 0x4A
|
||||
#define DMD_MAIN_VFCKSET1 0x4B
|
||||
#define DMD_MAIN_VFCKSET2 0x4C
|
||||
#define DMD_MAIN_VFCKBWUL 0x4D
|
||||
#define DMD_MAIN_VFCKBWLK 0x4E
|
||||
#define DMD_MAIN_VFCKATUL 0x4F
|
||||
#define DMD_MAIN_VFCKATLK 0x50
|
||||
#define DMD_MAIN_VTCKSET1 0x51
|
||||
#define DMD_MAIN_VTCKSET2 0x52
|
||||
#define DMD_MAIN_VDAGCREF 0x53
|
||||
#define DMD_MAIN_QDAGCREF 0x54
|
||||
#define DMD_MAIN_GMIN 0x55
|
||||
#define DMD_MAIN_DAGCCO 0x56
|
||||
#define DMD_MAIN_CKRCO1 0x57
|
||||
#define DMD_MAIN_CKRCO2 0x58
|
||||
#define DMD_MAIN_CKRSET1 0x59
|
||||
#define DMD_MAIN_CKRSET2 0x5A
|
||||
#define DMD_MAIN_PNTSET 0x5B
|
||||
#define DMD_MAIN_PNTCO 0x5C
|
||||
#define DMD_MAIN_NRFMODE 0x5D
|
||||
#define DMD_MAIN_FDATSC 0x5E
|
||||
#define DMD_MAIN_FLTBW1 0x5F
|
||||
#define DMD_MAIN_NRFRSEL 0x60
|
||||
#define DMD_MAIN_SYNCSET1 0x61
|
||||
#define DMD_MAIN_SYNCSET2 0x62
|
||||
#define DMD_MAIN_SYNCSET6 0x63
|
||||
#define DMD_MAIN_QDETREF 0x64
|
||||
#define DMD_MAIN_QDETSET1 0x65
|
||||
#define DMD_MAIN_QDETSET2 0x66
|
||||
#define DMD_MAIN_EQSET 0x67
|
||||
#define DMD_MAIN_VEQSET1 0x68
|
||||
#define DMD_MAIN_VEQSET2 0x69
|
||||
#define DMD_MAIN_VEQSET3 0x6A
|
||||
#define DMD_MAIN_VEQSET4 0x6B
|
||||
#define DMD_MAIN_VEQSET5 0x6C
|
||||
#define DMD_MAIN_VEQSET6 0x6D
|
||||
#define DMD_MAIN_VEQSET7 0x6E
|
||||
#define DMD_MAIN_VEQSET8 0x6F
|
||||
#define DMD_MAIN_VEQSET9 0x70
|
||||
#define DMD_MAIN_AGCMON 0x71
|
||||
#define DMD_MAIN_CKRFEMON 0x72
|
||||
#define DMD_MAIN_DAGCMON 0x73
|
||||
#define DMD_MAIN_QEQSET 0x74
|
||||
#define DMD_MAIN_PAFCPILOT 0x75
|
||||
#define DMD_MAIN_VCKRSYM 0x76
|
||||
#define DMD_MAIN_APCMON 0x77
|
||||
#define DMD_MAIN_PNTMON 0x78
|
||||
#define DMD_MAIN_VEQSET10 0x79
|
||||
#define DMD_MAIN_VEQSET11 0x7A
|
||||
#define DMD_MAIN_VEQSET12 0x7B
|
||||
#define DMD_MAIN_VEQSET13 0x7C
|
||||
#define DMD_MAIN_VEQSET14 0x7D
|
||||
#define DMD_MAIN_VEQSET15 0x7E
|
||||
#define DMD_MAIN_VEQSET16 0x7F
|
||||
#define DMD_MAIN_VEQSET17 0x80
|
||||
#define DMD_MAIN_VEQSET18 0x81
|
||||
#define DMD_MAIN_VEQSET19 0x82
|
||||
#define DMD_MAIN_VEQSET20 0x83
|
||||
#define DMD_MAIN_VEQSET21 0x84
|
||||
#define DMD_MAIN_VEQSET22 0x85
|
||||
#define DMD_MAIN_PLOCKTH1 0x86
|
||||
#define DMD_MAIN_PLOCKTH2 0x87
|
||||
#define DMD_MAIN_PLOCKTH3 0x88
|
||||
#define DMD_MAIN_CRCDIVASET1 0x89
|
||||
#define DMD_MAIN_CRCDIVASET2 0x8A
|
||||
#define DMD_MAIN_CRCDIVASET3 0x8B
|
||||
#define DMD_MAIN_CRCDIVBSET1 0x8C
|
||||
#define DMD_MAIN_CRCDIVBSET2 0x8D
|
||||
#define DMD_MAIN_CRCDIVBSET3 0x8E
|
||||
#define DMD_MAIN_CRCDIVSMV 0x8F
|
||||
#define DMD_MAIN_CRCDIVTIM 0x90
|
||||
#define DMD_MAIN_PNDETSET1 0x91
|
||||
#define DMD_MAIN_PNDETSET2 0x92
|
||||
#define DMD_MAIN_PREIDETSET1 0x93
|
||||
#define DMD_MAIN_PREQDETSET1 0x94
|
||||
#define DMD_MAIN_PNDETSET3 0x95
|
||||
#define DMD_MAIN_PNDETSET4 0x96
|
||||
#define DMD_MAIN_PNSMSET1 0x97
|
||||
#define DMD_MAIN_PNSMSET2 0x98
|
||||
#define DMD_MAIN_PNSMSET3 0x99
|
||||
#define DMD_MAIN_PNSMSET4 0x9A
|
||||
#define DMD_MAIN_PNSMSET5 0x9B
|
||||
#define DMD_MAIN_PNSMSET6 0x9C
|
||||
#define DMD_MAIN_PNSMSET7 0x9D
|
||||
#define DMD_MAIN_PNSMSET8 0x9E
|
||||
#define DMD_MAIN_PNSMSET9 0x9F
|
||||
#define DMD_MAIN_PNSMSET10 0xA0
|
||||
#define DMD_MAIN_PNSMSET11 0xA1
|
||||
#define DMD_MAIN_PNSMSET12 0xA2
|
||||
#define DMD_MAIN_PNSMSET13 0xA3
|
||||
#define DMD_MAIN_PNREGSET1 0xA4
|
||||
#define DMD_MAIN_PNREGSET2 0xA5
|
||||
#define DMD_MAIN_PNREGSET3 0xA6
|
||||
#define DMD_MAIN_PNREGSET4 0xA7
|
||||
#define DMD_MAIN_PNREGSET5 0xA8
|
||||
#define DMD_MAIN_PNREGSET6 0xA9
|
||||
#define DMD_MAIN_FREQSET 0xAA
|
||||
#define DMD_MAIN_FREQU 0xAB
|
||||
#define DMD_MAIN_FREQL 0xAC
|
||||
#define DMD_MAIN_PNREGSET10 0xAD
|
||||
#define DMD_MAIN_PNREGSET11 0xAE
|
||||
#define DMD_MAIN_PNREGSET12 0xAF
|
||||
#define DMD_MAIN_PNREGSET13 0xB0
|
||||
#define DMD_MAIN_PNREGSET14 0xB1
|
||||
#define DMD_MAIN_PNREGSET15 0xB2
|
||||
#define DMD_MAIN_PNREGSET16 0xB3
|
||||
#define DMD_MAIN_PNREGSET17 0xB4
|
||||
#define DMD_MAIN_PNREGSET18 0xB5
|
||||
#define DMD_MAIN_PNREGSET19 0xB6
|
||||
#define DMD_MAIN_PNREGSET20 0xB7
|
||||
#define DMD_MAIN_PNREGSET21 0xB8
|
||||
#define DMD_MAIN_NTCWTH1 0xB9
|
||||
#define DMD_MAIN_IBTGSET 0xBA
|
||||
#define DMD_MAIN_AFCMON 0xBB
|
||||
#define DMD_MAIN_CKRMON 0xBC
|
||||
#define DMD_MAIN_NRFRDAT 0xBD
|
||||
#define DMD_MAIN_MEANFERR 0xBE
|
||||
#define DMD_MAIN_MEANMAGERR 0xBF
|
||||
#define DMD_MAIN_PAFCSGGATE 0xC0
|
||||
#define DMD_MAIN_AFCMONB 0xC1
|
||||
#define DMD_MAIN_PLOCKMONAU 0xC2
|
||||
#define DMD_MAIN_PLOCKMONAL 0xC3
|
||||
#define DMD_MAIN_STSMON1 0xC4
|
||||
#define DMD_MAIN_STSMON2 0xC5
|
||||
#define DMD_MAIN_SYNCRD2 0xC6
|
||||
#define DMD_MAIN_SYNCRD3 0xC7
|
||||
#define DMD_MAIN_PLOCKMONBU 0xC8
|
||||
#define DMD_MAIN_PLOCKMONBL 0xC9
|
||||
#define DMD_MAIN_PNDETU 0xCA
|
||||
#define DMD_MAIN_PNDETL 0xCB
|
||||
#define DMD_MAIN_PIBETAU 0xCC
|
||||
#define DMD_MAIN_PIBETAL 0xCD
|
||||
#define DMD_MAIN_EQMNSET 0xCE
|
||||
#define DMD_MAIN_EQERR1 0xCF
|
||||
#define DMD_MAIN_EQERR2 0xD0
|
||||
#define DMD_MAIN_RFAGCMON1P 0xD1
|
||||
#define DMD_MAIN_RFAGCMON2P 0xD2
|
||||
#define DMD_MAIN_IFAGCMON1P 0xD3
|
||||
#define DMD_MAIN_IFAGCMON2P 0xD4
|
||||
#define DMD_MAIN_PLOCKSTATE 0xD5
|
||||
#define DMD_MAIN_PIBETAQU 0xD6
|
||||
#define DMD_MAIN_PIBETAQL 0xD7
|
||||
#define DMD_MAIN_PNDETSTATE 0xD8
|
||||
#define DMD_MAIN_CNSETP 0xD9
|
||||
#define DMD_MAIN_CNFLGP 0xDA
|
||||
#define DMD_MAIN_CNMON1P 0xDB
|
||||
#define DMD_MAIN_CNMON2P 0xDC
|
||||
#define DMD_MAIN_CNMON3P 0xDD
|
||||
#define DMD_MAIN_CNMON4P 0xDE
|
||||
#define DMD_MAIN_FECSET 0xDF
|
||||
#define DMD_MAIN_BERDSETP 0xE0
|
||||
#define DMD_MAIN_BERTSET1P 0xE1
|
||||
#define DMD_MAIN_BERTSET2P 0xE2
|
||||
#define DMD_MAIN_BERFLGP 0xE3
|
||||
#define DMD_MAIN_BERMON1P 0xE4
|
||||
#define DMD_MAIN_BERMON2P 0xE5
|
||||
#define DMD_MAIN_BERMON3P 0xE6
|
||||
#define DMD_MAIN_NTCWTH2 0xE7
|
||||
#define DMD_MAIN_PWDSET1 0xE8
|
||||
#define DMD_MAIN_PWDSET2 0xE9
|
||||
#define DMD_MAIN_PSEQOP1 0xEA
|
||||
#define DMD_MAIN_PSEQOP2 0xEB
|
||||
#define DMD_MAIN_PSEQOP3 0xEC
|
||||
#define DMD_MAIN_PSEQOP4 0xED
|
||||
#define DMD_MAIN_PSEQOP5 0xEE
|
||||
#define DMD_MAIN_PSEQOP6 0xEF
|
||||
#define DMD_MAIN_PSEQSET 0xF0
|
||||
#define DMD_MAIN_PSEQPRG 0xF1
|
||||
#define DMD_MAIN_PSEQSEL 0xF2
|
||||
#define DMD_MAIN_PSEQDBG 0xF3
|
||||
#define DMD_MAIN_PSEQOP7 0xF4
|
||||
#define DMD_MAIN_PSEQOP8 0xF5
|
||||
#define DMD_MAIN_PSEQOP9 0xF6
|
||||
#define DMD_MAIN_PSEQOP10 0xF7
|
||||
#define DMD_MAIN_PSEQADRU 0xF8
|
||||
#define DMD_MAIN_PSEQADRL 0xF9
|
||||
#define DMD_MAIN_PSEQDT 0xFA
|
||||
#define DMD_MAIN_TESTSET3 0xFB
|
||||
#define DMD_MAIN_CLKGSET 0xFC
|
||||
#define DMD_MAIN_TPLLSET1 0xFD
|
||||
#define DMD_MAIN_TPLLSET2 0xFE
|
||||
#define DMD_MAIN_RDCHK 0xFF
|
||||
|
||||
|
||||
//For USR
|
||||
#define DMD_USR_INTDEFR 0x9
|
||||
#define DMD_USR_INTDEFF 0xA
|
||||
#define DMD_USR_INTSET 0xB
|
||||
#define DMD_USR_INTCNT 0xC
|
||||
#define DMD_USR_INTCND 0xD
|
||||
#define DMD_USR_I2CSET 0x14
|
||||
#define DMD_USR_CNSET 0x5A
|
||||
#define DMD_USR_CNFLG 0x5B
|
||||
#define DMD_USR_CNMON1 0x5C
|
||||
#define DMD_USR_CNMON2 0x5D
|
||||
#define DMD_USR_CNMON3 0x5E
|
||||
#define DMD_USR_CNMON4 0x5F
|
||||
#define DMD_USR_BERTSET1 0x60
|
||||
#define DMD_USR_BERTSET2 0x61
|
||||
#define DMD_USR_BERPSET1 0x62
|
||||
#define DMD_USR_BERPSET2 0x63
|
||||
#define DMD_USR_BERFLG 0x64
|
||||
#define DMD_USR_BERMON1 0x65
|
||||
#define DMD_USR_BERMON2 0x66
|
||||
#define DMD_USR_BERMON3 0x67
|
||||
#define DMD_USR_RFAGCMON1 0x68
|
||||
#define DMD_USR_RFAGCMON2 0x69
|
||||
#define DMD_USR_IFAGCMON1 0x6A
|
||||
#define DMD_USR_IFAGCMON2 0x6B
|
||||
#define DMD_USR_IMON 0x74
|
||||
#define DMD_USR_QMON 0x79
|
||||
#define DMD_USR_SDCC 0x80
|
||||
#define DMD_USR_VSAGCREFU 0x81
|
||||
#define DMD_USR_VSAGCREFL 0x82
|
||||
#define DMD_USR_QSAGCREFU 0x83
|
||||
#define DMD_USR_QSAGCREFL 0x84
|
||||
#define DMD_USR_SAGCCO 0x85
|
||||
#define DMD_USR_SAGCSET 0x86
|
||||
#define DMD_USR_VPWMSET1 0x87
|
||||
#define DMD_USR_VPWMDAT1 0x88
|
||||
#define DMD_USR_QPWMSET1 0x89
|
||||
#define DMD_USR_QPWMDAT1 0x8A
|
||||
#define DMD_USR_QFECSET1 0x8B
|
||||
#define DMD_USR_QFECSET4 0x8C
|
||||
#define DMD_USR_QFECSET5 0x8D
|
||||
#define DMD_USR_TSCSETV1 0x8E
|
||||
#define DMD_USR_TSCSETQ1 0x8F
|
||||
#define DMD_USR_TSCSET2 0x90
|
||||
#define DMD_USR_TSCSET4 0x91
|
||||
#define DMD_USR_FAD064U 0x92
|
||||
#define DMD_USR_FAD064M 0x93
|
||||
#define DMD_USR_FAD064L 0x94
|
||||
#define DMD_USR_FAD256U 0x95
|
||||
#define DMD_USR_FAD256M 0x96
|
||||
#define DMD_USR_FAD256L 0x97
|
||||
#define DMD_USR_FAD188U 0x98
|
||||
#define DMD_USR_FAD188M 0x99
|
||||
#define DMD_USR_FAD188L 0x9A
|
||||
#define DMD_USR_FAD208U 0x9B
|
||||
#define DMD_USR_FAD208M 0x9C
|
||||
#define DMD_USR_FAD208L 0x9D
|
||||
#define DMD_USR_TESTSET1 0x9E
|
||||
#define DMD_USR_TESTSET2 0x9F
|
||||
#define DMD_USR_AD10SET1 0xA0
|
||||
#define DMD_USR_AD10SET2 0xA1
|
||||
#define DMD_USR_AD10SET3 0xA2
|
||||
#define DMD_USR_AD10SET4 0xA3
|
||||
#define DMD_USR_RDCHK 0xFF
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,195 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_common.h
|
||||
@brief Panasonic Demodulator Driver
|
||||
(private common functions & declarations)
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
#ifndef MN_DMD_COMMON_H
|
||||
#define MN_DMD_COMMON_H
|
||||
|
||||
#include "MN_DMD_driver.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/* DMD Defines */
|
||||
/* **************************************************** */
|
||||
#define DMD_NOT_SUPPORT 0
|
||||
#define DMD_SYSTEM_MAX 15
|
||||
#define DMD_TCB_DATA_MAX 256
|
||||
#define DMD_REGISTER_MAX 2048
|
||||
#define DMD_INFORMATION_MAX 512
|
||||
|
||||
/* **************************************************** */
|
||||
/* Welcome !
|
||||
Pls. add I2C api to control tuner and DMD
|
||||
*/
|
||||
/* **************************************************** */
|
||||
//#define already_add_BE_API
|
||||
//#ifndef already_add_BE_API
|
||||
//#error "pls. search define <pls_add_your_ap> and add your own api , after you add api, pls. open define <already_add_BE_API >"
|
||||
//#endif
|
||||
//#define PC_CONTROL_FE //it's for PC to communicate with FE.
|
||||
// 1-1 SoC communicate with Tuner directly(SDA&SCL) or by Demod(MSDA&MSCL)
|
||||
//#define TUNER_I2C_MODE TUNER_CONTROL_BY_SOC//TUNER_CONTROL_BY_DEMOD //TUNER_CONTROL_BY_SOC
|
||||
|
||||
// 1-2 Tuner I2C control method by Demod
|
||||
//#if(TUNER_I2C_MODE == TUNER_CONTROL_BY_DEMOD)
|
||||
// #define DEMOD_CONTROL_TUNER_I2C_MODE TCB_I2C_FORMAT_REPEAT_MODE //MN88472 only support repeator mode
|
||||
//#endif
|
||||
|
||||
|
||||
|
||||
#define TUNER_TYPE NXP18273
|
||||
|
||||
#ifndef TUNER_TYPE
|
||||
#error "Error : pls. define Tuner type !!"
|
||||
#endif
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/* OPEN ALL debug to do debugging : OPEN IT to know WHY you cannot lock signal*/
|
||||
/* **************************************************** */
|
||||
#define COMMON_DEBUG_ON
|
||||
#ifdef COMMON_DEBUG_ON
|
||||
//#define DMD_DEBUG
|
||||
#endif
|
||||
|
||||
/* **************************************************** */
|
||||
/* for Debug */
|
||||
/* **************************************************** */
|
||||
#ifdef DMD_DEBUG
|
||||
#include "os_task.h"
|
||||
#define DMD_DBG_TRACE(str) do{printf(str);}while(0)
|
||||
#define DMD_CHECK_ERROR( var, msg ) \
|
||||
if( var == DMD_E_ERROR ){ \
|
||||
fprintf( stderr , "ERROR:%s" , msg ) ;}
|
||||
#else
|
||||
#define DMD_DBG_TRACE(str)
|
||||
#define DMD_CHECK_ERROR( var ,msg );
|
||||
#endif
|
||||
|
||||
/* **************************************************** */
|
||||
/* Structure & types */
|
||||
/* **************************************************** */
|
||||
|
||||
/*! DMD Text List */
|
||||
typedef struct
|
||||
{
|
||||
DMD_u32_t size;
|
||||
const DMD_text_t list[32];
|
||||
} DMD_textlist_t;
|
||||
|
||||
/*! ARRAY FLAG */
|
||||
typedef enum {
|
||||
DMD_E_END_OF_ARRAY = 0,
|
||||
DMD_E_ARRAY
|
||||
} DMD_ARRAY_FLAG_t;
|
||||
|
||||
/*! I2C Register Structure */
|
||||
typedef struct {
|
||||
DMD_u8_t slvadr;
|
||||
DMD_u8_t adr;
|
||||
DMD_u8_t data;
|
||||
DMD_ARRAY_FLAG_t flag;
|
||||
} DMD_I2C_Register_t;
|
||||
|
||||
/* **************************************************** */
|
||||
/* I2C useful function */
|
||||
/* **************************************************** */
|
||||
|
||||
extern DMD_u32_t DMD_I2C_MaskWrite(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t mask , DMD_u8_t data );
|
||||
|
||||
/* **************************************************** */
|
||||
/* Functions for Local (not exported) */
|
||||
/* **************************************************** */
|
||||
extern DMD_u32_t DMD_trans_reg( DMD_I2C_Register_t* t);
|
||||
extern DMD_u32_t log10_easy( DMD_u32_t cnr );
|
||||
|
||||
extern DMD_text_t DMD_value_decimal( DMD_u32_t val );
|
||||
extern DMD_text_t DMD_value_hex( DMD_u32_t val );
|
||||
extern DMD_text_t DMD_value_textlist( DMD_textlist_t* list ,DMD_u32_t val );
|
||||
extern DMD_u32_t DMD_get_freq_kHz( DMD_PARAMETER* param );
|
||||
extern DMD_u32_t DMD_ber_int( DMD_u32_t err , DMD_u32_t sum );
|
||||
|
||||
extern DMD_u32_t DMD_calc_SQI( DMD_PARAMETER* param);
|
||||
|
||||
extern DMD_u32_t DMD_send_registers( DMD_u8_t *slaveset , DMD_u8_t* regset );
|
||||
extern DMD_u32_t DMD_read_registers( void );//Troy.wang added, for dumpping register.
|
||||
|
||||
extern DMD_u32_t DMD_ber_int( DMD_u32_t err , DMD_u32_t sum );
|
||||
/* **************************************************** */
|
||||
/* Text List */
|
||||
/* **************************************************** */
|
||||
extern DMD_text_t DMD_info_value_common( DMD_u32_t id , DMD_u32_t val );
|
||||
extern DMD_text_t DMD_info_value_dvbt( DMD_u32_t id , DMD_u32_t val );
|
||||
extern DMD_text_t DMD_info_value_dvbt2( DMD_u32_t id , DMD_u32_t val );
|
||||
extern DMD_text_t DMD_info_value_isdbt( DMD_u32_t id , DMD_u32_t val );
|
||||
extern DMD_text_t DMD_info_value_isdbs( DMD_u32_t id , DMD_u32_t val );
|
||||
extern DMD_text_t DMD_info_value_vq( DMD_u32_t id , DMD_u32_t val );
|
||||
extern DMD_text_t DMD_info_value_dvbc( DMD_u32_t id , DMD_u32_t val );
|
||||
|
||||
|
||||
extern DMD_text_t DMD_INFO_TITLE_COMMON[];
|
||||
extern DMD_text_t DMD_INFO_TITLE_DVBT[];
|
||||
extern DMD_text_t DMD_INFO_TITLE_DVBT2[];
|
||||
extern DMD_text_t DMD_INFO_TITLE_DVBC[];
|
||||
extern DMD_text_t DMD_INFO_TITLE_ISDBT[];
|
||||
extern DMD_text_t DMD_INFO_TITLE_ISDBS[];
|
||||
extern DMD_text_t DMD_INFO_TITLE_ATSC[];
|
||||
extern DMD_text_t DMD_INFO_TITLE_QAM[];
|
||||
|
||||
extern DMD_textlist_t DMD_TEXTLIST_SYSTEM ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_BW ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_YESNO ;
|
||||
|
||||
extern DMD_textlist_t DMD_TEXTLIST_LOCK ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT_STATUS ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ERRORFREE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_HIERARCHY_SEL ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_TPS_ALL ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT_MODE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT_GI ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT_CONST ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT_HIERARCHY ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT_CR ;
|
||||
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBC_STATUS;
|
||||
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_STATUS;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_MODE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_GI ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_TYPE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_PAPR ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_L1_MOD ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_COD ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_FEC_TYPE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_PILOT_PATTERN ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_PLP_MODE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_PLP_TYPE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_PAYLOAD_TYPE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_DVBT2_PLP_MOD ;
|
||||
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ISDBT_MODE ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ISDBT_GI ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ISDBT_SYSTEM ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ISDBT_MAP ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ISDBT_CR ;
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ISDBT_INT ;
|
||||
|
||||
extern DMD_textlist_t DMD_TEXTLIST_ISDBS_MOD ;
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,37 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_common.h
|
||||
@brief Panasonic Demodulator Driver
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
#ifndef MN_DMD_CONSOLE_H
|
||||
#define MN_DMD_CONSOLE_H
|
||||
|
||||
#include "MN_DMD_driver.h"
|
||||
#include "mnfrontend.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
DMD_u32_t DMD_con_get_int(void);
|
||||
DMD_u32_t DMD_con_select_system( DMD_PARAMETER *param );
|
||||
DMD_u32_t DMD_con_select_bw( DMD_PARAMETER *param );
|
||||
DMD_u32_t DMD_con_input_freq( DMD_PARAMETER *param );
|
||||
DMD_u32_t DMD_con_show_status( DMD_PARAMETER *param );
|
||||
DMD_u32_t DMD_con_show_monitor( DMD_PARAMETER *param );
|
||||
DMD_u32_t DMD_con_i2c_test( DMD_PARAMETER *param );
|
||||
DMD_u32_t DMD_con_channel_search( DMD_PARAMETER *param );
|
||||
DMD_u32_t DMD_con_tcb_test( DMD_PARAMETER* param);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,57 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_Device.h
|
||||
@brief Panasonic Demodulator Driver
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
this file defines common interface for each demodulator device
|
||||
*/
|
||||
|
||||
#include "MN_DMD_driver.h"
|
||||
|
||||
#ifndef MN_DMD_DEVICE_H
|
||||
#define MN_DMD_DEVICE_H
|
||||
|
||||
//#ifdef __cplusplus
|
||||
//extern "C" {
|
||||
//#endif
|
||||
|
||||
//return DMD_E_OK , if device support the system & bandwidth
|
||||
|
||||
extern DMD_u32_t DMD_system_support( DMD_SYSTEM_t sys );
|
||||
|
||||
/* **************************************************** */
|
||||
/* Demodulator dependence functions (not exported)*/
|
||||
/* **************************************************** */
|
||||
//these functions is defined by each device (device_name.c)
|
||||
extern DMD_u32_t DMD_device_open( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_term( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_close( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_init( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_load_pseq ( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_pre_tune ( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_post_tune ( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_set_system( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_reset( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_scan( DMD_PARAMETER *param );
|
||||
extern DMD_u32_t DMD_device_get_info( DMD_PARAMETER *param , DMD_u32_t id);
|
||||
extern DMD_u32_t DMD_device_set_info( DMD_PARAMETER *param , DMD_u32_t id ,DMD_u32_t val);
|
||||
extern DMD_u32_t DMD_device_set_TCB_mode( DMD_PARAMETER* param); //troy.wangyx, 20120801
|
||||
extern DMD_u32_t DMD_device_set_echo_enhance(DMD_PARAMETER* param, DMD_ECHO_PERFORMANCE_SET echo_out );//troy.wangyx, 20120801
|
||||
extern DMD_u32_t DMD_device_cochan_interface_detect( DMD_PARAMETER *param );//troy.wangyx, 20120801
|
||||
|
||||
/* '11/08/29 : OKAMOTO Select TS output. */
|
||||
extern DMD_u32_t DMD_set_ts_output(DMD_PARAMETER *param, DMD_TSOUT ts_out);
|
||||
extern DMD_u32_t DMD_set_error_flag_output(DMD_u8_t bErrorFlagOutputEnable );
|
||||
extern DMD_u32_t DMD_RegSet_Rev;
|
||||
|
||||
//#ifdef __cplusplus
|
||||
//}
|
||||
//#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,613 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_Driver.h
|
||||
@brief Panasonic Demodulator Driver
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
#ifndef MN_DMD_DRIVER_H
|
||||
#define MN_DMD_DRIVER_H
|
||||
|
||||
//#ifdef __cplusplus
|
||||
//extern "C" {
|
||||
//#endif
|
||||
|
||||
/* **************************************************** */
|
||||
/* types */
|
||||
/* **************************************************** */
|
||||
|
||||
#include "MN_DMD_types.h"
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/* Defines */
|
||||
/* **************************************************** */
|
||||
#define DMD_INFORMATION_MAX 512
|
||||
#define DMD_INFO_VALUE_MAX 32
|
||||
|
||||
/* DEMOD type setting */
|
||||
//< DEMOD_TYPE >
|
||||
#define DMD_TYPE_MN88471 (1) //same as Chipid
|
||||
#define DMD_TYPE_MN88472 (2) //same as Chipid
|
||||
#define DMD_TYPE_MN88473 (3) //same as Chipid
|
||||
|
||||
//< TUNER_I2C_MODE >
|
||||
#define TUNER_CONTROL_BY_SOC (1)
|
||||
#define TUNER_CONTROL_BY_DEMOD (2)
|
||||
|
||||
|
||||
/* Tuner I2C controlled by Demod, Demod's communication method */
|
||||
//< DEMOD_CONTROL_TUNER_I2C_MODE >
|
||||
#define TCB_I2C_FORMAT_REPEAT_MODE (1)// default, SoC need write bytes to certain register of demod, to communicate with Tuner indirectly
|
||||
#define TCB_I2C_FORMAT_BYPASS_MODE (2)// only valid for MN88473. demod is like door, open or close, when set it open, SoC can communicate with Tuner directly.
|
||||
|
||||
|
||||
/* Tuner type setting */
|
||||
//< TUNER_TYPE>
|
||||
#define MXL603 (1)
|
||||
#define SI2148 (2)
|
||||
#define NMI120 (3)
|
||||
#define NXP18250B (4)
|
||||
#define RDA5880P (5)
|
||||
#define MXL301 (6)
|
||||
#define NXP18273 (7)
|
||||
|
||||
|
||||
/* --- XTAL Freq. of DMD--- [Need adjust DMD register for different XTAL and IF]*/
|
||||
//<XTAL_FREQ>
|
||||
#define DMD_XTAL20480KHZ_IF5MHZ 1
|
||||
#define DMD_XTAL24000KHZ_IF5MHZ 2
|
||||
#define DMD_XTAL20500KHZ_IF5MHZ 3
|
||||
#define DMD_XTAL25000KHZ_IF5MHZ 4 //20131220, added CONFIG for MN88473
|
||||
|
||||
/* **************************************************** */
|
||||
/* DMD Enums */
|
||||
/* **************************************************** */
|
||||
/*! SYSTEM Enum */
|
||||
typedef enum _DMD_SYSTEM_t{
|
||||
DMD_E_ISDBT=0,
|
||||
DMD_E_ISDBS,
|
||||
DMD_E_DVBT,
|
||||
DMD_E_DVBT2,
|
||||
DMD_E_DVBC,
|
||||
DMD_E_DVBC2,
|
||||
DMD_E_ATSC,
|
||||
DMD_E_QAMB_64QAM,
|
||||
DMD_E_QAMB_256QAM,
|
||||
DMD_E_QAMC_64QAM,
|
||||
DMD_E_QAMC_256QAM,
|
||||
DMD_E_ISDBT_BRAZIL,
|
||||
DMD_E_ANALOG,
|
||||
DMD_E_NTSC_M_BTSC,
|
||||
DMD_E_PAL_M_BTSC,
|
||||
DMD_E_PAL_N_BTSC,
|
||||
DMD_E_PAL_B_G_NICAM,
|
||||
DMD_E_PAL_I_NiCAM,
|
||||
DMD_E_PAL_D_NiCAM,
|
||||
DMD_E_PAL_B_G_A2,
|
||||
DMD_E_SECAM_L_NiCAM,
|
||||
DMD_E_SECAM_L1_NiCAM,
|
||||
DMD_E_SECAM_D_K_A2,
|
||||
DMD_E_SECAM_BG_NICAM,
|
||||
DMD_E_END_OF_SYSTEM,
|
||||
DMD_E_NOT_DEFINED
|
||||
} DMD_SYSTEM_t;
|
||||
|
||||
/* RF Frequency Unit */
|
||||
typedef enum _DMD_FREQ_UNIT_t
|
||||
{
|
||||
DMD_E_MHZ,
|
||||
DMD_E_KHZ,
|
||||
DMD_E_HZ
|
||||
} DMD_FREQ_UNIT_t;
|
||||
|
||||
/*! Lock Status */
|
||||
typedef enum _DMD_LOCK_STATUS_t{
|
||||
DMD_E_LOCKED = 0,
|
||||
DMD_E_LOCK_NOSIGNAL,
|
||||
DMD_E_LOCK_NOSYNC,
|
||||
DMD_E_LOCK_ERROR
|
||||
} DMD_LOCK_STATUS_t;
|
||||
|
||||
/*! Return Value for API Functions */
|
||||
typedef enum _DMD_ERROR_t{
|
||||
DMD_E_OK = 0,
|
||||
DMD_E_ERROR = 1
|
||||
} DMD_ERROR_t;
|
||||
|
||||
/*! BAND WIDTH */
|
||||
typedef enum _DMD_BANDWIDTH_t{
|
||||
DMD_E_BW_NOT_SPECIFIED,
|
||||
DMD_E_BW_6MHZ,
|
||||
DMD_E_BW_7MHZ,
|
||||
DMD_E_BW_8MHZ,
|
||||
DMD_E_BW_5MHZ,
|
||||
DMD_E_BW_1_7MHZ,
|
||||
DMD_E_BW_END_OF_BW
|
||||
} DMD_BANDWIDTH_t;
|
||||
|
||||
|
||||
/* '11/08/29 : OKAMOTO Select TS output. */
|
||||
typedef enum _DMD_TSOUT{
|
||||
DMD_E_TSOUT_PARALLEL_FIXED_CLOCK = 0,
|
||||
//DMD_E_TSOUT_PARALLEL_VARIABLE_CLOCK,
|
||||
DMD_E_TSOUT_SERIAL_VARIABLE_CLOCK
|
||||
} DMD_TSOUT;
|
||||
|
||||
typedef enum _DMD_ECHO_PERFORMANCE_SET{
|
||||
DMD_E_ENHANCE_MINUS_ECHO_DELAY_DEFAULT = 0, //field test pass result
|
||||
DMD_E_ENHANCE_MINUS_ECHO_DELAY_NO_SIDEEFFECT, //Lab test. enhance MINUS echo dalay performance, no side effect
|
||||
DMD_E_ENHANCE_MINUS_ECHO_DELAY_HAS_SIDEEFFECT //Lab test. enhance MINUS echo dalay performance, has side effect on CCI(NTSC interface)
|
||||
} DMD_ECHO_PERFORMANCE_SET;
|
||||
|
||||
/* **************************************************** */
|
||||
/* DMD Structures */
|
||||
/* **************************************************** */
|
||||
/*! DMD Parameter Sturcture */
|
||||
#if 0
|
||||
|
||||
DMD_PARAMETER{
|
||||
DMD_u32_t devid; //!<DeviceID
|
||||
DMD_SYSTEM_t system; //!<Broadcast System
|
||||
DMD_u32_t freq; //!<RF Frequency
|
||||
DMD_FREQ_UNIT_t funit; //!<RF Frequency unit
|
||||
DMD_BANDWIDTH_t bw; //!<Band width
|
||||
DMD_u32_t ddradr; //!<DDR memory address
|
||||
DMD_u32_t info[DMD_INFORMATION_MAX]; //!<Demodulator Information
|
||||
/* '11/08/29 : OKAMOTO Select TS output. */
|
||||
DMD_TSOUT ts_out;
|
||||
DMD_ECHO_PERFORMANCE_SET echo_set; //troy.wangyx, 120801, to enhance "Single static echo MINUS delay"'s performance,
|
||||
} ;
|
||||
#endif
|
||||
|
||||
|
||||
typedef struct {
|
||||
DMD_u32_t devid; //!<DeviceID
|
||||
DMD_SYSTEM_t system; //!<Broadcast System
|
||||
DMD_u32_t freq; //!<RF Frequency
|
||||
DMD_FREQ_UNIT_t funit; //!<RF Frequency unit
|
||||
DMD_BANDWIDTH_t bw; //!<Band width
|
||||
DMD_u32_t ddradr; //!<DDR memory address
|
||||
DMD_u32_t info[DMD_INFORMATION_MAX]; //!<Demodulator Information
|
||||
/* '11/08/29 : OKAMOTO Select TS output. */
|
||||
DMD_TSOUT ts_out;
|
||||
DMD_ECHO_PERFORMANCE_SET echo_set; //troy.wangyx, 120801, to enhance "Single static echo MINUS delay"'s performance,
|
||||
} DMD_PARAMETER;
|
||||
|
||||
/* **************************************************** */
|
||||
/* Public Functions */
|
||||
/* **************************************************** */
|
||||
/* API&LSI control Functions */
|
||||
/* these function is defined by MN_DMD_Driver.c */
|
||||
extern DMD_u32_t DMD_open ( DMD_PARAMETER* param);
|
||||
extern DMD_u32_t DMD_set_devid ( DMD_PARAMETER* param , DMD_u32_t id);
|
||||
//extern DMD_u32_t DMD_init ( DMD_u32_t freq);
|
||||
DMD_u32_t DMD_init ( DMD_u32_t freq);
|
||||
|
||||
extern DMD_u32_t DMD_set_system ( DMD_PARAMETER* param );
|
||||
extern DMD_u32_t DMD_tune ( DMD_PARAMETER* param);
|
||||
extern DMD_u32_t DMD_scan ( DMD_PARAMETER* param);
|
||||
extern DMD_u32_t DMD_reset ( DMD_PARAMETER* param);
|
||||
extern DMD_u32_t DMD_term ( DMD_PARAMETER* param);
|
||||
extern DMD_u32_t DMD_get_info ( DMD_PARAMETER* param , DMD_u32_t id );
|
||||
extern DMD_u32_t DMD_set_info ( DMD_PARAMETER* param , DMD_u32_t id , DMD_u32_t val);
|
||||
extern DMD_u32_t DMD_close ( DMD_PARAMETER* param);
|
||||
|
||||
/* Floating Functions */
|
||||
// To use , define DMD_FLOATING_FUNCTION
|
||||
extern DMD_float_t DMD_get_ber(void);
|
||||
extern DMD_float_t DMD_get_per(void);
|
||||
extern DMD_float_t DMD_get_cnr(void);
|
||||
//extern DMD_u32_t DMD_get_lock(void);
|
||||
DMD_u32_t DMD_get_lock(void);
|
||||
|
||||
/* Get Infomation String */
|
||||
extern DMD_text_t DMD_info_title( DMD_SYSTEM_t sys , DMD_u32_t info_id );
|
||||
extern DMD_text_t DMD_info_value( DMD_SYSTEM_t sys , DMD_u32_t info_id , DMD_u32_t value);
|
||||
extern DMD_text_t DMD_value_text( DMD_PARAMETER* param , DMD_u32_t id );
|
||||
|
||||
/* **************************************************** */
|
||||
/* DMD Information */
|
||||
/* **************************************************** */
|
||||
/*! common information enum */
|
||||
typedef enum _DMD_INFO_t{ DMD_E_INFO_ALL =0 ,
|
||||
DMD_E_INFO_REGREV =1 ,
|
||||
DMD_E_INFO_PSEQREV =2 ,
|
||||
DMD_E_INFO_SYSTEM =3 ,
|
||||
DMD_E_INFO_LOCK =4 ,
|
||||
DMD_E_INFO_AGC =5 ,
|
||||
DMD_E_INFO_BERRNUM =6 ,
|
||||
DMD_E_INFO_BITNUM =7 ,
|
||||
DMD_E_INFO_CNR_INT =8 ,
|
||||
DMD_E_INFO_CNR_DEC =9 ,
|
||||
DMD_E_INFO_PERRNUM =10 ,
|
||||
DMD_E_INFO_PACKETNUM =11 ,
|
||||
DMD_E_INFO_STATUS =12 ,
|
||||
DMD_E_INFO_ERRORFREE = 13,
|
||||
DMD_E_INFO_COMMON_END_OF_INFORMATION
|
||||
}DMD_INFO_t;
|
||||
/*! DVBT information enum */
|
||||
typedef enum _DMD_INFO_DVBT_t{ DMD_E_INFO_DVBT_ALL =0 ,
|
||||
DMD_E_INFO_DVBT_REGREV =1 ,
|
||||
DMD_E_INFO_DVBT_PSEQRV =2 ,
|
||||
DMD_E_INFO_DVBT_SYSTEM =3 ,
|
||||
DMD_E_INFO_DVBT_LOCK =4 ,
|
||||
DMD_E_INFO_DVBT_AGC =5 ,
|
||||
DMD_E_INFO_DVBT_BERRNUM =6 ,
|
||||
DMD_E_INFO_DVBT_BITNUM =7 ,
|
||||
DMD_E_INFO_DVBT_CNR_INT =8 ,
|
||||
DMD_E_INFO_DVBT_CNR_DEC =9 ,
|
||||
DMD_E_INFO_DVBT_PERRNUM =10 ,
|
||||
DMD_E_INFO_DVBT_PACKETNUM =11 ,
|
||||
DMD_E_INFO_DVBT_STATUS = 12,
|
||||
DMD_E_INFO_DVBT_ERRORFREE ,
|
||||
DMD_E_INFO_DVBT_SQI ,
|
||||
DMD_E_INFO_DVBT_HIERARCHY_SELECT ,
|
||||
DMD_E_INFO_DVBT_TPS_ALL ,
|
||||
DMD_E_INFO_DVBT_MODE ,
|
||||
DMD_E_INFO_DVBT_GI ,
|
||||
DMD_E_INFO_DVBT_LENGTH_INDICATOR ,
|
||||
DMD_E_INFO_DVBT_CONSTELLATION ,
|
||||
DMD_E_INFO_DVBT_HIERARCHY ,
|
||||
DMD_E_INFO_DVBT_HP_CODERATE ,
|
||||
DMD_E_INFO_DVBT_LP_CODERATE ,
|
||||
DMD_E_INFO_DVBT_CELLID ,
|
||||
DMD_E_INFO_DVBT_END_OF_INFORMATION
|
||||
} DMD_INFO_DVBT_t;
|
||||
/*! DVBT2 information enum */
|
||||
typedef enum _DMD_INFO_DVBT2_t{ DMD_E_INFO_DVBT2_ALL =0 ,
|
||||
DMD_E_INFO_DVBT2_REGREV =1 ,
|
||||
DMD_E_INFO_DVBT2_PSEQRV =2 ,
|
||||
DMD_E_INFO_DVBT2_SYSTEM =3 ,
|
||||
DMD_E_INFO_DVBT2_LOCK =4 ,
|
||||
DMD_E_INFO_DVBT2_AGC =5 ,
|
||||
DMD_E_INFO_DVBT2_BERRNUM =6 ,
|
||||
DMD_E_INFO_DVBT2_BITNUM =7 ,
|
||||
DMD_E_INFO_DVBT2_CNR_INT =8 ,
|
||||
DMD_E_INFO_DVBT2_CNR_DEC =9 ,
|
||||
DMD_E_INFO_DVBT2_PERRNUM =10 ,
|
||||
DMD_E_INFO_DVBT2_PACKETNUM =11 ,
|
||||
DMD_E_INFO_DVBT2_STATUS =12,
|
||||
DMD_E_INFO_DVBT2_ERRORFREE,
|
||||
DMD_E_INFO_DVBT2_SQI,
|
||||
DMD_E_INFO_DVBT2_MODE,
|
||||
DMD_E_INFO_DVBT2_GI,
|
||||
DMD_E_INFO_DVBT2_BERRNUM_C,
|
||||
DMD_E_INFO_DVBT2_BITNUM_C,
|
||||
DMD_E_INFO_DVBT2_SELECTED_PLP,
|
||||
DMD_E_INFO_DVBT2_L1_ALL,
|
||||
DMD_E_INFO_DVBT2_TYPE,
|
||||
DMD_E_INFO_DVBT2_BW_EXT,
|
||||
DMD_E_INFO_DVBT2_S1,
|
||||
DMD_E_INFO_DVBT2_S2,
|
||||
DMD_E_INFO_DVBT2_PAPR,
|
||||
DMD_E_INFO_DVBT2_L1_MOD,
|
||||
DMD_E_INFO_DVBT2_L1_COD,
|
||||
DMD_E_INFO_DVBT2_L1_FEC_TYPE,
|
||||
DMD_E_INFO_DVBT2_L1_POST_SIZE,
|
||||
DMD_E_INFO_DVBT2_L1_POST_INFO_SIZE,
|
||||
DMD_E_INFO_DVBT2_PILOT_PATTERN,
|
||||
DMD_E_INFO_DVBT2_TX_ID_AVAILABILITY,
|
||||
DMD_E_INFO_DVBT2_CELL_ID,
|
||||
DMD_E_INFO_DVBT2_NETWORK_ID,
|
||||
DMD_E_INFO_DVBT2_T2_SYSTEM_ID,
|
||||
DMD_E_INFO_DVBT2_NUM_T2_FRAMES,
|
||||
DMD_E_INFO_DVBT2_NUM_DATA_SYMBOLS,
|
||||
DMD_E_INFO_DVBT2_REGEN_FLAG,
|
||||
DMD_E_INFO_DVBT2_L1_POST_EXTENSION,
|
||||
DMD_E_INFO_DVBT2_NUM_RF,
|
||||
DMD_E_INFO_DVBT2_CURRENT_RF_IDX,
|
||||
DMD_E_INFO_DVBT2_SUB_SLICES_PER_FRAME,
|
||||
DMD_E_INFO_DVBT2_SUB_SLICE_INTERVAL,
|
||||
DMD_E_INFO_DVBT2_NUM_PLP,
|
||||
DMD_E_INFO_DVBT2_NUM_AUX,
|
||||
DMD_E_INFO_DVBT2_PLP_MODE,
|
||||
DMD_E_INFO_DVBT2_FEF_TYPE,
|
||||
DMD_E_INFO_DVBT2_FEF_LENGTH,
|
||||
DMD_E_INFO_DVBT2_FEF_INTERVAL,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_ID,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_TYPE,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_PAYLOAD_TYPE,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_GROUP_ID,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_COD,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_MOD,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_ROTATION,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_FEC_TYPE,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_NUM_BLOCKS_MAX,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_FRAME_INTEVAL,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_TIME_IL_LENGTH,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_TIME_IL_TYPE,
|
||||
DMD_E_INFO_DVBT2_DAT_FF_FLAG,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_ID,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_TYPE,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_PAYLOAD_TYPE,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_GROUP_ID,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_COD,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_MOD,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_ROTATION,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_FEC_TYPE,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_NUM_BLOCKS_MAX,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_FRAME_INTEVAL,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_TIME_IL_LENGTH,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_TIME_IL_TYPE,
|
||||
DMD_E_INFO_DVBT2_COM_FF_FLAG,
|
||||
DMD_E_INFO_DVBT2_FRAME_IDX,
|
||||
DMD_E_INFO_DVBT2_TYPE_2_START,
|
||||
DMD_E_INFO_DVBT2_L1_CHANGE_COUNTER,
|
||||
DMD_E_INFO_DVBT2_START_RF_IDX,
|
||||
DMD_E_INFO_DVBT2_DAT_FIRST_RF_IDX,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_START,
|
||||
DMD_E_INFO_DVBT2_DAT_PLP_NUM_BLOCKS,
|
||||
DMD_E_INFO_DVBT2_COM_FIRST_RF_IDX,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_START,
|
||||
DMD_E_INFO_DVBT2_COM_PLP_NUM_BLOCKS,
|
||||
DMD_E_INFO_DVBT2_STATIC_FLAG,
|
||||
DMD_E_INFO_DVBT2_STATIC_PADDING_FLAG,
|
||||
DMD_E_INFO_DVBT2_IN_BAND_A_FLAG,
|
||||
DMD_E_INFO_DVBT2_IN_BAND_B_FLAG,
|
||||
DMD_E_INFO_DVBT2_END_OF_INFORMATION
|
||||
} DMD_INFO_DVBT2_t;
|
||||
/*! DVBC information enum */
|
||||
typedef enum { DMD_E_INFO_DVBC_ALL =0 ,
|
||||
DMD_E_INFO_DVBC_REGREV =1 ,
|
||||
DMD_E_INFO_DVBC_PSEQRV =2 ,
|
||||
DMD_E_INFO_DVBC_SYSTEM =3 ,
|
||||
DMD_E_INFO_DVBC_LOCK =4 ,
|
||||
DMD_E_INFO_DVBC_AGC =5 ,
|
||||
DMD_E_INFO_DVBC_BERRNUM =6 ,
|
||||
DMD_E_INFO_DVBC_BITNUM =7 ,
|
||||
DMD_E_INFO_DVBC_CNR_INT =8 ,
|
||||
DMD_E_INFO_DVBC_CNR_DEC =9 ,
|
||||
DMD_E_INFO_DVBC_PERRNUM =10 ,
|
||||
DMD_E_INFO_DVBC_PACKETNUM =11 ,
|
||||
DMD_E_INFO_DVBC_STATUS =12 ,
|
||||
DMD_E_INFO_DVBC_ERRORFREE = 13,
|
||||
DMD_E_INFO_DVBC_END_OF_INFORMATION
|
||||
} DMD_INFO_DVBC_t;
|
||||
/*! ISDBT information enum */
|
||||
typedef enum { DMD_E_INFO_ISDBT_ALL =0 ,
|
||||
DMD_E_INFO_ISDBT_REGREV =1 ,
|
||||
DMD_E_INFO_ISDBT_PSEQRV =2 ,
|
||||
DMD_E_INFO_ISDBT_SYSTEM =3 ,
|
||||
DMD_E_INFO_ISDBT_LOCK =4 ,
|
||||
DMD_E_INFO_ISDBT_AGC =5 ,
|
||||
DMD_E_INFO_ISDBT_BERRNUM =6 ,
|
||||
DMD_E_INFO_ISDBT_BITNUM =7 ,
|
||||
DMD_E_INFO_ISDBT_CNR_INT =8 ,
|
||||
DMD_E_INFO_ISDBT_CNR_DEC =9 ,
|
||||
DMD_E_INFO_ISDBT_PERRNUM =10 ,
|
||||
DMD_E_INFO_ISDBT_PACKETNUM =11 ,
|
||||
DMD_E_INFO_ISDBT_STATUS =12 ,
|
||||
DMD_E_INFO_ISDBT_ERRORFREE = 13,
|
||||
DMD_E_INFO_ISDBT_BERRNUM_A ,
|
||||
DMD_E_INFO_ISDBT_BITNUM_A ,
|
||||
DMD_E_INFO_ISDBT_BERRNUM_B ,
|
||||
DMD_E_INFO_ISDBT_BITNUM_B ,
|
||||
DMD_E_INFO_ISDBT_BERRNUM_C ,
|
||||
DMD_E_INFO_ISDBT_BITNUM_C ,
|
||||
DMD_E_INFO_ISDBT_ERRORFREE_A ,
|
||||
DMD_E_INFO_ISDBT_ERRORFREE_B ,
|
||||
DMD_E_INFO_ISDBT_ERRORFREE_C ,
|
||||
DMD_E_INFO_ISDBT_MODE ,
|
||||
DMD_E_INFO_ISDBT_GI ,
|
||||
DMD_E_INFO_ISDBT_SYS_TMCC ,
|
||||
DMD_E_INFO_ISDBT_COUNTDOWN ,
|
||||
DMD_E_INFO_ISDBT_EMGFLG ,
|
||||
DMD_E_INFO_ISDBT_PART ,
|
||||
DMD_E_INFO_ISDBT_MAPA ,
|
||||
DMD_E_INFO_ISDBT_CRA ,
|
||||
DMD_E_INFO_ISDBT_INTA ,
|
||||
DMD_E_INFO_ISDBT_SEGA ,
|
||||
DMD_E_INFO_ISDBT_MAPB ,
|
||||
DMD_E_INFO_ISDBT_CRB ,
|
||||
DMD_E_INFO_ISDBT_INTB ,
|
||||
DMD_E_INFO_ISDBT_SEGB ,
|
||||
DMD_E_INFO_ISDBT_MAPC ,
|
||||
DMD_E_INFO_ISDBT_CRC ,
|
||||
DMD_E_INFO_ISDBT_INTC ,
|
||||
DMD_E_INFO_ISDBT_SEGC ,
|
||||
DMD_E_INFO_ISDBT_PHCOR ,
|
||||
DMD_E_INFO_ISDBT_END_OF_INFORMATION
|
||||
} DMD_INFO_ISDBT_t;
|
||||
/*! ISDBS information enum */
|
||||
typedef enum { DMD_E_INFO_ISDBS_ALL =0 ,
|
||||
DMD_E_INFO_ISDBS_REGREV =1 ,
|
||||
DMD_E_INFO_ISDBS_PSEQRV =2 ,
|
||||
DMD_E_INFO_ISDBS_SYSTEM =3 ,
|
||||
DMD_E_INFO_ISDBS_LOCK =4 ,
|
||||
DMD_E_INFO_ISDBS_AGC =5 ,
|
||||
DMD_E_INFO_ISDBS_BERRNUM =6 ,
|
||||
DMD_E_INFO_ISDBS_BITNUM =7 ,
|
||||
DMD_E_INFO_ISDBS_CNR_INT =8 ,
|
||||
DMD_E_INFO_ISDBS_CNR_DEC =9 ,
|
||||
DMD_E_INFO_ISDBS_PERRNUM =10 ,
|
||||
DMD_E_INFO_ISDBS_PACKETNUM =11 ,
|
||||
DMD_E_INFO_ISDBS_STATUS =12 ,
|
||||
DMD_E_INFO_ISDBS_ERRORFREE = 13,
|
||||
DMD_E_INFO_ISDBS_BERRNUM_1 ,
|
||||
DMD_E_INFO_ISDBS_BITNUM_1 ,
|
||||
DMD_E_INFO_ISDBS_BERRNUM_2 ,
|
||||
DMD_E_INFO_ISDBS_BITNUM_2 ,
|
||||
DMD_E_INFO_ISDBS_BERRNUM_3 ,
|
||||
DMD_E_INFO_ISDBS_BITNUM_3 ,
|
||||
DMD_E_INFO_ISDBS_ERRORFREE_0 ,
|
||||
DMD_E_INFO_ISDBS_ERRORFREE_1 ,
|
||||
DMD_E_INFO_ISDBS_ERRORFREE_2 ,
|
||||
DMD_E_INFO_ISDBS_ERRORFREE_3 ,
|
||||
DMD_E_INFO_ISDBS_ERRORFREE_T ,
|
||||
DMD_E_INFO_ISDBS_TSNO ,
|
||||
DMD_E_INFO_ISDBS_TSID ,
|
||||
DMD_E_INFO_ISDBS_MOD ,
|
||||
DMD_E_INFO_ISDBS_EMGSW ,
|
||||
DMD_E_INFO_ISDBS_UPLINK ,
|
||||
DMD_E_INFO_ISDBS_EXON ,
|
||||
DMD_E_INFO_ISDBS_CHANGE ,
|
||||
DMD_E_INFO_ISDBS_MOD0 ,
|
||||
DMD_E_INFO_ISDBS_SLOT0 ,
|
||||
DMD_E_INFO_ISDBS_MOD1 ,
|
||||
DMD_E_INFO_ISDBS_SLOT1 ,
|
||||
DMD_E_INFO_ISDBS_MOD2 ,
|
||||
DMD_E_INFO_ISDBS_SLOT2 ,
|
||||
DMD_E_INFO_ISDBS_MOD3 ,
|
||||
DMD_E_INFO_ISDBS_SLOT3 ,
|
||||
DMD_E_INFO_ISDBS_TSID0 ,
|
||||
DMD_E_INFO_ISDBS_TSID1 ,
|
||||
DMD_E_INFO_ISDBS_TSID2 ,
|
||||
DMD_E_INFO_ISDBS_TSID3 ,
|
||||
DMD_E_INFO_ISDBS_TSID4 ,
|
||||
DMD_E_INFO_ISDBS_TSID5 ,
|
||||
DMD_E_INFO_ISDBS_TSID6 ,
|
||||
DMD_E_INFO_ISDBS_TSID7 ,
|
||||
DMD_E_INFO_ISDBS_TSNO01 ,
|
||||
DMD_E_INFO_ISDBS_TSNO02 ,
|
||||
DMD_E_INFO_ISDBS_TSNO03 ,
|
||||
DMD_E_INFO_ISDBS_TSNO04 ,
|
||||
DMD_E_INFO_ISDBS_TSNO05 ,
|
||||
DMD_E_INFO_ISDBS_TSNO06 ,
|
||||
DMD_E_INFO_ISDBS_TSNO07 ,
|
||||
DMD_E_INFO_ISDBS_TSNO08 ,
|
||||
DMD_E_INFO_ISDBS_TSNO09 ,
|
||||
DMD_E_INFO_ISDBS_TSNO10 ,
|
||||
DMD_E_INFO_ISDBS_TSNO11 ,
|
||||
DMD_E_INFO_ISDBS_TSNO12 ,
|
||||
DMD_E_INFO_ISDBS_TSNO13 ,
|
||||
DMD_E_INFO_ISDBS_TSNO14 ,
|
||||
DMD_E_INFO_ISDBS_TSNO15 ,
|
||||
DMD_E_INFO_ISDBS_TSNO16 ,
|
||||
DMD_E_INFO_ISDBS_TSNO17 ,
|
||||
DMD_E_INFO_ISDBS_TSNO18 ,
|
||||
DMD_E_INFO_ISDBS_TSNO19 ,
|
||||
DMD_E_INFO_ISDBS_TSNO20 ,
|
||||
DMD_E_INFO_ISDBS_TSNO21 ,
|
||||
DMD_E_INFO_ISDBS_TSNO22 ,
|
||||
DMD_E_INFO_ISDBS_TSNO23 ,
|
||||
DMD_E_INFO_ISDBS_TSNO24 ,
|
||||
DMD_E_INFO_ISDBS_TSNO25 ,
|
||||
DMD_E_INFO_ISDBS_TSNO26 ,
|
||||
DMD_E_INFO_ISDBS_TSNO27 ,
|
||||
DMD_E_INFO_ISDBS_TSNO28 ,
|
||||
DMD_E_INFO_ISDBS_TSNO29 ,
|
||||
DMD_E_INFO_ISDBS_TSNO30 ,
|
||||
DMD_E_INFO_ISDBS_TSNO31 ,
|
||||
DMD_E_INFO_ISDBS_TSNO32 ,
|
||||
DMD_E_INFO_ISDBS_TSNO33 ,
|
||||
DMD_E_INFO_ISDBS_TSNO34 ,
|
||||
DMD_E_INFO_ISDBS_TSNO35 ,
|
||||
DMD_E_INFO_ISDBS_TSNO36 ,
|
||||
DMD_E_INFO_ISDBS_TSNO37 ,
|
||||
DMD_E_INFO_ISDBS_TSNO38 ,
|
||||
DMD_E_INFO_ISDBS_TSNO39 ,
|
||||
DMD_E_INFO_ISDBS_TSNO40 ,
|
||||
DMD_E_INFO_ISDBS_TSNO41 ,
|
||||
DMD_E_INFO_ISDBS_TSNO42 ,
|
||||
DMD_E_INFO_ISDBS_TSNO43 ,
|
||||
DMD_E_INFO_ISDBS_TSNO44 ,
|
||||
DMD_E_INFO_ISDBS_TSNO45 ,
|
||||
DMD_E_INFO_ISDBS_TSNO46 ,
|
||||
DMD_E_INFO_ISDBS_TSNO47 ,
|
||||
DMD_E_INFO_ISDBS_TSNO48 ,
|
||||
DMD_E_INFO_ISDBS_END_OF_INFORMATION
|
||||
} DMD_INFO_ISDBS_t;
|
||||
|
||||
/*! ATSC information enum */
|
||||
typedef enum { DMD_E_INFO_ATSC_ALL =0 ,
|
||||
DMD_E_INFO_ATSC_REGREV =1 ,
|
||||
DMD_E_INFO_ATSC_PSEQRV =2 ,
|
||||
DMD_E_INFO_ATSC_SYSTEM =3 ,
|
||||
DMD_E_INFO_ATSC_LOCK =4 ,
|
||||
DMD_E_INFO_ATSC_AGC =5 ,
|
||||
DMD_E_INFO_ATSC_BERRNUM =6 ,
|
||||
DMD_E_INFO_ATSC_BITNUM =7 ,
|
||||
DMD_E_INFO_ATSC_CNR_INT =8 ,
|
||||
DMD_E_INFO_ATSC_CNR_DEC =9 ,
|
||||
DMD_E_INFO_ATSC_PERRNUM =10 ,
|
||||
DMD_E_INFO_ATSC_PACKETNUM =11 ,
|
||||
DMD_E_INFO_ATSC_STATUS =12 ,
|
||||
DMD_E_INFO_ATSC_ERRORFREE = 13,
|
||||
DMD_E_INFO_ATSC_END_OF_INFORMATION
|
||||
} DMD_INFO_ATSC_t;
|
||||
/*! QAM information enum */
|
||||
typedef enum { DMD_E_INFO_QAM_ALL =0 ,
|
||||
DMD_E_INFO_QAM_REGREV =1 ,
|
||||
DMD_E_INFO_QAM_PSEQRV =2 ,
|
||||
DMD_E_INFO_QAM_SYSTEM =3 ,
|
||||
DMD_E_INFO_QAM_LOCK =4 ,
|
||||
DMD_E_INFO_QAM_AGC =5 ,
|
||||
DMD_E_INFO_QAM_BERRNUM =6 ,
|
||||
DMD_E_INFO_QAM_BITNUM =7 ,
|
||||
DMD_E_INFO_QAM_CNR_INT =8 ,
|
||||
DMD_E_INFO_QAM_CNR_DEC =9 ,
|
||||
DMD_E_INFO_QAM_PERRNUM =10 ,
|
||||
DMD_E_INFO_QAM_PACKETNUM =11 ,
|
||||
DMD_E_INFO_QAM_STATUS =12 ,
|
||||
DMD_E_INFO_QAM_ERRORFREE = 13,
|
||||
DMD_E_INFO_QAM_END_OF_INFORMATION
|
||||
} DMD_INFO_QAM_t;
|
||||
/*! ANALOG information enum */
|
||||
typedef enum { DMD_E_INFO_ANALOG_ALL =0 ,
|
||||
DMD_E_INFO_ANALOG_REGREV =1 ,
|
||||
DMD_E_INFO_ANALOG_PSEQRV =2 ,
|
||||
DMD_E_INFO_ANALOG_SYSTEM =3 ,
|
||||
DMD_E_INFO_ANALOG_LOCK =4 ,
|
||||
DMD_E_INFO_ANALOG_AGC =5 ,
|
||||
DMD_E_INFO_ANALOG_BERRNUM =6 ,
|
||||
DMD_E_INFO_ANALOG_BITNUM =7 ,
|
||||
DMD_E_INFO_ANALOG_CNR_INT =8 ,
|
||||
DMD_E_INFO_ANALOG_CNR_DEC =9 ,
|
||||
DMD_E_INFO_ANALOG_PERRNUM =10 ,
|
||||
DMD_E_INFO_ANALOG_PACKETNUM =11 ,
|
||||
DMD_E_INFO_ANALOG_STATUS =12 ,
|
||||
DMD_E_INFO_ANALOG_ERRORFREE = 13,
|
||||
DMD_E_INFO_ANALOG_END_OF_INFORMATION
|
||||
} DMD_INFO_ANALOG_t;
|
||||
|
||||
/*! enumulator for DVBT/DVBT2 information */
|
||||
//common
|
||||
typedef enum{ DMD_E_ERRORFREE_ERROR=0, DMD_E_ERRORFREE_ERRORFREE } DMD_ERRORFREE_t;
|
||||
//DVBT
|
||||
typedef enum{ DMD_E_DVBT_HIER_SEL_LP=0, DMD_E_DVBT_HIER_SEL_HP } DMD_DVBT_HIER_SEL_t;
|
||||
typedef enum{ DMD_E_DVBT_TPS_OBTAIN_NG=0, DMD_E_DVBT_TPS_OBTAIN_OK } DMD_DVBT_TPS_OBTAIN_t;
|
||||
typedef enum{ DMD_E_DVBT_MODE_2K=0, DMD_E_DVBT_MODE_8K, DMD_E_DVBT_MODE_4K , DMD_E_DVBT_MODE_NOT_DEFINED } DMD_DVBT_MODE_t;
|
||||
typedef enum{ DMD_E_DVBT_GI_1_32=0, DMD_E_DVBT_GI_1_16, DMD_E_DVBT_GI_1_8, DMD_E_DVBT_GI_1_4 , DMD_E_DVBT_GI_NOT_DEFINED } DMD_DVBT_GI_t;
|
||||
typedef enum{ DMD_E_DVBT_CONST_QPSK=0, DMD_E_DVBT_CONST_16QAM, DMD_E_DVBT_CONST_64QAM } DMD_DVBT_CONST_t;
|
||||
typedef enum{ DMD_E_DVBT_HIERARCHY_NO=0, DMD_E_DVBT_HIERARCHY_ALPHA_1, DMD_E_DVBT_HIERARCHY_ALPHA_2, DMD_E_DVBT_HIERARCHY_ALPHA_4 } DMD_DVBT_HIERARCHY_t;
|
||||
typedef enum{ DMD_E_DVBT_CR_1_2=0, DMD_E_DVBT_CR_2_3, DMD_E_DVBT_CR_3_4, DMD_E_DVBT_CR_5_6, DMD_E_DVBT_CR_7_8 } DMD_DVBT_CR_t;
|
||||
//DVBT2
|
||||
typedef enum{ DMD_E_DVBT2_MODE_1K=0, DMD_E_DVBT2_MODE_2K, DMD_E_DVBT2_MODE_4K, DMD_E_DVBT2_MODE_8K, DMD_E_DVBT2_MODE_16K, DMD_E_DVBT2_MODE_32K } DMD_DVBT2_MODE_t;
|
||||
typedef enum{ DMD_E_DVBT2_GI_1_32=0, DMD_E_DVBT2_GI_1_16, DMD_E_DVBT2_GI_1_8, DMD_E_DVBT2_GI_1_4, DMD_E_DVBT2_GI_1_128, DMD_E_DVBT2_GI_19_128, DMD_E_DVBT2_GI_19_256, } DMD_DVBT2_GI_t;
|
||||
typedef enum{ DMD_E_DVBT2_TYPE_TS=0, DMD_E_DVBT2_TYPE_GS, DMD_E_DVBT2_TYPE_TS_GS } DMD_DVBT2_TYPE_t;
|
||||
typedef enum{ DMD_E_DVBT2_PAPR_NO=0, DMD_E_DVBT2_PAPR_ACE, DMD_E_DVBT2_PAPR_TR, DMD_E_DVBT2_PAPR_ACE_TR } DMD_DVBT2_PAPR_t;
|
||||
typedef enum{ DMD_E_DVBT2_L1_MOD_BPSK=0, DMD_E_DVBT2_L1_MOD_QPSK, DMD_E_DVBT2_L1_MOD_16QAM, DMD_E_DVBT2_L1_MOD_64QAM } DMD_DVBT2_L1_MOD_t;
|
||||
typedef enum{ DMD_E_DVBT2_CR_1_2=0, DMD_E_DVBT2_CR_3_5, DMD_E_DVBT2_CR_2_3, DMD_E_DVBT2_CR_3_4, DMD_E_DVBT2_CR_4_5, DMD_E_DVBT2_CR_5_6 } DMD_DVBT2_CR_t;
|
||||
typedef enum{ DMD_E_DVBT2_FEC_TYPE_16K=0, DMD_E_DVBT2_FEC_TYPE_64K } DMD_DVBT2_FEC_TYPE_t;
|
||||
typedef enum{ DMD_E_DVBT2_PP_1=0, DMD_E_DVBT2_PP_2, DMD_E_DVBT2_PP_3, DMD_E_DVBT2_PP_4, DMD_E_DVBT2_PP_5, DMD_E_DVBT2_PP_6, DMD_E_DVBT2_PP_7, DMD_E_DVBT2_PP_8 } DMD_DVBT2_PP_t;
|
||||
typedef enum{ DMD_E_DVBT2_PLP_MODE_NO=0, DMD_E_DVBT2_PLP_MODE_NORM, DMD_E_DVBT2_PLP_MODE_HEM } DMD_DVBT2_PLP_MODE_t;
|
||||
typedef enum{ DMD_E_DVBT2_PLP_TYPE_COM=0, DMD_E_DVBT2_PLP_TYPE_DAT1, DMD_E_DVBT2_PLP_TYPE_DAT2 } DMD_DVBT2_PLP_TYPE_t;
|
||||
typedef enum{ DMD_E_DVBT2_PLP_PAYLOAD_GFPS=0, DMD_E_DVBT2_PLP_PAYLOAD_GCS, DMD_E_DVBT2_PLP_PAYLOAD_GSE, DMD_E_DVBT2_PLP_PAYLOAD_TS } DMD_DVBT2_PLP_PAYLOAD_t;
|
||||
typedef enum{ DMD_E_DVBT2_PLP_MOD_QPSK=0, DMD_E_DVBT2_PLP_MOD_16QAM, DMD_E_DVBT2_PLP_MOD_64QAM, DMD_E_DVBT2_PLP_MOD_256QAM } DMD_DVBT2_PLP_MOD_t;
|
||||
//ISDBT
|
||||
typedef enum{ DMD_E_ISDBT_MODE1=0, DMD_E_ISDBT_MODE2, DMD_E_ISDBT_MODE3 } DMD_ISDBT_MODE_t;
|
||||
typedef enum{ DMD_E_ISDBT_GI_1_32=0, DMD_E_ISDBT_GI_1_16,DMD_E_ISDBT_GI_1_8, DMD_E_ISDBT_GI_1_4 } DMD_ISDBT_GI_t;
|
||||
typedef enum{ DMD_E_ISDBT_SYS_ISDB_T=0,DMD_E_ISDBT_SYS_ISDBT_SB } DMD_ISDBT_SYS_t;
|
||||
typedef enum{ DMD_E_ISDBT_PART_NO_PART=0, DMD_E_ISDBT_PART_PART } DMD_ISDBT_PART_t;
|
||||
typedef enum{ DMD_E_ISDBT_CONST_DQPSK=0, DMD_E_ISDBT_CONST_QPSK, DMD_E_ISDBT_CONST_16QAM ,DMD_E_ISDBT_CONST_64QAM } DMD_ISDBT_CONST_t;
|
||||
typedef enum{ DMD_E_ISDBT_CR_1_2=0, DMD_E_ISDBT_CR_2_3, DMD_E_ISDBT_CR_3_4, DMD_E_ISDBT_CR_5_6, DMD_E_ISDBT_CR_7_8 } DMD_ISDBT_CR_t;
|
||||
//ISDBS
|
||||
typedef enum{ DMD_E_ISDB_S_MOD_BPSK_1_2=0,
|
||||
DMD_E_ISDB_S_MOD_QPSK_1_2,
|
||||
DMD_E_ISDB_S_MOD_QPSK_2_3,
|
||||
DMD_E_ISDB_S_MOD_QPSK_3_4,
|
||||
DMD_E_ISDB_S_MOD_QPSK_5_6,
|
||||
DMD_E_ISDB_S_MOD_QPSK_7_8,
|
||||
DMD_E_ISDB_S_MOD_8PSK_2_3 } DMD_ISDBS_MOD_t;
|
||||
|
||||
//#ifdef __cplusplus
|
||||
//}
|
||||
//#endif
|
||||
|
||||
#endif
|
||||
Executable
+37
@@ -0,0 +1,37 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_types.h
|
||||
@brief Panasonic Demodulator Driver
|
||||
@author R.Mori
|
||||
@date 2011/8/5
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
#ifndef MN_DMD_TYPES_H
|
||||
#define MN_DMD_TYPES_H
|
||||
|
||||
/* **************************************************** */
|
||||
/* types */
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
typedef unsigned char DMD_u8_t;
|
||||
typedef signed char DMD_s8_t;
|
||||
typedef unsigned int DMD_u32_t;
|
||||
typedef int DMD_s32_t;
|
||||
typedef char* DMD_text_t;
|
||||
typedef float DMD_float_t;
|
||||
|
||||
|
||||
typedef signed char int8;
|
||||
typedef unsigned char uint8;
|
||||
typedef signed short int16;
|
||||
typedef unsigned short uint16;
|
||||
typedef signed int int32;
|
||||
typedef unsigned int uint32;
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,48 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_I2C.h
|
||||
@brief I2C Infterface for MN_DMD_Driver
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
#ifndef MN_I2C_H
|
||||
#define MN_I2C_H
|
||||
//#include "type.h"
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* **************************************************** */
|
||||
/* System dependence functions */
|
||||
/* **************************************************** */
|
||||
/* I2C Bus Functions */
|
||||
/* these function is defined by MN_DMD_I2C_(system).c */
|
||||
extern DMD_u32_t DMD_I2C_open(void);
|
||||
extern DMD_u32_t DMD_I2C_Write(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t data );
|
||||
extern DMD_u32_t DMD_I2C_Read (DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* data );
|
||||
extern DMD_u32_t DMD_I2C_Read_Multi(DMD_u8_t slvadr, DMD_u8_t adr,DMD_u8_t *data,DMD_u32_t len);
|
||||
extern DMD_u32_t DMD_I2C_Read_Tuner(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t *data );
|
||||
extern DMD_u32_t DMD_I2C_Write_Anylenth(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen);
|
||||
extern DMD_u32_t DMD_TCBI2C_Read(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen , DMD_u8_t* rdata , DMD_u32_t rlen);
|
||||
extern DMD_u32_t DMD_I2C_WriteRead(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen , DMD_u8_t* rdata , DMD_u32_t rlen);
|
||||
extern DMD_u32_t DMD_I2C_term(void);
|
||||
extern DMD_u32_t DMD_wait( DMD_u32_t msecond);
|
||||
extern DMD_u32_t DMD_timer(DMD_u32_t* tim);
|
||||
|
||||
|
||||
|
||||
#ifdef DMD_I2C_DEBUG
|
||||
extern DMD_u32_t dmd_i2c_debug_flag;
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,41 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_I2C.h
|
||||
@brief Tuner Bus controller
|
||||
@author R.Mori
|
||||
@date 2011/7/12
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
|
||||
#ifndef MN_TCB_H
|
||||
#define MN_TCB_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include "MN_DMD_driver.h"
|
||||
/* **************************************************** */
|
||||
/* System dependence functions */
|
||||
/* **************************************************** */
|
||||
/* I2C Bus Functions */
|
||||
/* these function is defined by MN_DMD_I2C_(system).c */
|
||||
extern DMD_u32_t DMD_TCB_Write(DMD_u8_t slvadr,DMD_u8_t adr,DMD_u8_t data);
|
||||
extern DMD_u32_t DMD_TCB_Read (DMD_u8_t slvadr, DMD_u8_t adr,DMD_u8_t* data);
|
||||
|
||||
extern DMD_u32_t DMD_TCB_WriteRead(DMD_u8_t tuner_slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen , DMD_u8_t* rdata , DMD_u32_t rlen);
|
||||
|
||||
|
||||
/* '11/08/05 : OKAMOTO Implement "Through Mode". */
|
||||
extern DMD_u32_t DMD_TCB_WriteAnyLength(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* data , DMD_u32_t wlen);
|
||||
extern DMD_u32_t DMD_TCB_ReadAnyLength (DMD_u8_t slvadr , DMD_u8_t* data , DMD_u8_t rlen);
|
||||
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,34 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_Tuner.h
|
||||
@brief Tuner Interface for MN_DMD_Driver
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
|
||||
#ifndef MN_TUNER_H
|
||||
#define MN_TUNER_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
#include "MaxLinearDataTypes.h"
|
||||
#include "MN_DMD_types.h"
|
||||
|
||||
/* **************************************************** */
|
||||
/* Tuner dependence functions */
|
||||
/* **************************************************** */
|
||||
/* these function is defined by MN_DMD_Tuner_(tuner_name).c */
|
||||
extern DMD_u32_t DMD_Tuner_init(uint32 freq);
|
||||
extern DMD_u32_t DMD_Tuner_set_system(DMD_PARAMETER* param);
|
||||
extern DMD_u32_t DMD_Tuner_tune(DMD_PARAMETER* param);
|
||||
extern DMD_u32_t DMD_Tuner_term(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,107 @@
|
||||
/*******************************************************************************
|
||||
*
|
||||
* FILE NAME : MaxLinearDataTypes.h
|
||||
*
|
||||
* AUTHOR : Brenndon Lee
|
||||
* Dong Liu
|
||||
*
|
||||
* DATE CREATED : Jul/31, 2006
|
||||
* Jan/23, 2010
|
||||
*
|
||||
* DESCRIPTION : This file contains MaxLinear-defined data types.
|
||||
* Instead of using ANSI C data type directly in source code
|
||||
* All module should include this header file.
|
||||
* And conditional compilation switch is also declared
|
||||
* here.
|
||||
*
|
||||
*******************************************************************************
|
||||
* Copyright (c) 2010, MaxLinear, Inc.
|
||||
******************************************************************************/
|
||||
|
||||
#ifndef __MAXLINEAR_DATA_TYPES_H__
|
||||
#define __MAXLINEAR_DATA_TYPES_H__
|
||||
|
||||
//#include "type.h"
|
||||
|
||||
|
||||
#include "MN_DMD_types.h"
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MXL_TRUE = 0,
|
||||
MXL_FALSE = 1,
|
||||
MXL_SUCCESS = 0,
|
||||
MXL_FAILED,
|
||||
MXL_BUSY,
|
||||
MXL_NULL_PTR,
|
||||
MXL_INVALID_PARAMETER,
|
||||
MXL_NOT_INITIALIZED,
|
||||
MXL_ALREADY_INITIALIZED,
|
||||
MXL_BUFFER_TOO_SMALL,
|
||||
MXL_NOT_SUPPORTED,
|
||||
MXL_TIMEOUT
|
||||
} MXL_STATUS;
|
||||
|
||||
typedef enum{
|
||||
MxL_OK = 0x0,
|
||||
MxL_ERR_INIT = 0x1,
|
||||
MxL_ERR_RFTUNE = 0x2,
|
||||
MxL_ERR_SET_REG = 0x3,
|
||||
MxL_ERR_GET_REG = 0x4,
|
||||
MxL_ERR_MODE = 0x10,
|
||||
MxL_ERR_IF_FREQ = 0x11,
|
||||
MxL_ERR_XTAL_FREQ = 0x12,
|
||||
MxL_ERR_BANDWIDTH = 0x13,
|
||||
MxL_GET_ID_FAIL = 0x14,
|
||||
MxL_ERR_DEMOD_LOCK = 0x20,
|
||||
MxL_NOREADY_DEMOD_LOCK = 0x21,
|
||||
MxL_ERR_OTHERS = 0x0A
|
||||
} MxL_ERR_MSG;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MXL_DISABLE = 0,
|
||||
MXL_ENABLE,
|
||||
|
||||
MXL_UNLOCKED = 0,
|
||||
MXL_LOCKED,
|
||||
|
||||
MXL_INVALID = 0,
|
||||
MXL_VALID,
|
||||
|
||||
MXL_PORT_LOW = 0,
|
||||
MXL_PORT_HIGH,
|
||||
|
||||
MXL_START = 0,
|
||||
MXL_FINISH,
|
||||
|
||||
MXL_ABORT_TUNE = 0,
|
||||
MXL_START_TUNE,
|
||||
|
||||
MXL_FINE_TUNE_STEP_DOWN = 0,
|
||||
MXL_FINE_TUNE_STEP_UP
|
||||
|
||||
} MXL_BOOL;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
IFX_SUCCESS = 0,
|
||||
IFX_FAILED,
|
||||
IFX_BUSY,
|
||||
IFX_NULL_PTR,
|
||||
IFX_INVALID_PARAMETER,
|
||||
IFX_BUFFER_TOO_SMALL,
|
||||
IFX_TIMEOUT
|
||||
} IFX_STATUS;
|
||||
|
||||
/******************************************************************************
|
||||
Global Variable Declarations
|
||||
******************************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
Prototypes
|
||||
******************************************************************************/
|
||||
|
||||
#endif /* __MAXLINEAR_DATA_TYPES_H__ */
|
||||
|
||||
@@ -0,0 +1,40 @@
|
||||
|
||||
|
||||
|
||||
#ifndef _MN88436SF_H_
|
||||
#define _MN88436SF_H_
|
||||
|
||||
|
||||
|
||||
#include "MaxLinearDataTypes.h"
|
||||
#include "MN_DMD_common.h"
|
||||
#include "MN_DMD_console.h"
|
||||
#include "MN_DMD_device.h"
|
||||
#include "MN_DMD_driver.h"
|
||||
#include "MN_DMD_types.h"
|
||||
#include "MN_I2C.h"
|
||||
#include "MN_TCB.h"
|
||||
#include "MN_Tuner.h"
|
||||
#include "MN88436_reg.h"
|
||||
|
||||
|
||||
struct mn88436_fe_config {
|
||||
int i2c_id;
|
||||
int reset_pin;
|
||||
int demod_addr;
|
||||
int tuner_addr;
|
||||
void *i2c_adapter;
|
||||
};
|
||||
|
||||
|
||||
struct mn88436_state {
|
||||
struct mn88436_fe_config config;
|
||||
struct i2c_adapter *i2c;
|
||||
uint32 freq;
|
||||
uint32 mode;
|
||||
uint32 symbol_rate;
|
||||
//struct dvb_frontend fe;
|
||||
};
|
||||
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,96 @@
|
||||
#include "../../inc/config.h"
|
||||
|
||||
#if USE_TUNER_88436
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
// MN88436 Autocontrol Register
|
||||
// Date : 2012/03/23
|
||||
// File : pseq.rgs
|
||||
//
|
||||
DMD_u32_t MN88436_REG_AUTOCTRL_SIZE = 673;
|
||||
DMD_u8_t MN88436_REG_AUTOCTRL[] = {
|
||||
0x10 ,0x00 ,0xc0 ,0x02 ,0xa1 ,0x10 ,0x25 ,0x20
|
||||
,0x4b ,0x10 ,0x1b ,0x20 ,0x51 ,0x10 ,0x64 ,0x20
|
||||
,0xf7 ,0x10 ,0x0a ,0x20 ,0xeb ,0x30 ,0xc4 ,0x70
|
||||
,0x60 ,0x90 ,0x00 ,0x78 ,0x82 ,0x00 ,0x1f ,0x10
|
||||
,0x0c ,0x20 ,0xeb ,0x30 ,0xec ,0x70 ,0xbf ,0x20
|
||||
,0xec ,0x30 ,0x5b ,0x70 ,0x40 ,0x14 ,0x30 ,0xec
|
||||
,0x75 ,0x20 ,0xec ,0x30 ,0xc4 ,0x70 ,0x02 ,0x90
|
||||
,0x00 ,0x05 ,0x0d ,0x82 ,0x00 ,0x73 ,0x82 ,0x00
|
||||
,0x41 ,0x30 ,0xc4 ,0x70 ,0x01 ,0xb0 ,0x00 ,0x1f
|
||||
,0xc4 ,0x02 ,0xa5 ,0x68 ,0x88 ,0x90 ,0x00 ,0x63
|
||||
,0x80 ,0x00 ,0x53 ,0x10 ,0x88 ,0xc0 ,0x02 ,0xa5
|
||||
,0x20 ,0x5b ,0x30 ,0xec ,0x70 ,0xbf ,0x20 ,0xec
|
||||
,0x80 ,0x00 ,0x1f ,0x10 ,0xc8 ,0xc0 ,0x02 ,0xa5
|
||||
,0x20 ,0x5b ,0x30 ,0xec ,0x74 ,0x40 ,0x20 ,0xec
|
||||
,0x80 ,0x00 ,0x1f ,0x08 ,0xb0 ,0x00 ,0x73 ,0x01
|
||||
,0x10 ,0x58 ,0x20 ,0xb9 ,0x30 ,0xed ,0x70 ,0xfc
|
||||
,0x20 ,0xed ,0x82 ,0x01 ,0x54 ,0x10 ,0x07 ,0x20
|
||||
,0x4b ,0x10 ,0x12 ,0x20 ,0x51 ,0x10 ,0x5b ,0x20
|
||||
,0xb9 ,0x10 ,0x01 ,0x20 ,0xeb ,0x10 ,0x00 ,0xc0
|
||||
,0x02 ,0xa0 ,0x20 ,0x5e ,0x10 ,0x94 ,0x20 ,0x5d
|
||||
,0x10 ,0x00 ,0xc0 ,0x02 ,0xa4 ,0x82 ,0x02 ,0x3c
|
||||
,0x0c ,0x82 ,0x02 ,0x2c ,0x09 ,0x82 ,0x01 ,0x77
|
||||
,0xc4 ,0x02 ,0xa4 ,0x40 ,0xc0 ,0x02 ,0xa4 ,0x14
|
||||
,0x10 ,0x3c ,0x69 ,0xb0 ,0x00 ,0xa5 ,0x82 ,0x01
|
||||
,0x2a ,0x10 ,0x02 ,0x20 ,0xeb ,0xc4 ,0x02 ,0xa0
|
||||
,0x68 ,0x0f ,0xc0 ,0x02 ,0xa0 ,0x20 ,0x5e ,0x10
|
||||
,0x94 ,0x20 ,0x5d ,0x10 ,0x00 ,0xc0 ,0x02 ,0xa4
|
||||
,0x82 ,0x02 ,0x3c ,0x0c ,0x82 ,0x02 ,0x2c ,0x09
|
||||
,0x82 ,0x01 ,0x77 ,0xc4 ,0x02 ,0xa4 ,0x40 ,0xc0
|
||||
,0x02 ,0xa4 ,0x14 ,0x10 ,0x3c ,0x69 ,0xb0 ,0x00
|
||||
,0xd8 ,0x82 ,0x01 ,0x2a ,0x10 ,0x04 ,0x20 ,0xeb
|
||||
,0xc4 ,0x02 ,0xa0 ,0x60 ,0x1e ,0xc0 ,0x02 ,0xa0
|
||||
,0x20 ,0x5e ,0x10 ,0x94 ,0x20 ,0x5d ,0x10 ,0x00
|
||||
,0xc0 ,0x02 ,0xa4 ,0x82 ,0x02 ,0x3c ,0x0c ,0x82
|
||||
,0x02 ,0x2c ,0x09 ,0x82 ,0x01 ,0x77 ,0xc4 ,0x02
|
||||
,0xa4 ,0x40 ,0xc0 ,0x02 ,0xa4 ,0x14 ,0x10 ,0x3c
|
||||
,0x69 ,0xb0 ,0x01 ,0x0b ,0x82 ,0x01 ,0x2a ,0x80
|
||||
,0x00 ,0x91 ,0x30 ,0xea ,0xc0 ,0x02 ,0xa2 ,0x10
|
||||
,0x04 ,0x20 ,0xba ,0x10 ,0x47 ,0x20 ,0x60 ,0x10
|
||||
,0x05 ,0x20 ,0xba ,0x30 ,0xbd ,0x70 ,0x20 ,0xc0
|
||||
,0x02 ,0xa3 ,0x30 ,0xea ,0xc5 ,0x02 ,0xa2 ,0x69
|
||||
,0xb0 ,0x01 ,0x2a ,0xc4 ,0x02 ,0xa3 ,0x60 ,0x00
|
||||
,0xb0 ,0x01 ,0xed ,0x01 ,0x10 ,0x05 ,0x20 ,0xeb
|
||||
,0x10 ,0x10 ,0x20 ,0xac ,0x10 ,0xf4 ,0x20 ,0xe7
|
||||
,0x10 ,0x04 ,0x20 ,0xaa ,0x10 ,0x0 ,0xc0 ,0x02
|
||||
,0xa0 ,0x20 ,0x5e ,0x10 ,0x94 ,0x20 ,0x5d ,0x30
|
||||
,0xc4 ,0x70 ,0x01 ,0x90 ,0x00 ,0x05 ,0x01 ,0x82
|
||||
,0x01 ,0x7f ,0x08 ,0xb0 ,0x01 ,0x77 ,0x01 ,0x30
|
||||
,0xea ,0xc0 ,0x02 ,0xa2 ,0x10 ,0x5b ,0x20 ,0xb9
|
||||
,0x10 ,0x04 ,0x20 ,0xba ,0x10 ,0x47 ,0x20 ,0x60
|
||||
,0x10 ,0x05 ,0x20 ,0xba ,0x30 ,0xbd ,0x70 ,0x20
|
||||
,0xc0 ,0x02 ,0xa3 ,0x30 ,0xea ,0xc5 ,0x02 ,0xa2
|
||||
,0x69 ,0xb0 ,0x01 ,0x7f ,0xc4 ,0x02 ,0xa3 ,0x60
|
||||
,0x00 ,0x90 ,0x01 ,0xaf ,0xb0 ,0x01 ,0xce ,0x10
|
||||
,0x10 ,0x20 ,0xac ,0x10 ,0xf4 ,0x20 ,0xe7 ,0x10
|
||||
,0x04 ,0x20 ,0xaa ,0x30 ,0xc6 ,0xc0 ,0x02 ,0xa1
|
||||
,0x70 ,0x04 ,0x90 ,0x00 ,0x05 ,0x30 ,0xed ,0x70
|
||||
,0xfb ,0x74 ,0x00 ,0x20 ,0xed ,0x01 ,0x10 ,0x10
|
||||
,0x20 ,0xac ,0x10 ,0x90 ,0x20 ,0xe7 ,0x10 ,0x04
|
||||
,0x20 ,0xaa ,0x30 ,0xc6 ,0xc0 ,0x02 ,0xa1 ,0x70
|
||||
,0x04 ,0x90 ,0x00 ,0x05 ,0x30 ,0xed ,0x70 ,0xfb
|
||||
,0x74 ,0x04 ,0x20 ,0xed ,0x01 ,0x30 ,0x5e ,0x70
|
||||
,0xff ,0x92 ,0x02 ,0x11 ,0x30 ,0x5e ,0x70 ,0x80
|
||||
,0xb2 ,0x02 ,0x1a ,0x30 ,0x5e ,0x68 ,0x0f ,0x92
|
||||
,0x02 ,0x23 ,0x30 ,0xeb ,0x74 ,0xf0 ,0x20 ,0xeb
|
||||
,0x82 ,0x01 ,0x7f ,0x82 ,0x02 ,0x3c ,0x80 ,0x02
|
||||
,0x02 ,0x30 ,0xed ,0x70 ,0xfc ,0x74 ,0x01 ,0x20
|
||||
,0xed ,0x01 ,0x30 ,0xed ,0x70 ,0xfc ,0x74 ,0x02
|
||||
,0x20 ,0xed ,0x01 ,0x30 ,0xed ,0x70 ,0xfc ,0x74
|
||||
,0x03 ,0x20 ,0xed ,0x01 ,0x30 ,0xc6 ,0xc0 ,0x02
|
||||
,0xa1 ,0x70 ,0x04 ,0x90 ,0x00 ,0x05 ,0x08 ,0xb0
|
||||
,0x02 ,0x2c ,0x09 ,0x01 ,0x30 ,0xeb ,0x74 ,0x10
|
||||
,0x20 ,0xeb ,0x30 ,0xd8 ,0x14 ,0x70 ,0x07 ,0x90
|
||||
,0x02 ,0x51 ,0x11 ,0x68 ,0x05 ,0x90 ,0x02 ,0x51
|
||||
,0x01 ,0x30 ,0xcf ,0xc0 ,0x02 ,0xa6 ,0xc4 ,0x02
|
||||
,0xa6 ,0x70 ,0xf8 ,0x90 ,0x02 ,0x61 ,0xb0 ,0x02
|
||||
,0x7e ,0xc4 ,0x02 ,0xa6 ,0x4c ,0x4c ,0x4c ,0x4c
|
||||
,0x4c ,0xc0 ,0x02 ,0xa6 ,0x30 ,0xd0 ,0x48 ,0x48
|
||||
,0x48 ,0x14 ,0xc4 ,0x02 ,0xa6 ,0x61 ,0xc0 ,0x02
|
||||
,0xa6 ,0x20 ,0xee ,0x80 ,0x02 ,0x88 ,0x10 ,0xff
|
||||
,0xc0 ,0x02 ,0xa6 ,0x20 ,0xee ,0x80 ,0x02 ,0x88
|
||||
,0xc4 ,0x02 ,0xa6 ,0x14 ,0x30 ,0xef ,0x69 ,0x88
|
||||
,0x02 ,0x93 ,0x01 ,0x30 ,0xa3 ,0x70 ,0x07 ,0x74
|
||||
,0x28 ,0x20 ,0xa3 ,0x70 ,0x07 ,0x20 ,0xa3 ,0x01
|
||||
,0x72};
|
||||
#endif
|
||||
Binary file not shown.
@@ -0,0 +1,990 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN88436_reg.c
|
||||
@brief Reg. settings of MN88436 for 24MHz IF 5MHz
|
||||
@author Simon
|
||||
@date 2012/7/24
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
#include "../../inc/config.h"
|
||||
|
||||
#if USE_TUNER_88436
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
DMD_u32_t DMD_RegSet_Rev = 1;
|
||||
|
||||
|
||||
// Mode : ATSC
|
||||
DMD_u8_t DMD_REG_ATSC[]={
|
||||
0 ,0x0 ,0x50 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x33 ,
|
||||
0 ,0xC ,0x34 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x10 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x80 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x03 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_64QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_64QAM[]={
|
||||
0 ,0x0 ,0x51 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x33 ,
|
||||
0 ,0xC ,0x34 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
|
||||
// Mode : QAM_B_256QAM
|
||||
DMD_u8_t DMD_REG_QAM_B_256QAM[]={
|
||||
0 ,0x0 ,0x53 ,
|
||||
0 ,0x1 ,0x0 ,
|
||||
0 ,0x2 ,0xC0 ,
|
||||
0 ,0x3 ,0x0 ,
|
||||
0 ,0x4 ,0x0 ,
|
||||
0 ,0x5 ,0x0 ,
|
||||
0 ,0x6 ,0x0 ,
|
||||
0 ,0x7 ,0x0 ,
|
||||
0 ,0x8 ,0x0 ,
|
||||
0 ,0x9 ,0x0 ,
|
||||
0 ,0xA ,0x06 ,
|
||||
0 ,0xB ,0x33 ,
|
||||
0 ,0xC ,0x34 ,
|
||||
0 ,0xD ,0x07 ,
|
||||
0 ,0xE ,0x07 ,
|
||||
0 ,0xF ,0x27 ,
|
||||
0 ,0x10 ,0x0 ,
|
||||
0 ,0x11 ,0x14 ,
|
||||
0 ,0x12 ,0xE4 ,
|
||||
0 ,0x13 ,0x74 ,
|
||||
0 ,0x14 ,0x8 ,
|
||||
0 ,0x15 ,0x5 ,
|
||||
0 ,0x16 ,0x63 ,
|
||||
0 ,0x17 ,0x0 ,
|
||||
0 ,0x18 ,0x0 ,
|
||||
0 ,0x19 ,0x0 ,
|
||||
0 ,0x1A ,0x0 ,
|
||||
0 ,0x1B ,0x0 ,
|
||||
0 ,0x1C ,0x0 ,
|
||||
0 ,0x1D ,0x0 ,
|
||||
0 ,0x1E ,0x0 ,
|
||||
0 ,0x1F ,0x0 ,
|
||||
0 ,0x20 ,0x0 ,
|
||||
0 ,0x21 ,0x50 ,
|
||||
0 ,0x22 ,0x60 ,
|
||||
0 ,0x23 ,0x36 ,
|
||||
0 ,0x24 ,0x2 ,
|
||||
0 ,0x25 ,0x0 ,
|
||||
0 ,0x26 ,0x0 ,
|
||||
0 ,0x27 ,0x0 ,
|
||||
0 ,0x28 ,0x0 ,
|
||||
0 ,0x29 ,0x0 ,
|
||||
0 ,0x2A ,0x20 ,
|
||||
0 ,0x2B ,0xC0 ,
|
||||
0 ,0x2C ,0x23 ,
|
||||
0 ,0x2D ,0x3F ,
|
||||
0 ,0x2E ,0x3F ,
|
||||
0 ,0x2F ,0x0 ,
|
||||
0 ,0x30 ,0x2E ,
|
||||
0 ,0x31 ,0x0 ,
|
||||
0 ,0x32 ,0x0 ,
|
||||
0 ,0x33 ,0x81 ,
|
||||
0 ,0x34 ,0x0 ,
|
||||
0 ,0x35 ,0x26 ,
|
||||
0 ,0x36 ,0x21 ,
|
||||
0 ,0x37 ,0x88 ,
|
||||
0 ,0x38 ,0x3 ,
|
||||
0 ,0x39 ,0x19 ,
|
||||
0 ,0x3A ,0x85 ,
|
||||
0 ,0x3B ,0x5 ,
|
||||
0 ,0x3C ,0xC9 ,
|
||||
0 ,0x3D ,0x2 ,
|
||||
0 ,0x3E ,0x30 ,
|
||||
0 ,0x3F ,0x69 ,
|
||||
0 ,0x40 ,0x1F ,
|
||||
0 ,0x41 ,0xF0 ,
|
||||
0 ,0x42 ,0x0 ,
|
||||
0 ,0x43 ,0x96 ,
|
||||
0 ,0x44 ,0x72 ,
|
||||
0 ,0x45 ,0x1B ,
|
||||
0 ,0x46 ,0x2D ,
|
||||
0 ,0x47 ,0x1A ,
|
||||
0 ,0x48 ,0x31 ,
|
||||
0 ,0x49 ,0xFE ,
|
||||
0 ,0x4A ,0x96 ,
|
||||
0 ,0x4B ,0x7 ,
|
||||
0 ,0x4C ,0x26 ,
|
||||
0 ,0x4D ,0xE3 ,
|
||||
0 ,0x4E ,0x22 ,
|
||||
0 ,0x4F ,0x1B ,
|
||||
0 ,0x50 ,0x26 ,
|
||||
0 ,0x51 ,0x12 ,
|
||||
0 ,0x52 ,0x40 ,
|
||||
0 ,0x53 ,0x50 ,
|
||||
0 ,0x54 ,0x60 ,
|
||||
0 ,0x55 ,0x40 ,
|
||||
0 ,0x56 ,0xED ,
|
||||
0 ,0x57 ,0x96 ,
|
||||
0 ,0x58 ,0x4A ,
|
||||
0 ,0x59 ,0xDE ,
|
||||
0 ,0x5A ,0x88 ,
|
||||
0 ,0x5B ,0xC8 ,
|
||||
0 ,0x5C ,0x2D ,
|
||||
0 ,0x5D ,0x1 ,
|
||||
0 ,0x5E ,0x0 ,
|
||||
0 ,0x5F ,0xB8 ,
|
||||
0 ,0x60 ,0x40 ,
|
||||
0 ,0x61 ,0x14 ,
|
||||
0 ,0x62 ,0x13 ,
|
||||
0 ,0x63 ,0x30 ,
|
||||
0 ,0x64 ,0x59 ,
|
||||
0 ,0x65 ,0x7 ,
|
||||
0 ,0x66 ,0xF0 ,
|
||||
0 ,0x67 ,0x47 ,
|
||||
0 ,0x68 ,0xA1 ,
|
||||
0 ,0x69 ,0x80 ,
|
||||
0 ,0x6A ,0x0 ,
|
||||
0 ,0x6B ,0x0 ,
|
||||
0 ,0x6C ,0xC0 ,
|
||||
0 ,0x6D ,0x0 ,
|
||||
0 ,0x6E ,0x0 ,
|
||||
0 ,0x6F ,0x0 ,
|
||||
0 ,0x70 ,0x0 ,
|
||||
0 ,0x71 ,0x0 ,
|
||||
0 ,0x72 ,0x0 ,
|
||||
0 ,0x73 ,0x0 ,
|
||||
0 ,0x74 ,0x2F ,
|
||||
0 ,0x75 ,0x0 ,
|
||||
0 ,0x76 ,0x0 ,
|
||||
0 ,0x77 ,0x0 ,
|
||||
0 ,0x78 ,0x0 ,
|
||||
0 ,0x79 ,0x40 ,
|
||||
0 ,0x7A ,0x20 ,
|
||||
0 ,0x7B ,0x40 ,
|
||||
0 ,0x7C ,0x80 ,
|
||||
0 ,0x7D ,0xFF ,
|
||||
0 ,0x7E ,0x20 ,
|
||||
0 ,0x7F ,0x40 ,
|
||||
0 ,0x80 ,0x10 ,
|
||||
0 ,0x81 ,0x0 ,
|
||||
0 ,0x82 ,0xE5 ,
|
||||
0 ,0x83 ,0xC4 ,
|
||||
0 ,0x84 ,0xE9 ,
|
||||
0 ,0x85 ,0x52 ,
|
||||
0 ,0x86 ,0x5F ,
|
||||
0 ,0x87 ,0x53 ,
|
||||
0 ,0x88 ,0x20 ,
|
||||
0 ,0x89 ,0x43 ,
|
||||
0 ,0x8A ,0x11 ,
|
||||
0 ,0x8B ,0x8 ,
|
||||
0 ,0x8C ,0x43 ,
|
||||
0 ,0x8D ,0x11 ,
|
||||
0 ,0x8E ,0x8 ,
|
||||
0 ,0x8F ,0x0 ,
|
||||
0 ,0x90 ,0x60 ,
|
||||
0 ,0x91 ,0x5B ,
|
||||
0 ,0x92 ,0x80 ,
|
||||
0 ,0x93 ,0xE4 ,
|
||||
0 ,0x94 ,0x34 ,
|
||||
0 ,0x95 ,0x0 ,
|
||||
0 ,0x96 ,0x0 ,
|
||||
0 ,0x97 ,0x7 ,
|
||||
0 ,0x98 ,0x0 ,
|
||||
0 ,0x99 ,0xB0 ,
|
||||
0 ,0x9A ,0x68 ,
|
||||
0 ,0x9B ,0x50 ,
|
||||
0 ,0x9C ,0x84 ,
|
||||
0 ,0x9D ,0xA9 ,
|
||||
0 ,0x9E ,0x11 ,
|
||||
0 ,0x9F ,0x4 ,
|
||||
0 ,0xA0 ,0x44 ,
|
||||
0 ,0xA1 ,0x14 ,
|
||||
0 ,0xA2 ,0x9C ,
|
||||
0 ,0xA3 ,0x15 ,
|
||||
0 ,0xA4 ,0xF6 ,
|
||||
0 ,0xA5 ,0x36 ,
|
||||
0 ,0xA6 ,0x16 ,
|
||||
0 ,0xA7 ,0x3F ,
|
||||
0 ,0xA8 ,0x1 ,
|
||||
0 ,0xA9 ,0x8 ,
|
||||
0 ,0xAA ,0x0 ,
|
||||
0 ,0xAB ,0x0 ,
|
||||
0 ,0xAC ,0x0 ,
|
||||
0 ,0xAD ,0x65 ,
|
||||
0 ,0xAE ,0x87 ,
|
||||
0 ,0xAF ,0x56 ,
|
||||
0 ,0xB0 ,0x52 ,
|
||||
0 ,0xB1 ,0x55 ,
|
||||
0 ,0xB2 ,0x35 ,
|
||||
0 ,0xB3 ,0x13 ,
|
||||
0 ,0xB4 ,0x88 ,
|
||||
0 ,0xB5 ,0x23 ,
|
||||
0 ,0xB6 ,0x28 ,
|
||||
0 ,0xB7 ,0x3C ,
|
||||
0 ,0xB8 ,0x1 ,
|
||||
0 ,0xB9 ,0x5B ,
|
||||
0 ,0xBA ,0x0 ,
|
||||
0 ,0xBB ,0x0 ,
|
||||
0 ,0xBC ,0x0 ,
|
||||
0 ,0xBD ,0x0 ,
|
||||
0 ,0xBE ,0x0 ,
|
||||
0 ,0xBF ,0x0 ,
|
||||
0 ,0xC0 ,0x0 ,
|
||||
0 ,0xC1 ,0x0 ,
|
||||
0 ,0xC2 ,0x0 ,
|
||||
0 ,0xC3 ,0x0 ,
|
||||
0 ,0xC4 ,0x0 ,
|
||||
0 ,0xC5 ,0x0 ,
|
||||
0 ,0xC6 ,0x0 ,
|
||||
0 ,0xC7 ,0x0 ,
|
||||
0 ,0xC8 ,0x0 ,
|
||||
0 ,0xC9 ,0x0 ,
|
||||
0 ,0xCA ,0x0 ,
|
||||
0 ,0xCB ,0x0 ,
|
||||
0 ,0xCC ,0x0 ,
|
||||
0 ,0xCD ,0x0 ,
|
||||
0 ,0xCE ,0x0 ,
|
||||
0 ,0xCF ,0x0 ,
|
||||
0 ,0xD0 ,0x0 ,
|
||||
0 ,0xD1 ,0x0 ,
|
||||
0 ,0xD2 ,0x0 ,
|
||||
0 ,0xD3 ,0x0 ,
|
||||
0 ,0xD4 ,0x0 ,
|
||||
0 ,0xD5 ,0x0 ,
|
||||
0 ,0xD6 ,0x0 ,
|
||||
0 ,0xD7 ,0x0 ,
|
||||
0 ,0xD8 ,0x0 ,
|
||||
0 ,0xD9 ,0xA0 ,
|
||||
0 ,0xDA ,0x0 ,
|
||||
0 ,0xDB ,0x0 ,
|
||||
0 ,0xDC ,0x0 ,
|
||||
0 ,0xDD ,0x0 ,
|
||||
0 ,0xDE ,0x0 ,
|
||||
0 ,0xDF ,0x9 ,
|
||||
0 ,0xE0 ,0x8 ,
|
||||
0 ,0xE1 ,0x8 ,
|
||||
0 ,0xE2 ,0xA8 ,
|
||||
0 ,0xE3 ,0x0 ,
|
||||
0 ,0xE4 ,0x0 ,
|
||||
0 ,0xE5 ,0x0 ,
|
||||
0 ,0xE6 ,0x0 ,
|
||||
0 ,0xE7 ,0xB4 ,
|
||||
0 ,0xE8 ,0xA ,
|
||||
0 ,0xE9 ,0x0 ,
|
||||
0 ,0xEA ,0x0 ,
|
||||
0 ,0xEB ,0x0 ,
|
||||
0 ,0xEC ,0x0 ,
|
||||
0 ,0xED ,0x0 ,
|
||||
0 ,0xEE ,0x0 ,
|
||||
0 ,0xEF ,0xB4 ,
|
||||
0 ,0xF0 ,0x91 ,
|
||||
0 ,0xF1 ,0x0 ,
|
||||
0 ,0xF2 ,0x0 ,
|
||||
0 ,0xF3 ,0x0 ,
|
||||
0 ,0xF4 ,0x0 ,
|
||||
0 ,0xF5 ,0x0 ,
|
||||
0 ,0xF6 ,0x0 ,
|
||||
0 ,0xF7 ,0x0 ,
|
||||
0 ,0xF8 ,0x0 ,
|
||||
0 ,0xF9 ,0x0 ,
|
||||
0 ,0xFA ,0x0 ,
|
||||
0 ,0xFB ,0x80 ,
|
||||
0 ,0xFC ,0x10 ,
|
||||
0 ,0xFD ,0x2 ,
|
||||
0 ,0xFE ,0x20 ,
|
||||
0 ,0xFF ,0xAA ,
|
||||
1 ,0x9 ,0x0 ,
|
||||
1 ,0xA ,0x0 ,
|
||||
1 ,0xB ,0x0 ,
|
||||
1 ,0xC ,0x8 ,
|
||||
1 ,0xD ,0x0 ,
|
||||
1 ,0x14 ,0x8 ,
|
||||
1 ,0x5A ,0x3C ,
|
||||
1 ,0x5B ,0x0 ,
|
||||
1 ,0x5C ,0x0 ,
|
||||
1 ,0x5D ,0x0 ,
|
||||
1 ,0x5E ,0x0 ,
|
||||
1 ,0x5F ,0x0 ,
|
||||
1 ,0x60 ,0x0 ,
|
||||
1 ,0x61 ,0xAC ,
|
||||
1 ,0x62 ,0x24 ,
|
||||
1 ,0x63 ,0x0 ,
|
||||
1 ,0x64 ,0x0 ,
|
||||
1 ,0x65 ,0x0 ,
|
||||
1 ,0x66 ,0x0 ,
|
||||
1 ,0x67 ,0x0 ,
|
||||
1 ,0x68 ,0x0 ,
|
||||
1 ,0x69 ,0x0 ,
|
||||
1 ,0x6A ,0x0 ,
|
||||
1 ,0x6B ,0x0 ,
|
||||
1 ,0x74 ,0x0 ,
|
||||
1 ,0x79 ,0x0 ,
|
||||
1 ,0x80 ,0x5 ,
|
||||
1 ,0x81 ,0x0 ,
|
||||
1 ,0x82 ,0x40 ,
|
||||
1 ,0x83 ,0x0 ,
|
||||
1 ,0x84 ,0x40 ,
|
||||
1 ,0x85 ,0x37 ,
|
||||
1 ,0x86 ,0x2 ,
|
||||
1 ,0x87 ,0x20 ,
|
||||
1 ,0x88 ,0x0 ,
|
||||
1 ,0x89 ,0x20 ,
|
||||
1 ,0x8A ,0x0 ,
|
||||
1 ,0x8B ,0x3 ,
|
||||
1 ,0x8C ,0x60 ,
|
||||
1 ,0x8D ,0x30 ,
|
||||
1 ,0x8E ,0x88 ,
|
||||
1 ,0x8F ,0x11 ,
|
||||
1 ,0x90 ,0x0 ,
|
||||
1 ,0x91 ,0x0 ,
|
||||
1 ,0x92 ,0x76 ,
|
||||
1 ,0x93 ,0xA6 ,
|
||||
1 ,0x94 ,0x19 ,
|
||||
1 ,0x95 ,0x52 ,
|
||||
1 ,0x96 ,0x73 ,
|
||||
1 ,0x97 ,0x96 ,
|
||||
1 ,0x98 ,0xA5 ,
|
||||
1 ,0x99 ,0x3 ,
|
||||
1 ,0x9A ,0xBA ,
|
||||
1 ,0x9B ,0x95 ,
|
||||
1 ,0x9C ,0x25 ,
|
||||
1 ,0x9D ,0xD4 ,
|
||||
1 ,0x9E ,0x0 ,
|
||||
1 ,0x9F ,0x0 ,
|
||||
1 ,0xA0 ,0xFD ,
|
||||
1 ,0xA1 ,0x6D ,
|
||||
1 ,0xA2 ,0x63 ,
|
||||
1 ,0xA3 ,0x52 ,
|
||||
1 ,0xFF ,0x55 ,
|
||||
0xff,0xff,0xff};
|
||||
|
||||
#endif
|
||||
Binary file not shown.
@@ -0,0 +1,884 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_driver.c
|
||||
@brief Panasonic Demodulator Driver
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
#include "../../inc/config.h"
|
||||
|
||||
#if USE_TUNER_88436
|
||||
#include <stdio.h>
|
||||
//#include "os_task.h"
|
||||
#include "../include/MN_DMD_common.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
#include "../include/MN_I2C.h"
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/* I2C useful function */
|
||||
/* **************************************************** */
|
||||
|
||||
DMD_u32_t DMD_I2C_MaskWrite(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t mask , DMD_u8_t data )
|
||||
{
|
||||
DMD_u8_t rd;
|
||||
DMD_ERROR_t ret;
|
||||
|
||||
ret =(DMD_ERROR_t)DMD_I2C_Read( slvadr , adr , &rd );
|
||||
rd |= mask & data;
|
||||
rd &= (mask^0xff) | data;
|
||||
ret |= DMD_I2C_Write( slvadr , adr ,rd );
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* Calculate BER by integer only */
|
||||
/* **************************************************** */
|
||||
#define DMD_BER_UNIT (10000000) //DMD_ber_int = 1 means 10^-7
|
||||
#define DMD_BER_LIMIT (215) //2^31 / DMD_BER_UNIT
|
||||
DMD_u32_t DMD_ber_int( DMD_u32_t err , DMD_u32_t sum )
|
||||
{
|
||||
DMD_u32_t ret = DMD_BER_UNIT;
|
||||
DMD_u32_t mul;
|
||||
if( sum == 0 )
|
||||
{
|
||||
ret = DMD_BER_UNIT;
|
||||
}
|
||||
else if( err >= sum )
|
||||
{
|
||||
ret = DMD_BER_UNIT;
|
||||
}
|
||||
else
|
||||
{
|
||||
//To get integer value , multiply BER_UNIT to err.
|
||||
//(avoid overflow integer limit(2^32))
|
||||
for(mul=1;mul<DMD_BER_UNIT;mul*=10)
|
||||
{
|
||||
if( err < (DMD_BER_LIMIT*mul) )
|
||||
{
|
||||
ret = err * (DMD_BER_UNIT/mul) / sum;
|
||||
ret *= mul;
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
/* **************************************************** */
|
||||
/* Get RF Frequency in kHz unit */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_get_freq_kHz( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_u32_t ret = 0;
|
||||
switch( param->funit ){
|
||||
case DMD_E_MHZ:
|
||||
ret = param->freq * 1000;
|
||||
break;
|
||||
case DMD_E_KHZ:
|
||||
ret = param->freq ;
|
||||
break;
|
||||
case DMD_E_HZ:
|
||||
ret = param->freq / 1000;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
/* **************************************************** */
|
||||
/* Calculate SQI (Nordig) */
|
||||
/* **************************************************** */
|
||||
|
||||
//---------------------------------------------
|
||||
//Nordig required CNR table
|
||||
//CNR_P1 = CNR_p1 * 100
|
||||
|
||||
DMD_u32_t DMD_DVBT_CNR_P1[3][5] =
|
||||
{ { 510 , 690 , 790 , 890 , 970 } ,
|
||||
{1080 , 1310 , 1460 ,1560 , 1600} ,
|
||||
{1650 , 1870 , 2020 ,2160 , 2250 }
|
||||
};
|
||||
DMD_u32_t DMD_DVBT2_CNR_P1[4][6] =
|
||||
{ { 350 , 470 , 560 , 660 , 720 , 770 } ,
|
||||
{ 870 , 1010 , 1140 ,1250 , 1330, 1380} ,
|
||||
{1300 , 1480 , 1620 ,1770 , 1870, 1940} ,
|
||||
{1700 , 1940 , 2080 ,2290 , 2430, 2510}
|
||||
};
|
||||
|
||||
DMD_u32_t DMD_calc_SQI( DMD_PARAMETER* param)
|
||||
{
|
||||
DMD_u32_t cnr;
|
||||
DMD_s32_t cnr_rel;
|
||||
DMD_u32_t beri;
|
||||
DMD_u32_t mod,cr;
|
||||
DMD_u32_t sqi,ber_sqi;
|
||||
|
||||
cnr = param->info[DMD_E_INFO_CNR_INT] * 100 + param->info[DMD_E_INFO_CNR_DEC];
|
||||
|
||||
if( param->info[DMD_E_INFO_BERRNUM] != 0 )
|
||||
{
|
||||
beri = param->info[DMD_E_INFO_BITNUM] / param->info[DMD_E_INFO_BERRNUM];
|
||||
}
|
||||
else
|
||||
{
|
||||
beri = 100000000;
|
||||
}
|
||||
|
||||
if( param->system == DMD_E_DVBT )
|
||||
{
|
||||
mod = param->info[DMD_E_INFO_DVBT_CONSTELLATION];
|
||||
cr = param->info[DMD_E_INFO_DVBT_LP_CODERATE];
|
||||
if( mod >= 3 || cr >= 5 ) return 0;
|
||||
cnr_rel = cnr - DMD_DVBT_CNR_P1[mod][cr];
|
||||
}
|
||||
else if( param->system == DMD_E_DVBT2 )
|
||||
{
|
||||
mod = param->info[DMD_E_INFO_DVBT2_DAT_PLP_MOD];
|
||||
cr = param->info[DMD_E_INFO_DVBT2_DAT_PLP_COD];
|
||||
if( mod >= 4 || cr >= 6 ) return 0;
|
||||
cnr_rel = cnr - DMD_DVBT2_CNR_P1[mod][cr];
|
||||
}
|
||||
else
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
if( cnr_rel < -700 )
|
||||
{
|
||||
sqi = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
||||
if( beri < 1000 ) //BER>10-3
|
||||
{
|
||||
ber_sqi = 0;
|
||||
}
|
||||
else if( beri < 10000000 ) //BER>10-7
|
||||
{
|
||||
ber_sqi = 20 * log10_easy( beri ) - 40000;
|
||||
ber_sqi /= 1000;
|
||||
}
|
||||
else
|
||||
{
|
||||
ber_sqi = 100;
|
||||
}
|
||||
|
||||
if( cnr_rel <= 300 )
|
||||
{
|
||||
sqi = ( ( (cnr_rel - 300) /10) + 100 ) * ber_sqi;
|
||||
}
|
||||
else
|
||||
{
|
||||
sqi = ber_sqi * 100;
|
||||
}
|
||||
}
|
||||
|
||||
return sqi / 100;
|
||||
}
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/* Local Functions */
|
||||
/* **************************************************** */
|
||||
/*! Tranfer Register Array */
|
||||
DMD_u32_t DMD_trans_reg( DMD_I2C_Register_t* t)
|
||||
{
|
||||
int i=0;
|
||||
while(i<DMD_REGISTER_MAX)
|
||||
{
|
||||
if( DMD_I2C_Write( t[i].slvadr , t[i].adr , t[i].data ) == DMD_E_ERROR ){
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
i++;
|
||||
if(t[i].flag == DMD_E_END_OF_ARRAY ) break;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
/* **************************************************** */
|
||||
/* Log Table */
|
||||
/* **************************************************** */
|
||||
DMD_s32_t logtbl[] = {
|
||||
0 ,-1000,-699 ,-523,-398,
|
||||
-301,-222 ,-155 ,-97 ,-46 ,
|
||||
0 ,41 ,79 ,114 ,146 ,
|
||||
176 ,204 ,230 ,255 ,
|
||||
279 ,301 ,322 ,342 ,
|
||||
362 ,380 ,398 ,415 ,
|
||||
431 ,447 ,462 ,477 ,
|
||||
491 ,505 ,519 ,531 ,
|
||||
544 ,556 ,568 ,580 ,
|
||||
591 ,602 ,613 ,623 ,
|
||||
633 ,643 ,653 ,663 ,
|
||||
672 ,681 ,690 ,699 ,
|
||||
708 ,716 ,724 ,732 ,
|
||||
740 ,748 ,756 ,763 ,
|
||||
771 ,778 ,785 ,792 ,
|
||||
799 ,806 ,813 ,820 ,
|
||||
826 ,833 ,839 ,845 ,
|
||||
851 ,857 ,863 ,869 ,
|
||||
875 ,881 ,886 ,892 ,
|
||||
898 ,903 ,908 ,914 ,
|
||||
919 ,924 ,929 ,934 ,
|
||||
940 ,944 ,949 ,954 ,
|
||||
959 ,964 ,968 ,973 ,
|
||||
978 ,982 ,987 ,991 ,
|
||||
996 ,1000};
|
||||
|
||||
/* Calculate Log10 */
|
||||
DMD_u32_t log10_easy( DMD_u32_t cnr )
|
||||
{
|
||||
DMD_u32_t c;
|
||||
DMD_s32_t ret;
|
||||
c = 0;
|
||||
|
||||
while( cnr > 100 ){
|
||||
cnr = cnr / 10;
|
||||
c++;
|
||||
}
|
||||
ret = logtbl[cnr] + c*1000 + 1000;
|
||||
|
||||
return ret;
|
||||
}
|
||||
/* **************************************************** */
|
||||
/* return Info value string */
|
||||
/* **************************************************** */
|
||||
DMD_text_t DMD_value_decimal( DMD_u32_t val )
|
||||
{
|
||||
static char buf[16];
|
||||
sprintf( buf , "%d", (int)val );
|
||||
return buf;
|
||||
|
||||
}
|
||||
DMD_text_t DMD_value_hex( DMD_u32_t val )
|
||||
{
|
||||
static char buf[16];
|
||||
|
||||
sprintf( buf , "0x%x", (unsigned int)val);
|
||||
return buf;
|
||||
|
||||
}
|
||||
DMD_text_t DMD_value_textlist( DMD_textlist_t* list , DMD_u32_t val )
|
||||
{
|
||||
if( val >= list->size )
|
||||
{
|
||||
return "Not Defined";
|
||||
}
|
||||
else
|
||||
{
|
||||
return list->list[val];
|
||||
}
|
||||
}
|
||||
|
||||
DMD_text_t DMD_info_value_common( DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
switch( id )
|
||||
{
|
||||
case DMD_E_INFO_ALL : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_REGREV : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_PSEQREV : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_SYSTEM : return DMD_value_textlist( &DMD_TEXTLIST_SYSTEM ,val);
|
||||
case DMD_E_INFO_LOCK : return DMD_value_textlist( &DMD_TEXTLIST_LOCK ,val);
|
||||
case DMD_E_INFO_AGC : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_BERRNUM : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_BITNUM : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_CNR_INT : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_CNR_DEC : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_PERRNUM : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_PACKETNUM : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ERRORFREE : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
default: break;
|
||||
|
||||
}
|
||||
return "Not Defined\n";
|
||||
}
|
||||
#ifndef DMD_DISABLE_ISDB
|
||||
DMD_text_t DMD_info_value_isdbt( DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
|
||||
switch( id )
|
||||
{
|
||||
case DMD_E_INFO_ISDBT_STATUS : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_STATUS ,val);
|
||||
case DMD_E_INFO_ISDBT_BERRNUM_A : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_BITNUM_A : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_BERRNUM_B : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_BITNUM_B : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_BERRNUM_C : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_BITNUM_C : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_ERRORFREE_A : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBT_ERRORFREE_B : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBT_ERRORFREE_C : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBT_MODE : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_MODE ,val);
|
||||
case DMD_E_INFO_ISDBT_GI : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_GI ,val);
|
||||
case DMD_E_INFO_ISDBT_SYS_TMCC : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_SYSTEM ,val);
|
||||
case DMD_E_INFO_ISDBT_COUNTDOWN : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_EMGFLG : return DMD_value_textlist( &DMD_TEXTLIST_YESNO ,val);
|
||||
case DMD_E_INFO_ISDBT_PART : return DMD_value_textlist( &DMD_TEXTLIST_YESNO ,val);
|
||||
case DMD_E_INFO_ISDBT_MAPA : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_MAP ,val);
|
||||
case DMD_E_INFO_ISDBT_CRA : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_CR ,val);
|
||||
case DMD_E_INFO_ISDBT_INTA : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_INT ,val);
|
||||
case DMD_E_INFO_ISDBT_SEGA : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_MAPB : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_MAP ,val);
|
||||
case DMD_E_INFO_ISDBT_CRB : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_CR ,val);
|
||||
case DMD_E_INFO_ISDBT_INTB : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_INT ,val);
|
||||
case DMD_E_INFO_ISDBT_SEGB : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_MAPC : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_MAP ,val);
|
||||
case DMD_E_INFO_ISDBT_CRC : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_CR ,val);
|
||||
case DMD_E_INFO_ISDBT_INTC : return DMD_value_textlist( &DMD_TEXTLIST_ISDBT_INT ,val);
|
||||
case DMD_E_INFO_ISDBT_SEGC : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBT_PHCOR : return DMD_value_decimal(val);
|
||||
|
||||
}
|
||||
return "Not Defined";
|
||||
}
|
||||
|
||||
DMD_text_t DMD_info_value_isdbs( DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
|
||||
switch( id )
|
||||
{
|
||||
case DMD_E_INFO_ISDBS_BERRNUM_1 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_BITNUM_1 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_BERRNUM_2 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_BITNUM_2 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_BERRNUM_3 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_BITNUM_3 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_ERRORFREE_0 : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBS_ERRORFREE_1 : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBS_ERRORFREE_2 : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBS_ERRORFREE_3 : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBS_ERRORFREE_T : return DMD_value_textlist( &DMD_TEXTLIST_ERRORFREE ,val);
|
||||
case DMD_E_INFO_ISDBS_TSNO : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_TSID : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_MOD : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_EMGSW : return DMD_value_textlist( &DMD_TEXTLIST_YESNO ,val);
|
||||
case DMD_E_INFO_ISDBS_UPLINK : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_EXON : return DMD_value_textlist( &DMD_TEXTLIST_YESNO ,val);
|
||||
case DMD_E_INFO_ISDBS_CHANGE : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_MOD0 : return DMD_value_textlist( &DMD_TEXTLIST_ISDBS_MOD ,val);
|
||||
case DMD_E_INFO_ISDBS_SLOT0 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_MOD1 : return DMD_value_textlist( &DMD_TEXTLIST_ISDBS_MOD ,val);
|
||||
case DMD_E_INFO_ISDBS_SLOT1 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_MOD2 : return DMD_value_textlist( &DMD_TEXTLIST_ISDBS_MOD ,val);
|
||||
case DMD_E_INFO_ISDBS_SLOT2 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_MOD3 : return DMD_value_textlist( &DMD_TEXTLIST_ISDBS_MOD ,val);
|
||||
case DMD_E_INFO_ISDBS_SLOT3 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_ISDBS_TSID0 : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_TSID1 : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_TSID2 : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_TSID3 : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_TSID4 : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_TSID5 : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_TSID6 : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_ISDBS_TSID7 : return DMD_value_hex(val);
|
||||
default:
|
||||
if( id <= DMD_E_INFO_ISDBS_TSID7 )
|
||||
return DMD_value_hex(val);
|
||||
else if( id <= DMD_E_INFO_ISDBS_TSNO48 )
|
||||
return DMD_value_decimal(val);
|
||||
|
||||
}
|
||||
return "Not Defined";
|
||||
}
|
||||
#endif
|
||||
|
||||
DMD_text_t DMD_info_value_dvbc( DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
|
||||
switch( id )
|
||||
{
|
||||
case DMD_E_INFO_STATUS : return DMD_value_textlist( &DMD_TEXTLIST_DVBC_STATUS , val );
|
||||
}
|
||||
return "Not Defined";
|
||||
}
|
||||
DMD_text_t DMD_info_value_vq( DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
|
||||
switch( id )
|
||||
{
|
||||
case DMD_E_INFO_STATUS : return DMD_value_decimal( val );
|
||||
}
|
||||
return "Not Defined";
|
||||
}
|
||||
|
||||
|
||||
DMD_text_t DMD_info_value_dvbt( DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
|
||||
switch( id )
|
||||
{
|
||||
case DMD_E_INFO_ISDBT_STATUS : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_STATUS ,val);
|
||||
case DMD_E_INFO_DVBT_SQI : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT_HIERARCHY_SELECT : return DMD_value_textlist( &DMD_TEXTLIST_HIERARCHY_SEL ,val);
|
||||
case DMD_E_INFO_DVBT_TPS_ALL : return DMD_value_textlist( &DMD_TEXTLIST_TPS_ALL ,val);
|
||||
case DMD_E_INFO_DVBT_MODE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_MODE ,val);
|
||||
case DMD_E_INFO_DVBT_GI : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_GI ,val);
|
||||
case DMD_E_INFO_DVBT_LENGTH_INDICATOR : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT_CONSTELLATION : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_CONST ,val);
|
||||
case DMD_E_INFO_DVBT_HIERARCHY : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_HIERARCHY ,val);
|
||||
case DMD_E_INFO_DVBT_HP_CODERATE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_CR ,val);
|
||||
case DMD_E_INFO_DVBT_LP_CODERATE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT_CR ,val);
|
||||
case DMD_E_INFO_DVBT_CELLID : return DMD_value_hex(val);
|
||||
}
|
||||
|
||||
return "Not Defined";
|
||||
}
|
||||
|
||||
DMD_text_t DMD_info_value_dvbt2( DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
switch( id )
|
||||
{
|
||||
case DMD_E_INFO_DVBT2_STATUS : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_STATUS ,val);
|
||||
case DMD_E_INFO_DVBT2_SQI : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_MODE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_MODE ,val);
|
||||
case DMD_E_INFO_DVBT2_GI : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_GI ,val);
|
||||
case DMD_E_INFO_DVBT2_BERRNUM_C : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_BITNUM_C : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_SELECTED_PLP : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_L1_ALL : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_BW_EXT : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_S1 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_S2 : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_PAPR : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PAPR ,val);
|
||||
case DMD_E_INFO_DVBT2_L1_MOD : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_L1_MOD ,val);
|
||||
case DMD_E_INFO_DVBT2_L1_COD : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_COD ,val);
|
||||
case DMD_E_INFO_DVBT2_L1_FEC_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_FEC_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_L1_POST_SIZE : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_L1_POST_INFO_SIZE : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_PILOT_PATTERN : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PILOT_PATTERN ,val);
|
||||
case DMD_E_INFO_DVBT2_TX_ID_AVAILABILITY : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_CELL_ID : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_DVBT2_NETWORK_ID : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_DVBT2_T2_SYSTEM_ID : return DMD_value_hex(val);
|
||||
case DMD_E_INFO_DVBT2_NUM_T2_FRAMES : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_NUM_DATA_SYMBOLS : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_REGEN_FLAG : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_L1_POST_EXTENSION : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_NUM_RF : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_CURRENT_RF_IDX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_SUB_SLICES_PER_FRAME : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_SUB_SLICE_INTERVAL : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_NUM_PLP : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_NUM_AUX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_PLP_MODE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PLP_MODE ,val);
|
||||
case DMD_E_INFO_DVBT2_FEF_TYPE : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_FEF_LENGTH : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_FEF_INTERVAL : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_ID : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PLP_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_PAYLOAD_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PAYLOAD_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_GROUP_ID : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_COD : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_COD ,val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_MOD : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PLP_MOD ,val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_ROTATION : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_FEC_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_FEC_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_NUM_BLOCKS_MAX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_FRAME_INTEVAL : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_TIME_IL_LENGTH : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_TIME_IL_TYPE : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_FF_FLAG : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_ID : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PLP_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_PAYLOAD_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PAYLOAD_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_GROUP_ID : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_COD : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_COD ,val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_MOD : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_PLP_MOD ,val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_ROTATION : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_FEC_TYPE : return DMD_value_textlist( &DMD_TEXTLIST_DVBT2_FEC_TYPE ,val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_NUM_BLOCKS_MAX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_FRAME_INTEVAL : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_TIME_IL_LENGTH : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_TIME_IL_TYPE : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_FF_FLAG : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_FRAME_IDX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_TYPE_2_START : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_L1_CHANGE_COUNTER : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_START_RF_IDX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_FIRST_RF_IDX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_START : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_DAT_PLP_NUM_BLOCKS : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_FIRST_RF_IDX : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_START : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_COM_PLP_NUM_BLOCKS : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_STATIC_FLAG : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_STATIC_PADDING_FLAG : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_IN_BAND_A_FLAG : return DMD_value_decimal(val);
|
||||
case DMD_E_INFO_DVBT2_IN_BAND_B_FLAG : return DMD_value_decimal(val);
|
||||
default:
|
||||
return "Not Defined";
|
||||
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* Register */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_send_registers( DMD_u8_t *slaveset , DMD_u8_t* regset )
|
||||
{
|
||||
DMD_u32_t i;
|
||||
DMD_u8_t data;
|
||||
|
||||
for(i=0;;)
|
||||
{
|
||||
if( regset[i] == 0xff ) break;
|
||||
DMD_I2C_Write(slaveset[regset[i]] , regset[i+1] , regset[i+2] );
|
||||
i=i+3;
|
||||
}
|
||||
|
||||
|
||||
#if 0//test_ok >> DMD_I2C_Write and DMD_I2C_Read
|
||||
for(i=0;;)
|
||||
{
|
||||
if( regset[i] == 0xff ) break;
|
||||
DMD_I2C_Read(slaveset[regset[i]] , regset[i+1] , &data);
|
||||
i=i+3;
|
||||
printf("0x%x\n",data);
|
||||
}
|
||||
#endif
|
||||
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
DMD_u32_t DMD_read_registers( void )
|
||||
{
|
||||
DMD_u32_t i;
|
||||
DMD_u8_t rd;
|
||||
|
||||
printf("\n DMD_read_registers --- IN ! \n");
|
||||
|
||||
for(i=0;;i++)
|
||||
{
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(0) , i , &rd );
|
||||
printf("ATSC Main : Regaddr[0x%x] = 0x%x \n",i,rd);
|
||||
|
||||
if( i == 0xff ) break;
|
||||
}
|
||||
|
||||
for(i=0;;i++)
|
||||
{
|
||||
DMD_I2C_Read( DMD_BANK_USR(0) , i , &rd );
|
||||
printf("ATSC Usr : Regaddr[0x%x] = 0x%x \n",i,rd);
|
||||
|
||||
if( i == 0xff ) break;
|
||||
}
|
||||
printf("\n DMD_read_registers --- OUT ! \n");
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/* Text List */
|
||||
/* **************************************************** */
|
||||
DMD_textlist_t DMD_TEXTLIST_SYSTEM =
|
||||
{ 22 ,
|
||||
{ "ISDBT",
|
||||
"ISDBS",
|
||||
"DVBT",
|
||||
"DVBT2",
|
||||
"DVBC",
|
||||
"DVBC2",
|
||||
"ATSC",
|
||||
"QAMB_64QAM",
|
||||
"QAMB_256QAM",
|
||||
"QAMC_64QAM",
|
||||
"QAMC_256QAM",
|
||||
"ISDBT_Brazil",
|
||||
"---",
|
||||
"NTSC_M_BTSC",
|
||||
"PAL_M_BTSC",
|
||||
"PAL_N_BTSC",
|
||||
"PAL_B_G_NICAM",
|
||||
"PAL_I_NiCAM",
|
||||
"PAL_D_NiCAM",
|
||||
"PAL_B_G_A2",
|
||||
"SECAM_L_NiCAM",
|
||||
"SECAM_L1_NiCAM",
|
||||
"SECAM_D_K_A2",
|
||||
"SECAM_BG_NICAM"},
|
||||
};
|
||||
DMD_textlist_t DMD_TEXTLIST_LOCK = { 4 ,{ "LOCKED", "NOSIGNAL", "NOSYNC", "ERROR(TimeOut)"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT_STATUS = { 12 ,{ "0_RESET", "1_TUNING", "2_AGC", "3_Mode_Search", "4_Clock_Carrier_Sync", "5_", "6_", "7_", "8_Freq_Sync", "9_Frame_Detect", "10_Sync", "11_Sync_Protect"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_ERRORFREE = { 3 ,{ "ERROR", "ERROR FREE" , "Not Available"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_HIERARCHY_SEL = { 2 ,{ "LP(No Hier)", "HP"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_TPS_ALL = { 2 ,{ "Fail", "Success"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT_MODE = { 3 ,{ "2k", "8k", "4k"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT_GI = { 4 ,{ "1/32", "1/16", "1/8", "1/4"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT_CONST = { 3 ,{ "QPSK", "16QAM", "64QAM"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT_HIERARCHY = { 4 ,{ "No Hier", "alpha=1", "alpha=2", "alpha=4"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT_CR = { 5 ,{ "1/2", "2/3", "3/4", "5/6", "7/8"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_BW = { 6 ,{ "NOT_SPECIFIED", "6MHZ", "7MHZ", "8MHZ", "5MHZ", "1_7MHZ"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_YESNO = { 2 ,{ "No","Yes"}};
|
||||
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_STATUS = { 14 ,{ "0_RESET", "1_TUNING", "2_AGC", "3_P1_SEARCH", "4_GI_SEARCH", "5_Clock_Carrier_Sync", "6_", "7_", "8_", "9_", "10_Freq_Sync", "11_L1_PRE_Lock", "12_L1_POST_Lock", "13_Sync"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_MODE = { 6 ,{ "1k", "2k", "4k", "8k", "16k", "32k"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_GI = { 7 ,{ "1/32", "1/16", "1/8", "1/4", "1/128", "19/128", "19/256"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_TYPE = { 3 ,{ "TS Only", "GS Only", "TS & GS"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_PAPR = { 4 ,{ "No PAPR", "ACE-PAPR", "TR-PAPR", "ACE&PAPR"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_L1_MOD = { 4 ,{ "BPSK", "QPSK", "16QAM", "64QAM"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_COD = { 6 ,{ "1/2", "3/5", "2/3", "3/4", "4/5", "5/6"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_FEC_TYPE = { 2 ,{ "16k LDPC", "64k LDPC"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_PILOT_PATTERN = { 8 ,{ "PP1", "PP2", "PP3", "PP4", "PP5", "PP6", "PP7", "PP8"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_PLP_MODE = { 3 ,{ "Not Specified", "Normal Mode", "HE Mode"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_PLP_TYPE = { 3 ,{ "Common", "Data Type1", "Data Type2"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_PAYLOAD_TYPE = { 4 ,{ "GFPS", "GCS", "GSE", "TS"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBT2_PLP_MOD = { 4 ,{ "QPSK", "16QAM", "64QAM", "256QAM"}};
|
||||
|
||||
|
||||
DMD_textlist_t DMD_TEXTLIST_ISDBT_MODE = { 3 ,{ "Mode1", "Mode2", "Mode3"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_ISDBT_GI = { 4 ,{ "1/32", "1/16", "1/8", "1/4"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_ISDBT_SYSTEM = { 2 ,{ "ISDBT", "ISDBT(SB)"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_ISDBT_MAP = { 8 ,{ "DQPSK", "QPSK", "16QAM", "64QAM", "-", "-", "-", "-"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_ISDBT_CR = { 8 ,{ "1/2", "2/3", "3/4", "5/6", "7/8", "-", "-", "-"}};
|
||||
DMD_textlist_t DMD_TEXTLIST_ISDBT_INT = { 8 ,{ "I=1,2,4", "I=2,4,8", "I=4,8,16", "I=8,16,32", "-", "-", "-", "-"}};
|
||||
|
||||
|
||||
DMD_textlist_t DMD_TEXTLIST_ISDBS_MOD = { 8 ,{ "Not Defined", "BPSK 1/2", "QPSK 1/2", "QPSK 2/3", "QPSK 3/4", "QPSK 5/6", "QPSK 7/8", "TC8PSK 2/3"}};
|
||||
|
||||
|
||||
DMD_textlist_t DMD_TEXTLIST_DVBC_STATUS = { 11 ,{ "0_RESET", "1_TUNING", "2_AGC", "3_Rate Search", "4_", "5_", "6_Mode Search", "7_", "8_Frame_Sync", "9_Sync", "10_Sync"}};
|
||||
|
||||
/* **************************************************** */
|
||||
/* Information Strings */
|
||||
/* **************************************************** */
|
||||
DMD_text_t DMD_INFO_TITLE_COMMON[] =
|
||||
{
|
||||
"ALL",
|
||||
"Reg. Ver.",
|
||||
"PSEQ Ver.",
|
||||
"SYSTEM",
|
||||
"LOCK",
|
||||
"AGC",
|
||||
"Bit Error",
|
||||
"Total Bit",
|
||||
"CNR(int)",
|
||||
"CNR(dec)",
|
||||
"Packet Error",
|
||||
"Total Packet",
|
||||
"Status",
|
||||
"Error Free",
|
||||
};
|
||||
DMD_text_t DMD_INFO_TITLE_DVBT[] =
|
||||
{
|
||||
"SQI",
|
||||
"Selected Hier.",
|
||||
"TPS Obtain",
|
||||
"Mode",
|
||||
"GI",
|
||||
"LENGTH_INDICATOR",
|
||||
"CONSTELLATION",
|
||||
"HIERARCHY",
|
||||
"HP_CODERATE",
|
||||
"LP_CODERATE",
|
||||
"CELLID"
|
||||
};
|
||||
DMD_text_t DMD_INFO_TITLE_DVBC[] =
|
||||
{
|
||||
"Not Defined"
|
||||
};
|
||||
|
||||
#ifndef DMD_DISABLE_ISDB
|
||||
DMD_text_t DMD_INFO_TITLE_ISDBS[] =
|
||||
{
|
||||
"BERRNUM_1",
|
||||
"BITNUM_1",
|
||||
"BERRNUM_2",
|
||||
"BITNUM_2",
|
||||
"BERRNUM_3",
|
||||
"BITNUM_3",
|
||||
"ERRORFREE_0",
|
||||
"ERRORFREE_1",
|
||||
"ERRORFREE_2",
|
||||
"ERRORFREE_3",
|
||||
"ERRORFREE_T",
|
||||
"TSNO",
|
||||
"TSID",
|
||||
"Modulation(selected)",
|
||||
"Emergency Switch",
|
||||
"UPLINK",
|
||||
"EXON",
|
||||
"CHANGE",
|
||||
"Modulation(Layer0)",
|
||||
"Slot Num. (Layer0)",
|
||||
"Modulation(Layer1)",
|
||||
"Slot Num. (Layer1)",
|
||||
"Modulation(Layer2)",
|
||||
"Slot Num. (Layer2)",
|
||||
"Modulation(Layer3)",
|
||||
"Slot Num. (Layer3)",
|
||||
"TSID0",
|
||||
"TSID1",
|
||||
"TSID2",
|
||||
"TSID3",
|
||||
"TSID4",
|
||||
"TSID5",
|
||||
"TSID6",
|
||||
"TSID7",
|
||||
"TSNO01",
|
||||
"TSNO02",
|
||||
"TSNO03",
|
||||
"TSNO04",
|
||||
"TSNO05",
|
||||
"TSNO06",
|
||||
"TSNO07",
|
||||
"TSNO08",
|
||||
"TSNO09",
|
||||
"TSNO10",
|
||||
"TSNO11",
|
||||
"TSNO12",
|
||||
"TSNO13",
|
||||
"TSNO14",
|
||||
"TSNO15",
|
||||
"TSNO16",
|
||||
"TSNO17",
|
||||
"TSNO18",
|
||||
"TSNO19",
|
||||
"TSNO20",
|
||||
"TSNO21",
|
||||
"TSNO22",
|
||||
"TSNO23",
|
||||
"TSNO24",
|
||||
"TSNO25",
|
||||
"TSNO26",
|
||||
"TSNO27",
|
||||
"TSNO28",
|
||||
"TSNO29",
|
||||
"TSNO30",
|
||||
"TSNO31",
|
||||
"TSNO32",
|
||||
"TSNO33",
|
||||
"TSNO34",
|
||||
"TSNO35",
|
||||
"TSNO36",
|
||||
"TSNO37",
|
||||
"TSNO38",
|
||||
"TSNO39",
|
||||
"TSNO40",
|
||||
"TSNO41",
|
||||
"TSNO42",
|
||||
"TSNO43",
|
||||
"TSNO44",
|
||||
"TSNO45",
|
||||
"TSNO46",
|
||||
"TSNO47",
|
||||
"TSNO48"};
|
||||
|
||||
DMD_text_t DMD_INFO_TITLE_ISDBT[] =
|
||||
{
|
||||
"BERRNUM_A",
|
||||
"BITNUM_A",
|
||||
"BERRNUM_B",
|
||||
"BITNUM_B",
|
||||
"BERRNUM_C",
|
||||
"BITNUM_C",
|
||||
"ERRORFREE_A",
|
||||
"ERRORFREE_B",
|
||||
"ERRORFREE_C",
|
||||
"MODE",
|
||||
"GI",
|
||||
"SYSTEM",
|
||||
"COUNTDOWN",
|
||||
"EMGFLG",
|
||||
"Part Reception",
|
||||
"Modulation(A)",
|
||||
"CodeRate(A)",
|
||||
"InterleaveLen.(A)",
|
||||
"Segment Num.(A)",
|
||||
"Modulation(B)",
|
||||
"CodeRate(B)",
|
||||
"InterleaveLen.(B)",
|
||||
"Segment Num.(B)",
|
||||
"Modulation(C)",
|
||||
"CodeRate(C)",
|
||||
"InterleaveLen.(C)",
|
||||
"Segment Num.(C)",
|
||||
"PhaseShift",
|
||||
};
|
||||
#endif
|
||||
DMD_text_t DMD_INFO_TITLE_DVBT2[] =
|
||||
{
|
||||
"SQI",
|
||||
"MODE",
|
||||
"GI",
|
||||
"BERRNUM_C",
|
||||
"BITNUM_C",
|
||||
"SELECTED_PLP",
|
||||
"L1_ALL",
|
||||
"TYPE",
|
||||
"BW_EXT",
|
||||
"S1",
|
||||
"S2",
|
||||
"PAPR",
|
||||
"L1_MOD",
|
||||
"L1_COD",
|
||||
"L1_FEC_TYPE",
|
||||
"L1_POST_SIZE",
|
||||
"L1_POST_INFO_SIZE",
|
||||
"PILOT_PATTERN",
|
||||
"TX_ID_AVAILABILITY",
|
||||
"CELL_ID",
|
||||
"NETWORK_ID",
|
||||
"T2_SYSTEM_ID",
|
||||
"NUM_T2_FRAMES",
|
||||
"NUM_DATA_SYMBOLS",
|
||||
"REGEN_FLAG",
|
||||
"L1_POST_EXTENSION",
|
||||
"NUM_RF",
|
||||
"CURRENT_RF_IDX",
|
||||
"SUB_SLICES_PER_FRAME",
|
||||
"SUB_SLICE_INTERVAL",
|
||||
"NUM_PLP",
|
||||
"NUM_AUX",
|
||||
"PLP_MODE",
|
||||
"FEF_TYPE",
|
||||
"FEF_LENGTH",
|
||||
"FEF_INTERVAL",
|
||||
"DAT_PLP_ID",
|
||||
"DAT_PLP_TYPE",
|
||||
"DAT_PLP_PAYLOAD_TYPE",
|
||||
"DAT_PLP_GROUP_ID",
|
||||
"DAT_PLP_COD",
|
||||
"DAT_PLP_MOD",
|
||||
"DAT_PLP_ROTATION",
|
||||
"DAT_PLP_FEC_TYPE",
|
||||
"DAT_PLP_NUM_BLOCKS_MAX",
|
||||
"DAT_PLP_FRAME_INTEVAL",
|
||||
"DAT_PLP_TIME_IL_LENGTH",
|
||||
"DAT_PLP_TIME_IL_TYPE",
|
||||
"DAT_FF_FLAG",
|
||||
"COM_PLP_ID",
|
||||
"COM_PLP_TYPE",
|
||||
"COM_PLP_PAYLOAD_TYPE",
|
||||
"COM_PLP_GROUP_ID",
|
||||
"COM_PLP_COD",
|
||||
"COM_PLP_MOD",
|
||||
"COM_PLP_ROTATION",
|
||||
"COM_PLP_FEC_TYPE",
|
||||
"COM_PLP_NUM_BLOCKS_MAX",
|
||||
"COM_PLP_FRAME_INTEVAL",
|
||||
"COM_PLP_TIME_IL_LENGTH",
|
||||
"COM_PLP_TIME_IL_TYPE",
|
||||
"COM_FF_FLAG",
|
||||
"FRAME_IDX",
|
||||
"TYPE_2_START",
|
||||
"L1_CHANGE_COUNTER",
|
||||
"START_RF_IDX",
|
||||
"DAT_FIRST_RF_IDX",
|
||||
"DAT_PLP_START",
|
||||
"DAT_PLP_NUM_BLOCKS",
|
||||
"COM_FIRST_RF_IDX",
|
||||
"COM_PLP_START",
|
||||
"COM_PLP_NUM_BLOCKS",
|
||||
"STATIC_FLAG",
|
||||
"STATIC_PADDING_FLAG",
|
||||
"IN_BAND_A_FLAG",
|
||||
"IN_BAND_B_FLAG"
|
||||
};
|
||||
#endif
|
||||
Binary file not shown.
@@ -0,0 +1,956 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_device.c
|
||||
@brief Device dependence functions for MN88436 multiple DMD
|
||||
@author Simon
|
||||
@date 2012/7/24
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
#include "../../inc/config.h"
|
||||
|
||||
#if USE_TUNER_88436
|
||||
//#include "os_task.h"
|
||||
#include <stdio.h>
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN_DMD_common.h"
|
||||
#include "../include/MN_DMD_device.h"
|
||||
#include "../include/MN_I2C.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
#include "../include/MN_DMD_types.h"
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/* Constant */
|
||||
/* **************************************************** */
|
||||
|
||||
DMD_u8_t DMD_I2C_SLAVE[DMD_MAX_DEVICE][DMD_REG_BANK] = { {0x18,0x10} , {0x19,0x11} , {0x1A,0x12} , {0x1B,0x13} };
|
||||
|
||||
/* **************************************************** */
|
||||
/* Local Functions */
|
||||
/* **************************************************** */
|
||||
|
||||
/* Information */
|
||||
DMD_u32_t DMD_all (DMD_PARAMETER* param);
|
||||
DMD_u32_t DMD_system (DMD_PARAMETER* param);
|
||||
DMD_u32_t DMD_lock (DMD_PARAMETER* param);
|
||||
DMD_u32_t DMD_agc (DMD_PARAMETER* param);
|
||||
DMD_u32_t DMD_ber (DMD_PARAMETER* param);
|
||||
DMD_u32_t DMD_per (DMD_PARAMETER* param);
|
||||
DMD_u32_t DMD_cnr (DMD_PARAMETER* param);
|
||||
DMD_u32_t DMD_errorfree (DMD_PARAMETER* param);
|
||||
|
||||
DMD_u32_t DMD_info_atsc ( DMD_PARAMETER *param , DMD_u32_t id , DMD_u32_t allflag);
|
||||
DMD_u32_t DMD_info_qam ( DMD_PARAMETER *param , DMD_u32_t id , DMD_u32_t allflag);
|
||||
DMD_u32_t DMD_info_analog( DMD_PARAMETER *param,DMD_u32_t id,DMD_u32_t allflag );
|
||||
|
||||
/* Scan ( for Channel Search )*/
|
||||
DMD_u32_t DMD_scan_vq( DMD_PARAMETER *param );
|
||||
|
||||
DMD_u32_t DMD_send_regset( DMD_u32_t devid , DMD_u8_t* regset );
|
||||
|
||||
/* **************************************************** */
|
||||
/* Functions */
|
||||
/* **************************************************** */
|
||||
DMD_u8_t DMD_BANK_MAIN(DMD_u8_t id)
|
||||
{
|
||||
DMD_u8_t ret;
|
||||
|
||||
switch(id)
|
||||
{
|
||||
case 0: ret = 0x18; break;
|
||||
case 1: ret = 0x19; break;
|
||||
case 2: ret = 0x1A; break;
|
||||
case 3: ret = 0x1B; break;
|
||||
default: ret = 0x18;break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
DMD_u8_t DMD_BANK_USR(DMD_u8_t id)
|
||||
{
|
||||
DMD_u8_t ret;
|
||||
|
||||
switch(id)
|
||||
{
|
||||
case 0: ret = 0x10; break;
|
||||
case 1: ret = 0x11; break;
|
||||
case 2: ret = 0x12; break;
|
||||
case 3: ret = 0x13; break;
|
||||
default: ret = 0x10;break;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/*! System Support information */
|
||||
/* **************************************************** */
|
||||
|
||||
DMD_u32_t DMD_system_support( DMD_SYSTEM_t sys )
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
|
||||
switch( sys )
|
||||
{
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
ret = DMD_E_OK;
|
||||
break;
|
||||
case DMD_E_ISDBT:
|
||||
case DMD_E_ISDBT_BRAZIL:
|
||||
case DMD_E_ISDBS:
|
||||
case DMD_E_DVBT:
|
||||
case DMD_E_DVBC:
|
||||
case DMD_E_QAMC_64QAM:
|
||||
case DMD_E_QAMC_256QAM:
|
||||
case DMD_E_NTSC_M_BTSC:
|
||||
case DMD_E_PAL_M_BTSC:
|
||||
case DMD_E_PAL_N_BTSC:
|
||||
case DMD_E_PAL_B_G_NICAM:
|
||||
case DMD_E_PAL_I_NiCAM:
|
||||
case DMD_E_PAL_D_NiCAM:
|
||||
case DMD_E_PAL_B_G_A2:
|
||||
case DMD_E_SECAM_L_NiCAM:
|
||||
case DMD_E_SECAM_L1_NiCAM:
|
||||
case DMD_E_SECAM_D_K_A2:
|
||||
case DMD_E_SECAM_BG_NICAM:
|
||||
case DMD_E_DVBT2:
|
||||
case DMD_E_DVBC2:
|
||||
default:
|
||||
ret = DMD_E_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
/* **************************************************** */
|
||||
/*! Load Auto Control Sequence */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_load_pseq( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u8_t data=0;
|
||||
DMD_u32_t i;
|
||||
/* Load PSEQ Program */
|
||||
ret = (DMD_ERROR_t)DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PSEQSET , 0x03 );
|
||||
//ret |= DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PSEQSET , &data);
|
||||
for(i=0;i<MN88436_REG_AUTOCTRL_SIZE;i++)
|
||||
ret |= DMD_I2C_Write( DMD_BANK_MAIN(param->devid), DMD_MAIN_PSEQPRG , MN88436_REG_AUTOCTRL[i] );
|
||||
|
||||
/* Check Parity bit */
|
||||
data = 0;
|
||||
ret |= DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PSEQSET , &data);
|
||||
if( data & 0x20 ){
|
||||
DMD_DBG_TRACE( "ERROR: PSEQ Parity" );
|
||||
ret |= DMD_E_ERROR;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret |= DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PSEQSET , 0x00 );
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Device Open */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_open( DMD_PARAMETER* param )
|
||||
{
|
||||
return DMD_E_OK;
|
||||
}
|
||||
/* **************************************************** */
|
||||
/*! Device term */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_term( DMD_PARAMETER* param )
|
||||
{
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Device close */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_close( DMD_PARAMETER* param )
|
||||
{
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Get Register Settings for Broadcast system */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_init( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
ret = DMD_E_OK;
|
||||
|
||||
DMD_send_registers( DMD_I2C_SLAVE[param->devid] , DMD_REG_ATSC );
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Set Register setting for each broadcast system & bandwidth */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_set_system( DMD_PARAMETER* param){
|
||||
DMD_ERROR_t ret;
|
||||
ret = DMD_E_OK;
|
||||
//Register transfer
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
DMD_send_registers( DMD_I2C_SLAVE[param->devid] , DMD_REG_ATSC );
|
||||
//DMD_device_load_pseq( param ); //troy.wangyx masked, 20120801, only need do once, in initialization.
|
||||
break;
|
||||
case DMD_E_QAMB_64QAM:
|
||||
DMD_send_registers( DMD_I2C_SLAVE[param->devid] , DMD_REG_QAM_B_64QAM );
|
||||
//DMD_device_load_pseq( param );
|
||||
break;
|
||||
case DMD_E_QAMB_256QAM:
|
||||
DMD_send_registers( DMD_I2C_SLAVE[param->devid] , DMD_REG_QAM_B_256QAM );
|
||||
//DMD_device_load_pseq( param );
|
||||
break;
|
||||
default:
|
||||
//Not Support
|
||||
//DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
}
|
||||
//troy.wangyx added, 20140904. Re-Run PSEQ. In func. DMD_send_registers, PSEQ is set HOLD - bit[0] : 1
|
||||
/*
|
||||
If PSEQ is hold, although no perfermance degraded :
|
||||
ATSC: It's hard to deal with big Phase noise
|
||||
QAM : Cannot deal with normal/inverse spctrum automatically
|
||||
*/
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PSEQSET , 0x00 );
|
||||
return ret;
|
||||
|
||||
}
|
||||
/* **************************************************** */
|
||||
/*! Pretune Process */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_pre_tune( DMD_PARAMETER* param )
|
||||
{
|
||||
return DMD_E_OK;
|
||||
}
|
||||
/* **************************************************** */
|
||||
/*! Pretune Process */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_post_tune( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_device_reset(param);
|
||||
return DMD_E_OK;
|
||||
}
|
||||
/* **************************************************** */
|
||||
/*! Soft Reset */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_reset( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
// DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_INVSET , 0x01);//invert clk
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_RSTSET1 , 0x77);
|
||||
ret = DMD_E_OK;
|
||||
break;
|
||||
default:
|
||||
ret = DMD_E_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! scan */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_scan( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_ERROR;
|
||||
DMD_u8_t data = 0;
|
||||
|
||||
switch( param->system )
|
||||
{
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
ret = (DMD_ERROR_t)DMD_scan_vq(param);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
//troy.wangyx added, 20140904. Check PSEQ status during normal mode. bit[0] = 1, means HOLD.
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PSEQSET, &data );
|
||||
if( data & 0x01 ){
|
||||
DMD_DBG_TRACE( "ERROR: PSEQ HOLD IN normal mode(pls. check PSEQ write flow) \n" );
|
||||
ret |= DMD_E_ERROR;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Set Information */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_set_info( DMD_PARAMETER* param , DMD_u32_t id , DMD_u32_t val)
|
||||
{
|
||||
DMD_ERROR_t ret =DMD_E_OK;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Get Information */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_get_info( DMD_PARAMETER* param , DMD_u32_t id )
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
DMD_u32_t all=0;
|
||||
DMD_u8_t rd;
|
||||
|
||||
ret = DMD_E_OK;
|
||||
switch(id)
|
||||
{
|
||||
case DMD_E_INFO_ALL:
|
||||
ret |= DMD_all(param);
|
||||
all = 1;
|
||||
case DMD_E_INFO_REGREV:
|
||||
param->info[DMD_E_INFO_REGREV] = DMD_RegSet_Rev;
|
||||
if( all == 0 ) break;
|
||||
case DMD_E_INFO_PSEQREV:
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PSEQOP1 , &rd );
|
||||
param->info[DMD_E_INFO_PSEQREV] = rd;
|
||||
case DMD_E_INFO_SYSTEM:
|
||||
if( all == 0 ) break;
|
||||
ret |= DMD_system(param);
|
||||
if( all == 0 ) break;
|
||||
case DMD_E_INFO_STATUS:
|
||||
case DMD_E_INFO_LOCK:
|
||||
ret |= DMD_lock(param);
|
||||
if( all == 0 ) break;
|
||||
case DMD_E_INFO_AGC:
|
||||
ret |= DMD_agc(param);
|
||||
if( all == 0 ) break;
|
||||
case DMD_E_INFO_BERRNUM :
|
||||
case DMD_E_INFO_BITNUM :
|
||||
ret |= DMD_ber(param);
|
||||
if( all == 0 ) break;
|
||||
case DMD_E_INFO_CNR_INT:
|
||||
case DMD_E_INFO_CNR_DEC:
|
||||
ret |= DMD_cnr(param);
|
||||
if( all == 0 ) break;
|
||||
case DMD_E_INFO_PERRNUM:
|
||||
case DMD_E_INFO_PACKETNUM:
|
||||
ret |= DMD_per(param);
|
||||
if( all == 0 ) break;
|
||||
case DMD_E_INFO_ERRORFREE:
|
||||
ret |= DMD_errorfree(param);
|
||||
if( all == 0 ) break;
|
||||
default:
|
||||
switch( param->system )
|
||||
{
|
||||
case DMD_E_ATSC:
|
||||
ret |= DMD_info_atsc(param,id,all);
|
||||
break;
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
ret |= DMD_info_qam(param,id,all);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* Informations */
|
||||
/* **************************************************** */
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_all
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_all( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u32_t info = 0;
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
info = DMD_E_INFO_ATSC_END_OF_INFORMATION;
|
||||
break;
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
info = DMD_E_INFO_QAM_END_OF_INFORMATION;
|
||||
break;
|
||||
default:
|
||||
//Not Support
|
||||
//DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
}
|
||||
|
||||
param->info[DMD_E_INFO_ALL] = info;
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_system
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_system( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
|
||||
param->info[DMD_E_INFO_SYSTEM] = param->system;
|
||||
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_lock
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
static DMD_u32_t last_lockstatus = 0;
|
||||
DMD_u32_t DMD_lock( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u8_t rd = 0;
|
||||
DMD_u32_t lockstatus = 0;
|
||||
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_STSMON1 , &rd );
|
||||
rd &= 1;
|
||||
if( rd ) lockstatus = 1;
|
||||
break;
|
||||
default:
|
||||
//Not Support
|
||||
DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
}
|
||||
|
||||
param->info[DMD_E_INFO_STATUS] = rd;
|
||||
if(last_lockstatus != lockstatus)
|
||||
{
|
||||
last_lockstatus= lockstatus;
|
||||
}
|
||||
if( lockstatus )
|
||||
{
|
||||
param->info[DMD_E_INFO_LOCK] = DMD_E_LOCKED;
|
||||
}
|
||||
else if( param->info[DMD_E_INFO_LOCK] == DMD_E_LOCKED )
|
||||
{
|
||||
param->info[DMD_E_INFO_LOCK] = DMD_E_LOCK_ERROR;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_agc
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_agc( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u32_t ifagc = 0;
|
||||
DMD_u8_t RF1, RF2, IF1, IF2;
|
||||
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_RFAGCMON1 , &RF1 );
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_RFAGCMON2 , &RF2 );
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_IFAGCMON1 , &IF1 );
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_IFAGCMON2 , &IF2 );
|
||||
//rfagc = RF1 * 256 + RF2;
|
||||
ifagc = IF1 * 256 + IF2;
|
||||
break;
|
||||
default:
|
||||
//Not Support
|
||||
DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
break;
|
||||
}
|
||||
|
||||
param->info[DMD_E_INFO_AGC] = ifagc;
|
||||
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_ber
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_ber( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u32_t berr = 0 ,bit = 1;
|
||||
DMD_u8_t rd;
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
DMD_I2C_Write( DMD_BANK_USR(param->devid) , DMD_USR_BERTSET1 , 0x40 );
|
||||
DMD_I2C_Write( DMD_BANK_USR(param->devid) , DMD_USR_BERTSET2 , 0x0C );
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_BERTSET1 , &rd );
|
||||
rd &= 0xfe; //bit error mode
|
||||
DMD_I2C_Write( DMD_BANK_USR(param->devid) , DMD_USR_BERTSET1 , rd );
|
||||
DMD_I2C_Read ( DMD_BANK_USR(param->devid) , DMD_USR_BERTSET2 , &rd );
|
||||
bit = (rd >> 2) & 0x7;
|
||||
if( param->system == DMD_E_ATSC )
|
||||
bit = (1 << (5+bit*2))*208*8;
|
||||
else
|
||||
bit = (1 << (5+bit*2))*127*7;
|
||||
DMD_I2C_Read ( DMD_BANK_USR(param->devid) , DMD_USR_BERMON1 , &rd );
|
||||
berr = rd * 65536;
|
||||
DMD_I2C_Read ( DMD_BANK_USR(param->devid) , DMD_USR_BERMON2 , &rd );
|
||||
berr += rd * 256;
|
||||
DMD_I2C_Read ( DMD_BANK_USR(param->devid) , DMD_USR_BERMON3 , &rd );
|
||||
berr += rd ;
|
||||
break;
|
||||
default:
|
||||
//Not Support
|
||||
DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
}
|
||||
|
||||
param->info[DMD_E_INFO_BERRNUM] = berr;
|
||||
param->info[DMD_E_INFO_BITNUM] = bit;
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_per
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_per( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u32_t perr = 0 ,pkt = 1;
|
||||
DMD_u8_t rd;
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERTSET1P , 0x41 );
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERTSET2P , 0x0C );
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERTSET1P , &rd );
|
||||
rd &= 0xff;
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERTSET1P , rd );
|
||||
DMD_I2C_Read ( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERTSET2P , &rd );
|
||||
pkt = (rd >> 2) & 0x7;
|
||||
pkt = (1 << (5+pkt*2));
|
||||
DMD_I2C_Read ( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERMON1P , &rd );
|
||||
perr = rd * 65536;
|
||||
DMD_I2C_Read ( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERMON2P , &rd );
|
||||
perr += rd * 256;
|
||||
DMD_I2C_Read ( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERMON3P , &rd );
|
||||
perr += rd ;
|
||||
|
||||
break;
|
||||
default:
|
||||
//Not Support
|
||||
DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
}
|
||||
|
||||
param->info[DMD_E_INFO_PERRNUM] = perr;
|
||||
param->info[DMD_E_INFO_PACKETNUM] = pkt;
|
||||
printf("per is %d\n",perr);
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_cnr
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_cnr( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u8_t rd;
|
||||
DMD_u32_t cni,cnd;
|
||||
DMD_s32_t cnr;
|
||||
DMD_u32_t x,y;
|
||||
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_CNMON1 , &rd );
|
||||
x = 0x100 * rd;
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_CNMON2 , &rd );
|
||||
x += rd;
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_CNMON3 , &rd );
|
||||
y = 0x100 * rd;
|
||||
DMD_I2C_Read( DMD_BANK_USR(param->devid) , DMD_USR_CNMON4 , &rd );
|
||||
y += rd;
|
||||
if( param->system == DMD_E_ATSC )
|
||||
{
|
||||
//after EQ
|
||||
cnr = 4634 - log10_easy( y );
|
||||
}
|
||||
else
|
||||
{
|
||||
if( y != 0 )
|
||||
cnr = log10_easy( (8*x) / y );
|
||||
else
|
||||
cnr = 0;
|
||||
}
|
||||
break;
|
||||
default:
|
||||
cnr = 0;
|
||||
//Not Support
|
||||
DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
break;
|
||||
}
|
||||
if( cnr < 0 ) cnr = 0;
|
||||
cni = (DMD_u32_t ) cnr / 100;
|
||||
cnd = (DMD_u32_t ) cnr % 100;
|
||||
param->info[DMD_E_INFO_CNR_INT] = cni;
|
||||
param->info[DMD_E_INFO_CNR_DEC] = cnd;
|
||||
//printf("snr is %d.%02d\n",cni,cnd);
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_errorfree
|
||||
*
|
||||
* DMD_PARAMETER* param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_errorfree( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u32_t erfree = 0;
|
||||
DMD_u8_t rd;
|
||||
|
||||
switch( param->system ){
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_BERFLGP , &rd );
|
||||
if( rd & 0x10 )
|
||||
erfree = 0;
|
||||
else
|
||||
erfree = 1;
|
||||
break;
|
||||
default:
|
||||
//Not Support
|
||||
DMD_DBG_TRACE( "ERROR : Not Supported System");
|
||||
ret = DMD_E_ERROR;
|
||||
}
|
||||
|
||||
param->info[DMD_E_INFO_ERRORFREE] = erfree;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_info_atsc
|
||||
*
|
||||
* DMD_PARAMETER *param
|
||||
* DMD_u32_t id
|
||||
* DMD_u32_t allflag
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_info_atsc( DMD_PARAMETER *param,DMD_u32_t id,DMD_u32_t allflag )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
|
||||
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_info_qam
|
||||
*
|
||||
* DMD_PARAMETER *param
|
||||
* DMD_u32_t id
|
||||
* DMD_u32_t allflag
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_info_qam( DMD_PARAMETER *param,DMD_u32_t id,DMD_u32_t allflag )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
|
||||
|
||||
return ret;
|
||||
}
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_info_analog
|
||||
*
|
||||
* DMD_PARAMETER *param
|
||||
* DMD_u32_t id
|
||||
* DMD_u32_t allflag
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_info_analog( DMD_PARAMETER *param,DMD_u32_t id,DMD_u32_t allflag )
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*Start********************************************************************/
|
||||
/**
|
||||
* DMD_scan_vq
|
||||
*
|
||||
* DMD_PARAMETER *param
|
||||
*
|
||||
* @return
|
||||
* success : True
|
||||
* fail : False
|
||||
*************************************************************************/
|
||||
DMD_u32_t DMD_scan_vq( DMD_PARAMETER *param )
|
||||
{
|
||||
DMD_u32_t st;
|
||||
DMD_u32_t now;
|
||||
DMD_u8_t rd;
|
||||
DMD_ERROR_t ret = DMD_E_ERROR;
|
||||
|
||||
int count=20;
|
||||
DMD_timer(&st);
|
||||
param->info[DMD_E_INFO_LOCK] = DMD_E_LOCK_ERROR;
|
||||
|
||||
|
||||
do
|
||||
{
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(param->devid) ,DMD_MAIN_STSMON1 , &rd );
|
||||
//VQ LOCK
|
||||
if( rd & 0x1 )
|
||||
{
|
||||
param->info[DMD_E_INFO_LOCK] = DMD_E_LOCKED;
|
||||
ret = DMD_E_OK;
|
||||
break;
|
||||
}
|
||||
DMD_wait(100); //wait 1ms
|
||||
DMD_timer( &now );
|
||||
count --;
|
||||
}
|
||||
while( count);//now - st < timeout ); //timeout
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* Register */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_send_regset( DMD_u32_t devid , DMD_u8_t* regset )
|
||||
{
|
||||
DMD_u32_t i;
|
||||
for(i=0;;)
|
||||
{
|
||||
if( regset[i] == 0xff ) break;
|
||||
DMD_I2C_Write( DMD_I2C_SLAVE[devid][regset[i]] , regset[i+1] , regset[i+2] );
|
||||
i=i+3;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/* Set TS parallel or serial mode. If you want to set to parallel, make sure your hardware connection no problem */
|
||||
DMD_u32_t DMD_set_ts_output(DMD_PARAMETER* param, DMD_TSOUT ts_out )
|
||||
{
|
||||
switch(ts_out)
|
||||
{
|
||||
case DMD_E_TSOUT_PARALLEL_FIXED_CLOCK:
|
||||
//TS parallel (Fixed clock mode) TSSET1:0x00 FIFOSET:0xE1
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_CPOSET2 , 0xc1 );
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_GPSET1 , 0xff );//troy.wang, 121010, for parallel data setting
|
||||
break;
|
||||
case DMD_E_TSOUT_SERIAL_VARIABLE_CLOCK:
|
||||
//TS serial(Variable clock mode) TSSET1:0x1D FIFOSET:0xE3
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_CPOSET2 , 0xc0 );
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_GPSET1 , 0x00 );
|
||||
// DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_CPOSET2 , 0x80 );
|
||||
// DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_CPOSET1 , 0x02 );
|
||||
// DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_GPSET1 , 0xC0 ); //set error output
|
||||
break;
|
||||
default:
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
//invert ==1 反转 0:正常模式
|
||||
//main 0x34 bit7 0:normal 1:invert
|
||||
|
||||
DMD_u32_t DMD_set_IF_invert(DMD_PARAMETER* param,unsigned long invert)
|
||||
{
|
||||
DMD_u8_t data = 0;
|
||||
|
||||
DMD_I2C_Read(DMD_BANK_MAIN(param->devid), DMD_MAIN_PAFCSGSET2,&data);
|
||||
if(invert)
|
||||
{
|
||||
if((data&0x80)==0)
|
||||
{
|
||||
data|=0x80;
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PAFCSGSET2,data);
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
if(data&0x80)
|
||||
{
|
||||
data&=~0x80;
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_PAFCSGSET2 , data);
|
||||
}
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Set Register setting for I2C communication mode between DMD and Tuner*/
|
||||
/* **************************************************** */
|
||||
//Troy.wangyx 20120801, set once is enough
|
||||
DMD_u32_t DMD_device_set_TCB_mode( DMD_PARAMETER* param)
|
||||
{
|
||||
#if 1
|
||||
DMD_ERROR_t ret;
|
||||
DMD_u8_t bank;
|
||||
DMD_u8_t tcbadr,tcbset;
|
||||
DMD_u8_t data;
|
||||
ret = DMD_E_ERROR;
|
||||
|
||||
bank = DMD_BANK_MAIN(param->devid);
|
||||
tcbadr=DMD_MAIN_TCBADR;
|
||||
tcbset=DMD_MAIN_TCBSET;
|
||||
|
||||
/* Set TCB Through Mode */
|
||||
ret =(DMD_ERROR_t)DMD_I2C_MaskWrite( bank , tcbset ,0xff ,0xd3);//0x7f , 0x53 );
|
||||
ret |= DMD_I2C_Write( bank , tcbadr , 0x00 );
|
||||
DMD_I2C_Read(bank , tcbset,&data);
|
||||
(void)data;
|
||||
printf("tcbset:%d\n",data);
|
||||
DMD_I2C_Read(bank , tcbadr,&data);
|
||||
printf("tcbset:%d ret=%d\n",data,ret);
|
||||
(void)data;
|
||||
return ret;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Set Register to enhance "Single static echo MINUS delay "'s performance */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_set_echo_enhance(DMD_PARAMETER* param, DMD_ECHO_PERFORMANCE_SET echo_out )
|
||||
{
|
||||
switch(echo_out)
|
||||
{
|
||||
case DMD_E_ENHANCE_MINUS_ECHO_DELAY_DEFAULT:
|
||||
// DMD_MAIN_VEQSET2 0x80 | field test passed result
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_VEQSET2 , 0x80 );
|
||||
break;
|
||||
case DMD_E_ENHANCE_MINUS_ECHO_DELAY_NO_SIDEEFFECT:
|
||||
//DMD_MAIN_VEQSET2 0xE0 | Lab test. enhance MINUS echo dalay performance, no side effect
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_VEQSET2 , 0xE0 );
|
||||
break;
|
||||
case DMD_E_ENHANCE_MINUS_ECHO_DELAY_HAS_SIDEEFFECT:
|
||||
//DMD_MAIN_VEQSET2 0xF0 | FIFOSET:0xE3 Lab test. enhance MINUS echo dalay performance, has side effect on CCI(NTSC interface)
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_VEQSET2 , 0xF0 );
|
||||
break;
|
||||
default:
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* CCI(NTSC interface) ipmrovement */
|
||||
/* To detect analog inference signal and do relative EQ setting */
|
||||
/*
|
||||
[effect]
|
||||
To improve CCI performance about 2dB.
|
||||
|
||||
[Notice]
|
||||
1. Pls. add this function after signal locked and decoding begins , once a second, once a second
|
||||
2. Always do read register MAIN_NRFRDAT
|
||||
*/
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_device_cochan_interface_detect( DMD_PARAMETER *param )
|
||||
{
|
||||
DMD_u8_t rd_co, rd_eq;
|
||||
|
||||
// only affect 8VSB
|
||||
if (( param->system == DMD_E_ATSC )&&(param->info[DMD_E_INFO_LOCK] == DMD_E_LOCKED ))
|
||||
{
|
||||
// detect co-channel status
|
||||
DMD_I2C_Read ( DMD_BANK_MAIN(param->devid) , DMD_MAIN_NRFRDAT, &rd_co );
|
||||
|
||||
// EQ setting check
|
||||
DMD_I2C_Read( DMD_BANK_MAIN(param->devid) , DMD_MAIN_VEQSET21, &rd_eq );
|
||||
printf(" --- Pana ATSC --- Co-ch status[%x], EQset[%x] \n ", rd_co,rd_eq);
|
||||
|
||||
//strong analog Interface signal detected and correponding EQ mode not set yet
|
||||
if ( (( rd_co & 0x20) == 0x20) && ( rd_eq != 0xe5) )
|
||||
{
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_VEQSET21, 0xE5 );
|
||||
}
|
||||
else if ((( rd_co & 0x20) == 0)&& ( rd_eq != 0xe9))// normal status
|
||||
{
|
||||
DMD_I2C_Write( DMD_BANK_MAIN(param->devid) , DMD_MAIN_VEQSET21, 0xE9 );//for other test items' performance
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
#endif
|
||||
Binary file not shown.
@@ -0,0 +1,411 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_driver.c
|
||||
@brief Panasonic Demodulator Driver
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
#include "../../inc/config.h"
|
||||
|
||||
#if USE_TUNER_88436
|
||||
#include "../include/MN_DMD_types.h"
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN_DMD_device.h"
|
||||
#include "../include/MN_DMD_common.h"
|
||||
#include "../include/MN_I2C.h"
|
||||
#include "../include/MN_Tuner.h"
|
||||
|
||||
/* **************************************************** */
|
||||
/* Local Functions */
|
||||
/* **************************************************** */
|
||||
|
||||
/* **************************************************** */
|
||||
/* Definition of Constant Strings */
|
||||
/* **************************************************** */
|
||||
|
||||
/* **************************************************** */
|
||||
/* Public Functions */
|
||||
/* **************************************************** */
|
||||
/*! Demodulator set device ID */
|
||||
static DMD_PARAMETER mn_param;
|
||||
|
||||
DMD_u32_t DMD_set_devid( DMD_PARAMETER* param , DMD_u32_t id )
|
||||
{
|
||||
param->devid = id;
|
||||
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
|
||||
/*! Demodulator API Initialize & Open */
|
||||
/*!
|
||||
*initialize parameter variable (DMD_PARAMETER* param)
|
||||
*open & connect to USB Device for I2C communication
|
||||
(for WINDOWS API only)
|
||||
*/
|
||||
DMD_u32_t DMD_open( DMD_PARAMETER* param)
|
||||
{
|
||||
int i;
|
||||
|
||||
param->devid = 0;
|
||||
param->system= DMD_E_NOT_DEFINED;
|
||||
/* Initialize Parameter Variable */
|
||||
for(i=0;i<DMD_INFORMATION_MAX;i++){
|
||||
param->info[i] = 0; //NOT_DEFINED
|
||||
}
|
||||
param->bw = DMD_E_BW_NOT_SPECIFIED;
|
||||
param->freq = 666000;
|
||||
param->funit = DMD_E_KHZ;
|
||||
|
||||
//troy.wang, 20120801, for customer to pass test in lab.( SPEC : A74-2010 )
|
||||
param->echo_set = DMD_E_ENHANCE_MINUS_ECHO_DELAY_NO_SIDEEFFECT;
|
||||
|
||||
if( DMD_device_open( param ) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: DMD open" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
if( DMD_I2C_open() == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: I2C open" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Demodulator LSI Initialize */
|
||||
/*!
|
||||
*release power down
|
||||
*Tuner Initialize
|
||||
*transfer common register settings via I2C
|
||||
*transfer auto countrol sequence via I2C
|
||||
*/
|
||||
DMD_u32_t DMD_init(DMD_u32_t freq)
|
||||
{
|
||||
/*IF use DMD to repeat I2C cmd, firstly initializing DMD is better. Troy.wangyx, 120801*/
|
||||
/* Demodulator LSI Initialize */
|
||||
|
||||
mn_param.freq = freq;
|
||||
mn_param.devid = 0;
|
||||
mn_param.system = DMD_E_ATSC;
|
||||
mn_param.ts_out = DMD_E_TSOUT_PARALLEL_FIXED_CLOCK;
|
||||
mn_param.bw = DMD_E_BW_6MHZ;
|
||||
mn_param.funit = DMD_E_HZ;
|
||||
mn_param.echo_set = DMD_E_ENHANCE_MINUS_ECHO_DELAY_DEFAULT;
|
||||
|
||||
|
||||
if( DMD_device_init( &mn_param ) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: DMD Initialize" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
/* Auto Control Sequence Transfer */
|
||||
if( DMD_device_load_pseq(&mn_param ) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: DMD Load Autocontrol" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
/* 20120801, troy, set TCB control mode : Through mode */
|
||||
if (DMD_device_set_TCB_mode( &mn_param ) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: DMD set tcb I2C mode" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
if( DMD_Tuner_init(mn_param.freq) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: Tuner Initialize" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
DMD_set_system(&mn_param);
|
||||
//DMD_scan(&mn_param);
|
||||
//DMD_device_scan(&mn_param);
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Select Broadcast Sytem */
|
||||
/*!
|
||||
*Transfer register settings for each system
|
||||
*/
|
||||
DMD_u32_t DMD_set_system( DMD_PARAMETER* param )
|
||||
{
|
||||
if( DMD_device_set_system( param ) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE("ERROR:device set system");
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
/* '11/08/29 : OKAMOTO Select TS output. */
|
||||
if( DMD_set_ts_output(param, param->ts_out ) == DMD_E_ERROR ){
|
||||
DMD_DBG_TRACE("ERROR:set ts output");
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
//DMD_device_set_system 将tcb 重置了,必须再重新调用TCB_mode函数
|
||||
/* 20120801, troy, set TCB control mode : Through mode */
|
||||
if (DMD_device_set_TCB_mode( param ) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: DMD set tcb I2C mode" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
/* 20120801, troy, set echo performance */
|
||||
if (DMD_device_set_echo_enhance( param, param->echo_set) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE( "ERROR: DMD set echo performace" );
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
if( DMD_Tuner_set_system( param ) == DMD_E_ERROR )
|
||||
{
|
||||
DMD_DBG_TRACE("===== ERROR:Tuner set system =====\r\n");
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Tune */
|
||||
DMD_u32_t DMD_tune( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
|
||||
/* Call pre tune process */
|
||||
ret = (DMD_ERROR_t)DMD_device_pre_tune( param );
|
||||
/* Tuner */
|
||||
ret |= DMD_Tuner_tune( param );
|
||||
/* Call post tune process */
|
||||
ret |= DMD_device_post_tune( param );
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*! scan */
|
||||
DMD_u32_t DMD_scan( DMD_PARAMETER* param )
|
||||
{
|
||||
/* Call pre tune process */
|
||||
DMD_device_pre_tune( param ); //default empty
|
||||
|
||||
/* Tuner: RF and BW input*/
|
||||
DMD_Tuner_tune( param );
|
||||
/* DMD software reset */
|
||||
DMD_device_post_tune( param );
|
||||
|
||||
/* Call Lock/SYNC Status Judgement */
|
||||
DMD_device_scan( param );
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*! term */
|
||||
DMD_u32_t DMD_term( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
|
||||
ret = (DMD_ERROR_t)DMD_device_term(param);
|
||||
ret |= DMD_Tuner_term();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*! close */
|
||||
DMD_u32_t DMD_close( DMD_PARAMETER* param )
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
|
||||
ret = (DMD_ERROR_t)DMD_device_close(param);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* Set Information */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_set_info( DMD_PARAMETER* param , DMD_u32_t id , DMD_u32_t val){
|
||||
|
||||
return DMD_device_set_info( param , id , val );
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* Get Information */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_get_info( DMD_PARAMETER* param , DMD_u32_t id ){
|
||||
|
||||
return DMD_device_get_info( param , id );
|
||||
}
|
||||
|
||||
DMD_text_t DMD_info_title( DMD_SYSTEM_t sys ,DMD_u32_t id )
|
||||
{
|
||||
|
||||
if( id < DMD_E_INFO_COMMON_END_OF_INFORMATION )
|
||||
{
|
||||
return DMD_INFO_TITLE_COMMON[id];
|
||||
|
||||
}
|
||||
else
|
||||
switch( sys )
|
||||
{
|
||||
case DMD_E_DVBT:
|
||||
if( id < DMD_E_INFO_DVBT_END_OF_INFORMATION ){
|
||||
id -= DMD_E_INFO_COMMON_END_OF_INFORMATION;
|
||||
return DMD_INFO_TITLE_DVBT[id];
|
||||
}
|
||||
else
|
||||
{
|
||||
return "Not Defined";
|
||||
}
|
||||
case DMD_E_DVBT2:
|
||||
if( id < DMD_E_INFO_DVBT2_END_OF_INFORMATION ){
|
||||
id -= DMD_E_INFO_COMMON_END_OF_INFORMATION;
|
||||
return DMD_INFO_TITLE_DVBT2[id];
|
||||
}
|
||||
else
|
||||
{
|
||||
return "Not Defined";
|
||||
}
|
||||
case DMD_E_DVBC:
|
||||
if( id < DMD_E_INFO_DVBC_END_OF_INFORMATION ){
|
||||
id -= DMD_E_INFO_COMMON_END_OF_INFORMATION;
|
||||
return DMD_INFO_TITLE_DVBC[id];
|
||||
}
|
||||
else
|
||||
{
|
||||
return "Not Defined";
|
||||
}
|
||||
#ifndef DMD_DISABLE_ISDB
|
||||
case DMD_E_ISDBT:
|
||||
case DMD_E_ISDBT_BRAZIL:
|
||||
if( id < DMD_E_INFO_ISDBT_END_OF_INFORMATION ){
|
||||
id -= DMD_E_INFO_COMMON_END_OF_INFORMATION;
|
||||
return DMD_INFO_TITLE_ISDBT[id];
|
||||
}
|
||||
else
|
||||
{
|
||||
return "Not Defined";
|
||||
}
|
||||
case DMD_E_ISDBS:
|
||||
if( id < DMD_E_INFO_ISDBS_END_OF_INFORMATION ){
|
||||
id -= DMD_E_INFO_COMMON_END_OF_INFORMATION;
|
||||
return DMD_INFO_TITLE_ISDBS[id];
|
||||
}
|
||||
else
|
||||
{
|
||||
return "Not Defined";
|
||||
}
|
||||
#endif
|
||||
default:
|
||||
break;
|
||||
}
|
||||
return "Not Defined";
|
||||
}
|
||||
|
||||
DMD_text_t DMD_info_value( DMD_SYSTEM_t sys ,DMD_u32_t id , DMD_u32_t val )
|
||||
{
|
||||
if( id < DMD_E_INFO_COMMON_END_OF_INFORMATION && id != DMD_E_INFO_STATUS )
|
||||
{
|
||||
return DMD_info_value_common( id ,val );
|
||||
}
|
||||
else
|
||||
{
|
||||
switch( sys )
|
||||
{
|
||||
case DMD_E_DVBT2:
|
||||
return DMD_info_value_dvbt2( id , val );
|
||||
case DMD_E_DVBT:
|
||||
return DMD_info_value_dvbt( id , val );
|
||||
#ifndef DMD_DISABLE_ISDB
|
||||
case DMD_E_ISDBT:
|
||||
case DMD_E_ISDBT_BRAZIL:
|
||||
return DMD_info_value_isdbt( id , val );
|
||||
case DMD_E_ISDBS:
|
||||
return DMD_info_value_isdbs( id , val );
|
||||
#endif
|
||||
case DMD_E_ATSC:
|
||||
case DMD_E_QAMB_256QAM:
|
||||
case DMD_E_QAMB_64QAM:
|
||||
case DMD_E_QAMC_256QAM:
|
||||
case DMD_E_QAMC_64QAM:
|
||||
return DMD_info_value_vq( id , val );
|
||||
case DMD_E_DVBC:
|
||||
return DMD_info_value_dvbc( id , val );
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return "Not Defined";
|
||||
}
|
||||
DMD_text_t DMD_value_text( DMD_PARAMETER* param , DMD_u32_t id )
|
||||
{
|
||||
return DMD_info_value( param->system , id , param->info[id] );
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/* Floating Functions */
|
||||
/* **************************************************** */
|
||||
// Get BER
|
||||
DMD_float_t DMD_get_ber(void)
|
||||
{
|
||||
DMD_float_t ret;
|
||||
|
||||
DMD_get_info(&mn_param , DMD_E_INFO_BERRNUM );
|
||||
|
||||
if(mn_param.info[DMD_E_INFO_BITNUM] == 0 )
|
||||
{
|
||||
ret = 1.0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = (DMD_float_t) mn_param.info[DMD_E_INFO_BERRNUM]
|
||||
/ (DMD_float_t) mn_param.info[DMD_E_INFO_BITNUM];
|
||||
}
|
||||
return ret;
|
||||
|
||||
}
|
||||
DMD_float_t DMD_get_per(void)
|
||||
{
|
||||
DMD_float_t ret;
|
||||
|
||||
DMD_get_info( &mn_param , DMD_E_INFO_PACKETNUM );
|
||||
|
||||
if( mn_param.info[DMD_E_INFO_PACKETNUM] == 0 )
|
||||
{
|
||||
ret = 1.0;
|
||||
}
|
||||
else
|
||||
{
|
||||
ret = (DMD_float_t) mn_param.info[DMD_E_INFO_PERRNUM]/(DMD_float_t) mn_param.info[DMD_E_INFO_PACKETNUM];
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
//Get CNR
|
||||
DMD_float_t DMD_get_cnr(void)
|
||||
{
|
||||
DMD_float_t ret;
|
||||
|
||||
DMD_get_info( &mn_param , DMD_E_INFO_CNR_INT );
|
||||
|
||||
ret = (DMD_float_t) mn_param.info[DMD_E_INFO_CNR_INT]
|
||||
+ (DMD_float_t) mn_param.info[DMD_E_INFO_CNR_DEC] / ( (DMD_float_t) 100.0 );
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
DMD_u32_t DMD_get_lock(void)
|
||||
{
|
||||
DMD_get_info( &mn_param , DMD_E_INFO_LOCK );
|
||||
|
||||
if(mn_param.info[DMD_E_INFO_LOCK]==DMD_E_LOCKED)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
Binary file not shown.
@@ -0,0 +1,346 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_I2C_WIN.c
|
||||
@brief I2C communication wrapper
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
#include "../../inc/config.h"
|
||||
|
||||
#if USE_TUNER_88436
|
||||
#include <string.h>
|
||||
#include "../../inc/i2c_drv.h"
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN_I2C.h"
|
||||
#include "../include/MN_DMD_common.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
/* **************************************************** */
|
||||
/* **************************************************** */
|
||||
#define DMD_I2C_MAXSIZE 127
|
||||
#define DMD_I2C_ADDRESS 0X18
|
||||
extern void delay_ms(uint32 nms);
|
||||
uint32 tuner_i2c_read_offset8(uint8 slave_addr,uint8 offset,uint8 *pdata,uint8 length);
|
||||
|
||||
/*! I2C Initialize Function*/
|
||||
DMD_u32_t DMD_I2C_open(void)
|
||||
{
|
||||
//TODO: Please call I2C initialize API here
|
||||
//this function is called by _open
|
||||
|
||||
return DMD_E_OK;
|
||||
}
|
||||
/*! Write 1byte */
|
||||
|
||||
uint32 tuner_i2c_write(uint8 slave_addr,uint8 *pdata,uint8 length);
|
||||
uint32 tuner_i2c_read(uint8 slave_addr,uint8 *pdata,uint8 length);
|
||||
|
||||
DMD_u32_t DMD_I2C_Write(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t data )
|
||||
{
|
||||
DMD_u8_t i2cSlaveAddr = slvadr;//slvadr<<1;
|
||||
DMD_u8_t u8Reg[2];
|
||||
|
||||
u8Reg[0] = adr;
|
||||
u8Reg[1] = data;
|
||||
if(tuner_i2c_write(i2cSlaveAddr, u8Reg, 2)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Read 1byte */
|
||||
DMD_u32_t DMD_I2C_Read(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t *data )
|
||||
{
|
||||
DMD_u8_t i2cSlaveAddr = slvadr;//slvadr<<1;
|
||||
DMD_u8_t u8Reg[1];
|
||||
|
||||
u8Reg[0] = adr;
|
||||
tuner_i2c_write(i2cSlaveAddr, u8Reg, 1);
|
||||
if(tuner_i2c_read(i2cSlaveAddr, data, 1)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
DMD_u32_t DMD_I2C_Read_Multi(DMD_u8_t slvadr, DMD_u8_t adr,DMD_u8_t *data,DMD_u32_t len)
|
||||
{
|
||||
DMD_u8_t i2cSlaveAddr = slvadr;//slvadr<<1;
|
||||
//DMD_u8_t u8Reg[1];
|
||||
|
||||
//u8Reg[0] = adr;
|
||||
tuner_i2c_read_offset8(i2cSlaveAddr,adr,data, len);
|
||||
//tuner_i2c_write(i2cSlaveAddr, u8Reg, 1);
|
||||
//if(tuner_i2c_read(i2cSlaveAddr, data, len)==0)
|
||||
//{
|
||||
// return DMD_E_ERROR;
|
||||
//}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
DMD_u32_t DMD_I2C_Read_Tuner(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t *data )
|
||||
{
|
||||
DMD_u8_t i2cSlaveAddr = slvadr;
|
||||
DMD_u8_t u8Reg_tuner[2];
|
||||
|
||||
u8Reg_tuner[0] = 0xFB;
|
||||
u8Reg_tuner[1] = adr;
|
||||
tuner_i2c_write(i2cSlaveAddr, u8Reg_tuner, 2);
|
||||
if(tuner_i2c_read(i2cSlaveAddr, data, 1)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
Write/Read any Length to DMD and Tuner;
|
||||
DMD_u8_t slvadr : DMD's slave address.
|
||||
DMD_u8_t adr : DMD's REG address;
|
||||
|
||||
For writing CMD to tuner,
|
||||
DMD_u8_t slvadr is DMD's slave address;
|
||||
DMD_u8_t adr is DMD's register TCBCOM(0xF7)
|
||||
!!!Tuner's slave addr. and REG addr. are as continous data< upper layer : data[x]>
|
||||
*/
|
||||
DMD_u32_t DMD_I2C_Write_Anylenth(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen)
|
||||
{
|
||||
DMD_u8_t i2cSlaveAddr = slvadr;
|
||||
DMD_u8_t data[128];
|
||||
|
||||
if(wlen>128) wlen = 124;
|
||||
data[0] = adr;
|
||||
memcpy(&data[1], wdata, wlen);
|
||||
wlen=wlen+1;
|
||||
if(tuner_i2c_write(i2cSlaveAddr, data, wlen)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*
|
||||
twsbGetData_MN88472_TCB(slvadr, adr, wdata)
|
||||
This is specific function for MN88472 to read Tuner reg's data.
|
||||
★ If you use MN88472 to control Tuner, you may need to create new I2C bottom code.
|
||||
|
||||
There are two steps to read Tuner, take Mxl603 for example. (See Tuner I2C read protocal as below)
|
||||
Step 1 : Tell Tuner which Reg to read
|
||||
-> Pls. call function DMD_I2C_Write_Anylenth()
|
||||
Step 2 : Read Tuner Reg's data
|
||||
-> Pls. call function DMD_TCBI2C_Read()
|
||||
------ Tuner Mxl603 I2C read protocal -------
|
||||
// 8 bit Register Read Protocol:
|
||||
Step1
|
||||
// +------+-+-----+-+-+----+-+----------+-+-+
|
||||
// |MASTER|S|SADDR|W| |0xFB| |RegAddr | |P|
|
||||
// +------+-+-----+-+-+----+-+----------+-+-+
|
||||
// |SLAVE | |A| |A| |A| |
|
||||
// +------+-+-----+-+-+----+-+----------+-+-+
|
||||
Step2
|
||||
// +------+-+-----+-+-+-----+--+-+
|
||||
// |MASTER|S|SADDR|R| | |MN|P|
|
||||
// +------+-+-----+-+-+-----+--+-+
|
||||
// |SLAVE | |A|Data | | |
|
||||
// +------+---------+-+-----+--+-+
|
||||
// SADDR(I2c slave address), S(Start condition),
|
||||
// A(Slave Ack), MN(Master NACK), P(Stop condition)
|
||||
|
||||
------Step2 I2C commnication between BE and DMD -------
|
||||
// +------+-+-----+-+-+----+-+----------+-+-++------+-+-----+-+-+----
|
||||
// |BE |S|SADDR|W| |R-addr| |SADDR-M|R| |S|SADDR|R| | |MN|P|
|
||||
// +------+-+-----+-+-+----+-+----------+-+-++------+-+-----+-+-+----
|
||||
// |DMD| |A| |A| |A| |A| Data | | |
|
||||
// +------+-+-----+-+-+----+-+----------+-+-++------+-+-----+-+-+----
|
||||
// SADDR(DMD's slave address), R-addr(DMD's reg addr. -> TCBCOM ),
|
||||
// SADDR-M(Tuner's slave address)
|
||||
You can also refer to file "PRODUCT_SPECIFICATIONS_MN88472_ver041_120120.pdf"
|
||||
page 34 to see the TCB control flow.
|
||||
*/
|
||||
DMD_u32_t DMD_TCBI2C_Read(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen , DMD_u8_t* rdata , DMD_u32_t rlen)
|
||||
{
|
||||
DMD_u8_t i2cSlaveAddr = slvadr;
|
||||
DMD_u8_t u8Reg[2];
|
||||
|
||||
u8Reg[0]=adr;
|
||||
u8Reg[1]=wdata[0];
|
||||
tuner_i2c_write(i2cSlaveAddr, u8Reg, 2);
|
||||
if(tuner_i2c_read(i2cSlaveAddr, rdata, 1)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Write/Read any Length*/
|
||||
// This is general API for you to communicate with external device which DIRECTLY connect to BE,
|
||||
// However, to communicate with Tuner through DMD MN88472, you may need to modify Bottom code of I2C sequence.
|
||||
//I2C consecutive write
|
||||
DMD_u32_t DMD_I2C_WriteRead(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen , DMD_u8_t* rdata , DMD_u32_t rlen)
|
||||
{
|
||||
//TODO: Please call I2C Read/Write API here
|
||||
DMD_u8_t i2cSlaveAddr = slvadr;
|
||||
DMD_u8_t u8Reg[2];
|
||||
DMD_u8_t u8Reg_w[4];
|
||||
|
||||
if(wlen==3)
|
||||
{
|
||||
u8Reg_w[0] = adr;
|
||||
u8Reg_w[1] = wdata[0];
|
||||
u8Reg_w[2] = wdata[1];
|
||||
u8Reg_w[3] = wdata[2];
|
||||
if(tuner_i2c_write(i2cSlaveAddr, u8Reg_w, 4)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
}
|
||||
else if(wlen==1)
|
||||
{
|
||||
u8Reg[0] = adr;
|
||||
u8Reg[1] = wdata[0];
|
||||
if(tuner_i2c_write(i2cSlaveAddr, u8Reg, 2)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
if(rlen!=0)
|
||||
{ //read
|
||||
if(tuner_i2c_read(i2cSlaveAddr, rdata, 1)==0)
|
||||
{
|
||||
return DMD_E_ERROR;
|
||||
}
|
||||
}
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
|
||||
#if USE_TUNER_88436
|
||||
#define I2C_RW_WRITE ((uint8)0x00)
|
||||
#define I2C_RW_READ ((uint8)0x01)
|
||||
uint32 tuner_i2c_read_offset16(uint8 slave_addr,uint8 offset[8],uint8 *pdata,uint8 length);
|
||||
uint32 UserWrittenI2CWrite(int tUnit,uint32 AddrSize, uint8* pAddr,uint32 WriteLen, uint8* pData);
|
||||
uint32 UserWrittenI2CRead(int tUnit,uint32 AddrSize, uint8* pAddr,uint32 ReadLen, uint8* pData)
|
||||
{
|
||||
#if 0
|
||||
uint8 wbuf[8];
|
||||
|
||||
wbuf[0] = DMD_MAIN_TCBCOM;
|
||||
wbuf[1] = TUNER18273_ADDRESS|I2C_RW_WRITE;
|
||||
wbuf[2] = *pAddr;
|
||||
|
||||
wbuf[3] = DMD_MAIN_TCBCOM;
|
||||
wbuf[4] = TUNER18273_ADDRESS|I2C_RW_READ;
|
||||
if(tuner_i2c_read_offset16(DMD_I2C_ADDRESS<<1,wbuf,pData,ReadLen)!=ReadLen)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
uint8 wbuf[8];
|
||||
|
||||
|
||||
UserWrittenI2CWrite(0,1,pAddr,0,(void*)0);
|
||||
|
||||
//------------------------------
|
||||
/*if(tuner_i2c_write(DMD_I2C_ADDRESS, DMD_MAIN_TCBCOM, 1)==0)
|
||||
{
|
||||
printf("Err.wr 0x20 failed\n");
|
||||
//return DMD_E_ERROR;
|
||||
}
|
||||
|
||||
wbuf[0] = TUNER18273_ADDRESS;
|
||||
if(tuner_i2c_read_offset8(DMD_I2C_ADDRESS,wbuf,pData,ReadLen)!=ReadLen)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
return 0;
|
||||
}*/
|
||||
//------------------------------
|
||||
|
||||
wbuf[0] = DMD_MAIN_TCBCOM;
|
||||
wbuf[1] = TUNER18273_ADDRESS|I2C_RW_READ;
|
||||
if(tuner_i2c_read_offset16(DMD_I2C_ADDRESS,wbuf,pData,ReadLen)!=ReadLen)
|
||||
{
|
||||
//printf("Err UserWrittenI2CRead MN ret=%d %d\n",1,ReadLen);
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
//printf("UserWrittenI2CRead MN ret=%d %d\n",0,ReadLen);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
uint32 UserWrittenI2CWrite(int tUnit,uint32 AddrSize, uint8* pAddr,uint32 WriteLen, uint8* pData)
|
||||
{
|
||||
#if 1 //多字节时,连续发送
|
||||
uint8 i2cbuf[128];
|
||||
|
||||
i2cbuf[0] = DMD_MAIN_TCBCOM;
|
||||
i2cbuf[1] = TUNER18273_ADDRESS|I2C_RW_WRITE;
|
||||
i2cbuf[2] = *pAddr;
|
||||
|
||||
//printf("UserWrittenI2CRead WR 0x%x\n",pAddr[0]);
|
||||
|
||||
if(WriteLen!=0)
|
||||
{
|
||||
memcpy(&i2cbuf[3],pData,WriteLen);
|
||||
}
|
||||
if(tuner_i2c_write(DMD_I2C_ADDRESS, i2cbuf, WriteLen+3)!=WriteLen+3)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#else //每次发一个数据
|
||||
uint8 i2cbuf[32];
|
||||
uint8 reg_addr = *pAddr;
|
||||
|
||||
while(WriteLen--)
|
||||
{
|
||||
i2cbuf[0] = DMD_MAIN_TCBCOM;
|
||||
i2cbuf[1] = TUNER18273_ADDRESS|I2C_RW_WRITE;
|
||||
i2cbuf[2] = reg_addr++;
|
||||
i2cbuf[3] = *pData++;
|
||||
|
||||
tuner_i2c_write(DMD_I2C_ADDRESS, i2cbuf, 4);
|
||||
}
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
/*! Timer wait */
|
||||
DMD_u32_t DMD_wait( DMD_u32_t msecond )
|
||||
{
|
||||
delay_ms(msecond);
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Get System Time (ms) */
|
||||
DMD_u32_t DMD_timer( DMD_u32_t* tim )
|
||||
{
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
//extern int mn88436_get_fe_config(struct mn88436_fe_config *cfg);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
Binary file not shown.
@@ -0,0 +1,141 @@
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_TCB_diag.c
|
||||
@brief Device dependence functions
|
||||
@author R.Mori
|
||||
@date 2012/4/9
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
#include "../../inc/config.h"
|
||||
|
||||
#if USE_TUNER_88436
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN_DMD_common.h"
|
||||
#include "../include/MN_DMD_device.h"
|
||||
#include "../include/MN_I2C.h"
|
||||
#include "../include/MN_TCB.h"
|
||||
#include "../include/MN88436_reg.h"
|
||||
|
||||
/* **************************************************** */
|
||||
/* Tuner BUS Controll */
|
||||
/* **************************************************** */
|
||||
#if 0//(TUNER_I2C_MODE == TUNER_CONTROL_BY_DEMOD)
|
||||
/* **************************************************** */
|
||||
/*! Write 1byte to Tuner via Demodulator */
|
||||
/* **************************************************** */
|
||||
|
||||
DMD_u32_t DMD_TCB_Write(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t data )
|
||||
{
|
||||
return DMD_TCB_WriteRead( slvadr , adr , &data , 1 , 0, 0 );
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Read 1byte from Tuner via Demodulator */
|
||||
/* **************************************************** */
|
||||
DMD_u32_t DMD_TCB_Read(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t *data )
|
||||
{
|
||||
return DMD_TCB_WriteRead( slvadr , adr , 0, 0 , data , 1 );
|
||||
}
|
||||
|
||||
/* '11/08/05 : OKAMOTO Implement "Through Mode". */
|
||||
DMD_u32_t DMD_TCB_WriteAnyLength(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* data , DMD_u32_t wlen)
|
||||
{
|
||||
return DMD_TCB_WriteRead( slvadr , adr , data , wlen , 0, 0 );
|
||||
}
|
||||
|
||||
/* '11/08/05 : OKAMOTO Implement "Through Mode". */
|
||||
DMD_u32_t DMD_TCB_ReadAnyLength(DMD_u8_t slvadr , DMD_u8_t *data , DMD_u8_t rlen)
|
||||
{
|
||||
return DMD_TCB_WriteRead( slvadr , 0 , 0, 0 , data , rlen );
|
||||
}
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Write&Read any length from/to Tuner via Demodulator */
|
||||
/* **************************************************** */
|
||||
//------ Tuner I2C read protocal-------
|
||||
//[Note] Take Mxl603 for example; normally, no need 0xFB .
|
||||
// 8 bit Register Read Protocol:
|
||||
// Step1
|
||||
// +------+-+-----+-+-+----+-+----------+-+-+
|
||||
// |MASTER|S|SADDR|W| |0xFB| |RegAddr | |P|
|
||||
// +------+-+-----+-+-+----+-+----------+-+-+
|
||||
// |SLAVE | |A| |A| |A| |
|
||||
// +------+-+-----+-+-+----+-+----------+-+-+
|
||||
//Step2
|
||||
// +------+-+-----+-+-+-----+--+-+
|
||||
// |MASTER|S|SADDR|R| | |MN|P|
|
||||
// +------+-+-----+-+-+-----+--+-+
|
||||
// |SLAVE | |A|Data | | |
|
||||
// +------+---------+-+-----+--+-+
|
||||
// SADDR(I2c slave address), S(Start condition),
|
||||
// A(Slave Ack), MN(Master NACK), P(Stop condition)
|
||||
|
||||
/* **************************************************** */
|
||||
/*! Write&Read any length from/to Tuner via Demodulator : Repeat mode */
|
||||
/* **************************************************** */
|
||||
#if (DEMOD_CONTROL_TUNER_I2C_MODE == TCB_I2C_FORMAT_REPEAT_MODE)
|
||||
DMD_ERROR_t DMD_TCB_WriteRead(DMD_u8_t tuner_slvadr , DMD_u8_t tuner_reg_adr , DMD_u8_t* wdata , DMD_u32_t wlen , DMD_u8_t* rdata , DMD_u32_t rlen)
|
||||
{
|
||||
DMD_u8_t d[DMD_TCB_DATA_MAX];
|
||||
DMD_u32_t i;
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
DMD_u8_t bank;
|
||||
DMD_u8_t tcbcom;//,tcbadr,tcbset;
|
||||
|
||||
bank = DMD_BANK_MAIN(0);//param->id
|
||||
tcbcom=DMD_MAIN_TCBCOM;
|
||||
// tcbadr=DMD_MAIN_TCBADR;
|
||||
// tcbset=DMD_MAIN_TCBSET;
|
||||
|
||||
/* Set TCB Through Mode */
|
||||
// ret = DMD_I2C_MaskWrite( bank , tcbset , 0x7f , 0x53 );//Troy.wangyx masked, 20120801, once is enough; already done after initialization.(call function)
|
||||
// ret |= DMD_I2C_Write( bank , tcbadr , 0x00 );
|
||||
|
||||
if( (wlen == 0 && rlen == 0) || (wlen != 0) ) //I2C consecutive write; wlen = 0, means tuner_read "step1", as noted above.
|
||||
{
|
||||
d[0] = tuner_slvadr & 0xFE; // bit0 : 0 -> I2C write cmd
|
||||
d[1] = tuner_reg_adr;
|
||||
for(i=0;i<wlen;i++) d[i+2] = wdata[i];
|
||||
|
||||
//write
|
||||
ret |= DMD_I2C_WriteRead(bank , tcbcom , d , wlen + 2 , rdata , rlen );
|
||||
}
|
||||
else
|
||||
{
|
||||
//Read
|
||||
d[0] = tuner_slvadr | 1;
|
||||
ret |= DMD_I2C_WriteRead(bank , tcbcom , d , 1 , rdata , rlen );
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
#elif (DEMOD_CONTROL_TUNER_I2C_MODE == TCB_I2C_FORMAT_BYPASS_MODE) // only valid for MN88473 T2
|
||||
/* **************************************************** */
|
||||
/*! Write&Read any length from/to Tuner : Bypass mode, control Tuner by SoC directly */
|
||||
/* **************************************************** */
|
||||
DMD_ERROR_t DMD_TCB_WriteRead(DMD_u8_t slvadr , DMD_u8_t adr , DMD_u8_t* wdata , DMD_u32_t wlen , DMD_u8_t* rdata , DMD_u32_t rlen)
|
||||
{
|
||||
DMD_ERROR_t ret = DMD_E_OK;
|
||||
|
||||
//------ Set to bypass Mode
|
||||
//ret |= DMD_I2C_Write( DMD_BANK_T2_ , DMD_TCBSET , 0xe3 );
|
||||
ret |= DMD_I2C_Write( DMD_BANK_T2_ , DMD_TCBCOM , 0x1 );
|
||||
|
||||
//Example. Customer can communicate Tuner directly.
|
||||
//####################################################################
|
||||
DMD_I2C_WriteRead(slvadr , adr, wdata, wlen, rdata, rlen);
|
||||
//####################################################################
|
||||
|
||||
//------ bypass mode off
|
||||
ret |= DMD_I2C_Write( DMD_BANK_T2_ , DMD_TCBCOM , 0x0 );// need off everytime, after off, SoC can communicate with Demod
|
||||
|
||||
return ret;
|
||||
}
|
||||
#else
|
||||
#error "pls.define TCB_I2C_mode "
|
||||
#endif
|
||||
|
||||
#endif //#if (TUNER_I2C_MODE == TUNER_CONTROL_BY_DEMOD)
|
||||
#endif
|
||||
Binary file not shown.
@@ -0,0 +1,84 @@
|
||||
|
||||
/* **************************************************** */
|
||||
/*!
|
||||
@file MN_DMD_Tuner_template.c
|
||||
@brief Tuner API wrapper (sample)
|
||||
@author R.Mori
|
||||
@date 2011/6/30
|
||||
@param
|
||||
(c) Panasonic
|
||||
*/
|
||||
/* **************************************************** */
|
||||
#include "../../inc/config.h"
|
||||
#include <stdio.h>
|
||||
#if USE_TUNER_88436
|
||||
//#include "os_task.h"
|
||||
//---------- this is sample Tuner API ----------------
|
||||
#include "../include/MN_DMD_driver.h"
|
||||
#include "../include/MN_DMD_common.h"
|
||||
|
||||
#include "../include/MN_DMD_types.h"
|
||||
#include "../../tuner/tmCompId.h"
|
||||
#include "../../tuner/tmFrontEnd.h"
|
||||
|
||||
#include "../../tuner/tmbslFrontEndTypes.h"
|
||||
#include "../../tuner/tmbslTDA18273.h"
|
||||
|
||||
/* **************************************************** */
|
||||
/* **************************************************** */
|
||||
extern int TunerConf(DMD_u32_t conf_rf_freq);
|
||||
/*! Tuner Initialize Function*/
|
||||
DMD_u32_t DMD_Tuner_init(uint32 freq)
|
||||
{
|
||||
DMD_ERROR_t ret;
|
||||
#if USE_TUNER
|
||||
#if (TUNER_TYPE == NXP18273)
|
||||
ret = (DMD_ERROR_t)TunerConf(freq);
|
||||
if (ret != DMD_E_OK)
|
||||
{
|
||||
printf("Error! DMD_Tuner_init\n");
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Tuner Tune Function */
|
||||
DMD_u32_t DMD_Tuner_tune(DMD_PARAMETER *param)
|
||||
{
|
||||
#if USE_TUNER
|
||||
//TODO: Please call tune API here
|
||||
DMD_ERROR_t ret;
|
||||
#if (TUNER_TYPE == NXP18273)
|
||||
ret = (DMD_ERROR_t)tmbslTDA18273_SetRF(0,param->freq);
|
||||
#endif
|
||||
if (ret != DMD_E_OK)
|
||||
{
|
||||
printf("Error! DMD_Tuner_init()\n");
|
||||
}
|
||||
#endif
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Tuner Termination Function */
|
||||
DMD_u32_t DMD_Tuner_term(void)
|
||||
{
|
||||
//TODO: Please call tune API here
|
||||
//this function is called by DMD_term
|
||||
DMD_DBG_TRACE("Tuner is not implemeted\n");
|
||||
return DMD_E_OK;
|
||||
}
|
||||
|
||||
/*! Tuner Tune Function */
|
||||
DMD_u32_t DMD_Tuner_set_system(DMD_PARAMETER *param)
|
||||
{
|
||||
#if USE_TUNER
|
||||
if (tmbslTDA18273_SetStandardMode(0, tmTDA18273_ATSC_6MHz) != 0)
|
||||
{
|
||||
printf("Error! DMD_Tuner_set_system \n");
|
||||
}
|
||||
#endif
|
||||
return DMD_E_OK;
|
||||
}
|
||||
#endif
|
||||
|
||||
Binary file not shown.
Reference in New Issue
Block a user