提交SMOD ATSC IMX APP版本 V122

atsc_app/.claude/settings.local.json

@@ -0,0 +1,7 @@
+{
+  "permissions": {
+    "allow": [
+      "Bash(python -u)"
+    ]
+  }
+}

atsc_app/.codegraph/.gitignore

@@ -0,0 +1,16 @@
+# CodeGraph data files
+# These are local to each machine and should not be committed
+
+# Database
+*.db
+*.db-wal
+*.db-shm
+
+# Cache
+cache/
+
+# Logs
+*.log
+
+# Hook markers
+.dirty

atsc_app/Makefile

@@ -0,0 +1,113 @@
+
+#CC=arm-poky-linux-gnueabi-gcc
+CC=arm-poky-linux-gnueabi-gcc -march=armv7-a -mfloat-abi=hard -mfpu=neon -mtune=cortex-a7 --sysroot=/opt/fsl-imx-x11/4.1.15-2.0.0/sysroots/cortexa7hf-neon-poky-linux-gnueabi
+
+#C_SOURCE +=  $(shell echo ./bsp/*.c)
+#C_SOURCE +=  $(shell echo ./task/*.c)
+C_SOURCE +=  $(shell echo ./main.c)
+C_SOURCE +=  $(shell echo ./task/lcd_task.c)
+C_SOURCE +=  $(shell echo ./bsp/delay.c)
+C_SOURCE +=  $(shell echo ./bsp/igpio.c)
+C_SOURCE +=  $(shell echo ./bsp/lcd.c)
+C_SOURCE +=  $(shell echo ./bsp/key_gpio.c)
+C_SOURCE +=  $(shell echo ./bsp/isys_com.c)
+
+C_SOURCE +=  $(shell echo ./bsp/i2c_drv.c)
+C_SOURCE +=  $(shell echo ./bsp/eeprom.c)
+C_SOURCE +=  $(shell echo ./bsp/fpga.c)
+C_SOURCE +=  $(shell echo ./bsp/general_api.c)
+C_SOURCE +=  $(shell echo ./bsp/minIni.c)
+
+C_SOURCE +=  $(shell echo ./task/tcp_task.c)
+C_SOURCE +=  $(shell echo ./bsp/isys_config.c)
+C_SOURCE +=  $(shell echo ./bsp/ispi.c)
+C_SOURCE +=  $(shell echo ./bsp/ii2c.c)
+C_SOURCE +=  $(shell echo ./bsp/ipara_cfg.c)
+
+C_SOURCE +=  $(shell echo ./bsp/mq.c)
+C_SOURCE +=  $(shell echo ./bsp/rbtree.c)
+C_SOURCE +=  $(shell echo ./task/iweb_task.c)
+C_SOURCE +=  $(shell echo ./bsp/dac38j82.c)
+C_SOURCE +=  $(shell echo ./bsp/dpd_proc.c)
+C_SOURCE +=  $(shell echo ./bsp/msg.c)
+C_SOURCE +=  $(shell echo ./task/upgrade.c)
+C_SOURCE +=  $(shell echo ./task/iuart_user.c)
+C_SOURCE +=  $(shell echo ./task/console_ctrl.c)
+C_SOURCE +=  $(shell echo ./task/tsoip.c)
+C_SOURCE +=  $(shell echo ./task/tcp_autocal.c)
+C_SOURCE +=  $(shell echo ./task/iq_rx.c)
+C_SOURCE +=  $(shell echo ./task/iq_vsb.c)
+# C_SOURCE +=  $(shell echo ./task/ilog_task.c)
+C_SOURCE +=  $(shell echo ./task/ihttp_get.c)
+C_SOURCE +=  $(shell echo ./task/http_get.c)
+C_SOURCE +=  $(shell echo ./task/gps.c)
+
+C_SOURCE +=  $(shell echo ./tuner/tuner_conf.c)
+C_SOURCE +=  $(shell echo ./tuner/tmbslTDA18273.c)
+C_SOURCE +=  $(shell echo ./tuner/tmbslTDA18273_Instance.c)
+C_SOURCE +=  $(shell echo ./tuner/tmbslTDA18273_RegDef.c)
+
+#PR04: Sony CXD2878(FREIA) tuner driver (ported from EMV9.3)
+C_SOURCE +=  $(shell echo ./sonytuner/*.c)
+C_SOURCE +=  $(shell echo ./sonytuner/atsc/*.c)
+C_SOURCE +=  $(shell echo ./sonytuner/tuner/*.c)
+C_SOURCE +=  $(shell echo ./sonytuner/tuner/terr_cable_ascot3/*.c)
+C_SOURCE +=  $(shell echo ./sonytuner/tuner/terr_cable_ascot3/refcode/*.c)
+C_SOURCE +=  $(shell echo ./sonytuner/isdb_terr/*.c)
+C_SOURCE +=  $(shell echo ./sonytuner/tuner/terr_cable_sat_freia/*.c)
+C_SOURCE +=  $(shell echo ./sonytuner/tuner/terr_cable_sat_freia/refcode/*.c)
+
+# C_SOURCE +=  $(shell echo ./mn88436/Register_setting/MN88436_regset_24Mhz_IF5Mhz.c)
+# C_SOURCE +=  $(shell echo ./mn88436/Register_setting/MN88436_regset_24MHz_IF44MHz.c)
+# C_SOURCE +=  $(shell echo ./mn88436/Register_setting/MN88436_regset_24MHz_IF44MHz_change_for_LG_CAN_tuner_121017.c)
+# C_SOURCE +=  $(shell echo ./mn88436/Register_setting/MN88436_regset_25Mhz_IF3_2_5Mhz.c)
+# C_SOURCE +=  $(shell echo ./mn88436/Register_setting/MN88436_regset_25Mhz_IF5Mhz.c)
+# C_SOURCE +=  $(shell echo ./mn88436/Register_setting/MN88436_regset_25Mhz_IF44Mhz.c)
+
+C_SOURCE +=  $(shell echo ./mn88436/src/MN_DMD_common.c)
+C_SOURCE +=  $(shell echo ./mn88436/src/MN_DMD_device.c)
+C_SOURCE +=  $(shell echo ./mn88436/src/MN_DMD_driver.c)
+C_SOURCE +=  $(shell echo ./mn88436/src/MN_I2C.c)
+C_SOURCE +=  $(shell echo ./mn88436/src/MN_TCB.c)
+C_SOURCE +=  $(shell echo ./mn88436/src/MN_Tuner.c)
+C_SOURCE +=  $(shell echo ./mn88436/src/MN88436_autoctrl.c)
+C_SOURCE +=  $(shell echo ./mn88436/src/MN88436_regset.c)
+
+C_SOURCE +=  $(shell echo ./talise/*.c)
+C_SOURCE +=  $(shell echo ./adi_hal/*.c)
+C_SOURCE +=  $(shell echo ./adrv9009/*.c)
+
+
+C_OBJECT = $(patsubst %.c,%.o,$(C_SOURCE))
+
+INCLUDE = -I./inc
+#PR04: -I./inc at compile so sonytuner subdir files' "../inc/xxx.h" resolve to app inc/
+CPPFLAGS = -I./inc
+
+
+SERLIBS=-lm -lpthread -lrt
+
+%.o:%.c
+	$(CC) $(CFLAGS) $(INCLUDE) -c -g $< -o $@
+
+
+imx_atsc_app: $(C_OBJECT)
+	$(CC) -o $@ -g $(C_SOURCE) $(LDFLAGS) $(CFLAGS) $(SERLIBS) $(INCLUDE)
+
+
+PHONY:all
+all: imx_atsc_app
+	rm -rf ~/nfs/imx_atsc_app
+	cp imx_atsc_app ~/nfs/
+
+install: all
+	cp imx_atsc_app ../../out/upgrade_imx_fs/SMOD/src/aw/anywave/app/
+	cp imx_atsc_app ../../out/rootfs/aw/anywave/app/
+	@echo "\n\n\t ATSC_APP intall ok\n\n"
+
+clean:
+	rm -rf *.o ./imx_atsc_app
+	rm -rf ./bsp/*.o
+	rm -rf ./task/*.o
+
+

atsc_app/adi_hal/LICENSE.txt

@@ -0,0 +1,24 @@
+Analog Devices, Inc. ("ADI")
+Source Code Software License Agreement
+20130524-CISC-CTSLA
+
+DOWNLOADING, REPRODUCING, DISTRIBUTING OR OTHERWISE USING THE SOFTWARE CONSTITUTES ACCEPTANCE OF THIS LICENSE. THE SOFTWARE MAY NOT BE USED EXCEPT AS EXPRESSLY AUTHORIZED UNDER THIS LICENSE.
+
+The software is protected by copyright law and international copyright treaties.
+
+    License: Subject to the terms and conditions of this license, the software may be reproduced, modified and distributed in source code and object code form.
+
+    Conditions:
+        Any distribution of the software must include a complete copy of this license and retain all copyright and other proprietary notices. The software that is distributed (including modified versions of the software) shall be subject to the terms and conditions of this license.
+        The software may not be combined or merged with other software in any manner that would cause the software to become subject to terms and conditions which differ from those of this license.
+        Licensee shall not use the name or any trademark of ADI (including those of its licensors) or any contributor to endorse or promote products without prior written consent of the owner of the name or trademark. The term “contributor” means any person or entity that modifies or distributes the software.
+        Modified versions of the Software must be conspicuously marked as such.
+        Use of the software may or may not infringe patent rights of one or more patent holders. This license does not alleviate the obligation to obtain separate licenses from patent holders to use the software.
+        All rights not expressly granted hereunder are reserved.
+        This license shall be governed by the laws of Massachusetts, without regard to its conflict of laws rules. The software shall only be used in compliance with all applicable laws and regulations, including without limitation export control laws.
+
+    WARRANTY DISCLAIMER: THE SOFTWARE AND ANY RELATED INFORMATION AND/OR ADVICE IS PROVIDED ON AN “AS IS” BASIS, WITHOUT REPRESENTATIONS, GUARANTEES OR WARRANTIES OF ANY KIND, EXPRESS OR IMPLIED, ORAL OR WRITTEN, INCLUDING WITHOUT LIMITATION, WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. There is no obligation to provide software support or updates. The Software is not fault-tolerant and is not intended for use in high risk applications, including without limitation in the operation of nuclear facilities, aircraft navigation or control systems, air traffic control, life support machines, weapons systems or any other application in which the failure of the software could lead to death, personal injury, or severe physical or environmental damages. The software is not authorized to be used under such circumstances.
+
+    LIMITATION OF LIABILITY: TO THE MAXIMUM EXTENT PERMITTED BY LAW ADI (INCLUDING ITS LICENSORS) AND CONTRIBUTORS SHALL NOT BE LIABLE FOR ANY DAMAGES ARISING FROM OR RELATED TO THE SOFTWARE, ITS USE OR ANY RELATED INFORMATION AND/OR SERVICES, INCLUDING BUT NOT LIMITED TO ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, PUNITIVE, EXEMPLARY, CONSEQUENTIAL OR ANALOGOUS DAMAGES (INCLUDING WITHOUT LIMITATION ANY DAMAGES RESULTING FROM LOSS OF USE, DATA, REVENUE, PROFITS, OR SAVINGS, COMPUTER DAMAGE OR ANY OTHER CAUSE), UNDER ANY LEGAL THEORY (INCLUDING WITHOUT LIMITATION CONTRACT, WARRANTY, TORT, NEGLIGENCE, STRICT OR PRODUCT LIABILITY), EVEN IF IT HAS BEEN INFORMED OF THE POSSIBILITY OF SUCH DAMAGES. Some jurisdictions do not permit the exclusion or limitation of liability for consequential, incidental or other damages, and, as such, some portion of the above limitation may not apply. In such jurisdictions, liability is limited to the greatest extent permitted by law.
+
+    Third Party Software: The software may be accompanied by or include software made available by one or more third parties (“Third Party Software”). Each portion of Third Party Software is subject to its own separate software license terms and conditions (“Third Party Licenses”). The Third Party Licenses for Third Party Software delivered with the software are set forth or identified (by url or otherwise) in (i) Appendix A to this license (if any), (ii) the applicable software header or footer text, (iii) a text file located in the directory of the applicable Third Party Software component and/or (iv) such other location customarily used for licensing terms. The use of each portion of Third Party Software is subject to the Third Party Licenses, and you agree that your use of any Third Party Software is bound by the applicable Third Party License. You agree to review and comply with all applicable Third Party Licenses prior to any use or distribution of any Third Party Software. Third Party Software is provided on an “as is” basis without any representation, warranty or liability of any kind. ADI (including its licensors) and contributors shall have no liability or responsibility for the operation or performance of the Third Party Software and shall not be liable for any damages, costs, or expenses, direct or indirect, arising out of the performance or failure to perform of the Third Party Software. ADI (including its licensors) and contributors shall be entitled to the benefit of any and all limitations of liability and disclaimers of warranties contained in the Third Party Licenses. For the avoidance of doubt, this license does not alter, limit or expand the terms and conditions of, or rights granted to you pursuant to, Third Party Licenses

atsc_app/adi_hal/adi_hal.c

@@ -0,0 +1,546 @@
+/**
+ * \file adi_hal.c
+ * \brief Contains ADI Hardware Abstraction functions
+ *        End user must provide implementation based on their
+ *        application and hardware platform.
+ *
+ *        This file provides the ADI Evaluation platform implementation
+ *        that will not be compiled unless the compiler option ADI_ZYNQ_PLATFORM
+ *        is defined at compile time.
+ *
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9378-AD9379 API license, for more information see the "LICENSE.txt" file in this zip file.
+ */
+
+#include "adi_hal.h"
+#include "unistd.h"
+#include "stdio.h"
+
+#ifdef ADI_ZYNQ_PLATFORM
+#include "zynq_platform.h"
+#endif
+//#include "../common.h"
+#include "../inc/type.h"
+
+#include "../adrv9009/adrv9009.h"
+
+adiHalErr_t ADIHAL_setTimeout(void *devHalInfo, uint32_t halTimeout_ms)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+#ifdef ADI_ZYNQ_PLATFORM
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+    devHalData->waitTimeout = halTimeout_ms;
+    HAL_writeToLogFile("ADIHAL_setTimeout at index %d to ", devHalData->devIndex, halTimeout_ms);
+#endif
+    return retVal;
+}
+
+adiHalErr_t ADIHAL_openHw(void *devHalInfo, uint32_t halTimeout_ms)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+    devHalData->waitTimeout = halTimeout_ms;
+
+    switch(devHalData->devIndex)
+    {
+        /* SPI Devices*/
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+        case 6:
+            error = HAL_initSpiDriver(devHalData->spiSettings);
+            break;
+        default:
+            HAL_writeToLogFile("ERROR: ADIHAL_openHw: Unknown device index %d", devHalData->devIndex);
+            return (ADIHAL_GEN_SW);
+    }
+
+    HAL_writeToLogFile("ADIHAL_openHw: device index %d", devHalData->devIndex);
+
+    if (error != 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: ADIHAL_openHw: HAL_initSpiDriver() failed with error %d for device %d", error, devHalData->devIndex);
+        retVal = ADIHAL_SPI_FAIL;
+    }
+
+#endif
+
+    return (retVal);
+}
+
+adiHalErr_t ADIHAL_closeHw(void *devHalInfo)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    switch(devHalData->devIndex)
+    {
+        /* SPI Devices */
+        case 1:
+        case 2:
+        case 3:
+        case 4:
+        case 5:
+        case 6:
+            error = HAL_closeSpiDriver(devHalData->spiSettings);
+            break;
+        default:
+            HAL_writeToLogFile("ERROR: ADIHAL_closeHw(): Unknown device index %d", devHalData->devIndex);
+            return (ADIHAL_GEN_SW);
+    }
+
+    HAL_writeToLogFile("ADIHAL_closeHw: device index %d", devHalData->devIndex);
+
+    if (error != 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: ADIHAL_closeHw: HAL_closeSpiDriver() failed with error %d for device %d", error, devHalData->devIndex);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+#endif
+
+    return(retVal);
+}
+
+adiHalErr_t ADIHAL_resetHw(void *devHalInfo)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+
+     int *pChipNo = (int *)devHalInfo;
+    retVal = (adiHalErr_t)ad9009_reset(*pChipNo);
+
+
+
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    HAL_writeToLogFile("ADIHAL_resetHw at index %d", devHalData->devIndex);
+    error = HAL_resetHw(devHalData->devIndex);
+    if (error != 0)
+    {
+       devHalData->gpioErrCode = error;
+       HAL_writeToLogFile("ERROR: ADIHAL_resetHw: HAL_resetHw() failed with error %d for device %d", error, devHalData->devIndex);
+       return (ADIHAL_GPIO_FAIL);
+    }
+#endif
+
+    return (retVal);
+}
+
+adiHalErr_t  ADIHAL_spiWriteByte(void *devHalInfo, uint16_t addr, uint8_t data)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+     int *pChipNo = (int*)devHalInfo;
+    u32 wr_value = data;
+
+	//retVal = (adiHalErr_t)write_ad9009(*pChipNo, addr, wr_value);
+	retVal = (adiHalErr_t)ad9009_write_spi(*pChipNo, addr, &wr_value, 1);
+
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    error = HAL_SPIWriteByte(devHalData->spiSettings, addr, data);
+
+    if (error < 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: ADIHAL_spiWriteByte(): HAL_SPIWriteByte() for device %d, chipSelect %d, returned error %d\n",
+                devHalData->devIndex, devHalData->spiSettings->chipSelectIndex, error);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+    if (devHalData->logLevel & ADIHAL_LOG_SPI)
+    {
+        HAL_writeToLogFile("SPIWrite: CS:%2d, ADDR:0x%03X, DATA:0x%02X \n", devHalData->spiSettings->chipSelectIndex, addr, data);
+    }
+
+#endif
+
+    return (retVal);
+}
+
+
+/*#if 0
+#include "stdio.h"
+#include <unistd.h>
+
+#include <sys/time.h>
+#include <unistd.h>
+
+ 
+void usr_print_current_time(void)
+{
+    struct timeval tv;  
+    gettimeofday(&tv, NULL);
+    printf("time: %d.%d\n",tv.tv_sec,tv.tv_usec/1000);
+}
+
+int get_current_time_ms(void)
+{
+    struct timeval tv;  
+    gettimeofday(&tv, NULL);
+    return (tv.tv_sec*1000+tv.tv_usec/1000);
+    //printf("time: %d.%d\n",tv.tv_sec,tv.tv_usec/1000);
+}
+//#include "fpga.h"
+void test_fpga_write_time()
+{
+    // fpga write need 10ms
+    int time_start=0;
+    int time_stop=0;
+    int count=500;
+    
+    time_start = get_current_time_ms();
+    for (u32 i = 0; i < count; i++)
+    {
+        //fpga_write(0x110, 0, 1);;
+        
+    }
+    
+    time_stop = get_current_time_ms();
+    
+    printf("{time_cal fpga_write} count=%d  total_time=%dms  avg_time=%dms\n", count, time_stop - time_start, (time_stop - time_start)/count);
+}
+int time_start=0;
+int time_stop=0;
+
+#endif*/
+
+adiHalErr_t  ADIHAL_spiWriteBytes(void *devHalInfo, uint16_t *addr, uint8_t *data, uint32_t count)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+
+
+    //test_fpga_write_time();
+    
+    //printf("[%s,%d] start. count=%d  addr=0x%x\n", __FUNCTION__, __LINE__, count, addr);
+    //usr_print_current_time();
+    //time_start = get_current_time_ms();
+    for (u32 i = 0; i < count; i++)
+    {
+        //printf("[%s,%d] start. count=%d  addr=0x%x\n", __FUNCTION__, __LINE__, 1, addr);
+        if (ADIHAL_OK != (retVal = (adiHalErr_t)ADIHAL_spiWriteByte(devHalInfo, *(addr + i), *(data + i))))
+            //printf("[%s,%d] w_err. count=%d  addr=0x%x\n", __FUNCTION__, __LINE__, 1, addr);
+            break;
+
+        //printf("[%s,%d] w_okk. count=%d  addr=0x%x\n", __FUNCTION__, __LINE__, 1, addr);
+        
+    }
+    //time_stop = get_current_time_ms();
+    //printf("{time_cal} count=%d  total_time=%dms  avg_time=%dms\n", count, time_stop - time_start, (time_stop - time_start)/count);
+    
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+    uint32_t i = 0;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    error = HAL_SPIWriteBytes(devHalData->spiSettings, addr, data, count);
+
+    if (error < 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: ADIHAL_spiWriteBytes(): HAL_SPIWriteBytes() for device %d, chipSelect %d, returned error %d\n",
+                devHalData->devIndex, devHalData->spiSettings->chipSelectIndex, error);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+    if (devHalData->logLevel & ADIHAL_LOG_SPI)
+    {
+        for(i = 0; i < count; i++)
+        {
+            HAL_writeToLogFile("SPIWrite: CS:%2d, ADDR:0x%03X, DATA:0x%02X \n", devHalData->spiSettings->chipSelectIndex, addr[i], data[i]);
+        }
+
+    }
+
+#endif
+
+    return (retVal);
+}
+
+adiHalErr_t ADIHAL_spiReadByte(void *devHalInfo, uint16_t addr, uint8_t *readdata)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+    int *pChipNo = (int *)devHalInfo;
+    unsigned int value;
+    //retVal = (adiHalErr_t)read_ad9009_value(*pChipNo, addr, &value);
+	//ad9009_read_spi(int num, u32 addr, u32 *pdata, u32 count)
+	retVal = (adiHalErr_t)ad9009_read_spi(*pChipNo, addr, &value, 1);
+	
+    *readdata = value;
+
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    error = HAL_SPIReadByte(devHalData->spiSettings, addr, readdata);
+    if (error < 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: HAL_SPIReadByte() returned error %d, reading from device %d, ChipSelect:%d\n",
+                error, devHalData->devIndex, devHalData->spiSettings->chipSelectIndex);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+    if (devHalData->logLevel & ADIHAL_LOG_SPI)
+    {
+        HAL_writeToLogFile("SPIRead: CS:%2d, ADDR:0x%03X, ReadData:0x%02X\n",
+                devHalData->devIndex, addr, *readdata);
+    }
+
+#endif
+    return (retVal);
+}
+
+adiHalErr_t ADIHAL_spiReadBytes(void *devHalInfo, uint16_t *addr, uint8_t *readdata, uint32_t count)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+    for (int i = 0; i < count; i++)
+    {
+        if (ADIHAL_OK != (retVal = ADIHAL_spiReadByte(devHalInfo, *(addr + i), readdata + i)))
+            break;
+    }
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+    uint32_t i = 0;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    error = HAL_SPIReadBytes(devHalData->spiSettings, addr, readdata, count);
+    if (error < 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: ADIHAL_spiWriteBytes(): HAL_SPIReadBytes() for device %d, chipSelect %d, returned error %d\n",
+                devHalData->devIndex, devHalData->spiSettings->chipSelectIndex, error);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+    if (devHalData->logLevel & ADIHAL_LOG_SPI)
+    {
+        for(i = 0; i < count; i++)
+        {
+            HAL_writeToLogFile("SPIRead: CS:%2d, ADDR:0x%03X, ReadData:0x%02X\n",
+                               devHalData->devIndex, addr[i], readdata[i]);
+        }
+
+    }
+
+#endif
+    return (retVal);
+}
+
+adiHalErr_t ADIHAL_spiWriteField(void *devHalInfo,
+        uint16_t addr, uint8_t fieldVal, uint8_t mask, uint8_t startBit)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+     uint8_t readVal = 0;
+    if (ADIHAL_OK != (retVal = ADIHAL_spiReadByte(devHalInfo, addr, &readVal)))
+        return retVal;
+	
+    readVal = (readVal & ~mask) | ((fieldVal << startBit) & mask);
+    retVal = ADIHAL_spiWriteByte(devHalInfo, addr, readVal);
+
+#ifdef ADI_ZYNQ_PLATFORM
+    uint8_t readVal = 0;
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    error = HAL_SPIReadByte(devHalData->spiSettings, addr, &readVal);
+    if (error < 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: HAL_SPIReadByte() returned error %d in ADIHAL_spiWriteField()\n", error);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+    readVal = (readVal & ~mask) | ((fieldVal << startBit) & mask);
+
+    error = HAL_SPIWriteByte(devHalData->spiSettings, addr, readVal);
+    if (error < 0 )
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: HAL_SPIWriteByte() returned error %d in ADIHAL_spiWriteField()\n", error);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+    if (devHalData->logLevel & ADIHAL_LOG_SPI)
+    {
+        HAL_writeToLogFile("SPIWriteField: CS:%2d, ADDR:0x%03X, FIELDVAL:0x%02X, MASK:0x%02X, STARTBIT:%d\n",
+                devHalData->devIndex,addr, fieldVal, mask, startBit);
+    }
+#endif
+
+    return (retVal);
+}
+
+adiHalErr_t ADIHAL_spiReadField(void *devHalInfo, uint16_t addr, uint8_t *fieldVal, uint8_t mask, uint8_t startBit)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+     uint8_t readVal = 0;
+    if (ADIHAL_OK != (retVal = ADIHAL_spiReadByte(devHalInfo, addr, &readVal)))
+        return retVal;
+
+    *fieldVal = ((readVal & mask) >> startBit);
+#ifdef ADI_ZYNQ_PLATFORM
+
+    uint8_t readVal = 0;
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    error = HAL_SPIReadByte(devHalData->spiSettings, addr, &readVal);
+    if (error < 0)
+    {
+        devHalData->spiErrCode = error;
+        HAL_writeToLogFile("ERROR: HAL_SPIReadByte() returned error %d in ADIHAL_spiReadField()\n", error);
+        return (ADIHAL_SPI_FAIL);
+    }
+
+    *fieldVal = ((readVal & mask) >> startBit);
+
+    if(devHalData->logLevel & ADIHAL_LOG_SPI)
+    {
+        HAL_writeToLogFile("SPIReadField: CS:%2d, ADDR:0x%03X, MASK:0x%02X, STARTBIT:%d, FieldVal:0x%02X\n",
+                devHalData->devIndex,addr, mask, startBit, *fieldVal);
+    }
+
+#endif
+    return (retVal);
+}
+
+adiHalErr_t  ADIHAL_wait_us(void *devHalInfo, uint32_t time_us)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+    usleep(time_us);
+#ifdef ADI_ZYNQ_PLATFORM
+    int32_t error = 0;
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    error = HAL_wait_us(time_us);
+    if (error != 0)
+    {
+        devHalData->timerErrCode = error;
+        HAL_writeToLogFile("ERROR: HAL_wait_us() returned error %d in ADIHAL_wait_us()\n", error);
+        return (ADIHAL_TIMER_FAIL);
+    }
+
+#endif
+    return (retVal);
+}
+
+adiHalErr_t ADIHAL_writeToLog(void *devHalInfo, adiLogLevel_t logLevel, uint32_t errorCode, const char *comment)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+
+#ifdef ADI_ZYNQ_PLATFORM
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+    int32_t error = 0;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    if((devHalData->logLevel & ADIHAL_LOG_ERR) && (logLevel == ADIHAL_LOG_ERR))
+    {
+        error = HAL_writeToLogFile("ERROR: %d: %s", (int)errorCode, comment);
+    }
+    else if((devHalData->logLevel & ADIHAL_LOG_WARN) && (logLevel == ADIHAL_LOG_WARN))
+    {
+        error = HAL_writeToLogFile("WARNING: %d: %s", (int)errorCode, comment);
+    }
+    else if((devHalData->logLevel & ADIHAL_LOG_MSG) && (logLevel == ADIHAL_LOG_MSG))
+    {
+        error = HAL_writeToLogFile("MESSAGE: %d: %s",(int)errorCode, comment);
+    }
+    else
+    {
+        error = HAL_writeToLogFile("Undefined Log Level: 0x%X: %d: %s", logLevel, (int)errorCode, comment);
+    }
+
+    if(error != 0)
+    {
+        retVal = ADIHAL_WARNING;
+    }
+#endif
+
+    return (retVal);
+}
+
+adiHalErr_t ADIHAL_setLogLevel(void *devHalInfo, uint16_t logLevel)
+{
+    adiHalErr_t retVal = ADIHAL_OK;
+#ifdef ADI_ZYNQ_PLATFORM
+    zynqAdiDev_t *devHalData = (zynqAdiDev_t *)devHalInfo;
+
+    if(devHalInfo == NULL)
+    {
+        return (ADIHAL_GEN_SW);
+    }
+
+    devHalData->logLevel = logLevel;
+#endif
+    return retVal;

atsc_app/adi_hal/adi_hal.h

@@ -0,0 +1,579 @@
+/**
+ * \file adi_hal.h
+ * \brief Contains Talise ADI HAL function prototypes type definitions for adi_hal.c
+ *
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9378-AD9379 API license, for more information see the "LICENSE.txt" file in this zip file.
+ */
+
+#ifndef _ADI_HAL_H_
+#define _ADI_HAL_H_
+
+/* include standard types and definitions */
+#include <stdint.h>
+#include <stddef.h>
+
+/*========================================
+ * Enums and structures
+ *=======================================*/
+/**
+ *  \brief Enum of possible Errors Detected by HAL layer to be communicated
+ *         to ADI APIs.
+ */
+typedef enum
+{
+    ADIHAL_OK = 0,        /*!< HAL function successful. No error Detected */
+    ADIHAL_SPI_FAIL,      /*!< HAL SPI operation failure. SPI controller Down */
+    ADIHAL_GPIO_FAIL,     /*!< HAL GPIO function Failure */
+    ADIHAL_TIMER_FAIL,    /*!< HAL Timer function Failure */
+    ADIHAL_WAIT_TIMEOUT,  /*!< HAL function Timeout */
+    ADIHAL_GEN_SW,        /*!< HAL function failed due to general invalid  HAL data*/
+    ADIHAL_WARNING        /*!< HAL function warning that non critical error was detected*/
+
+} adiHalErr_t;
+
+/**
+ *  \brief An enumerated type in bit mask format to list the log message
+ *         categories or groups.
+ */
+typedef enum
+{
+    ADIHAL_LOG_NONE = 0x0,  /*!< HAL Log enum to represent all types of log messages not selected */
+    ADIHAL_LOG_MSG  = 0x1,  /*!< HAL Log enum to represent a log message type*/
+    ADIHAL_LOG_WARN = 0x2,  /*!< HAL Log enum to represent a warning message type*/
+    ADIHAL_LOG_ERR  = 0x4,  /*!< HAL Log enum to represent a error message type*/
+    ADIHAL_LOG_SPI  = 0x8,  /*!< HAL Log enum to represent a spi transaction type*/
+    ADIHAL_LOG_ALL  = 0xF   /*!< HAL Log enum to represent all types of log messages selected */
+
+} adiLogLevel_t;
+
+/*========================================
+ * Prototypes
+ *=======================================*/
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* 3 Bytes per SPI transaction * 341 transactions = ~1024 byte buffer size */
+/* Minimum HAL_SPIWRITEARRAY_BUFFERSIZE = 18 */
+#define HAL_SPIWRITEARRAY_BUFFERSIZE 341
+
+/*============================================================================
+ * ADI Device Hardware Control Functions
+ *===========================================================================*/
+
+/**
+ * \brief Performs a platform hardware initialization for the  ADI Device
+ *
+ * This function shall initialize all external hardware resources required by
+ * ADI Device for correct functionality such as SPI drivers, GPIOs,
+ * clocks (if necessary), as per the target platform and target ADI Device.
+ * At minimum any SPI driver for the ADI Device must be initialized here in order
+ * for the SPI writes within the API to function.
+ *
+ * The API based on the required operation shall set the value timeout parameter.
+ * Once this value is set it shall be the timeout requirement for all HAL operations.
+ * It is the responsibility of the HAL implementation to maintain this
+ * timeout value as a reference. The HAL implementation must use this value
+ * to ensure the HAL function do not block longer than this time interval.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This API should be called before calling any other ADIHAL functions.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules defined by devHalInfo
+ *
+ * \param devHalInfo A void pointer to the targeted device state container.
+ *                   The Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param halTimeout_ms A positive integer value to set the HAL function timeout
+ *                     interval.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_SPI_FAIL if function failed to open SPI driver for the device
+ * \retval ADIHAL_GPIO_FAIL, if function failed to access GPIO resources
+ * \retval ADIHAL_TIMER_FAIL, if function failed to access timer resources
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_openHw(void *devHalInfo, uint32_t halTimeout_ms);
+
+/**
+ * \brief Closes any platform hardware drivers, handles, etc that were necessary
+ *        for the ADI Device.
+ *
+ * This function shall shutdown all external hardware resources required by
+ * ADI Device for correct functionality such as SPI drivers, GPIOs, clocks as
+ * as per the targeted platform and target ADI Device.
+ * It should close and free any resources assigned in ADIHAL_openHw(void *devHalInfo)
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function is called last to terminate the use of device instance and its
+ * hardware resources. ADIHAL_openHw for the same device instance prior to calling
+ * ADIHAL_closeHw
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules defined by devHalInfo
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_SPI_FAIL if function failed to close SPI driver for the device
+ * \retval ADIHAL_GPIO_FAIL, if function failed to release GPIO resources
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_closeHw(void *devHalInfo);
+
+
+/**
+ * \brief Sets the a timeout duration for the HAL functions.
+ *
+ * This function shall set the timeout duration for the HAL functions. If the
+ * HAL operation exceed this time the function shall return with the
+ * ADIHAL_WAIT_TIMEOUT error. This value shall be set by the API based on the
+ * desired required operation. Once this value is set it shall be the timeout
+ * requirement for all HAL operations.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre  This function can be called at anytime to change the timeout duration
+ * for the HAL functions.  However, it is typically used during initialization.
+ *
+ * <B>Dependencies</B>
+ *  --Application and Platform Specific modules defined by devHalInfo
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ * \param halTimeout_ms A positive integer value to set the HAL function timeout
+ *                      interval.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown. eg devHalInfo
+ */
+adiHalErr_t ADIHAL_setTimeout(void *devHalInfo, uint32_t halTimeout_ms);
+
+/**
+ * \brief Performs a hardware reset on the ADI Device
+ *
+ * ADI Devices have a RESETB pin. This function shall toggle the appropriate
+ * ADI Device RESETB pin according to the specifications outlined in the ADI
+ * Device Data Sheet for the targeted Device.
+ *
+ * ADI does not define the structure members in devHalInfo.  The user
+ * developing the platform layer of code is required to reset the correct
+ * device based on some identifying information within their devHalInfo
+ * structure such as a spi chip select or other device id in devHalInfo.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function may be called at any time to reset the device after the required
+ * GPIO drivers and resources are opened by the ADIHAL_openHw function call.
+ * and not after ADIHAL_closeHW.
+ *
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules defined by devHalInfo
+ *
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *        hardware settings describing the device of interest and required
+ *        hardware references to toggle RESETB pin of the ADI device.
+ *
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_GPIO_FAIL if GPIO hardware to toggle ADI reset pin unavailable
+ * \retval ADIHAL_WAIT_TIMEOUT if HAL timeout expired before reset pin toggle could be completed.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_resetHw(void *devHalInfo);
+
+
+/**
+ * \brief Performs a Single SPI write to an ADI Device
+ *
+ * This function shall perform a single SPI write to an ADI Device. The SPI
+ * write implementation must support 15 bit addressing and 8-bit data bytes.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function may only be used after the required SPI drivers and resources
+ * are opened by the ADIHAL_openHw() function call and not after ADIHAL_closeHW.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param addr 15-bit SPI register Address (MSB bit in lower layers sets
+ *             read/write bit)
+ *
+ * \param data 8-bit data value to write to the SPI address specified.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_SPI_FAIL if function failed to complete SPI transaction
+ * \retval ADIHAL_WAIT_TIMEOUT if HAL timeout expired before SPI transaction could be completed.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_spiWriteByte(void *devHalInfo, uint16_t addr, uint8_t data);
+
+/**
+ * \brief Writes an array of SPI writes to an ADI Device
+ *
+ * This function allows improved performance to write large sets of SPI
+ * registers to a single device by passing the SPI Write address and data to
+ * the platform driver in an array instead of many individual calls.
+ *
+ * If the platform layer SPI driver has no way to write an array to the SPI
+ * driver, have this function call ADIHAL_spiWriteByte in a for loop.
+ *
+ * Each address element corresponds to the same index element in the data
+ * array.  addr[0] is the SPI address for data[0], addr[1] is the SPI addr
+ * for data[1], etc.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function may only be used after the required SPI drivers and resources
+ * are opened by the ADIHAL_openHw() function call and not after ADIHAL_closeHW.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param addr An array of 15-bit addresses of SPI register to write.
+ *             15-bit SPI register Addresses (MSB bit in lower layers sets
+ *             read/write bit)
+ *
+ * \param data An array of 8-bit data values to write to the SPI addresses in
+ *             the addr array.
+ *
+ * \param count The number of SPI Writes to transfer. Must be smaller or equal
+ *              to the size of the addr and data arrays.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_SPI_FAIL if function failed to complete SPI transaction
+ * \retval ADIHAL_WAIT_TIMEOUT if HAL timeout expired before SPI transaction could be completed.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t  ADIHAL_spiWriteBytes(void *devHalInfo, uint16_t *addr, uint8_t *data, uint32_t count);
+
+/**
+ * \brief Performs a Single SPI Read from an ADI Device
+ *
+ * This function shall perform a single SPI read from an ADI Device. The SPI
+ * read implementation must support 16 bit addressing and 8-bit data bytes.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function may only be used after the required SPI drivers and resources
+ * are opened by the ADIHAL_openHw() function call and not after ADIHAL_closeHW.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param addr The 16-bit address to read from the SPI device. Actual address
+ *             can not exceed 15-bits since MSB bit is used for Read/Write bit
+ *             in platform layer.
+ *
+ * \param readdata The 8-bit data value returned from SPI register addr
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_SPI_FAIL if function failed to complete SPI transaction
+ * \retval ADIHAL_WAIT_TIMEOUT if HAL timeout expired before SPI transaction could be completed.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_spiReadByte(void *devHalInfo, uint16_t addr, uint8_t *readdata);
+
+/**
+ * \brief Performs a Multi SPI Read from an ADI Device
+ *
+ * This function shall perform multi SPI read from an ADI Device. The SPI
+ * read implementation must support 16 bit addressing and 8-bit data bytes.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function may only be used after the required SPI drivers and resources
+ * are opened by the ADIHAL_openHw() function call and not after ADIHAL_closeHW.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param *addr An array of 15-bit addresses of SPI registers to read from.
+ *             15-bit SPI register Addresses (MSB bit in lower layers sets
+ *             read/write bit)
+ *
+ * \param *readdata The 8-bit data value returned from SPI register addr
+ *
+ * \param  count The number of SPI Reads to transfer. Must be  equal
+ *              to the size of the addr and data arrays.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_SPI_FAIL if function failed to complete SPI transaction
+ * \retval ADIHAL_WAIT_TIMEOUT if HAL timeout expired before SPI transaction could be completed.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_spiReadBytes(void *devHalInfo, uint16_t *addr, uint8_t *readdata, uint32_t count);
+
+/**
+ * \brief Performs a write to the specified field in a SPI register.
+ *
+ * This function shall perform a Read/Modify/Write of a single SPI read from an
+ * bits in the register, and writing the value back to the SPI register.
+ * ADI Device. The mask and startBit parameters allow modifying some or all
+ *
+ * The mask is expected to be applied to the complete 8-bit read back SPI
+ * register value.  The startBit parameter is used to shift the fieldVal
+ * parameter to the correct starting bit in the SPI register.
+ *
+ * Desired Operation:
+ * readVal = Read 8-bit SPI register value
+ *
+ * Modify
+ *   Clear bits in readVal for enabled mask bits (readVal & ~mask)
+ *   Set bits in field based on mask and startBit ((fieldVal << startBit) & mask)
+ *
+ * Write the modified value back to the SPI register
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre  This function may only be used after the required SPI drivers and resources
+ * are opened by the ADIHAL_openHw() function call and not after ADIHAL_closeHW.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param addr The 16-bit address to read/modify/write from the SPI device.
+ *             Actual address can not exceed 15-bits since MSB bit is used for
+ *             Read/Write bit in platform layer.
+ *
+ * \param fieldVal 8-bit value to update in a bitfield (subset) of the SPI register
+ *
+ * \param mask 8-bit mask of bits to modify (if a bit = 1, that bit can be modified)
+ * \param startBit starting bit of the fieldVal in the SPI reg.  Bit shifts
+ *                 the fieldVal up to that bit before masking and modifying the SPI
+ *                 reg.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_SPI_FAIL if function failed to complete SPI transaction
+ * \retval ADIHAL_WAIT_TIMEOUT if HAL timeout expired before SPI transaction could be completed.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_spiWriteField(void *devHalInfo, uint16_t addr, uint8_t  fieldVal, uint8_t mask, uint8_t startBit);
+
+/**
+ * \brief Performs a read from a particular bit field in a SPI register.
+ *
+ * This function shall perform a single SPI read from an ADI Device. Before
+ * the SPI read value is returned, it is masked and bit-shifted to return
+ * only a desired subset of bits - the desired bit field.
+ *
+ * Any necessary SPI drivers or resources are expected to have already been
+ * opened by the ADIHAL_openHw() function call.
+ *
+ * The mask parameter is applied to the entire 8-bit SPI read back value. The
+ * startBit parameter shifts the desired subset of bits down to the zero bit
+ * position.
+ *
+ * Desired Operation:
+ * readVal = SPI read of a 8-bit SPI register
+ * return (readVal & mask) >> startBit
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function may only be used after the required SPI drivers and resources
+ * are opened by the ADIHAL_openHw() function call and not after ADIHAL_closeHW.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param addr The 16-bit address to read/modify/write from the SPI device.
+ *             Actual address can not exceed 15-bits since MSB bit is used for
+ *             Read/Write bit in platform layer.
+ *
+ * \param fieldVal 8-bit value: Readback value of a bitfield (subset) of the
+ *                 SPI register masked and shifted down to the bit 0 position
+ *
+ * \param mask 8-bit mask of bits to readback (if a bit = 1, that bit can be read)
+ * \param startBit starting LSB bit of the fieldVal in the SPI reg.  Bit shifts
+ *                 the fieldVal down to that bit before returning in fieldVal
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_SPI_FAIL if function failed to complete SPI transaction
+ * \retval ADIHAL_WAIT_TIMEOUT if HAL timeout expired before SPI transaction could be completed.
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ */
+adiHalErr_t ADIHAL_spiReadField(void *devHalInfo, uint16_t addr, uint8_t *fieldVal, uint8_t mask, uint8_t startBit);
+
+/**
+ * \brief Delay or sleep for the specified number of microseconds.
+ *
+ * Performs a thread blocking/sleeping delay of the specified time in us.
+ * Function should wait at least for the specified amount of time.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function can be used at any time to create a delay
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param time_us The amount of time in microseconds to block - thread sleep for
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_TIMER_FAIL if function delay function failed to complete
+ * \retval ADIHAL_WARNING if function failed to access non-critical resource eg logging
+ *
+ */
+adiHalErr_t ADIHAL_wait_us(void *devHalInfo, uint32_t time_us);
+
+/*========================================
+ * Optional Logging Functions
+ *
+ *=======================================*/
+/**
+ * \brief Writes a character array to a log file to facilitate debugging
+ *
+ * This function uses the logLevel parameter to specify what type of
+ * message / warning / error to write to the log file. This function
+ * uses enums in adiLogLevel_t to set the log level.
+ * ADIHAL_LOG_NONE = 0x0,
+ * ADIHAL_LOG_MSG  = 0x1,
+ * ADIHAL_LOG_WARN = 0x2,
+ * ADIHAL_LOG_ERR  = 0x4,
+ * ADIHAL_LOG_SPI  = 0x8,
+ * ADIHAL_LOG_ALL  = 0xF
+ *
+ * The user implementation may choose to allow a feature to filter
+ * the level of message to log.  This could allow only logging errors
+ * for instance.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function should be used when setting up and configuring the system
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param halLogLevel The type of message to log.
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ */
+adiHalErr_t ADIHAL_setLogLevel(void *devHalInfo, uint16_t halLogLevel);
+
+/**
+ * \brief Writes a character array to a log file to facilitate debugging
+ *
+ * This function uses the logLevel parameter to specify what type of
+ * message / warning / error to write to the log file. This function
+ * uses enums in adiLogLevel_t to set the log level.
+ *
+ * The user implementation may choose to allow a feature to filter
+ * the level of message to log.  This could allow only logging errors
+ * for instance.
+ *
+ * Returns an error of type adiHalErr_t. Error returned will depend on platform
+ * specific implementation. API expects ADIHAL_OK if function completed successfully.
+ * Any other value represents an error or warning to the API. Error return list
+ * below provides possible errors from customer implementation.
+ *
+ * \pre This function can be used at anytime once the required logging resources
+ * are opened by the ADIHAL_openHw() function call and not after ADIHAL_closeHW.
+ * The log level should also be set prior to calling this function via
+ * ADIHAL_setLogLevel.
+ *
+ * <B>Dependencies</B>
+ * --Application and Platform Specific modules
+ *
+ * \param devHalInfo Pointer to Platform HAL defined structure containing
+ *                   hardware settings describing the device of interest.
+ *
+ * \param logLevel The type of message to log.  ADIHAL_LOG_MSG,
+ *        ADIHAL_LOG_WARN, ADIHAL_LOG_ERR, ADIHAL_LOG_SPI,
+ *
+ * \param errorCode An error code value to designate a particular error
+ * \param comment The character array describing the error
+ *
+ * \retval ADIHAL_OK if function completed successfully.
+ * \retval ADIHAL_GEN_SW if device references is unknown.
+ * \retval ADIHAL_WARNING if log message cannot be completed
+ */
+adiHalErr_t ADIHAL_writeToLog(void *devHalInfo, adiLogLevel_t logLevel, uint32_t errorCode, const char *comment);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+

atsc_app/adi_hal/makefile

@@ -0,0 +1,21 @@
+ADIHALLIB = adihallib.a
+CC = gcc
+ARFLAGS = -rv
+CFLAGS = -Wall -Werror -pedantic -I.
+EXT = c
+
+SRC = adi_hal.$(EXT)
+OBJS = $(SRC:.$(EXT)=.o)
+
+.c.o:
+	$(CC) $(CFLAGS) -c $<
+
+$(ADIHALLIB): $(OBJS)
+	ar $(ARFLAGS) $(ADIHALLIB) $(OBJS)
+
+$(OBJS): ./adi_hal.h
+
+
+clean:
+	 rm *.o
+	 rm *.a

atsc_app/adrv9009/ad9009_fun.h

@@ -0,0 +1,145 @@
+#ifndef _AD9009_FUN_H_
+#define _AD9009_FUN_H_
+
+#define PROJECT_VER "HJX_ADRV9009_X2"
+#define AD9009_VERSION_X "1"
+#define AD9009_VERSION_Y "0"
+#define AD9009_VERSION_Z "0"
+
+
+typedef const struct
+{
+    const char *cmd;                  /* command name user types , ie.    */
+    int32_t   min_args;             /* min num of args command accepts  */
+    int32_t   max_args;             /* max num of args command accepts  */
+    int32_t   (*func)(int32_t, char **);  /* actual function to call          */
+    const char *description; /* brief description of command     */
+    const char *syntax;               /* syntax of command                */
+}AD9009_CMD_STRUCT;
+
+
+
+//int ad9009_main(void);
+int ad9009_main(int argc,char *argv[]);
+
+
+int ad9009_ver_print(int argc,char *argv[]);
+int ad9009_help(int32_t argc, char *argv[]);
+int ad9009_api_ver_print(int argc,char *argv[]);
+
+int ad9009_rd(int argc, char *argv[]);
+int ad9009_wr(int argc, char *argv[]);
+
+
+int ad9009_TALISE_init(int argc, char *argv[]);
+//int TALISE_initClocks(int argc, char *argv[]);
+int ad9009_TALISE_setRfPllFreq(int argc, char *argv[]);
+int ad9009_TALISE_getRfPllFreq(int argc, char *argv[]);
+int ad9009_TALISE_checkRfPllLock(int argc, char *argv[]);
+//int TALISE_initArmMcu(int argc, char *argv[]);
+//int TALISE_loadArm(int argc, char *argv[]);
+int ad9009_TALISE_chkArmState(int argc, char *argv[]);
+int ad9009_TALISE_gtArmVersion(int argc, char *argv[]);
+int ad9009_TALISE_rstExtTxLolChannel(int argc, char *argv[]);
+
+int ad9009_TALISE_radioSwitch(int argc, char *argv[]);
+int ad9009_TALISE_getRadioStatus(int argc, char *argv[]);
+int ad9009_TALISE_enTrackingCals(int argc, char *argv[]);
+int ad9009_TALISE_rescheduleTrkingCal(int argc, char *argv[]);
+int ad9009_TALISE_getPdingTrackingCals(int argc, char *argv[]);
+int ad9009_TALISE_gtTxLolStatus(int argc, char *argv[]);
+int ad9009_TALISE_gtTxQecStatus(int argc, char *argv[]);
+int ad9009_TALISE_gtRxQecStatus(int argc, char *argv[]);
+int ad9009_TALISE_gtOrxQecStatus(int argc, char *argv[]);
+int ad9009_TALISE_rdArmCmdStatus(int argc, char *argv[]);
+int ad9009_TALISE_stupSerializers(int argc, char *argv[]);
+int ad9009_TALISE_stupDeserializers(int argc, char *argv[]);
+int ad9009_TALISE_enbleMultichipSync(int argc, char *argv[]);
+int ad9009_TALISE_gtDeframerFifoDepth(int argc, char *argv[]);
+int ad9009_TALISE_enGainCtrSyncPulse(int argc, char *argv[]);
+int ad9009_TALISE_stGainControlMode(int argc, char *argv[]);
+int ad9009_TALISE_gtObsRxPath(int argc, char *argv[]);
+int ad9009_TALISE_stArmGpioPins(int argc, char *argv[]);
+int ad9009_TALISE_stRadioControlPinMode(int argc, char *argv[]);
+
+int ad9009_TALISE_setSnifferCh(int argc, char *argv[]);
+int ad9009_TALISE_rstDeframer(int argc, char *argv[]);
+int ad9009_TALISE_setupJesd204b(int argc, char *argv[]);
+int ad9009_TALISE_enableLink(int argc, char *argv[]);
+int ad9009_TALISE_enableSysref(int argc, char *argv[]);
+int ad9009_TALISE_read_framerStatus(int argc, char *argv[]);
+
+int ad9009_TALISE_enFramerPrbs(int argc, char *argv[]);
+int ad9009_TALISE_enTestFramerPrbsData(int argc, char *argv[]);
+int ad9009_TALISE_enDeFramerPrbs(int argc, char *argv[]);
+
+int ad9009_TALISE_InjectPrbsError(int argc, char *argv[]);
+int ad9009_TALISE_clrDeframerPrbsCounters(int argc, char *argv[]);
+int  ad9009_TALISE_rdDeframerPrbsCounters(int argc, char *argv[]);
+
+int ad9009_TALISE_setFramerDataSource(int argc, char *argv[]);
+int ad9009_TALISE_setRxManualGain(int argc, char *argv[]);
+int ad9009_TALISE_getRxGain(int argc, char *argv[]);
+int ad9009_TALISE_setTxAttenuation(int argc, char *argv[]);
+int ad9009_TALISE_getTxAttenuation(int argc, char *argv[]);
+int ad9009_TALISE_readDacPower(int argc, char *argv[]);
+
+int ad9009_TALISE_enTxNco(int argc, char *argv[]);
+int ad9009_TALISE_setObsRxPath(int argc, char *argv[]);
+int ad9009_TALISE_IlasCheck(int argc, char *argv[]);
+
+int ad9009_TALISE_setupAdc(int argc, char *argv[]);
+int ad9009_TALISE_setAdcChannel(int argc, char *argv[]);
+int ad9009_TALISE_readAdc(int argc, char *argv[]);
+
+int ad9009_TALISE_setRfPllFreq_cals(int argc, char *argv[]);
+//int TALISE_wrAuxIo(int argc, char *argv[]);
+//int TALISE_setupAuxDac(int argc, char *argv[]);
+int ad9009_TALISE_wrAuxDac(int argc, char *argv[]);
+
+int ad9009_TALISE_enable_extlol(int argc, char *argv[]);
+int ad9009_enable_extlol(void);
+int ad9009_TALISE_stRx1GainCtrlPin(int argc, char *argv[]);
+int ad9009_TALISE_stRx2GainCtrlPin(int argc, char *argv[]);
+
+int ad9009_TALISE_setObsGainControlMode(int argc, char *argv[]);
+int ad9009_TALISE_setObsManualGain(int argc, char *argv[]);
+int ad9009_TALISE_resetObsManualGain(int ch);
+int ad9009_TALISE_getObsRxGainValue(int argc, char *argv[]);
+int ad9009_TALISE_enable_extlol_rmOff(int argc, char *argv[]);
+int ad9009_TALISE_enable_extlol_justTrack(int argc, char *argv[]);
+int ad9009_TALISE_runInitCalsManual(int argc, char *argv[]);
+
+int ad9009_TALISE_getRxDecPower(int argc, char *argv[]);
+int ad9009_TALISE_getTrackingCals(int argc, char *argv[]);
+
+
+int ad9009_TALISE_configAd9370(int argc, char *argv[]);
+
+
+int ad9009_TALISE_getTempStatus(int argc, char *argv[]);
+int ad9009_TALISE_setTrackCal(int argc, char *argv[]);
+int ad9009_TALISE_getTrackCal(int argc, char *argv[]);
+
+int ad9009_TALISE_Ext_LOL_Cal_2(int argc, char *argv[]);
+int ad9009_TALISE_Ext_LOL_Cal_1(int argc, char *argv[]);
+int ad9009_TALISE_setRfPllFreq_1(int argc, char *argv[]);
+int ad9009_TALISE_runInitCalsManual_1(int argc, char *argv[]);
+int ad9009_TALISE_Test(int argc, char *argv[]);
+
+int ad9009_tx1_initTxAttenuation(uint16_t att);
+int ad9009_set_rf_pll_freq( unsigned int channel ,uint64_t freqValue);
+
+int usr_set_ad9009_tx1_TxAttenuation(uint16_t att);
+int usr_get_ad9009_tx1_getTxAttenuation(void);
+
+int usr_set_ad9009_TxAttenuation(uint16_t att,uint8_t channel);
+int usr_get_ad9009_getTxAttenuation(uint8_t channel);
+
+int usr_set_ad9009_RxGain(uint8_t gainIndex, uint8_t channel);
+int usr_get_ad9009_RxGain(uint8_t *prxGainIndex, uint8_t channel);
+void usr_printf_radiooff(char *pstr);
+
+#endif
+
+

atsc_app/adrv9009/adrv9009.c

@@ -0,0 +1,357 @@
+#include <stdio.h>
+#include <unistd.h>
+#include <string.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <fcntl.h>
+#include <linux/spi/spidev.h>
+
+#include "../inc/type.h"
+#include "../inc/i2c_drv.h"
+#include "../inc/ispi.h"
+#include "../inc/isys_com.h"
+
+#include "adrv9009.h"
+
+#define ADRV9009_SPI_NODE               "/dev/spidev32766.1"
+
+struct ad9009_chip_init ad9009_config =
+{
+	0x2,  //chip_count
+	{
+		// ad9009_0
+		{
+			0x61, //写使能寄存器 				 write_en_reg
+			0,    //写使能寄存器的控制位	write_en_bit
+			0x60, //读使能寄存器				 read_en_reg
+			0, 	  //读使能寄存器的控制位 read_en_bit
+			0x62, //操作寄存器				 addr_reg
+			0x63, //写数据寄存器				 write_data_reg
+			0x98, //读数据寄存器				 read_data_reg
+			0x99, //写数据状态寄存器			 write_status_reg
+			0,    //写数据状态寄存器的标志位 write_status_bit
+			0x99, //读数据状态寄存器     		 read_status_reg
+			0,    //读数据状态寄存器的标志位 read_status_bit
+			0x12, //复位寄存器				 read_status_bit
+			0, 	  //复位寄存器的标志位	  
+			1, //reset_level
+			4, //每次发送休眠时间(us)
+		},
+		// ad9009_1
+		{
+			0x65, //写使能寄存器
+			0, //写使能寄存器的控制位
+			0x64, //读使能寄存器
+			0, //读使能寄存器的控制位
+			0x66, //操作寄存器
+			0x67, //写数据寄存器
+			0x9A, //读数据寄存器
+			0x9B, //写数据状态寄存器
+			0, //写数据状态寄存器的标志位
+			0x9B, //读数据状态寄存器
+			0, //读数据状态寄存器的标志位
+			0x22, //复位寄存器
+			0, //复位寄存器的标志位
+			1, //reset_level
+			4, //每次发送休眠时间(us)
+		}
+	}
+};
+
+
+#if 1
+
+int adrv9009_spi_fd = -1;
+
+void spi_9009_init(void)
+{
+    unsigned char mode = SPI_MODE_3 ; // 1 0 --  1 闲时高电平， 0第一个边沿采样
+    unsigned char bits = 8;
+    unsigned int speed = 100000;
+    uint16 u16data = 0;
+
+    init_spi_dev(ADRV9009_SPI_NODE, &adrv9009_spi_fd, mode, bits, speed);
+
+	printf("spi init 9009 fd=%d\n", adrv9009_spi_fd);
+}
+
+static s8 spi_write_9009(u16 addr, u8 data)
+{
+    int ret;
+
+	//printf("spi_write addr=0x%x data=0x%x\n", addr, data);
+    ret = spi_w_addr16_data8(adrv9009_spi_fd, addr, data);
+    if(ret == 0) {
+        return 0;
+    } else {
+        if(ret == -1)
+            log_printf(LOG_ERR,I_SYS_STATUS,"9009_spi_fd err, < 0 \n");
+        else if(ret == -2)
+            log_printf(LOG_ERR,I_SYS_STATUS,"can't send spi message, for write 9009_spi_fd\n");
+
+        return -1;
+    }
+}
+
+static s8 spi_read_9009(u16 addr, u8 *pdata)
+{
+    int ret;
+
+	//printf("spi_read addr=0x%x \n", addr);
+	ret = spi_r_addr16_data8(adrv9009_spi_fd, addr, pdata);
+    if(ret == 0) {
+        return 0;
+    } else {
+        if(ret == -1)
+            log_printf(LOG_ERR,I_SYS_STATUS,"9009_spi_fd err, < 0 \n");
+        else if(ret == -2)
+            log_printf(LOG_ERR,I_SYS_STATUS,"can't send spi message, for read 9009_spi_fd\n");
+        return -1;
+    }
+}
+
+
+int ad9009_write_hw_spi(int num, u32 addr, u32 *pdata, u32 count)
+{
+	int ret = OK;
+	struct ad9009_init *p;
+
+	if(num > ad9009_config.chip_count){
+		printf("ERROR:ad9009_write:chip num(%d) >%d.! \r\n", num, ad9009_config.chip_count);
+		return ERROR;
+	}
+
+	if(num == 1){
+		p = (struct ad9009_init *)&ad9009_config.data;
+	}
+	else{
+		p = &ad9009_config.data[1];
+	}
+
+	uint8 *p8data = (uint8 *)pdata;
+	while (count--){
+		spi_write_9009((uint16)(addr&0xffff), *p8data);
+		addr++;
+		p8data++;
+	}
+
+	return ret;
+}
+
+int ad9009_read_hw_spi(int num, u32 addr, u32 *pdata, u32 count)
+{
+	int ret = OK;
+	struct ad9009_init *p;
+
+	if(num >ad9009_config.chip_count){
+		printf("ERROR:ad9009_read:chip num(%d) >%d.! \r\n",num,ad9009_config.chip_count);
+		return ERROR;
+	}
+
+	if(num==1){
+		p = (struct ad9009_init *)&ad9009_config.data;
+	}
+	else{
+		p = &ad9009_config.data[1];
+	}
+	
+	uint8 *p8data = (uint8 *)pdata;
+	while (count--){
+		if(addr>0xffff){
+			printf("warning, addr=0x%x over range!\n", addr);
+		}
+		spi_read_9009((uint16)(addr&0xffff), p8data);
+		
+		addr++;
+		p8data++;
+	}
+
+	return ret;
+}
+
+#if 0
+int ad9009_write_sim_spi(int num, u32 addr, u32 *pdata, u32 count)
+{
+	int ret = OK;
+	struct ad9009_init *p;
+	u32 write_status = 0;
+	u32 timeout_count = 0;
+	u32 write_data;
+
+	if(num > ad9009_config.chip_count){
+		printf("ERROR:ad9009_write:chip num(%d) >%d.! \r\n", num, ad9009_config.chip_count);
+		return ERROR;
+	}
+
+	if(num == 1){
+		p = (struct ad9009_init *)&ad9009_config.data;
+	}
+	else{
+		p = &ad9009_config.data[1];
+	}
+
+	/*int fd = open(FPGA_ADRV9009_NODE, O_RDWR);
+    if (fd < 0) {
+        printf("\n\n[ ad9009_write_sim_spi ] node err.\n");
+        return ERROR;
+    }*/
+
+	while (count--){
+		fpga_write_axi0(p->addr_reg, addr, 1);
+
+		fpga_write_axi0(p->write_data_reg, *pdata, 1);
+
+		write_data = 0;
+		fpga_write_axi0(p->write_en_reg, write_data, 1);
+
+		write_data = 1;
+		fpga_write_axi0(p->write_en_reg, write_data, 1);
+
+		timeout_count = 0;
+		do{
+			usleep(p->sleep_time);
+			//if(OK != (fpga_getbit(fd, p->write_status_reg, p->write_status_bit, 1, &write_status)))
+			if(OK != (fpga_read_axi0(p->write_status_reg, &write_status, 1))){
+                ret = ERROR;
+				printf("ERROR:read status reg[0x%x]=0x%x failed! \n", p->write_status_reg, write_status);
+				break;
+			}
+
+			timeout_count++;
+			write_status = (write_status >> p->write_status_bit);
+
+			if ((RETRY_GET_STATUS_COUNT_MAX) < timeout_count){ //最多尝试100次
+				ret = ERROR;
+				printf("[%s,%d]ERROR:read reg[0x%x]=0x%x timeout! \r\n", __FUNCTION__, __LINE__, p->write_status_reg,write_status);
+				break;
+			}
+		}while (write_status != 1);
+
+		addr++;
+		pdata++;
+	}
+
+	//close(fd);
+	return ret;
+}
+
+int ad9009_read_sim_spi(int num, u32 addr, u32 *pdata, u32 count)
+{
+	int ret = OK;
+	struct ad9009_init *p;
+
+	u32 read_status = 0;
+	u32 timeout_count = 0;
+	u32 write_data;
+
+	if(num >ad9009_config.chip_count){
+		printf("ERROR:ad9009_read:chip num(%d) >%d.! \r\n",num,ad9009_config.chip_count);
+		return ERROR;
+	}
+
+	if(num==1){
+		p = (struct ad9009_init *)&ad9009_config.data;
+	}
+	else{
+		p = &ad9009_config.data[1];
+	}
+	
+	/*int fd = open(FPGA_ADRV9009_NODE, O_RDWR);
+    if (fd < 0) {
+        printf("\n\n[ ad9009_read_sim_spi ] node err.\n");
+        return ERROR;
+    }*/
+
+	while (count--){
+		fpga_write_axi0(p->addr_reg, addr, 1);
+
+		write_data = 0;
+		fpga_write_axi0(p->read_en_reg, write_data, 1);
+
+		write_data = 1;
+		fpga_write_axi0(p->read_en_reg, write_data, 1);
+
+		timeout_count = 0;
+		
+		do{
+			usleep(p->sleep_time);
+			//if (OK != fpga_getbit(fd, p->read_status_reg, p->read_status_bit, 1, &read_status))
+			if (OK != fpga_read_axi0(p->read_status_reg, &read_status, 1)){
+				ret = ERROR;
+				printf("ERROR:read status reg[0x%x] =0x%xfailed! \r\n", p->read_status_reg, read_status);
+				break;
+			}
+			read_status = (read_status >> p->read_status_bit);
+			timeout_count++;
+			if ((RETRY_GET_STATUS_COUNT_MAX) < timeout_count){ //最多尝试100次
+				ret = ERROR;
+				printf("[%s,%d]ERROR:read reg[0x%x] timeout! \r\n", __FUNCTION__, __LINE__,  p->write_status_reg);
+				break;
+			}
+
+		}while (read_status != 1);
+
+		if (1 != read_status){
+			ret = ERROR;
+			printf("ERROR:time out, read_status = %d\r\n",read_status);
+			break;
+		}
+
+		if (OK != fpga_read_axi0(p->read_data_reg, pdata, 1)){
+			printf("[%s%d]ERROR: read reg[0x%x] failed! \r\n",  __FUNCTION__, __LINE__, addr);
+			ret = ERROR;
+			break;
+		}
+
+		addr++;
+		pdata++;
+	}
+
+	//close(fd);
+
+	return ret;
+}
+#endif
+
+int ad9009_reset(int num)
+{
+	int ret = OK;
+ 	//分开寄存器控制
+	struct ad9009_init *p;
+	u32 write_data;
+
+	if(num >ad9009_config.chip_count){
+		printf("ERROR:ad9009_reset:chip num(%d) >%d.! \r\n",num,ad9009_config.chip_count);
+		return ERROR;
+	}
+
+	if(num==1){
+		p = (struct ad9009_init *)&ad9009_config.data;
+	}
+	else{
+		p = &ad9009_config.data[1];
+	}
+
+	/*int fd = open(FPGA_ADRV9009_NODE, O_RDWR);
+    if (fd < 0) {
+        printf("\n\n[ ad9009_reset ] node err.\n");
+        return ERROR;
+    }*/
+
+	//@cc参照原来的程序 reset adrv9009 0x12      先 1后0
+	//write_data = (p->reset_level<<p->reset_bit);
+	write_data = p->reset_level;
+	fpga_write_axi0(p->reset_reg, write_data, 1);
+
+	usleep(100*1000);
+	write_data = !(p->reset_level);
+	fpga_write_axi0(p->reset_reg, write_data, 1);
+
+	//close(fd);
+	return ret;
+}
+
+#endif

atsc_app/adrv9009/adrv9009.h

@@ -0,0 +1,73 @@
+
+#ifndef _ADRV9009_H_
+#define _ADRV9009_H_
+
+#define USR_AD9009_FPGA_WR      1
+
+//#define FPGA_NODE "/dev/zynq_axi0"
+//#define FPGA_NODE "/dev/spidev1.0"
+
+#define FPGA_ADRV9009_NODE 	"/dev/zynq_axi0"
+
+#include "fcntl.h"
+
+
+
+
+
+#define RETRY_GET_STATUS_COUNT_MAX     100
+
+
+
+// 使用fpga作为转发时使用以下结构体
+//分开寄存器控制
+#if 1
+
+struct ad9009_init
+{
+	u32 write_en_reg; //写使能寄存器
+	u32 write_en_bit; //写使能寄存器的控制位
+	u32 read_en_reg; //读使能寄存器
+	u32 read_en_bit; //读使能寄存器的控制位
+	u32 addr_reg; //操作寄存器
+	u32 write_data_reg; //写数据寄存器
+	u32 read_data_reg; //读数据寄存器
+	u32 write_status_reg; //写数据状态寄存器
+	u32 write_status_bit; //写数据状态寄存器的标志位
+	u32 read_status_reg; //读数据状态寄存器
+	u32 read_status_bit; //读数据状态寄存器的标志位
+	u32 reset_reg; //复位寄存器
+	u32 reset_bit; //复位寄存器的标志位
+	u32 reset_level; //reset level
+	u32 sleep_time; //每次发送休眠时间
+};
+
+struct ad9009_chip_init
+{
+	u32 chip_count;
+	struct ad9009_init data[4];
+};
+
+//int write_ad9009(u32 num, u32 addr, u32 data);
+//int read_ad9009(u32 num, u32 addr, u32 count);
+//int read_ad9009_value(int num,int addr, unsigned int *value);
+//int ad9009_read(int num, u32 addr, u32 *pdata, u32 count);
+int ad9009_reset(int num);
+
+
+#define ad9009_write_spi	ad9009_write_hw_spi
+#define ad9009_read_spi  	ad9009_read_hw_spi
+
+//#define ad9009_write_spi	ad9009_write_sim_spi
+//#define ad9009_read_spi  	ad9009_read_sim_spi
+
+
+int ad9009_write_spi(int num, u32 addr, u32 *pdata, u32 count);
+int ad9009_read_spi(int num, u32 addr, u32 *pdata, u32 count);
+void spi_9009_init(void);
+
+#endif
+
+#endif
+
+

atsc_app/adrv9009/adrv9009_config.h

@@ -0,0 +1,243 @@
+
+#ifndef  _ADRV9009_CONFIG_H_
+#define  _ADRV9009_CONFIG_H_
+//#include "../type.h"
+
+
+
+typedef enum{
+	ADRV9009_0=0,
+	ADRV9009_1
+}ADRV9009_NUM;
+
+
+typedef struct{
+    u32 reg00;
+    u32 reg01;
+    u32 reg0C;
+    u32 reg18;
+
+    u32 cpri_rec_cl_lost;
+    u32 ad9528_status_ld;
+
+//    // reg addr 0x00
+//    u8 summary_alarm;          // bit4
+//    u8 status_code;            // bit3-0
+//    // reg addr 0x01
+//    u8 latched_ver_loacl_LOF;  // bit15
+//    u8 latched_ver_loacl_LOS;  // bit14
+//    u8 latched_ver_loacl_RAI;  // bit13
+//    u8 latched_ver_remote_LOF; // bit12
+//    u8 latched_ver_remote_LOS; // bit11
+//    u8 latched_ver_remote_SAP; // bit10
+//    u8 latched_ver_remote_RAI; // bit9
+//    u8 latched_ver_remote_rst; // bit8
+//    u8 core_type;              // bit7  1-core is a master port, 0 -- core is a slave port
+//    u8 core_genered;           // bit6  1-core has been generated using a hardware evaluation license
+//    u8 local_LOF;              // bit1
+//    u8 local_LOS;              // bit0
+//    // reg addr 0x0C Current Line Speed Register
+//    u16 speed_index;           // bit15
+//    // reg addr 0x18 General Debug Register
+}ST_REG_STATUS;
+
+
+
+//---------------------------------------------------------------------------------------
+
+#if 1//something may not used
+#define AXI_ADDR_VERSION1		0x86
+#define AXI_ADDR_DPD_CTRL1 		0x110
+#define AXI_ADDR_DPD_CTRL2		0x111
+#define AXI_ADDR_DPD_CTRL3		0x112
+#define AXI_ADDR_CFR_CTRL1		0x113
+#define AXI_ADDR_CFR_CTRL2		0x114
+#define AXI_ADDR_SIG_SHIFT		0x115
+#define AXI_ADDR_DPD_FIXDLY		0x116
+#define AXI_ADDR_DPD_AGCPWR     0x117
+#define AXI_ADDR_DPD_TEST		0x118
+#define AXI_ADDR_FBROUTE		0x11A
+#define AXI_ADDR_ERR_CHECK		0x11B
+#define AXI_ADDR_AMP_SAT		0x11C
+#define AXI_ADDR_BW_MODE		0x12D
+#define AXI_ADDR_CRST_TAP_MAP	0x11D
+#define AXI_ADDR_CRST_ADREF_TAP0 	0x11E
+#define AXI_ADDR_CRST_ADREF_TAP1 	0x11F
+#define AXI_ADDR_CRST_ADREF_TAP2 	0x120
+#define AXI_ADDR_CRST_ADREF_TAP3 	0x121
+#define AXI_ADDR_CRST_ADREF_TAP4 	0x122
+#define AXI_ADDR_CRST_ADREF_TAP5 	0x123
+#define AXI_ADDR_CRST_ADREF_TAP6 	0x124
+#define AXI_ADDR_CRST_ADREF_TAP7 	0x125
+#define AXI_ADDR_CRST_ADREF_TAP8 	0x126
+#define AXI_ADDR_CRST_ADREF_TAP9 	0x127
+#define AXI_ADDR_CRST_ADREF_TAP10	0x128
+#define AXI_ADDR_CRST_ADREF_TAP11	0x129
+#define AXI_ADDR_CRST_ADREF_TAP12	0x130
+#define AXI_ADDR_CRST_ADREF_TAP13	0x131
+#define AXI_ADDR_CRST_ADREF_TAP14	0x132
+
+#define AXI_ADDR_DPD_STATUS1	0x200
+#define AXI_ADDR_DPD_AGCCWORD	0x201
+#define AXI_ADDR_DPD_SYNCOFFSET	0x202
+
+/*#define MASK_DPD_ERR  			(0x0001)
+#define MASK_DPD_PWRHIGH 		(0x0001<<1)
+#define MASK_DPD_PWRLOW  		(0x0001<<2)
+#define MASK_DPD_ERR_ABORT		(0x0001<<3)
+#define MASK_DPD_TRX_SYNC_OK	(0x0001<<4)
+#define MASK_DPD_DAGC_TOOHIGH	(0x0001<<5)
+#define MASK_DPD_DAGC_TOOLOW	(0x0001<<6)
+
+#define DPD_CTRL1_DPD_START		(0x0001)
+#define DPD_CTRL1_DPD_ALLCLR	(0x0001<<1)
+#define DPD_CTRL1_ALL_BYPS		(0x0001<<2)
+
+#define DPD_CTRL2_LIN_UPDATE	(0x0001)
+#define DPD_CTRL2_NONLIN_UPDATE	(0x0001<<1)
+#define DPD_CTRL2_SET_NONLIN_UDP_MOD(x)  		(((x)&0x07)<<2)    //01 : POLY; 10: CRST, 100 SELF
+#define DPD_CTRL2_AMP_CHK		(0x0001<<4)
+*/
+#define DPD_CTRL3_FAGC_UPDATE  	(0x0001)
+#define DPD_CTRL3_FAGC_SLOWDN  	(0x0001<<1)
+#define DPD_CTRL3_DAGC_UPDATE  	(0x0001<<2)
+#define DPD_CTRL3_DAGC_SLOWDN  	(0x0001<<3)
+#define DPD_CTRL3_DCRM_UPDATE  	(0x0001<<4)
+#define DPD_CTRL3_ROT_UPDATE   	(0x0001<<5)
+#define DPD_CTRL3_SYNC_UPDATE  	(0x0001<<6)
+#define DPD_CTRL3_SYNC_RESTART 	(0x0001<<7)
+#define DPD_CTRL3_IQB_UPDATE  	(0x0001<<8)
+
+#define DPD_SET_100M			(0x00)
+#define DPD_SET_25M				(0x01)
+
+#define SET_DPDFAGC_REFPWR(x)				((x))
+#define DPD_SET_CRST_ADDR_STRUCT_2  ((0x01)<<17)
+#define DPD_SET_ERR_TH(x)			(((x)&0xffff))
+#define DPD_SET_ERR_CNT_TH(x)		(((x)&0xff)<<16)
+#define DPD_SET_DGAIN(x)		(((x)&0xffff)<<2)
+#define DPD_SET_FIX_DLY(x)		(0x8000 & ((x)&0x7ff))
+#define DPD_SET_CRST_REFAD(x)	((x)[0] | ((x)[1]<<4) |  ((x)[2]<<8) |  ((x)[3]<<12) |  ((x)[4]<<16) |  ((x)[5]<<20))
+
+#define DPD_MAX_TX_AMP_SAT			65535
+//#define TX_FREQ_IN_HZ				2595000000
+
+//#define TX_FREQ_IN_HZ				3550000000 //3550000000    //h210809 2595000000 => 3550000000
+//#define TX_FREQ_IN_HZ				(2595000000*1.024) //3550000000    //h210809 2595000000 => 3550000000
+//#define TX_FREQ_IN_HZ				(3550000000*1.024) //3550000000    //h210809 2595000000 => 3550000000
+//#define TX_FREQ_IN_HZ				(698000000*1.024) //3550000000    //h210809 2595000000 => 3550000000
+//#define TX_FREQ_IN_HZ				(2595000000*1.024) //3550000000    //h210809 2595000000 => 3550000000
+//#define TX_FREQ_IN_HZ				(698000000*1.024) //3550000000    //h210809 2595000000 => 3550000000
+
+#define TX_FREQ_IN_HZ				(300000000) //3550000000    //h210809 2595000000 => 3550000000
+
+#define D_SET_ATT					8000
+// note index msg
+enum
+{
+    NOTE_M_DPD_STEP = 1,
+    NOTE_E_TX_POWER_TOO_MUCH,
+    NOTE_FEEDBACK_POWER_LOW,
+    NOTE_FEEDBACK_POWER_HIGH,
+    NOTE_DPD_ABORT_DUE_TO_LARGE_ERR,
+    NOTE_DPD_ABORT_DUE_TO_DAGC_INPUT_LOW,
+    NOTE_DPD_ABORT_DUE_TO_DAGC_INPUT_HIGH,
+    NOTE_TXRX_SYNC_OK,
+    NOTE_TXRX_SYNC_FAILED,
+    NOTE_STEP_FINISHED_DO_NEXT_STEP,
+    NOTE_STEP_DONE,
+    NOTE_STEP_SUCCESS,
+    NOTE_PROCESS_ABORT,
+    NOTE_END
+};
+
+#if 1
+//area1
+#define A1_ADDR_TAP_START       0
+#define A1_ADDR_TAP_STOP        14
+
+#define A1_ADDR_SUB_TAP_START   4
+#define A1_ADDR_SUB_TAP_STOP    4
+
+#define A1_ADDR_CRST_START      0
+#define A1_ADDR_CRST_STOP       511
+
+#define A1_ADDR_WORD_START      1 //����
+#define A1_ADDR_WORD_STOP       0
+
+#define A1_TOTAL_LEN            ((A1_ADDR_TAP_STOP-A1_ADDR_TAP_START+1)*(A1_ADDR_SUB_TAP_STOP-A1_ADDR_SUB_TAP_START+1)*(A1_ADDR_CRST_STOP-A1_ADDR_CRST_START+1)*(A1_ADDR_WORD_START-A1_ADDR_WORD_STOP+1))
+
+//area2
+#define A2_ADDR_TAP_START       4
+#define A2_ADDR_TAP_STOP        10
+
+#define A2_ADDR_SUB_TAP_START   2
+#define A2_ADDR_SUB_TAP_STOP    3
+
+#define A2_ADDR_CRST_START      0
+#define A2_ADDR_CRST_STOP       1023
+
+#define A2_ADDR_WORD_START      3 //����
+#define A2_ADDR_WORD_STOP       0
+
+#define A2_TOTAL_LEN            ((A2_ADDR_TAP_STOP-A2_ADDR_TAP_START+1)*(A2_ADDR_SUB_TAP_STOP-A2_ADDR_SUB_TAP_START+1)*(A2_ADDR_CRST_STOP-A2_ADDR_CRST_START+1)*(A2_ADDR_WORD_START-A2_ADDR_WORD_STOP+1))
+
+//area3
+#define A3_ADDR_TAP_START       4
+#define A3_ADDR_TAP_STOP        10
+
+#define A3_ADDR_SUB_TAP_START   0
+#define A3_ADDR_SUB_TAP_STOP    1
+
+#define A3_ADDR_CRST_START      0
+#define A3_ADDR_CRST_STOP       1023
+
+#define A3_ADDR_WORD_START      4 //����
+#define A3_ADDR_WORD_STOP       0
+
+#define A3_TOTAL_LEN            ((A3_ADDR_TAP_STOP-A3_ADDR_TAP_START+1)*(A3_ADDR_SUB_TAP_STOP-A3_ADDR_SUB_TAP_START+1)*(A3_ADDR_CRST_STOP-A3_ADDR_CRST_START+1)*(A3_ADDR_WORD_START-A3_ADDR_WORD_STOP+1))
+
+
+//area4
+#define A4_ADDR_TAP_START       15
+#define A4_ADDR_TAP_STOP        15
+
+#define A4_ADDR_SUB_TAP_START   0
+#define A4_ADDR_SUB_TAP_STOP    6
+
+#define A4_ADDR_CRST_START      0
+#define A4_ADDR_CRST_STOP       31
+
+#define A4_TOTAL_LEN            ((A4_ADDR_TAP_STOP-A4_ADDR_TAP_START+1)*(A4_ADDR_SUB_TAP_STOP-A4_ADDR_SUB_TAP_START+1)*(A4_ADDR_CRST_STOP-A4_ADDR_CRST_START+1))
+
+#define AREA_TATAL_LEN          (A1_TOTAL_LEN+A2_TOTAL_LEN+A3_TOTAL_LEN+A4_TOTAL_LEN)
+#endif
+
+
+//static int g_dpd_up_flg=E_DPD_IDLE;
+
+#define MASK_SPI_EN_SPI1_ENABLE     (0x1<<0)
+#define MASK_SPI_EN_SPI2_ENABLE     (0x1<<1)
+#define MASK_SPI_EN_EXT_SPI_ENABLE  (0x1<<2)
+#define MASK_SPI_EN_MCU_SPI1_ENABLE (0x1<<3)
+
+
+#endif
+//---------------------------------------------------------------------------------------
+
+int adrv9009_cfg(int which_9009);
+int adrv9009_orx_gain_thr();
+void adrv9009_orx_gain_stop(void);
+int Adrv9009_Ext_LOL_Cal_1(int which_9009);
+int Adrv9009_Ext_LOL_Cal_2(int which_9009);
+extern void * status_monitor_thr (void * args);
+extern void read_fpga_version(char *pVer);
+
+
+extern void adrv9009_init(void);
+extern void chang_freq(uint8 radio_ctl, int freq_changed);
+extern void chang_cw(int cw);
+
+
+#endif
+

atsc_app/adrv9009/adrv9009_orx_gain.c

@@ -0,0 +1,123 @@
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <pthread.h>
+#include <stdint.h>
+
+#include "../inc/type.h"
+#include "talise_config.h"
+#include "adrv9009_config.h"
+
+#define FPGA_ORX1_GAIN_REG  0xC4
+#define ORX_GAIN_POLL_MS    100//100
+
+static pthread_t g_orx_poll_thread;
+static volatile int g_orx_poll_running = 0;
+pthread_mutex_t g_orx_gain_lock = PTHREAD_MUTEX_INITIALIZER;
+static uint8_t g_last_orx1_gain = 0xFF;
+static taliseDevice_t *g_dev = NULL;
+
+extern int fpga_read_axi0(uint32 addr, uint32 *pdata, uint32 count);
+extern taliseInit_t *p_myTalInit;
+extern taliseDevice_t *p_myTaliseDevice_shm;;
+
+static int set_orx_gain_index_safe(unsigned int ch, uint8_t gain)
+{
+    taliseObsRxChannels_t channel;
+    uint8_t min_idx, max_idx;
+
+    switch (ch) {
+    case 1:
+        channel = TAL_ORX1;
+        min_idx = p_myTalInit->obsRx.orxGainCtrl.orx1MinGainIndex;
+        max_idx = p_myTalInit->obsRx.orxGainCtrl.orx1MaxGainIndex;
+        break;
+    case 2:
+        channel = TAL_ORX2;
+        min_idx = p_myTalInit->obsRx.orxGainCtrl.orx2MinGainIndex;
+        max_idx = p_myTalInit->obsRx.orxGainCtrl.orx2MaxGainIndex;
+        break;
+    default:
+        return -1;
+    }
+
+    if (gain < min_idx) gain = min_idx;
+    if (gain > max_idx) gain = max_idx;
+
+	printf("start TALISE_setObsRxManualGain\n");
+    pthread_mutex_lock(&g_orx_gain_lock);
+    int ret = TALISE_setObsRxManualGain(g_dev, channel, gain);
+    pthread_mutex_unlock(&g_orx_gain_lock);
+	printf("end TALISE_setObsRxManualGain\n");
+	
+    if (ret == TALACT_NO_ACTION) {
+        printf("[ORxGain] set ORx%u gain=0x%02X (range %u-%u)\n", ch, gain, min_idx, max_idx);
+        return 0;
+    }
+
+    printf("[ORxGain] FAIL: set ORx%u gain=0x%02X, ret=%d\n", ch, gain, ret);
+    return -1;
+}
+
+static void *orx_gain_poll_loop(void *arg)
+{
+    (void)arg;
+    uint8_t reg_val;
+    int ret;
+
+	
+    g_dev = (taliseDevice_t *)p_myTaliseDevice_shm;
+    g_last_orx1_gain = 0xFF;
+	
+    printf("[ORxGain] Polling thread started, period=%dms\n", ORX_GAIN_POLL_MS);
+
+    while (1) {
+        ret = fpga_read_axi0(FPGA_ORX1_GAIN_REG, (uint32_t *)&reg_val, 1);
+        if (ret != OK) {
+            usleep(ORX_GAIN_POLL_MS * 1000);
+            continue;
+        }
+
+        if (reg_val == g_last_orx1_gain) {
+            usleep(ORX_GAIN_POLL_MS * 1000);
+            continue;
+        }
+
+		if(g_dev){
+	        ret = set_orx_gain_index_safe(TAL_ORX1, reg_val);
+	        if (ret == 0) {
+				printf("chg orx1_gain %d->%d\n", g_last_orx1_gain, reg_val);
+	            g_last_orx1_gain = reg_val;
+	        }
+		}
+		else{
+			printf("warning, dev null\n");
+		}
+
+        usleep(ORX_GAIN_POLL_MS * 1000);
+    }
+
+    printf("[ORxGain] Polling thread exited\n");
+    return NULL;
+}
+
+int adrv9009_orx_gain_thr()
+{
+    if (pthread_create(&g_orx_poll_thread, NULL, orx_gain_poll_loop, NULL) != 0) {
+        printf("[ORxGain] Failed to create polling thread\n");
+        g_orx_poll_running = 0;
+        return -1;
+    }
+    //pthread_detach(g_orx_poll_thread);
+    return 0;
+}
+
+void adrv9009_orx_gain_stop(void)
+{
+    if (!g_orx_poll_running)
+        return;
+
+    g_orx_poll_running = 0;
+    usleep(ORX_GAIN_POLL_MS * 2);
+    printf("[ORxGain] Polling stopped\n");
+}

atsc_app/adrv9009/jesd204b.c

@@ -0,0 +1,79 @@
+
+#include <unistd.h>
+#include <stdio.h>
+
+//#include "../type.h"
+//#include "jesd204b.h"
+//#include "../fpga.h"
+//#include "../common.h"
+
+
+//#include "../cfg.h"
+
+
+#if 0
+//APB_write
+
+#define READ_TIME_OUT   1000
+
+
+//[]
+int apb_jesd204b_read(u32 addr, u32 *pdata)
+{
+	int i  =0;
+	read_reg_data((ANYWAVE_AXI_APB_204B_BASE_ADDR+( (addr+i) << 2)), pdata, 1);
+	return OK;
+}
+// ext give addr have been << 2, so  apb_jesd204b_write do not need to << 2
+int apb_jesd204b_write(u32 addr, u32 data)
+{
+    return (write_reg_data((ANYWAVE_AXI_APB_204B_BASE_ADDR+addr), data));
+}
+
+
+//[jesd]
+u32 apb_jesd_read(u32 addr, u32 *pdata)
+{
+	int i  =0;
+	read_reg_data((ANYWAVE_AXI_APB_JESD_BASE_ADDR+( (addr+i) << 2)), pdata, 1);
+	return (ANYWAVE_AXI_APB_JESD_BASE_ADDR+( (addr+i) << 2));
+}
+// ext give addr have been << 2, so  apb_jesd204b_write do not need to << 2
+int apb_jesd_write(u32 addr, u32 data)
+{
+    return (write_reg_data((ANYWAVE_AXI_APB_JESD_BASE_ADDR+addr), data));
+}
+
+
+//[jesd_serdes2]
+u32 apb_serdes2_read(u32 addr, u32 *pdata)
+{
+	int i  =0;
+	read_reg_data((ANYWAVE_AXI_APB_JESD_SERDES2_BASE_ADDR+( (addr+i) << 2)), pdata, 1);
+	return (ANYWAVE_AXI_APB_JESD_SERDES2_BASE_ADDR+( (addr+i) << 2));
+}
+// ext give addr have been << 2, so  apb_jesd204b_write do not need to << 2
+int apb_serdes2_write(u32 addr, u32 data)
+{
+    return (write_reg_data((ANYWAVE_AXI_APB_JESD_SERDES2_BASE_ADDR+addr), data));
+}
+
+
+//[jesd_serdes3]
+u32 apb_serdes3_read(u32 addr, u32 *pdata)
+{
+	int i  =0;
+	read_reg_data((ANYWAVE_AXI_APB_JESD_SERDES3_BASE_ADDR+( (addr+i) << 2)), pdata, 1);
+	return (ANYWAVE_AXI_APB_JESD_SERDES3_BASE_ADDR+( (addr+i) << 2));
+}
+// ext give addr have been << 2, so  apb_jesd204b_write do not need to << 2
+int apb_serdes3_write(u32 addr, u32 data)
+{
+    return (write_reg_data((ANYWAVE_AXI_APB_JESD_SERDES3_BASE_ADDR+addr), data));
+}
+
+
+#endif
+
+
+

atsc_app/adrv9009/jesd204b_config.c

@@ -0,0 +1,427 @@
+#include <unistd.h>
+#include <stdio.h>
+
+
+//#include"../common.h"
+//#include"../fpga.h"
+#include "../inc/i2c_drv.h"
+#include "../inc/isys_config.h"
+
+/*
+//for tx0
+#define TX0_CFG_ENABLE_REG 0x76			//bit4->rd  bit5->wr
+#define TX0_CFG_ADDR_REG	0x74
+#define TX0_CFG_WR_DATA_REG	0x75
+#define TX0_CFG_RD_DATA_REG	0xb6
+#define TX0_CFG_RD_UPDATA_FLAG_REG 0xb3 //bit2 is avalid
+
+//for fb0
+#define FB0_CFG_ENABLE_REG 0x76			//bit2->rd  bit3->wr
+#define FB0_CFG_ADDR_REG	0x72
+#define FB0_CFG_WR_DATA_REG	0x73
+#define FB0_CFG_RD_DATA_REG	0xb5
+#define FB0_CFG_RD_UPDATA_FLAG_REG 0xb3 //bit1 is avalid
+
+//for rx0
+#define RX0_CFG_ENABLE_REG 0x76			//bit0->rd  bit1->wr
+#define RX0_CFG_ADDR_REG	0x70
+#define RX0_CFG_WR_DATA_REG	0x71
+#define RX0_CFG_RD_DATA_REG	0xb4
+#define RX0_CFG_RD_UPDATA_FLAG_REG 0xb3 //bit0 is avalid
+*/
+
+//for tx0/fb0/rx0 (共享 0xB1~0xB8 I2C 寄存器)
+#define TX0_CFG_ENABLE_REG  0xB5			//bit1->rd  bit2->wr
+#define TX0_CFG_ADDR_H_REG	0xB7
+#define TX0_CFG_ADDR_L_REG	0xB6
+#define TX0_CFG_WR_DATA_REG	0xB8
+
+#define TX0_CFG_RD_DATA_REG	0xb6
+#define TX0_CFG_RD_UPDATA_FLAG_REG 0xb3 //bit2 is avalid
+
+//for fb0 (registers from Task11.md §3.1 — FPGA I2C->JESD AXI bridge)
+#define FB0_CFG_ENABLE_REG     0xBC    // bit0->rd  bit1->wr
+#define FB0_CFG_ADDR_L_REG     0xBD    // addr[7:0]
+#define FB0_CFG_ADDR_H_REG     0xBE    // addr[11:8] (仅低4位有效)
+#define FB0_CFG_WR_DATA_REG    0xBF    // write data[7:0]
+
+#define FB0_CFG_MON_REG        0xBB    // monitor: bit2=rd_update, bit1=fb_sync, bit0=fb_tvalid
+#define FB0_CFG_RD_DATA0_REG   0xC0    // read data[7:0]
+#define FB0_CFG_RD_DATA1_REG   0xC1    // read data[15:8]
+#define FB0_CFG_RD_DATA2_REG   0xC2    // read data[23:16]
+#define FB0_CFG_RD_DATA3_REG   0xC3    // read data[31:24]
+
+
+
+//for rx0
+#define RX0_CFG_ENABLE_REG  0xB5			//bit1->rd  bit2->wr
+#define RX0_CFG_ADDR_REG	0x70
+#define RX0_CFG_WR_DATA_REG	0x71
+#define RX0_CFG_RD_DATA_REG	0xb4
+#define RX0_CFG_RD_UPDATA_FLAG_REG 0xb3 //bit2 is avalid
+
+//----------------------------------------------------------
+
+//for tx1/fb1/rx1 (共享 0x50~0x5F I2C 寄存器)
+#define TX1_CFG_ENABLE_REG 0x56			//bit1->rd  bit2->wr
+#define TX1_CFG_ADDR_REG	0x54
+#define TX1_CFG_WR_DATA_REG	0x55
+#define TX1_CFG_RD_DATA_REG	0xc6
+#define TX1_CFG_RD_UPDATA_FLAG_REG 0xc3 //bit2 is avalid
+//for fb1
+#define FB1_CFG_ENABLE_REG 0x56			//bit1->rd  bit2->wr
+#define FB1_CFG_ADDR_REG	0x52
+#define FB1_CFG_WR_DATA_REG	0x53
+#define FB1_CFG_RD_DATA_REG	0xc5
+#define FB1_CFG_RD_UPDATA_FLAG_REG 0xc3 //bit2 is avalid
+//for rx1
+#define RX1_CFG_ENABLE_REG 0x56			//bit1->rd  bit2->wr
+#define RX1_CFG_ADDR_REG	0x50
+#define RX1_CFG_WR_DATA_REG	0x51
+#define RX1_CFG_RD_DATA_REG	0xc4
+#define RX1_CFG_RD_UPDATA_FLAG_REG 0xc3 //bit2 is avalid
+
+void jesd204b_rd_test(void)
+{
+	printf(" >>jesd204b_rd_test\n");
+	uint32 data[10];
+	fpga_read_axi0(0xB1,&data[0],1);
+	fpga_read_axi0(0xB2,&data[1],1);
+	fpga_read_axi0(0xB3,&data[2],1);
+	fpga_read_axi0(0xB4,&data[3],1);
+	fpga_read_axi0(0xB5,&data[4],1);
+	fpga_read_axi0(0xB6,&data[5],1);
+	fpga_read_axi0(0xB7,&data[6],1);
+	fpga_read_axi0(0xB8,&data[7],1);
+	printf(" rd [B1=0x%x B2=0x%x B3=0x%x B4=0x%x] [B7=0x%x B6=0x%x B8=0x%x B5=0x%x] \n",
+		data[0],data[1],data[2],data[3], data[6],data[5],data[7],data[4]
+	);
+	usleep(1000);
+}
+
+void jesd204b_tx0_wr(u32 addr,u32 dat)
+{
+	printf(" >>W [jesd_wr_tx0]  addr=0x%x data=0x%x\n", addr, dat);
+	fpga_write_axi0(TX0_CFG_ADDR_H_REG,(addr>>8)&0xff,1);//B7
+	fpga_write_axi0(TX0_CFG_ADDR_L_REG,addr&0xff,1);//B6
+	fpga_write_axi0(TX0_CFG_WR_DATA_REG,dat,1);//B8
+	fpga_write_axi0(TX0_CFG_ENABLE_REG,0x0,1);//B5
+	fpga_write_axi0(TX0_CFG_ENABLE_REG,0x04,1);
+	fpga_write_axi0(TX0_CFG_ENABLE_REG,0x0,1);
+	usleep(1000);
+}
+
+//----------------------------------------------------------------------------
+
+void jesd204b_fb0_wr(u32 addr,u32 dat) //验证OK
+{
+	printf(" >>W [jesd_wr_fb0]  addr=0x%x data=0x%x\n", addr, dat);
+	/* FB0 bridge: 写时序 (Task11 §3.2)
+	   1. 写 FB0_CFG_ADDR_L_REG = addr[7:0]    (0xBD)
+	   2. 写 FB0_CFG_ADDR_H_REG = addr[11:8]   (0xBE)
+	   3. 写 FB0_CFG_WR_DATA_REG = dat[7:0]    (0xBF, 仅8-bit 宽)
+	   4. 清 FB0_CFG_ENABLE_REG                (0xBC)
+	   5. 置位 bit1 (wr)                         (0xBC = 0x02)
+	   6. 清 FB0_CFG_ENABLE_REG                (0xBC = 0x00)
+	*/
+	fpga_write_axi0(FB0_CFG_ADDR_L_REG, addr & 0xFF, 1);
+	fpga_write_axi0(FB0_CFG_ADDR_H_REG, (addr >> 8) & 0x0F, 1);
+	fpga_write_axi0(FB0_CFG_WR_DATA_REG, dat & 0xFF, 1);
+	fpga_write_axi0(FB0_CFG_ENABLE_REG, 0x00, 1);
+	fpga_write_axi0(FB0_CFG_ENABLE_REG, 0x02, 1);  // bit1 = wr
+	fpga_write_axi0(FB0_CFG_ENABLE_REG, 0x00, 1);
+	usleep(1000);
+}
+
+u32 jesd204b_fb0_rd(u32 addr) //验证OK
+{
+	u32 data = 0;
+	u32 mon = 0;
+	int timeout = 10;
+
+	/* FB0 bridge: 读时序 (Task11 §3.2)
+	   1. 写 FB0_CFG_ADDR_L_REG = addr[7:0]    (0xBD)
+	   2. 写 FB0_CFG_ADDR_H_REG = addr[11:8]   (0xBE)
+	   3. 清 FB0_CFG_ENABLE_REG                (0xBC)
+	   4. 置位 bit0 (rd)                         (0xBC = 0x01)
+	   5. 清 FB0_CFG_ENABLE_REG                (0xBC = 0x00)
+	   6. 等待 ~1ms
+	   7. 轮询 FB0_CFG_MON_REG bit2            (0xBB), 超时退出
+	   8. 读 0xC0~0xC3 组合为 32-bit (小端序)
+	*/
+	fpga_write_axi0(FB0_CFG_ADDR_L_REG, addr & 0xFF, 1);
+	fpga_write_axi0(FB0_CFG_ADDR_H_REG, (addr >> 8) & 0x0F, 1);
+	fpga_write_axi0(FB0_CFG_ENABLE_REG, 0x00, 1);
+	fpga_write_axi0(FB0_CFG_ENABLE_REG, 0x01, 1);  // bit0 = rd
+	fpga_write_axi0(FB0_CFG_ENABLE_REG, 0x00, 1);
+
+	usleep(1000);
+
+	do {
+		fpga_read_axi0(FB0_CFG_MON_REG, &mon, 1);
+		if (mon & 0x04)
+			break;
+		usleep(1000);
+	} while (--timeout > 0);
+
+	if (timeout <= 0) {
+		printf(" >>R [jesd_rd_fb0]  addr=0x%x TIMEOUT\n", addr);
+		return 0xFFFFFFFF;
+	}
+
+	/* 读 4 字节并组合为小端序 32-bit 数据 */
+	{
+		u32 tmp;
+		u8 c0, c1, c2, c3;
+
+		fpga_read_axi0(FB0_CFG_RD_DATA0_REG, &tmp, 1); c0 = tmp & 0xFF;
+		fpga_read_axi0(FB0_CFG_RD_DATA1_REG, &tmp, 1); c1 = tmp & 0xFF;
+		fpga_read_axi0(FB0_CFG_RD_DATA2_REG, &tmp, 1); c2 = tmp & 0xFF;
+		fpga_read_axi0(FB0_CFG_RD_DATA3_REG, &tmp, 1); c3 = tmp & 0xFF;
+
+		data = ((u32)c3 << 24) | ((u32)c2 << 16) | ((u32)c1 << 8) | c0;
+	}
+
+	printf(" >>R [jesd_rd_fb0]  addr=0x%x data=0x%08x\n", addr, data);
+	return data;
+}
+
+void jesd204b_rx0_wr(u32 addr,u32 dat)
+{
+//	printf(" >>W [jesd_rx_tx0]  addr=0x%x data=0x%x\n", addr, dat);
+	/*fpga_write_axi0(RX0_CFG_ADDR_REG,addr,1);
+	fpga_write_axi0(RX0_CFG_WR_DATA_REG,dat,1);
+	fpga_write_axi0(RX0_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(RX0_CFG_ENABLE_REG,0x04,1);
+	fpga_write_axi0(RX0_CFG_ENABLE_REG,0x0,1);
+	usleep(1000);*/
+}
+
+void jesd204b_tx1_wr(u32 addr,u32 dat)
+{
+//	printf(" >>W [jesd_wr_tx1]  addr=0x%x data=0x%x\n", addr, dat);
+	/*fpga_write_axi0(TX1_CFG_ADDR_REG,addr,1);
+	fpga_write_axi0(TX1_CFG_WR_DATA_REG,dat,1);
+	fpga_write_axi0(TX1_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(TX1_CFG_ENABLE_REG,0x04,1);
+	fpga_write_axi0(TX1_CFG_ENABLE_REG,0x0,1);
+	usleep(1000);*/
+}
+
+void jesd204b_fb1_wr(u32 addr,u32 dat)
+{
+//	printf(" >>W [jesd_wr_fb1]  addr=0x%x data=0x%x\n", addr, dat);
+	/*fpga_write_axi0(FB1_CFG_ADDR_REG,addr,1);
+	fpga_write_axi0(FB1_CFG_WR_DATA_REG,dat,1);
+	fpga_write_axi0(FB1_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(FB1_CFG_ENABLE_REG,0x04,1);
+	fpga_write_axi0(FB1_CFG_ENABLE_REG,0x0,1);
+	usleep(1000);*/
+}
+
+void jesd204b_rx1_wr(u32 addr,u32 dat)
+{
+//	printf(" >>W [jesd_wr_rx1]  addr=0x%x data=0x%x\n", addr, dat);
+	/*fpga_write_axi0(RX1_CFG_ADDR_REG,addr,1);
+	fpga_write_axi0(RX1_CFG_WR_DATA_REG,dat,1);
+	fpga_write_axi0(RX1_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(RX1_CFG_ENABLE_REG,0x04,1);
+	fpga_write_axi0(RX1_CFG_ENABLE_REG,0x0,1);
+	usleep(1000);*/
+}
+
+
+void jesd204b_tx0_cfg(void)
+{
+//	printf("jesd204b_tx0_cfg start...\n");
+	//initial
+	fpga_write_axi0(TX0_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(TX0_CFG_ADDR_H_REG,0x0,1);
+	fpga_write_axi0(TX0_CFG_ADDR_L_REG,0x0,1);
+	fpga_write_axi0(TX0_CFG_WR_DATA_REG,0x0,1);
+
+
+	jesd204b_tx0_wr(0x04,0x01);
+	jesd204b_tx0_wr(0x08,0x01);
+	jesd204b_tx0_wr(0x0c,0x0);
+	jesd204b_tx0_wr(0x10,0x00);   /* PR06-2: SYSREF handling OFF (SMOD board has NO SYSREF wired) */
+	jesd204b_tx0_wr(0x14,0x03);
+	jesd204b_tx0_wr(0x18,0x0);
+	jesd204b_tx0_wr(0x20,0x01);
+	jesd204b_tx0_wr(0x24,0x1f);
+
+	jesd204b_tx0_wr(0x28,0x03);   /* PR06-2: lanes-in-use mask = 2 lanes (was 0xf) */
+	jesd204b_tx0_wr(0x2c,0x00);   /* PR06-2: Subclass 0 (was 1) - no SYSREF -> align on SYNC~/ILAS only, avoids divergent LMFC phase -> fixes TX no-RF at mixed 60/120/120 rates */
+	
+	jesd204b_tx0_wr(0x80c,0x01000a55);
+	jesd204b_tx0_wr(0x810,0x000f0d03);
+	
+	jesd204b_tx0_wr(0x814,0x0);
+	jesd204b_tx0_wr(0x818,0x0);
+	jesd204b_tx0_wr(0x81c,0x0);
+	
+	printf("jesd204b_tx0_cfg done.\n");
+}
+
+
+void jesd204b_fb0_cfg(void)
+{
+	printf("jesd204b_fb0_cfg start...\n");
+	/* PR06-2 ORx-only: o_fb 核走 IP 默认(F=2/2lane) 匹配 ADRV framerB(M=2/2lane/120M), 不写寄存器 */
+	printf("jesd204b_fb0_cfg done.\n");
+}
+
+void jesd204b_rx0_cfg(void)
+{
+	printf("jesd204b_rx0_cfg start...\n");
+	//PR06-2: 取消注释并配 RX0(framerA/RX1) 核为 subclass 0 匹配 ADRV framerA(M=4/F=4/2lane) + 无SYSREF
+	fpga_write_axi0(RX0_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(RX0_CFG_ADDR_REG,0x0,1);
+	fpga_write_axi0(RX0_CFG_WR_DATA_REG,0x0,1);
+
+	jesd204b_rx0_wr(0x04,0x01);
+	jesd204b_rx0_wr(0x08,0x01);
+	jesd204b_rx0_wr(0x0C,0x0);
+
+	jesd204b_rx0_wr(0x10,0x00);   /* PR06-2: SYSREF off */
+	jesd204b_rx0_wr(0x18,0x0);
+	jesd204b_rx0_wr(0x20,0x03);   /* F-1=3 -> F=4 */
+	jesd204b_rx0_wr(0x24,0x1f);   /* K-1=31 -> K=32 */
+	jesd204b_rx0_wr(0x28,0x03);   /* PR06-2 ORx-only: 2 lanes (回退, o_rx核未用) */
+	jesd204b_rx0_wr(0x2c,0x00);   /* PR06-2: Subclass 0 (无SYSREF) */
+	jesd204b_rx0_wr(0x30,0x0);
+	jesd204b_rx0_wr(0x34,0x0);
+
+	printf("jesd204b_rx0_cfg done\n");
+}
+
+
+void jesd204b_tx1_cfg(void)
+{
+	//initial
+	/*fpga_write_axi0(TX1_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(TX1_CFG_ADDR_REG,0x0,1);
+	fpga_write_axi0(TX1_CFG_WR_DATA_REG,0x0,1);
+
+	jesd204b_tx1_wr(0x04,0x01);
+	jesd204b_tx1_wr(0x08,0x01);
+	jesd204b_tx1_wr(0x0c,0x0);
+	jesd204b_tx1_wr(0x10,0x01);
+	jesd204b_tx1_wr(0x14,0x03);
+	jesd204b_tx1_wr(0x18,0x0);
+	jesd204b_tx1_wr(0x20,0x01);
+	jesd204b_tx1_wr(0x24,0x1f);
+	jesd204b_tx1_wr(0x28,0x0f);
+	jesd204b_tx1_wr(0x2c,0x01);
+	jesd204b_tx1_wr(0x80c,0x01000a55);
+	jesd204b_tx1_wr(0x810,0x000f0d03);
+
+	jesd204b_tx1_wr(0x814,0x0);
+	jesd204b_tx1_wr(0x818,0x0);
+	jesd204b_tx1_wr(0x81c,0x0);*/
+
+
+}
+
+void  jesd204b_fb1_cfg(void)
+{
+	//initial
+	/*fpga_write_axi0(FB1_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(FB1_CFG_ADDR_REG,0x0,1);
+	fpga_write_axi0(FB1_CFG_WR_DATA_REG,0x0,1);
+
+	jesd204b_fb1_wr(0x04,0x01);
+	jesd204b_fb1_wr(0x08,0x01);
+	jesd204b_fb1_wr(0x0C,0x0);
+	jesd204b_fb1_wr(0x10,0x01);
+	jesd204b_fb1_wr(0x18,0x0);
+	jesd204b_fb1_wr(0x20,0x01);
+	jesd204b_fb1_wr(0x24,0x1f);
+	jesd204b_fb1_wr(0x28,0x03);
+	jesd204b_fb1_wr(0x2c,0x01);
+	jesd204b_fb1_wr(0x30,0x0);
+	jesd204b_fb1_wr(0x34,0x0);*/
+
+
+}
+
+
+void jesd204b_rx1_cfg(void)
+{
+	//initial
+	/*fpga_write_axi0(RX1_CFG_ENABLE_REG,0x0,1);
+	fpga_write_axi0(RX1_CFG_ADDR_REG,0x0,1);
+	fpga_write_axi0(RX1_CFG_WR_DATA_REG,0x0,1);
+
+	jesd204b_rx1_wr(0x04,0x01);
+	jesd204b_rx1_wr(0x08,0x01);
+	jesd204b_rx1_wr(0x0C,0x0);
+
+	jesd204b_rx1_wr(0x10,0x01);
+	jesd204b_rx1_wr(0x18,0x0);
+	jesd204b_rx1_wr(0x20,0x03);
+	jesd204b_rx1_wr(0x24,0x1f);
+	jesd204b_rx1_wr(0x28,0x03);
+	jesd204b_rx1_wr(0x2c,0x01);
+	jesd204b_rx1_wr(0x30,0x0);
+	jesd204b_rx1_wr(0x34,0x0);*/
+}
+
+/*
+//add 260427
+//0xB1 — JESD_CTRL（链路复位控制）
+bit	名称	默认	说明
+7	RX_GT_RST1	0	RX GT 复位通道 1（写 1 复位，写 0 释放）
+6	RX_GT_RST0	0	RX GT 复位通道 0（写 1 复位，写 0 释放）
+5	TX_GT_RST	0	TX GT（收发器）复位（写 1 复位，写 0 释放）
+4	FBRX_RST	0	Feedback RX 链路复位（写 1 复位，写 0 释放）
+3	RX_RST	0	RX 链路复位（写 1 复位，写 0 释放）
+2	TX_RST	0	TX 链路复位（写 1 复位，写 0 释放）
+1	PHY_RST	0	PHY 全局复位（写 1 复位，写 0 释放）
+0	AXI_RST	0	AXI 总线复位（写 1 复位，写 0 释放）
+典型复位序列（JESD 链路重新初始化）：
+	
+	1. 写 0xB1 = 0xFF	 // 全部复位
+	2. 延时 ≥ 1ms
+	3. 写 0xB1 = 0x00	 // 释放所有复位
+	4. 等待 0xB4[0] = 1 // 轮询 TX 就绪
+*/
+
+/**
+ * @brief 执行 JESD204B 链路软复位序列
+ * @note 对应寄存器 0xB1 JESD_CTRL
+ */
+void jesd204b_reset_add(void)
+{
+    uint8_t status = 0;
+    int timeout = 10000; // 防止死循环的超时计数
+
+    // 1. 写 0xB1 = 0xFF -> 全部复位
+    // 注意：这里假设 fpga_byte_write 的参数顺序是 (基地址, 偏移地址, 数据)
+    // 原代码中的 (addr)&0xff 看起来像是笔误，这里修正为直接写入 0xFF
+    fpga_byte_write(JESD_SEG_ADDR, 0xB1, 0xFF);
+
+    // 2. 延时 ≥ 1ms
+    // 根据你的系统环境选择延时函数，如 usleep, delay_ms 等
+    usleep(2000); // 建议稍微多给一点余量，这里延时 2ms
+
+    // 3. 写 0xB1 = 0x00 -> 释放所有复位
+    fpga_byte_write(JESD_SEG_ADDR, 0xB1, 0x00);
+
+    // 4. 等待 0xB4[0] = 1 -> 轮询 TX 就绪
+    // 假设 0xB4 是状态寄存器，Bit 0 为 1 表示 TX 准备好
+    do {
+        status = fpga_byte_read(JESD_SEG_ADDR, 0xB4);
+        timeout--;
+        usleep(10); 
+    } while (((status & 0x01) == 0) && (timeout > 0));
+
+    if (timeout <= 0) {
+        // 处理超时错误（可选）
+        printf("JESD Reset Timeout!\n");
+    }
+	else{
+		printf("JESD Reset Done!\n");
+	}
+}
+

atsc_app/adrv9009/jesd204b_config.h

@@ -0,0 +1,27 @@
+#ifndef _JESD204B_CONFIG_H_
+#define _JESD204B_CONFIG_H_
+
+
+void jesd204b_tx0_wr(u32 addr,u32 dat);
+void jesd204b_fb0_wr(u32 addr,u32 dat);
+void jesd204b_rx0_wr(u32 addr,u32 dat);
+void jesd204b_tx1_wr(u32 addr,u32 dat);
+void jesd204b_fb1_wr(u32 addr,u32 dat);
+void jesd204b_rx1_wr(u32 addr,u32 dat);
+
+void jesd204b_tx0_cfg(void);
+void jesd204b_fb0_cfg(void);
+void jesd204b_rx0_cfg(void);
+void jesd204b_tx1_cfg(void);
+void jesd204b_fb1_cfg(void);
+void jesd204b_rx1_cfg(void);
+
+
+
+
+
+
+#endif
+
+
+

atsc_app/adrv9009/talise_config.h

@@ -0,0 +1,52 @@
+/**
+ * \file talise_config.h
+ * \brief Talise configuration external declarations
+ *
+ * \brief Contains structure definitions for tal_config.c
+ *
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9378-AD9379 API license, for more information see the "LICENSE.txt" file in this zip file.
+ *
+ * The top level structure taliseDevice_t talDevice uses keyword
+ * extern to allow the application layer main() to have visibility
+ * to these settings.
+ */
+
+#ifndef TAL_INIT_H_
+#define TAL_INIT_H_
+
+#include "../talise/talise_types.h"
+#include "../talise/talise_error.h"
+#include "../talise/talise_agc.h"
+#include "../talise/talise_arm_types.h"
+#include "../talise/talise_arm.h"
+#include "../talise/talise.h"
+#include "../talise/talise_radioctrl.h"
+#include "../talise/talise_cals.h"
+#include "../talise/talise_jesd204.h"
+#include "../talise/talise_rx_types.h"
+#include "../talise/talise_rx.h"
+#include "../talise/talise_tx_types.h"
+#include "../talise/talise_tx.h"
+#include "../talise/talise_gpio_types.h"
+#include "../talise/talise_gpio.h"
+#include "../talise/talise_error_types.h"
+typedef struct {
+	taliseDevice_t *ptalDevice;
+	taliseInit_t *ptalInit;
+}taliseDeviceInfo;
+
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern taliseDeviceInfo taliseDeviceInfo1;
+extern taliseDeviceInfo taliseDeviceInfo2;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

atsc_app/adrv9009/talise_config_1.c

@@ -0,0 +1,421 @@
+/**
+ * \file talise_config.c
+ * \brief Contains Talise configuration settings for the Talise API
+ *
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9378-AD9379 API license, for more information see the "LICENSE.txt" file in this zip file.
+ *
+ * The top level structure taliseDevice_t talDevice uses keyword
+ * extern to allow the application layer main() to have visibility
+ * to these settings.
+ *
+ * This file may not be fully complete for the end user application and 
+ * may need to updated for AGC, GPIO, and DAC full scale settings. 
+ * To create a full initialisation routine, the user should also refer to the 
+ * Iron Python initialisation routine generated by the GUI, and also the Talise User Guide.
+ *
+ */
+
+//#include "talise_types.h"
+//#include "talise_config_1.h"
+//#include "talise_error.h"
+//#include "talise_agc.h"
+#ifdef ADI_ZYNQ_PLATFORM
+#include "zynq_platform.h"
+#endif
+
+#include "talise_config.h"
+
+
+#if 1//_HJX_CONFIG_ modify
+static int16_t txFirCoefs[80] = {0, 0, 0, 0, 0, 0, 1, 0, -3, 1, 8, -2, -20, 5, 43, -10, -85, 19, 158, -34, -272, 61, 463, -62, -702, 71, 1044, -36, -1482, -64, 2044, 302, -2770, -803, 3786, 1895, -5503, -4768, 10723, 27650, 27650, 10723, -4768, -5503, 1895, 3786, -803, -2770, 302, 2044, -64, -1482, -36, 1044, 71, -702, -62, 463, 61, -272, -34, 158, 19, -85, -10, 43, 5, -20, -2, 8, 1, -3, 0, 1, 0, 0, 0, 0, 0, 0};
+
+static int16_t rxFirCoefs[72] = {0, 0, -1, -2, -4, -2, 5, 17, 27, 21, -12, -67, -114, -105, -2, 181, 354, 375, 133, -350, -858, -1043, -606, 462, 1737, 2456, 1880, -215, -3172, -5492, -5359, -1489, 6092, 15765, 24755, 30169, 30169, 24755, 15765, 6092, -1489, -5359, -5492, -3172, -215, 1880, 2456, 1737, 462, -606, -1043, -858, -350, 133, 375, 354, 181, -2, -105, -114, -67, -12, 21, 27, 17, 5, -2, -4, -2, -1, 0, 0};
+
+static int16_t obsrxFirCoefs[72] = {-3, 10, 15, 8, -18, -41, -29, 29, 86, 76, -29, -154, -166, 1, 239, 316, 83, -328, -541, -260, 393, 856, 581, -393, -1287, -1145, 236, 1855, 2111, 196, -2816, -4260, -1648, 5281, 13824, 19693, 19693, 13824, 5281, -1648, -4260, -2816, 196, 2111, 1855, 236, -1145, -1287, -393, 581, 856, 393, -260, -541, -328, 83, 316, 239, 1, -166, -154, -29, 76, 86, 29, -29, -41, -18, 8, 15, 10, -3};  /* PR06-2: TES 120M obsRx 72抽头(相干) */
+
+#ifdef ADI_ZYNQ_PLATFORM /** < Insert Customer Platform HAL State Container here>*/
+/*
+ * Platform Layer SPI settings - this structure is specific to ADI's platform layer code.
+ * User should replace with their own structure or settings for their hardware
+ */
+zynqSpiSettings_t spiDev1 =
+{
+	.chipSelectIndex = 1,
+	.writeBitPolarity = 0,
+	.longInstructionWord = 1,
+	.CPHA = 0,
+	.CPOL = 0,
+	.mode = 0,
+	.spiClkFreq_Hz = 25000000
+};
+
+/*
+ * Platform Layer settings - this structure is specific to ADI's platform layer code.
+ * User should replace with their own structure or settings for their hardware
+ * The structure is held in taliseDevice_t below as a void pointer, allowing
+ * the customer to pass any information for their specific hardware down to the
+ * hardware layer code.
+ */
+zynqAdiDev_t talDevHalInfo =
+{
+	.devIndex = 1,
+	.spiSettings = &spiDev1,
+	.spiErrCode = 0,
+	.timerErrCode = 0,
+	.gpioErrCode = 0,
+	.logLevel = ADIHAL_LOG_ALL
+};
+#endif
+/**
+ *  TalDevice a structure used by the Talise API to hold the platform hardware
+ *  structure information, as well as an internal Talise API state container
+ *  (devStateInfo) of runtime information used by the API.
+ **/
+
+
+//---------------------------------------
+#define  SCRAMBLE_USR	0
+//---------------------------------------
+
+
+
+
+static taliseInit_t talInit =
+{//ref_from 7g 2lan start
+	/* SPI settings */
+    .spiSettings =
+    {
+		.MSBFirst            = 1,  /* 1 = MSBFirst, 0 = LSBFirst */
+		.enSpiStreaming      = 0,  /* Not implemented in ADIs platform layer. SW feature to improve SPI throughput */
+		.autoIncAddrUp       = 1,  /* Not implemented in ADIs platform layer. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr=addr-1 */
+		.fourWireMode        = 1,  /* 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode */
+		.cmosPadDrvStrength  = TAL_CMOSPAD_DRV_2X /* Drive strength of CMOS pads when used as outputs (SDIO, SDO, GP_INTERRUPT, GPIO 1, GPIO 0) */
+	},
+	
+    /* Rx settings */
+    .rx = 
+    {
+        .rxProfile =
+        {
+            .rxFir = 
+            {
+                .gain_dB = -6,                /* filter gain */
+                .numFirCoefs = 72,            /* number of coefficients in the FIR filter */
+                .coefs = &rxFirCoefs[0]
+            },
+            .rxFirDecimation = 4,            /* Rx FIR decimation (1,2,4) - PR06-2: 4 for 60M out */
+            .rxDec5Decimation = 4,            /* Decimation of Dec5 or Dec4 filter (5,4) */
+            .rhb1Decimation = 2,            /* RX Half band 1 decimation (1 or 2) */
+            .rxOutputRate_kHz = 60000,            /* Rx IQ data rate in kHz - PR06-2: 120->60M */
+            .rfBandwidth_Hz = 30000000,    /* The Rx RF passband bandwidth for the profile - PR06-2: 60->30M */
+            .rxBbf3dBCorner_kHz = 100000,    /* Rx BBF 3dB corner in kHz */
+            .rxAdcProfile = {272, 150, 181, 90, 1280, 366, 1256, 27, 1228, 17, 701, 39, 48, 45, 27, 161, 0, 0, 0, 0, 40, 0, 7, 6, 42, 0, 7, 6, 42, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 31, 905},            /* pointer to custom ADC profile */
+            .rxDdcMode = TAL_RXDDC_BYPASS,   /* Rx DDC mode */
+            .rxNcoShifterCfg =
+            {
+                .bandAInputBandWidth_kHz = 0,
+                .bandAInputCenterFreq_kHz = 0,
+                .bandANco1Freq_kHz = 0,
+                .bandANco2Freq_kHz = 0,
+                .bandBInputBandWidth_kHz = 0,
+                .bandBInputCenterFreq_kHz = 0,
+                .bandBNco1Freq_kHz = 0,
+                .bandBNco2Freq_kHz = 0
+            }
+        },
+        .framerSel = TAL_FRAMER_A,            /* Rx JESD204b framer configuration */
+        .rxGainCtrl = 
+        {
+            .gainMode = TAL_MGC,            /* taliserxGainMode_t gainMode */
+            .rx1GainIndex = 210,            /* PR06-2: 降增益去饱和(255满量程削顶); 电缆TX信号强 */
+            .rx2GainIndex = 255,            /* uint8_t rx2GainIndex */
+            .rx1MaxGainIndex = 255,            /* uint8_t rx1MaxGainIndex */
+            .rx1MinGainIndex = 195,            /* uint8_t rx1MinGainIndex (gain table hard floor) */
+            .rx2MaxGainIndex = 255,            /* uint8_t rx2MaxGainIndex */
+            .rx2MinGainIndex = 195            /* uint8_t rx2MinGainIndex */
+        },
+        .rxChannels = TAL_RX1,                /* PR06-2 统一M=2: 1通道RX1(匹配TES profile Rx_OR60 + DTMB). RX1 I/Q 从 o_fb tdata[31:0] 提取 */
+    },
+
+
+    /* Tx settings */
+    .tx = 
+    {
+        .txProfile =
+        {
+            .dacDiv = 1,                        /* The divider used to generate the DAC clock */
+            .txFir = 
+            {
+                .gain_dB = 0,                        /* filter gain */
+                .numFirCoefs = 80,                    /* number of coefficients in the FIR filter - PR06-2: 20->80 (TES 120M) */
+                .coefs = &txFirCoefs[0]
+            },
+            .txFirInterpolation = 2,                    /* The Tx digital FIR filter interpolation (1,2,4) - PR06-2: 1->2 for 120M in */
+            .thb1Interpolation = 2,                    /* Tx Halfband1 filter interpolation (1,2) */
+            .thb2Interpolation = 2,                    /* Tx Halfband2 filter interpolation (1,2)*/
+            .thb3Interpolation = 2,                    /* Tx Halfband3 filter interpolation (1,2)*/
+            .txInt5Interpolation = 1,                    /* Tx Int5 filter interpolation (1,5) */
+            .txInputRate_kHz = 120000,                    /* Primary Signal BW - PR06-2: 240->120M */
+            .primarySigBandwidth_Hz = 40000000,    /* The Rx RF passband bandwidth for the profile - PR06-2: 60->40M */
+            .rfBandwidth_Hz = 80000000,            /* The Tx RF passband bandwidth for the profile - PR06-2: 120->80M */
+            .txDac3dBCorner_kHz = 200000,                /* The DAC filter 3dB corner in kHz */
+            .txBbf3dBCorner_kHz = 100000,                /* The BBF 3dB corner in kHz */
+            .loopBackAdcProfile = {269, 149, 181, 90, 1280, 378, 1258, 28, 1235, 17, 710, 39, 48, 45, 27, 163, 0, 0, 0, 0, 41, 0, 7, 6, 42, 0, 7, 6, 42, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 31, 905}
+        },
+        .deframerSel = TAL_DEFRAMER_A,                    /* Talise JESD204b deframer config for the Tx data path */
+        .txChannels = TAL_TX1,                            /* The desired Tx channels to enable during initialization */
+        .txAttenStepSize = TAL_TXATTEN_0P05_DB,            /* Tx Attenuation step size */
+        .tx1Atten_mdB = 0,                                /* PR06-2 修复②: TX满功率(同260702), 强化ORx环回观测 */
+        .tx2Atten_mdB = 0,                            /* Initial Tx2 Attenuation */
+        .disTxDataIfPllUnlock = TAL_TXDIS_TX_RAMP_DOWN_TO_ZERO    /* Options to disable the transmit data when the RFPLL unlocks. */
+    },
+
+
+    /* ObsRx settings */
+    .obsRx = 
+    {
+        .orxProfile =
+        {
+            .rxFir =
+            {
+                .gain_dB = 0,                /* PR06-2 修复③: obsRx FIR gain 0(同260702), 补回6dB数字增益 */
+                .numFirCoefs = 72,            /* PR06-2: TES 120M obsRx 72抽头 */
+                .coefs = &obsrxFirCoefs[0]
+            },
+            .rxFirDecimation = 2,            /* Rx FIR decimation (1,2,4) */
+            .rxDec5Decimation = 4,            /* Decimation of Dec5 or Dec4 filter (5,4) */
+            .rhb1Decimation = 2,            /* PR06-2: HB1 dec2 (120M out, 2.4G GT) */
+            .orxOutputRate_kHz = 120000,            /* PR06-2: ORx 120M (2.4G GT) */
+            .rfBandwidth_Hz = 60000000,    /* The Rx RF passband bandwidth for the profile */
+            .rxBbf3dBCorner_kHz = 225000,    /* Rx BBF 3dB corner in kHz */
+            .orxLowPassAdcProfile = {272, 150, 181, 90, 1280, 366, 1256, 27, 1228, 17, 701, 39, 48, 45, 27, 161, 0, 0, 0, 0, 40, 0, 7, 6, 42, 0, 7, 6, 42, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 31, 905},
+            .orxBandPassAdcProfile = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+            .orxDdcMode = TAL_ORXDDC_DISABLED,   /* ORx DDC mode */
+            .orxMergeFilter  = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
+        },
+        .orxGainCtrl = 
+        {
+            .gainMode = TAL_MGC,
+            .orx1GainIndex = 255,
+            .orx2GainIndex = 255,
+            .orx1MaxGainIndex = 255,
+            .orx1MinGainIndex = 195,
+            .orx2MaxGainIndex = 255,
+            .orx2MinGainIndex = 195
+        },
+        .framerSel = TAL_FRAMER_B,                /* ObsRx JESD204b framer configuration */
+        .obsRxChannelsEnable = TAL_ORX1,        /* PR06-2 ORx模式(golden): ORx1 观测 TX */
+        .obsRxLoSource = TAL_OBSLO_RF_PLL                /* The ORx mixers can use the TX_PLL */
+    },
+
+    /* Digital Clock Settings */
+    .clocks = 
+    {
+        .deviceClock_kHz = 120000,            /* CLKPLL and device reference clock frequency in kHz */
+        .clkPllVcoFreq_kHz = 9600000,        /* CLKPLL VCO frequency in kHz */
+        .clkPllHsDiv = TAL_HSDIV_2P5,            /* CLKPLL high speed clock divider */
+        .rfPllUseExternalLo = 0,                /* 1= Use external LO for RF PLL, 0 = use internal LO generation for RF PLL */
+        .rfPllPhaseSyncMode = TAL_RFPLLMCS_NOSYNC                /* RFPLL MCS (Phase sync) mode */
+    },
+
+    /* JESD204B settings */
+    .jesd204Settings = 
+    {
+        /* Framer A settings */
+        .framerA = 
+        {
+            .bankId = 1,                    /* JESD204B Configuration Bank ID -extension to Device ID (Valid 0..15) */
+            .deviceId = 0,                    /* JESD204B Configuration Device ID - link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31) */
+            .M = 2,                            /* PR06-2 统一M=2(匹配TES profile Rx_OR60 + FB核C_DEFAULT_F=2 + DTMB). o_fb tdata[15:0]=RX1_I,[31:16]=RX1_Q */
+            .K = 32,                        /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes) */
+            .F = 4,                            /* PR06-2 ORx模式(DTMB): framerA M=2/1lane(0x04) -> F=4, 让位给framerB */
+            .Np = 16,                            /* Np (converter sample resolution) */
+            .scramble = SCRAMBLE_USR,                    /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled. */
+            .externalSysref = 0,            /* 0=use internal SYSREF, 1= use external SYSREF (SMOD: NO external SYSREF wired) */
+            .serializerLanesEnabled = 0x04,    /* PR06-2 ORx-only: framerA/RX1 到 lane2(未接线, 关闭), 让出 SERDOUT0/1 给 framerB/ORx */
+            .serializerLaneCrossbar = 0xE4,    /* serializerLaneCrossbar */
+            .lmfcOffset = 31,                /* lmfcOffset - LMFC offset value for deterministic latency setting */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbInSelect = 0,                /* syncbInSelect; */
+            .overSample = 0,                    /* 1=overSample, 0=bitRepeat */
+            .syncbInLvdsMode = 1,
+            .syncbInLvdsPnInvert = 0,
+            .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
+        },
+        /* Framer B settings */
+        .framerB = 
+        {
+            .bankId = 0,                    /* golden ORx */
+            .deviceId = 0,                    /* JESD204B Configuration Device ID - link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31) */
+            .M = 2,                            /* PR06-2 ORx-only: ORx M=2 (o_fb tdata[15:0]=ORx1_I,[31:16]=ORx1_Q) */
+            .K = 32,                        /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes) */
+            .F = 2,                            /* PR06-2 ORx-only: F=2 (M=2/2lane, 120M) */
+            .Np = 16,                            /* Np (converter sample resolution) */
+            .scramble = SCRAMBLE_USR,                    /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled. */
+            .externalSysref = 0,            /* 0=use internal SYSREF (SMOD: NO external SYSREF wired) */
+            .serializerLanesEnabled = 0x03,    /* PR06-2 ORx-only: framerB/ORx 用 SERDOUT0/1(2 lane, 120M) */
+            .serializerLaneCrossbar = 0xE4,    /* serializerLaneCrossbar */
+            .lmfcOffset = 31,                /* lmfcOffset - LMFC offset value for deterministic latency setting */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbInSelect = 1,                /* golden ORx: syncbInSelect=1 */
+            .overSample = 0,                    /* 1=overSample, 0=bitRepeat */
+            .syncbInLvdsMode = 1,
+            .syncbInLvdsPnInvert = 0,
+            .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
+        },
+        /* Deframer A settings */
+        .deframerA = 
+        {
+            .bankId = 0,                    /* bankId extension to Device ID (Valid 0..15) */
+            .deviceId = 0,                    /* deviceId  link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* lane0Id Lane0 ID. (Valid 0..31) */
+            .M = 2,                            /* M  number of DACss (0, 2, or 4) - 2 DACs per transmit chain */
+            .K = 32,                        /* K  #frames in a multiframe (default=32), F*K=multiple of 4. (F=2*M/numberOfLanes) */
+            .scramble = SCRAMBLE_USR,                    /* scramble  scrambling off if scramble= 0 */
+            .externalSysref = 0,            /* 0=use internal SYSREF (SMOD: NO external SYSREF wired) */
+            .deserializerLanesEnabled = 0x03,    /* deserializerLanesEnabled  bit per lane, [0] = Lane0 enabled */
+            .deserializerLaneCrossbar = 0xE4,    /* deserializerLaneCrossbar */
+            .lmfcOffset = 17,                /* lmfcOffset	 LMFC offset value to adjust deterministic latency */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbOutSelect = 0,                /* SYNCBOUT0/1 select */
+            .Np = 16,                /* Np (converter sample resolution) */
+            .syncbOutLvdsMode = 1,
+            .syncbOutLvdsPnInvert = 0,
+            .syncbOutCmosSlewRate = 0,
+            .syncbOutCmosDriveLevel = 0,
+            .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
+        },
+        /* Deframer B settings */
+        .deframerB = 
+        {
+            .bankId = 0,                    /* bankId extension to Device ID (Valid 0..15) */
+            .deviceId = 0,                    /* deviceId  link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* lane0Id Lane0 ID. (Valid 0..31) */
+            .M = 0,                            /* M  number of DACss (0, 2, or 4) - 2 DACs per transmit chain */
+            .K = 32,                        /* K  #frames in a multiframe (default=32), F*K=multiple of 4. (F=2*M/numberOfLanes) */
+            .scramble = SCRAMBLE_USR,                    /* scramble  scrambling off if scramble= 0 */
+            .externalSysref = 1,            /* externalSysref  0= use internal SYSREF, 1= external SYSREF */
+            .deserializerLanesEnabled = 0x00,    /* deserializerLanesEnabled  bit per lane, [0] = Lane0 enabled */
+            .deserializerLaneCrossbar = 0xE4,    /* deserializerLaneCrossbar */
+            .lmfcOffset = 0,                /* lmfcOffset	 LMFC offset value to adjust deterministic latency */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbOutSelect = 1,                /* SYNCBOUT0/1 select */
+            .Np = 16,                /* Np (converter sample resolution) */
+            .syncbOutLvdsMode = 1,
+            .syncbOutLvdsPnInvert = 0,
+            .syncbOutCmosSlewRate = 0,
+            .syncbOutCmosDriveLevel = 0,
+            .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
+        },
+        .serAmplitude = 15,                    /* Serializer amplitude setting. Default = 15. Range is 0..15 */
+        .serPreEmphasis = 1,                /* Serializer pre-emphasis setting. Default = 1 Range is 0..4 */
+        .serInvertLanePolarity = 0,            /* Serializer Lane PN inversion select. Default = 0. Where, bit[0] = 1 will invert lane [0], bit[1] = 1 will invert lane 1, etc. */
+        .desInvertLanePolarity = 0,            /* Deserializer Lane PN inversion select.  bit[0] = 1 Invert PN of Lane 0, bit[1] = Invert PN of Lane 1, etc */
+        .desEqSetting = 1,                    /* Deserializer Equalizer setting. Applied to all deserializer lanes. Range is 0..4 */
+        .sysrefLvdsMode = 1,                /* Use LVDS inputs on Talise for SYSREF */
+        .sysrefLvdsPnInvert = 0              /*0= Do not PN invert SYSREF */
+    }
+};
+
+#endif //ref_from 7g 2lan end
+
+//Only needs to be called if user wants to setup AGC parameters
+static taliseAgcCfg_t rxAgcCtrl =
+{
+    4,
+    255,
+    195,
+    255,
+    195,
+    30720,  /* AGC gain update time in us (125us-250us - based on IQ data rate - set for 125us @ 245.76 Mhz) */
+    10,
+    10,
+    16,
+    0,
+    1,
+    0,
+    0,
+    0,
+    1,
+    31,
+    246,
+    4,
+    1,          /*!<1- bit field to enable the multiple time constants in AGC loop for fast attack and fast recovery to max gain. */
+    /* agcPower */
+    {
+        1,      /*!<1-bit field, enables the Rx power measurement block. */
+        1,      /*!<1-bit field, allows using Rx PFIR for power measurement. */
+        0,      /*!<1-bit field, allows to use the output of the second digital offset block in the Rx datapath for power measurement. */
+        9,      /*!<AGC power measurement detect lower 0 threshold. Default = -12dBFS == 5, 7-bit register value where max = 0x7F, min = 0x00 */
+        2,      /*!<AGC power measurement detect lower 1 threshold. Default = (offset) 4dB == 0, 4-bit register value where  max = 0xF, min = 0x00 */
+        4,      /*!<AGC power measurement detect lower 0 recovery gain step. Default = 2dB - based on gain table step  size, 5-bit register value where max = 0x1F, min = 0x00 */
+        4,      /*!<AGC power measurement detect lower 1 recovery gain step. Default = 4dB - based on gain table step size, 5-bit register value where max = 0x1F, min = 0x00 */
+        5,      /*!< power measurement duration used by the decimated power block. Default = 0x05, 5-bit register value where max = 0x1F, min = 0x00 */
+        5,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        1,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        5,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        1,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        2,      /*!<Default value should be 2*/
+        0,
+        0
+    },
+    /* agcPeak */
+    {
+        205,        /*!<1st update interval for the multiple time constant in AGC loop mode, Default:205. */
+        2,          /*!<sets the 2nd update interval for the multiple time constant in AGC loop mode. Calculated as a multiple of  agcUnderRangeLowInterval  , Default: 4 */
+        4,          /*!<sets the 3rd update interval for the multiple time constant in AGC loop mode. Calculated as a multiple of agcUnderRangeMidInterval and agcUnderRangeLowInterval, Default: 4 */
+        39,         /*!<AGC APD high threshold. Default=0x1F, 6-bit register value where max=0x3F, min =0x00 */
+        49,         /*!<AGC APD peak detect high threshold. default = 0x1F, 6-bit register value where max = 0x3F, min = 0x00.  Set to 3dB below apdHighThresh */
+        23,         /*!<AGC APD peak detect low threshold. default = 3dB below high threshold, 6-bit register value where max =0x3F, min = 0x00 */
+        19,         /*!<AGC APD peak detect low threshold. default = 3dB below high threshold, 6-bit register value where max = 0x3F, min = 0x00 . Set to 3dB below apdLowThresh  */
+        6,          /*!<AGC APD peak detect upper threshold count. Default = 0x06 8-bit register value where max = 0xFF, min = 0x20  */
+        3,          /*!<AGC APD peak detect lower threshold count. Default = 0x03, 8-bit register value where max = 0xFF, min = 0x00  */
+        4,          /*!<AGC APD peak detect attack gain step. Default = 2dB step - based on gain table step size, 5-bit register  value, where max = 0x1F, min = 0x00  */
+        2,          /*!<AGC APD gain index step size. Recommended to be same as hb2GainStepRecovery. Default = 0x00, 5-bit register value where max = 0x1F, min = 0x00  */
+        1,          /*!<1-bit field, enables or disables the HB2 overload detector.  */
+        1,          /*!<3-bit field. Sets the window of clock cycles (at the HB2 output rate) to meet the overload count. */
+        1,          /*!<4-bit field. Sets the number of actual overloads required to trigger the overload signal.  */
+        181,        /*!<AGC decimator output high threshold. Default = 0xB5, 8-bit register value where max = 0xFF, min = 0x00 */
+        45,         /*!<AGC decimator output low threshold. Default = 0x80, 8-bit register value where max = 0xFF, min = 0x00 */
+        90,         /*!<AGC decimator output low threshold. Default = 0x80, 8-bit register value where max = 0xFF, min = 0x00 */
+        128,        /*!<AGC decimator output low threshold. Default = 0x80, 8-bit register value where max = 0xFF, min = 0x00 */
+        6,          /*!<AGC HB2 output upper threshold count. Default = 0x06, 8-bit register value where max = 0xFF, min =  0x20 */
+        3,          /*!<AGC HB2 output lower threshold count. Default = 0x03, 8-bit register value where max = 0xFF, min = 0x00 */
+        2,          /*!<AGC decimator gain index step size. Default = 0x00, 5-bit register value where max = 0x1F, min = 0x00 */
+        4,          /*!<AGC HB2 gain index step size, when the HB2 Low Overrange interval 0 triggers a programmable number  of times. Default = 0x08, 5-bit register value where max = 0x1F, min = 0x00 */
+        8,          /*!<AGC HB2 gain index step size, when the HB2 Low Overrange interval 1 triggers a programmable number of times. Default = 0x04, 5-bit register value where max = 0x1F, min = 0x00 */
+        4,          /*!<AGC decimator output attack gain step. Default = 2dB step - based on gain table step size, 5-bit register value, where max = 0x1F, min = 0x00 */
+        1,
+        0,
+        0
+    }
+};
+
+static int chipSelectIndex = 1;
+
+static taliseDevice_t talDevice =
+{
+#if 0
+#ifdef ADI_ZYNQ_PLATFORM
+    /* Void pointer of users platform HAL settings to pass to HAL layer calls
+     * Talise API does not use the devHalInfo member */
+	.devHalInfo = &talDevHalInfo,
+#else
+	.devHalInfo = &(talInit.spiSettings),//NULL,     /*/** < Insert Customer Platform HAL State Container here>*/
+#endif
+#else
+	.devHalInfo = &chipSelectIndex,
+#endif
+	/* devStateInfo is maintained internal to the Talise API, just create the memory */
+	.devStateInfo = {0}
+
+};
+
+taliseDeviceInfo taliseDeviceInfo1 =
+{
+	.ptalDevice = &talDevice,
+	.ptalInit = &talInit
+};

atsc_app/adrv9009/talise_config_1.h

@@ -0,0 +1,29 @@
+/**
+ * \file talise_config.h
+ * \brief Talise configuration external declarations
+ *
+ * \brief Contains structure definitions for tal_config.c
+ *
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9378-AD9379 API license, for more information see the "LICENSE.txt" file in this zip file.
+ *
+ * The top level structure taliseDevice_t talDevice uses keyword
+ * extern to allow the application layer main() to have visibility
+ * to these settings.
+ */
+
+#ifndef TAL_INIT_1_H_
+#define TAL_INIT_1_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern taliseDevice_t talDevice1;
+extern taliseInit_t talInit1;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

atsc_app/adrv9009/talise_config_2.c

@@ -0,0 +1,422 @@
+/**
+ * \file talise_config.c
+ * \brief Contains Talise configuration settings for the Talise API
+ *
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9378-AD9379 API license, for more information see the "LICENSE.txt" file in this zip file.
+ *
+ * The top level structure taliseDevice_t talDevice uses keyword
+ * extern to allow the application layer main() to have visibility
+ * to these settings.
+ *
+ * This file may not be fully complete for the end user application and 
+ * may need to updated for AGC, GPIO, and DAC full scale settings. 
+ * To create a full initialisation routine, the user should also refer to the 
+ * Iron Python initialisation routine generated by the GUI, and also the Talise User Guide.
+ *
+ */
+
+//#include "talise_types.h"
+//#include "talise_config_2.h"
+//#include "talise_error.h"
+//#include "talise_agc.h"
+#ifdef ADI_ZYNQ_PLATFORM
+#include "zynq_platform.h"
+#endif
+
+#include "talise_config.h"
+
+
+
+static int16_t txFirCoefs[20] = {-39, 24, -62, 112, -175, 298, -574, 1284, -2814, 20281, -2814, 1284, -574, 298, -175, 112, -62, 24, -39, 0};
+
+static int16_t rxFirCoefs[48] = {-2, 23, 46, -17, -104, 10, 208, 23, -370, -97, 607, 240, -942, -489, 1407, 910, -2065, -1637, 3058, 2995, -4912, -6526, 9941, 30489, 30489, 9941, -6526, -4912, 2995, 3058, -1637, -2065, 910, 1407, -489, -942, 240, 607, -97, -370, 23, 208, 10, -104, -17, 46, 23, -2};
+
+static int16_t obsrxFirCoefs[24] = {-15, 9, -13, 19, -28, 38, -73, 110, -195, 409, -1006, 17711, -1006, 409, -195, 110, -73, 38, -28, 19, -13, 9, -15, 0};
+
+#ifdef ADI_ZYNQ_PLATFORM /** < Insert Customer Platform HAL State Container here>*/
+/*
+ * Platform Layer SPI settings - this structure is specific to ADI's platform layer code.
+ * User should replace with their own structure or settings for their hardware
+ */
+zynqSpiSettings_t spiDev1 =
+{
+	.chipSelectIndex = 1,
+	.writeBitPolarity = 0,
+	.longInstructionWord = 1,
+	.CPHA = 0,
+	.CPOL = 0,
+	.mode = 0,
+	.spiClkFreq_Hz = 25000000
+};
+
+/*
+ * Platform Layer settings - this structure is specific to ADI's platform layer code.
+ * User should replace with their own structure or settings for their hardware
+ * The structure is held in taliseDevice_t below as a void pointer, allowing
+ * the customer to pass any information for their specific hardware down to the
+ * hardware layer code.
+ */
+zynqAdiDev_t talDevHalInfo =
+{
+	.devIndex = 1,
+	.spiSettings = &spiDev1,
+	.spiErrCode = 0,
+	.timerErrCode = 0,
+	.gpioErrCode = 0,
+	.logLevel = ADIHAL_LOG_ALL
+};
+#endif
+/**
+ *  TalDevice a structure used by the Talise API to hold the platform hardware
+ *  structure information, as well as an internal Talise API state container
+ *  (devStateInfo) of runtime information used by the API.
+ **/
+
+
+static taliseInit_t talInit =
+{
+	/* SPI settings */
+    .spiSettings =
+    {
+		.MSBFirst            = 1,  /* 1 = MSBFirst, 0 = LSBFirst */
+		.enSpiStreaming      = 0,  /* Not implemented in ADIs platform layer. SW feature to improve SPI throughput */
+		.autoIncAddrUp       = 1,  /* Not implemented in ADIs platform layer. For SPI Streaming, set address increment direction. 1= next addr = addr+1, 0:addr=addr-1 */
+		.fourWireMode        = 1,  /* 1: Use 4-wire SPI, 0: 3-wire SPI (SDIO pin is bidirectional). NOTE: ADI's FPGA platform always uses 4-wire mode */
+		.cmosPadDrvStrength  = TAL_CMOSPAD_DRV_2X /* Drive strength of CMOS pads when used as outputs (SDIO, SDO, GP_INTERRUPT, GPIO 1, GPIO 0) */
+	},
+	
+    /* Rx settings */
+    .rx = 
+    {
+        .rxProfile =
+        {
+            .rxFir = 
+            {
+                .gain_dB = -6,                /* filter gain */
+                .numFirCoefs = 48,            /* number of coefficients in the FIR filter */
+                .coefs = &rxFirCoefs[0]
+            },
+            .rxFirDecimation = 2,            /* Rx FIR decimation (1,2,4) */
+            .rxDec5Decimation = 4,            /* Decimation of Dec5 or Dec4 filter (5,4) */
+            .rhb1Decimation = 1,            /* RX Half band 1 decimation (1 or 2) */
+            .rxOutputRate_kHz = 240000,            /* Rx IQ data rate in kHz - 从245760调整为240000以匹配120MHz参考时钟 */
+            .rfBandwidth_Hz = 200000000,    /* The Rx RF passband bandwidth for the profile */
+            .rxBbf3dBCorner_kHz = 200000,    /* Rx BBF 3dB corner in kHz */
+            .rxAdcProfile = {182, 142, 173, 90, 1280, 982, 1335, 96, 1369, 48, 1012, 18, 48, 48, 37, 208, 0, 0, 0, 0, 52, 0, 7, 6, 42, 0, 7, 6, 42, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 31, 905},            /* pointer to custom ADC profile */
+            .rxDdcMode = TAL_RXDDC_BYPASS,   /* Rx DDC mode */
+            .rxNcoShifterCfg =
+            {
+                .bandAInputBandWidth_kHz = 0,
+                .bandAInputCenterFreq_kHz = 0,
+                .bandANco1Freq_kHz = 0,
+                .bandANco2Freq_kHz = 0,
+                .bandBInputBandWidth_kHz = 0,
+                .bandBInputCenterFreq_kHz = 0,
+                .bandBNco1Freq_kHz = 0,
+                .bandBNco2Freq_kHz = 0
+            }
+        },
+        .framerSel = TAL_FRAMER_A,            /* Rx JESD204b framer configuration */
+        .rxGainCtrl = 
+        {
+            .gainMode = TAL_MGC,            /* taliserxGainMode_t gainMode */
+            .rx1GainIndex = 255,            /* uint8_t rx1GainIndex */
+            .rx2GainIndex = 255,            /* uint8_t rx2GainIndex */
+            .rx1MaxGainIndex = 255,            /* uint8_t rx1MaxGainIndex */
+            .rx1MinGainIndex = 195,            /* uint8_t rx1MinGainIndex */
+            .rx2MaxGainIndex = 255,            /* uint8_t rx2MaxGainIndex */
+            .rx2MinGainIndex = 195            /* uint8_t rx2MinGainIndex */
+        },
+        //.rxChannels = TAL_RX1RX2,                /* The desired Rx Channels to enable during initialization */
+        .rxChannels = TAL_RX1RX2,                /* The desired Rx Channels to enable during initialization */
+    },
+
+
+    /* Tx settings */
+    .tx = 
+    {
+        .txProfile =
+        {
+            .dacDiv = 1,                        /* The divider used to generate the DAC clock */
+            .txFir = 
+            {
+                .gain_dB = 6,                        /* filter gain */
+                .numFirCoefs = 20,                    /* number of coefficients in the FIR filter */
+                .coefs = &txFirCoefs[0]
+            },
+            .txFirInterpolation = 1,                    /* The Tx digital FIR filter interpolation (1,2,4) */
+            .thb1Interpolation = 2,                    /* Tx Halfband1 filter interpolation (1,2) */
+            .thb2Interpolation = 2,                    /* Tx Halfband2 filter interpolation (1,2)*/
+            .thb3Interpolation = 1,                    /* Tx Halfband3 filter interpolation (1,2)*/
+            .txInt5Interpolation = 1,                    /* Tx Int5 filter interpolation (1,5) */
+            .txInputRate_kHz = 480000,                    /* Primary Signal BW - 从491520调整为480000以匹配120MHz参考时钟 */
+            .primarySigBandwidth_Hz = 200000000,    /* The Rx RF passband bandwidth for the profile */
+            .rfBandwidth_Hz = 450000000,            /* The Tx RF passband bandwidth for the profile */
+            .txDac3dBCorner_kHz = 450000,                /* The DAC filter 3dB corner in kHz */
+            .txBbf3dBCorner_kHz = 225000,                /* The BBF 3dB corner in kHz */
+            .loopBackAdcProfile = {150, 178, 181, 90, 1280, 1338, 1699, 493, 1386, 162, 934, 4, 48, 46, 35, 201, 0, 0, 0, 0, 50, 0, 0, 6, 24, 0, 0, 6, 24, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 15, 905}
+        },
+        .deframerSel = TAL_DEFRAMER_A,                    /* Talise JESD204b deframer config for the Tx data path */
+        .txChannels = TAL_TX1TX2,                            /* The desired Tx channels to enable during initialization */
+        .txAttenStepSize = TAL_TXATTEN_0P05_DB,            /* Tx Attenuation step size */
+        .tx1Atten_mdB = 0,                            /* Initial Tx1 Attenuation */
+        .tx2Atten_mdB = 0,                            /* Initial Tx2 Attenuation */
+        .disTxDataIfPllUnlock = TAL_TXDIS_TX_RAMP_DOWN_TO_ZERO    /* Options to disable the transmit data when the RFPLL unlocks. */
+    },
+
+
+    /* ObsRx settings */
+    .obsRx = 
+    {
+        .orxProfile =
+        {
+            .rxFir = 
+            {
+                .gain_dB = 6,                /* filter gain */
+                .numFirCoefs = 24,            /* number of coefficients in the FIR filter */
+                .coefs = &obsrxFirCoefs[0]
+            },
+            .rxFirDecimation = 1,            /* Rx FIR decimation (1,2,4) */
+            .rxDec5Decimation = 4,            /* Decimation of Dec5 or Dec4 filter (5,4) */
+            .rhb1Decimation = 1,            /* RX Half band 1 decimation (1 or 2) */
+            .orxOutputRate_kHz = 480000,            /* Rx IQ data rate in kHz - 从491520调整为480000以匹配120MHz参考时钟 */
+            .rfBandwidth_Hz = 450000000,    /* The Rx RF passband bandwidth for the profile */
+            .rxBbf3dBCorner_kHz = 225000,    /* Rx BBF 3dB corner in kHz */
+            .orxLowPassAdcProfile = {155, 163, 181, 90, 1280, 1254, 1572, 340, 1431, 142, 973, 8, 48, 47, 36, 205, 0, 0, 0, 0, 51, 0, 0, 6, 24, 0, 0, 6, 24, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 15, 905},
+            .orxBandPassAdcProfile = {124, 131, 154, 90, 1280, 2779, 1986, 0, 1037, 839, 988, 109, 11, 15, 28, 179, 0, 0, 0, 0, 45, 0, 0, 0, 24, 0, 0, 0, 24, 0, 25, 27, 0, 0, 25, 27, 0, 0, 165, 44, 15, 905},
+            .orxDdcMode = TAL_ORXDDC_DISABLED,   /* ORx DDC mode */
+            .orxMergeFilter  = {-167, 419, -208, -498, 968, -320, -1273, 2154, -402, -4155, 9170, 21413}
+        },
+        .orxGainCtrl = 
+        {
+            .gainMode = TAL_MGC,
+            .orx1GainIndex = 255,
+            .orx2GainIndex = 255,
+            .orx1MaxGainIndex = 255,
+            .orx1MinGainIndex = 195,
+            .orx2MaxGainIndex = 255,
+            .orx2MinGainIndex = 195
+        },
+        .framerSel = TAL_FRAMER_B,                /* ObsRx JESD204b framer configuration */
+        .obsRxChannelsEnable = TAL_ORX1,//@cc TAL_ORX1,        /* The desired ObsRx Channels to enable during initialization */
+        .obsRxLoSource = TAL_OBSLO_RF_PLL                /* The ORx mixers can use the TX_PLL */
+    },
+
+    /* Digital Clock Settings */
+    .clocks = 
+    {
+        .deviceClock_kHz = 120000,            /* CLKPLL and device reference clock frequency in kHz - 从122880改为120000 */
+        .clkPllVcoFreq_kHz = 9600000,        /* CLKPLL VCO frequency in kHz - 从9830400改为9600000 (120MHz * 80) */
+        .clkPllHsDiv = TAL_HSDIV_2P5,            /* CLKPLL high speed clock divider */
+        .rfPllUseExternalLo = 0,                /* 1= Use external LO for RF PLL, 0 = use internal LO generation for RF PLL */
+        .rfPllPhaseSyncMode = TAL_RFPLLMCS_NOSYNC                /* RFPLL MCS (Phase sync) mode - 为120MHz操作改为NOSYNC */
+    },
+
+    /* JESD204B settings */
+    .jesd204Settings = 
+    {
+        /* Framer A settings */
+        .framerA = 
+        {
+            .bankId = 1,                    /* JESD204B Configuration Bank ID -extension to Device ID (Valid 0..15) */
+            .deviceId = 0,                    /* JESD204B Configuration Device ID - link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31) */
+            //.M = 4,                            /* number of ADCs (0, 2, or 4) - 2 ADCs per receive chain */
+            .M = 4,                            /* number of ADCs (0, 2, or 4) - 2 ADCs per receive chain */
+			.K = 32,                        /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes) */
+            .F = 4,                            /* F (number of bytes per frame) */
+            .Np = 16,                            /* Np (converter sample resolution) */
+            .scramble = 0,                    /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled. */
+            .externalSysref = 1,            /* 0=use internal SYSREF, 1= use external SYSREF */
+            //.serializerLanesEnabled = 0x0A,    /* serializerLanesEnabled - bit per lane, [0] = Lane0 enabled, [1] = Lane1 enabled */
+            .serializerLanesEnabled = 0x0A,    /* serializerLanesEnabled - bit per lane, [0] = Lane0 enabled, [1] = Lane1 enabled */
+			.serializerLaneCrossbar = 0xE4,    /* serializerLaneCrossbar */
+            .lmfcOffset = 31,                /* lmfcOffset - LMFC offset value for deterministic latency setting */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbInSelect = 0,                /* syncbInSelect; */
+            .overSample = 0,                    /* 1=overSample, 0=bitRepeat */
+            .syncbInLvdsMode = 1,
+            .syncbInLvdsPnInvert = 0,
+            .enableManualLaneXbar = 0 /* 0=auto, 1=manual */
+        },
+        /* Framer B settings */
+        .framerB = 
+        {
+            .bankId = 0,                    /* JESD204B Configuration Bank ID -extension to Device ID (Valid 0..15) */
+            .deviceId = 0,                    /* JESD204B Configuration Device ID - link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* JESD204B Configuration starting Lane ID.  If more than one lane used, each lane will increment from the Lane0 ID. (Valid 0..31) */
+            .M = 2,                            /* number of ADCs (0, 2, or 4) - 2 ADCs per receive chain */
+            .K = 32,                        /* number of frames in a multiframe (default=32), F*K must be a multiple of 4. (F=2*M/numberOfLanes) */
+            .F = 2,                            /* F (number of bytes per frame) */
+            .Np = 16,                            /* Np (converter sample resolution) */
+            .scramble = 0,                    /* scrambling off if framerScramble= 0, if framerScramble>0 scramble is enabled. */
+            .externalSysref = 1,
+
+            /* 0=use internal SYSREF, 1= use external SYSREF */
+            .serializerLanesEnabled = 0x05,    /* serializerLanesEnabled - bit per lane, [0] = Lane0 enabled, [1] = Lane1 enabled */
+            .serializerLaneCrossbar = 0xE4,    /* serializerLaneCrossbar */
+            .lmfcOffset = 31,                /* lmfcOffset - LMFC offset value for deterministic latency setting */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbInSelect = 1,                /* syncbInSelect; */
+            .overSample = 0,                    /* 1=overSample, 0=bitRepeat */
+            .syncbInLvdsMode = 1,
+            .syncbInLvdsPnInvert = 0,
+            .enableManualLaneXbar = 1 /* 0=auto, 1=manual */
+        },
+        /* Deframer A settings */
+        .deframerA = 
+        {
+            .bankId = 0,                    /* bankId extension to Device ID (Valid 0..15) */
+            .deviceId = 0,                    /* deviceId  link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* lane0Id Lane0 ID. (Valid 0..31) */
+            .M = 4,                            /* M  number of DACss (0, 2, or 4) - 2 DACs per transmit chain */
+            .K = 32,                        /* K  #frames in a multiframe (default=32), F*K=multiple of 4. (F=2*M/numberOfLanes) */
+            .scramble = 0,                    /* scramble  scrambling off if scramble= 0 */
+            .externalSysref = 1,            /* externalSysref  0= use internal SYSREF, 1= external SYSREF */
+            .deserializerLanesEnabled = 0x0F,    /* deserializerLanesEnabled  bit per lane, [0] = Lane0 enabled */
+            .deserializerLaneCrossbar = 0x27,    /* deserializerLaneCrossbar */
+            .lmfcOffset = 17,                /* lmfcOffset	 LMFC offset value to adjust deterministic latency */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbOutSelect = 0,                /* SYNCBOUT0/1 select */
+            .Np = 16,                /* Np (converter sample resolution) */
+            .syncbOutLvdsMode = 1,
+            .syncbOutLvdsPnInvert = 0,
+            .syncbOutCmosSlewRate = 0,
+            .syncbOutCmosDriveLevel = 0,
+            .enableManualLaneXbar = 1 /* 0=auto, 1=manual */
+        },
+        /* Deframer B settings */
+        .deframerB = 
+        {
+            .bankId = 0,                    /* bankId extension to Device ID (Valid 0..15) */
+            .deviceId = 0,                    /* deviceId  link identification number. (Valid 0..255) */
+            .lane0Id = 0,                    /* lane0Id Lane0 ID. (Valid 0..31) */
+            .M = 0,                            /* M  number of DACss (0, 2, or 4) - 2 DACs per transmit chain */
+            .K = 32,                        /* K  #frames in a multiframe (default=32), F*K=multiple of 4. (F=2*M/numberOfLanes) */
+            .scramble = 1,                    /* scramble  scrambling off if scramble= 0 */
+            .externalSysref = 1,            /* externalSysref  0= use internal SYSREF, 1= external SYSREF */
+            .deserializerLanesEnabled = 0x00,    /* deserializerLanesEnabled  bit per lane, [0] = Lane0 enabled */
+            .deserializerLaneCrossbar = 0xB4,    /* deserializerLaneCrossbar */
+            .lmfcOffset = 0,                /* lmfcOffset	 LMFC offset value to adjust deterministic latency */
+            .newSysrefOnRelink = 0,            /* newSysrefOnRelink */
+            .syncbOutSelect = 1,                /* SYNCBOUT0/1 select */
+            .Np = 16,                /* Np (converter sample resolution) */
+            .syncbOutLvdsMode = 1,
+            .syncbOutLvdsPnInvert = 0,
+            .syncbOutCmosSlewRate = 0,
+            .syncbOutCmosDriveLevel = 0,
+            .enableManualLaneXbar = 1 /* 0=auto, 1=manual */
+        },
+        .serAmplitude = 15,                    /* Serializer amplitude setting. Default = 15. Range is 0..15 */
+        .serPreEmphasis = 1,                /* Serializer pre-emphasis setting. Default = 1 Range is 0..4 */
+        .serInvertLanePolarity = 0,            /* Serializer Lane PN inversion select. Default = 0. Where, bit[0] = 1 will invert lane [0], bit[1] = 1 will invert lane 1, etc. */
+        .desInvertLanePolarity = 0,            /* Deserializer Lane PN inversion select.  bit[0] = 1 Invert PN of Lane 0, bit[1] = Invert PN of Lane 1, etc */
+        .desEqSetting = 1,                    /* Deserializer Equalizer setting. Applied to all deserializer lanes. Range is 0..4 */
+        .sysrefLvdsMode = 1,                /* Use LVDS inputs on Talise for SYSREF */
+        .sysrefLvdsPnInvert = 0              /*0= Do not PN invert SYSREF */
+    }
+};
+
+//Only needs to be called if user wants to setup AGC parameters
+static taliseAgcCfg_t rxAgcCtrl =
+{
+    4,
+    255,
+    195,
+    255,
+    195,
+    30720,  /* AGC gain update time in us (125us-250us - based on IQ data rate - set for 125us @ 245.76 Mhz) */
+    10,
+    10,
+    16,
+    0,
+    1,
+    0,
+    0,
+    0,
+    1,
+    31,
+    246,
+    4,
+    1,          /*!<1- bit field to enable the multiple time constants in AGC loop for fast attack and fast recovery to max gain. */
+    /* agcPower */
+    {
+        1,      /*!<1-bit field, enables the Rx power measurement block. */
+        1,      /*!<1-bit field, allows using Rx PFIR for power measurement. */
+        0,      /*!<1-bit field, allows to use the output of the second digital offset block in the Rx datapath for power measurement. */
+        9,      /*!<AGC power measurement detect lower 0 threshold. Default = -12dBFS == 5, 7-bit register value where max = 0x7F, min = 0x00 */
+        2,      /*!<AGC power measurement detect lower 1 threshold. Default = (offset) 4dB == 0, 4-bit register value where  max = 0xF, min = 0x00 */
+        4,      /*!<AGC power measurement detect lower 0 recovery gain step. Default = 2dB - based on gain table step  size, 5-bit register value where max = 0x1F, min = 0x00 */
+        4,      /*!<AGC power measurement detect lower 1 recovery gain step. Default = 4dB - based on gain table step size, 5-bit register value where max = 0x1F, min = 0x00 */
+        5,      /*!< power measurement duration used by the decimated power block. Default = 0x05, 5-bit register value where max = 0x1F, min = 0x00 */
+        5,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        1,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        5,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        1,      /*!<Allows power detection of data for a specific slice of the gain update counter. 16-bit register value (currently not used) */
+        2,      /*!<Default value should be 2*/
+        0,
+        0
+    },
+    /* agcPeak */
+    {
+        205,        /*!<1st update interval for the multiple time constant in AGC loop mode, Default:205. */
+        2,          /*!<sets the 2nd update interval for the multiple time constant in AGC loop mode. Calculated as a multiple of  agcUnderRangeLowInterval  , Default: 4 */
+        4,          /*!<sets the 3rd update interval for the multiple time constant in AGC loop mode. Calculated as a multiple of agcUnderRangeMidInterval and agcUnderRangeLowInterval, Default: 4 */
+        39,         /*!<AGC APD high threshold. Default=0x1F, 6-bit register value where max=0x3F, min =0x00 */
+        49,         /*!<AGC APD peak detect high threshold. default = 0x1F, 6-bit register value where max = 0x3F, min = 0x00.  Set to 3dB below apdHighThresh */
+        23,         /*!<AGC APD peak detect low threshold. default = 3dB below high threshold, 6-bit register value where max =0x3F, min = 0x00 */
+        19,         /*!<AGC APD peak detect low threshold. default = 3dB below high threshold, 6-bit register value where max = 0x3F, min = 0x00 . Set to 3dB below apdLowThresh  */
+        6,          /*!<AGC APD peak detect upper threshold count. Default = 0x06 8-bit register value where max = 0xFF, min = 0x20  */
+        3,          /*!<AGC APD peak detect lower threshold count. Default = 0x03, 8-bit register value where max = 0xFF, min = 0x00  */
+        4,          /*!<AGC APD peak detect attack gain step. Default = 2dB step - based on gain table step size, 5-bit register  value, where max = 0x1F, min = 0x00  */
+        2,          /*!<AGC APD gain index step size. Recommended to be same as hb2GainStepRecovery. Default = 0x00, 5-bit register value where max = 0x1F, min = 0x00  */
+        1,          /*!<1-bit field, enables or disables the HB2 overload detector.  */
+        1,          /*!<3-bit field. Sets the window of clock cycles (at the HB2 output rate) to meet the overload count. */
+        1,          /*!<4-bit field. Sets the number of actual overloads required to trigger the overload signal.  */
+        181,        /*!<AGC decimator output high threshold. Default = 0xB5, 8-bit register value where max = 0xFF, min = 0x00 */
+        45,         /*!<AGC decimator output low threshold. Default = 0x80, 8-bit register value where max = 0xFF, min = 0x00 */
+        90,         /*!<AGC decimator output low threshold. Default = 0x80, 8-bit register value where max = 0xFF, min = 0x00 */
+        128,        /*!<AGC decimator output low threshold. Default = 0x80, 8-bit register value where max = 0xFF, min = 0x00 */
+        6,          /*!<AGC HB2 output upper threshold count. Default = 0x06, 8-bit register value where max = 0xFF, min =  0x20 */
+        3,          /*!<AGC HB2 output lower threshold count. Default = 0x03, 8-bit register value where max = 0xFF, min = 0x00 */
+        2,          /*!<AGC decimator gain index step size. Default = 0x00, 5-bit register value where max = 0x1F, min = 0x00 */
+        4,          /*!<AGC HB2 gain index step size, when the HB2 Low Overrange interval 0 triggers a programmable number  of times. Default = 0x08, 5-bit register value where max = 0x1F, min = 0x00 */
+        8,          /*!<AGC HB2 gain index step size, when the HB2 Low Overrange interval 1 triggers a programmable number of times. Default = 0x04, 5-bit register value where max = 0x1F, min = 0x00 */
+        4,          /*!<AGC decimator output attack gain step. Default = 2dB step - based on gain table step size, 5-bit register value, where max = 0x1F, min = 0x00 */
+        1,
+        0,
+        0
+    }
+};
+/**
+ *  TalDevice a structure used by the Talise API to hold the platform hardware
+ *  structure information, as well as an internal Talise API state container
+ *  (devStateInfo) of runtime information used by the API.
+ **/
+
+static int chipSelectIndex = 2;
+
+static taliseDevice_t talDevice =
+{
+#if 0
+#ifdef ADI_ZYNQ_PLATFORM
+    /* Void pointer of users platform HAL settings to pass to HAL layer calls
+     * Talise API does not use the devHalInfo member */
+	.devHalInfo = &talDevHalInfo,
+#else
+	.devHalInfo = &(talInit.spiSettings),//NULL,     /*/** < Insert Customer Platform HAL State Container here>*/
+#endif
+#else
+	.devHalInfo = &chipSelectIndex,
+#endif
+	/* devStateInfo is maintained internal to the Talise API, just create the memory */
+	.devStateInfo = {0}
+
+};
+
+taliseDeviceInfo taliseDeviceInfo2 =
+{
+	.ptalDevice = &talDevice,
+	.ptalInit = &talInit
+};

atsc_app/adrv9009/talise_config_2.h

@@ -0,0 +1,29 @@
+/**
+ * \file talise_config.h
+ * \brief Talise configuration external declarations
+ *
+ * \brief Contains structure definitions for tal_config.c
+ *
+ * Copyright 2015-2017 Analog Devices Inc.
+ * Released under the AD9378-AD9379 API license, for more information see the "LICENSE.txt" file in this zip file.
+ *
+ * The top level structure taliseDevice_t talDevice uses keyword
+ * extern to allow the application layer main() to have visibility
+ * to these settings.
+ */
+
+#ifndef TAL_INIT_2_H_
+#define TAL_INIT_2_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern taliseDevice_t talDevice2;
+extern taliseInit_t talInit2;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

atsc_app/adrv9009/talise_stream_binary.h

@@ -0,0 +1,345 @@
+const uint8_t streamBinary[] = {
+	0x00, 0x02, 0x00, 0x20, 0x10, 0x02, 0x00, 0x20, 0x32, 0x00, 0x00, 0x10,
+	0x0e, 0x02, 0x00, 0x00, 0xa0, 0x03, 0x00, 0x20, 0xa4, 0x05, 0x00, 0x20,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa4, 0x03, 0x00, 0x20,
+	0xa8, 0x05, 0x00, 0x20, 0xbc, 0x03, 0x00, 0x20, 0xdc, 0x05, 0x00, 0x20,
+	0xe4, 0x03, 0x00, 0x20, 0x44, 0x06, 0x00, 0x20, 0xfc, 0x03, 0x00, 0x20,
+	0x78, 0x06, 0x00, 0x20, 0x24, 0x04, 0x00, 0x20, 0xe0, 0x06, 0x00, 0x20,
+	0x50, 0x04, 0x00, 0x20, 0x60, 0x07, 0x00, 0x20, 0x7c, 0x04, 0x00, 0x20,
+	0xe0, 0x07, 0x00, 0x20, 0x94, 0x04, 0x00, 0x20, 0x18, 0x08, 0x00, 0x20,
+	0xa8, 0x04, 0x00, 0x20, 0x44, 0x08, 0x00, 0x20, 0xc0, 0x04, 0x00, 0x20,
+	0x7c, 0x08, 0x00, 0x20, 0xd4, 0x04, 0x00, 0x20, 0xa8, 0x08, 0x00, 0x20,
+	0xf4, 0x04, 0x00, 0x20, 0xf4, 0x08, 0x00, 0x20, 0x14, 0x05, 0x00, 0x20,
+	0x40, 0x09, 0x00, 0x20, 0x24, 0x05, 0x00, 0x20, 0x64, 0x09, 0x00, 0x20,
+	0x34, 0x05, 0x00, 0x20, 0x88, 0x09, 0x00, 0x20, 0x44, 0x05, 0x00, 0x20,
+	0xb0, 0x09, 0x00, 0x20, 0x54, 0x05, 0x00, 0x20, 0xd8, 0x09, 0x00, 0x20,
+	0x58, 0x05, 0x00, 0x20, 0xdc, 0x09, 0x00, 0x20, 0x60, 0x05, 0x00, 0x20,
+	0xe8, 0x09, 0x00, 0x20, 0x64, 0x05, 0x00, 0x20, 0xf0, 0x09, 0x00, 0x20,
+	0x68, 0x05, 0x00, 0x20, 0xf8, 0x09, 0x00, 0x20, 0x6c, 0x05, 0x00, 0x20,
+	0x00, 0x0a, 0x00, 0x20, 0x70, 0x05, 0x00, 0x20, 0x08, 0x0a, 0x00, 0x20,
+	0x78, 0x05, 0x00, 0x20, 0x18, 0x0a, 0x00, 0x20, 0x80, 0x05, 0x00, 0x20,
+	0x28, 0x0a, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x84, 0x05, 0x00, 0x20,
+	0x30, 0x0a, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+	0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xcf, 0xc6, 0x00,
+	0xce, 0xd0, 0xc1, 0xc1, 0xcf, 0xc0, 0xc0, 0xc0, 0xcd, 0xc0, 0xc0, 0xcd,
+	0xc0, 0xc0, 0xcd, 0xc0, 0xc0, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00, 0x00,
+	0xce, 0xd0, 0xc1, 0xc1, 0xc1, 0xcf, 0xc0, 0xc0, 0xcd, 0xc1, 0xc1, 0xcd,
+	0x98, 0x48, 0x98, 0x48, 0xc0, 0xc1, 0xc0, 0xc0, 0xc1, 0xc0, 0xc0, 0xc0,
+	0xcd, 0xc1, 0xc1, 0xc0, 0xcd, 0xc0, 0xc0, 0xc1, 0xc1, 0xc1, 0xcf, 0xd1,
+	0xc6, 0x00, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xc1, 0xcf, 0xc0, 0xc0, 0xc0,
+	0xcd, 0xc0, 0xc0, 0xcd, 0xc0, 0xc0, 0xcd, 0xc0, 0xc0, 0xc1, 0xcf, 0xd1,
+	0xc6, 0x00, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xc1, 0xc1, 0xcf, 0xc0, 0xc0,
+	0xcd, 0xc1, 0xc1, 0x98, 0x48, 0x98, 0x48, 0xcd, 0xc0, 0xc1, 0xc0, 0xc0,
+	0xc1, 0xc0, 0xc0, 0xc0, 0xcd, 0xc1, 0xc1, 0xc0, 0xcd, 0xc0, 0xc0, 0xc1,
+	0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xc1,
+	0xc1, 0xcf, 0xc0, 0xc0, 0x98, 0x48, 0xc0, 0xc1, 0xcd, 0xc1, 0xc1, 0xc1,
+	0xc1, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0x98, 0x48, 0x98, 0x48,
+	0xc0, 0xc0, 0xcd, 0xc1, 0xc1, 0xc0, 0xc0, 0xc1, 0xc0, 0xc0, 0xcd, 0xc1,
+	0xc1, 0xcf, 0xd1, 0xc6, 0xce, 0xd0, 0xc1, 0xc1, 0xc1, 0xcf, 0xc0, 0xc0,
+	0xc0, 0xc1, 0x98, 0x48, 0xcd, 0xc1, 0xc1, 0xc1, 0xc1, 0xc0, 0xc0, 0xc0,
+	0xc0, 0xc0, 0xc0, 0xc0, 0x98, 0x48, 0x98, 0x48, 0xc0, 0xc0, 0xcd, 0xc1,
+	0xc1, 0xc0, 0xc0, 0xc1, 0xc0, 0xc0, 0xcd, 0xc1, 0xc1, 0xcf, 0xd1, 0xc6,
+	0xce, 0xd0, 0xc1, 0xcf, 0xc0, 0xc0, 0xcd, 0xc0, 0xcd, 0xc0, 0xcd, 0xc0,
+	0xc0, 0xcd, 0xc0, 0xc0, 0xc0, 0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00,
+	0xce, 0xd0, 0xc1, 0xcf, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0xc0, 0xc1,
+	0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xcf,
+	0xc0, 0xc0, 0xcd, 0xc0, 0xcd, 0xc0, 0xcd, 0xc0, 0xc0, 0xcd, 0xc0, 0xc0,
+	0xc0, 0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xcf,
+	0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0xc0, 0xc1, 0xc1, 0xc1, 0xcf, 0xd1,
+	0xc6, 0x00, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xcf, 0xc0, 0xc1, 0xc0, 0xc0,
+	0x98, 0x48, 0x98, 0x48, 0xc0, 0xc0, 0xcd, 0xc1, 0xc0, 0xc0, 0xc0, 0xc0,
+	0xcd, 0xc0, 0xc0, 0xc1, 0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00, 0x00,
+	0xce, 0xd0, 0xc1, 0xcf, 0xc0, 0xc1, 0xc0, 0xc0, 0x98, 0x48, 0x98, 0x48,
+	0xc0, 0xc0, 0xcd, 0xc1, 0xc0, 0xc0, 0xc0, 0xc0, 0xcd, 0xc0, 0xc0, 0xc1,
+	0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xc1,
+	0xcf, 0xc0, 0xc0, 0xc1, 0xc0, 0xc0, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0x00,
+	0xce, 0xd0, 0xc1, 0xc1, 0xcf, 0xc0, 0xc0, 0xcd, 0xc0, 0xc0, 0xc1, 0xcf,
+	0xd1, 0xc6, 0x00, 0x00, 0xce, 0xd0, 0xc1, 0xcf, 0xc1, 0xc0, 0xc0, 0xc0,
+	0xc1, 0xcd, 0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00, 0xce, 0xd0, 0xc1, 0xcf,
+	0xc1, 0xc0, 0xc0, 0xc0, 0xc1, 0xcd, 0xc1, 0xc1, 0xcf, 0xd1, 0xc6, 0x00,
+	0xce, 0xc6, 0x00, 0x00, 0xce, 0xc1, 0xcd, 0xc1, 0xc6, 0x00, 0x00, 0x00,
+	0xce, 0xc1, 0xc6, 0x00, 0xce, 0xc1, 0xc6, 0x00, 0xce, 0x98, 0xc0, 0xc6,
+	0xce, 0xc1, 0xc6, 0x00, 0xce, 0xc1, 0xcd, 0xc1, 0xc1, 0xc6, 0x00, 0x00,
+	0xce, 0xc1, 0xcd, 0xc1, 0xc1, 0xc6, 0x00, 0x00, 0xce, 0x98, 0xc0, 0xc6,
+	0xce, 0x50, 0x91, 0xae, 0x98, 0x81, 0xaf, 0x98, 0x86, 0x8f, 0x48, 0xa1,
+	0xc8, 0xa9, 0x50, 0x91, 0xae, 0xa7, 0xc8, 0xaf, 0x55, 0x95, 0x81, 0xaf,
+	0x98, 0x86, 0x8f, 0x48, 0xc6, 0x00, 0x00, 0x00, 0xf8, 0x14, 0x33, 0x04,
+	0x05, 0x00, 0x00, 0x85, 0xfc, 0x14, 0x40, 0x40, 0xfb, 0x14, 0x40, 0x40,
+	0x01, 0x87, 0x02, 0x02, 0x07, 0x03, 0x00, 0x09, 0x03, 0x39, 0x50, 0x00,
+	0x56, 0x0f, 0x00, 0x09, 0x03, 0x29, 0x08, 0x00, 0x09, 0x03, 0x21, 0x92,
+	0x0e, 0x01, 0x50, 0x00, 0x87, 0x02, 0x03, 0x28, 0x16, 0x00, 0xfc, 0x14,
+	0x00, 0x40, 0x02, 0x00, 0x05, 0x00, 0x00, 0x86, 0xfc, 0x14, 0x01, 0x01,
+	0xfb, 0x14, 0x01, 0x01, 0x5a, 0x15, 0x40, 0x40, 0x01, 0x05, 0x03, 0x08,
+	0x85, 0x02, 0x00, 0x08, 0x00, 0x86, 0x02, 0x00, 0x16, 0x04, 0x03, 0x40,
+	0x40, 0xf0, 0x00, 0xfa, 0x14, 0x02, 0x01, 0xf9, 0x14, 0x09, 0x08, 0x80,
+	0x08, 0x30, 0x44, 0x08, 0x00, 0x33, 0x0b, 0x03, 0x7f, 0xdb, 0x07, 0x00,
+	0x85, 0x07, 0x00, 0x18, 0x03, 0x03, 0x60, 0x05, 0x03, 0x00, 0x89, 0x02,
+	0x00, 0x02, 0x00, 0x81, 0x07, 0x00, 0x21, 0xc2, 0x16, 0x00, 0x03, 0x85,
+	0x02, 0x08, 0x08, 0x00, 0x85, 0x02, 0x09, 0x8c, 0x02, 0x00, 0x32, 0x15,
+	0x00, 0x40, 0x45, 0x0a, 0x40, 0x40, 0xfc, 0x14, 0x00, 0x01, 0x02, 0x00,
+	0x05, 0x00, 0x00, 0x87, 0xfc, 0x14, 0x80, 0x80, 0xfb, 0x14, 0x80, 0x80,
+	0x01, 0x88, 0x02, 0x02, 0x08, 0x03, 0x00, 0x0a, 0x03, 0x39, 0x50, 0x00,
+	0x57, 0x0f, 0x00, 0x0a, 0x03, 0x29, 0x08, 0x00, 0x0a, 0x03, 0x21, 0x93,
+	0x0e, 0x01, 0x50, 0x00, 0x88, 0x02, 0x03, 0x29, 0x16, 0x00, 0xfc, 0x14,
+	0x00, 0x80, 0x02, 0x00, 0x05, 0x00, 0x00, 0x88, 0xfc, 0x14, 0x02, 0x02,
+	0xfb, 0x14, 0x02, 0x02, 0x5a, 0x15, 0x40, 0x40, 0x01, 0x06, 0x03, 0x08,
+	0x86, 0x02, 0x00, 0x08, 0x00, 0x85, 0x02, 0x00, 0x16, 0x03, 0x03, 0x40,
+	0x40, 0xfa, 0x14, 0x02, 0x01, 0xf9, 0x14, 0x0a, 0x08, 0xf0, 0x00, 0x80,
+	0x08, 0x30, 0x44, 0x08, 0x00, 0x33, 0x0b, 0x03, 0x7f, 0xdb, 0x07, 0x00,
+	0x85, 0x07, 0x00, 0x18, 0x04, 0x03, 0x60, 0x06, 0x03, 0x00, 0x89, 0x02,
+	0x00, 0x02, 0x00, 0x81, 0x07, 0x00, 0x21, 0xc2, 0x16, 0x00, 0x03, 0x86,
+	0x02, 0x08, 0x08, 0x00, 0x86, 0x02, 0x09, 0x8d, 0x02, 0x00, 0x32, 0x15,
+	0x00, 0x40, 0x45, 0x0a, 0x80, 0x80, 0xfc, 0x14, 0x00, 0x02, 0x02, 0x00,
+	0x10, 0x00, 0x00, 0x89, 0xfc, 0x14, 0x04, 0x04, 0xfb, 0x14, 0x0c, 0x0c,
+	0x32, 0x15, 0x40, 0x40, 0x01, 0x05, 0x03, 0x08, 0x06, 0x03, 0x08, 0xf9,
+	0x14, 0x09, 0x08, 0x85, 0x02, 0x00, 0x86, 0x02, 0x00, 0x14, 0x02, 0x80,
+	0x80, 0x08, 0x30, 0x3f, 0x44, 0x08, 0x00, 0x33, 0x85, 0x0a, 0xc0, 0xc0,
+	0x85, 0x07, 0x00, 0x18, 0x0b, 0x03, 0x7f, 0xdb, 0x07, 0x00, 0x03, 0x03,
+	0x50, 0x04, 0x03, 0x70, 0x05, 0x03, 0x00, 0x06, 0x03, 0x00, 0x89, 0x02,
+	0x01, 0xed, 0x14, 0x81, 0x0c, 0xee, 0x14, 0x82, 0x0c, 0x85, 0x02, 0x08,
+	0x86, 0x02, 0x08, 0x08, 0x00, 0x81, 0x07, 0x00, 0x21, 0xc2, 0x16, 0x00,
+	0x03, 0x85, 0x02, 0x0a, 0x86, 0x02, 0x0a, 0x82, 0x0c, 0x00, 0x40, 0x8c,
+	0x02, 0x00, 0x8d, 0x02, 0x00, 0x80, 0x00, 0x5a, 0x15, 0x00, 0x40, 0xfc,
+	0x14, 0x00, 0x04, 0x02, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x8a,
+	0xfc, 0x14, 0x08, 0x08, 0xfb, 0x14, 0x0c, 0x0c, 0x32, 0x15, 0x40, 0x40,
+	0x01, 0x05, 0x03, 0x08, 0x06, 0x03, 0x08, 0x86, 0x02, 0x00, 0x85, 0x02,
+	0x00, 0x14, 0xf9, 0x14, 0x0a, 0x08, 0x02, 0x80, 0x80, 0x08, 0x30, 0x3f,
+	0x44, 0x08, 0x00, 0x33, 0x85, 0x0a, 0xc0, 0xc0, 0x85, 0x07, 0x08, 0x18,
+	0x0b, 0x03, 0x7f, 0xdb, 0x07, 0x00, 0x03, 0x03, 0x70, 0x04, 0x03, 0x50,
+	0x05, 0x03, 0x00, 0x06, 0x03, 0x00, 0x89, 0x02, 0x01, 0xef, 0x14, 0x84,
+	0x0c, 0xf0, 0x14, 0x85, 0x0c, 0x85, 0x02, 0x08, 0x86, 0x02, 0x08, 0x08,
+	0x00, 0x81, 0x07, 0x00, 0x21, 0xc2, 0x16, 0x00, 0x03, 0x85, 0x02, 0x0a,
+	0x86, 0x02, 0x0a, 0x85, 0x0c, 0x00, 0x40, 0x8c, 0x02, 0x00, 0x8d, 0x02,
+	0x00, 0x80, 0x00, 0x5a, 0x15, 0x00, 0x40, 0xfc, 0x14, 0x00, 0x08, 0x02,
+	0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x8b, 0xfc, 0x14, 0x40, 0x40,
+	0x01, 0x87, 0x02, 0x02, 0x28, 0x16, 0x03, 0x30, 0x00, 0x92, 0x0e, 0x02,
+	0x50, 0x00, 0x09, 0x03, 0x29, 0x0a, 0x00, 0x09, 0x03, 0x39, 0x56, 0x0f,
+	0xee, 0x02, 0x00, 0x09, 0x03, 0x3f, 0x07, 0x03, 0x07, 0x87, 0x02, 0x00,
+	0xfb, 0x14, 0x00, 0x40, 0xfc, 0x14, 0x00, 0x40, 0x02, 0x00, 0x00, 0x00,
+	0x05, 0x00, 0x00, 0x8c, 0xfc, 0x14, 0x01, 0x01, 0x01, 0x0b, 0x03, 0x7f,
+	0x8c, 0x02, 0x03, 0x85, 0x02, 0x08, 0x03, 0x03, 0x77, 0x05, 0x03, 0x5d,
+	0x40, 0x00, 0x85, 0x02, 0x00, 0x45, 0x0a, 0x00, 0x40, 0xfb, 0x14, 0x00,
+	0x01, 0xfc, 0x14, 0x00, 0x01, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x8d,
+	0xfc, 0x14, 0x80, 0x80, 0x01, 0x88, 0x02, 0x02, 0x29, 0x16, 0x03, 0x30,
+	0x00, 0x93, 0x0e, 0x02, 0x50, 0x00, 0x0a, 0x03, 0x29, 0x0a, 0x00, 0x0a,
+	0x03, 0x39, 0x57, 0x0f, 0xee, 0x02, 0x00, 0x0a, 0x03, 0x3f, 0x08, 0x03,
+	0x07, 0x88, 0x02, 0x00, 0xfb, 0x14, 0x00, 0x80, 0xfc, 0x14, 0x00, 0x80,
+	0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x8e, 0xfc, 0x14, 0x02, 0x02,
+	0x01, 0x0b, 0x03, 0x7f, 0x8d, 0x02, 0x03, 0x86, 0x02, 0x08, 0x04, 0x03,
+	0x77, 0x06, 0x03, 0x5d, 0x40, 0x00, 0x86, 0x02, 0x00, 0x45, 0x0a, 0x00,
+	0x80, 0xfb, 0x14, 0x00, 0x02, 0xfc, 0x14, 0x00, 0x02, 0x02, 0x00, 0x00,
+	0x05, 0x00, 0x00, 0x8f, 0xfc, 0x14, 0x04, 0x04, 0x01, 0x0b, 0x03, 0x7f,
+	0x80, 0x08, 0x00, 0x0f, 0x8c, 0x02, 0x03, 0x8d, 0x02, 0x03, 0xe9, 0x14,
+	0x81, 0x0c, 0xea, 0x14, 0x82, 0x0c, 0x85, 0x02, 0x08, 0x86, 0x02, 0x08,
+	0x02, 0x00, 0x82, 0x0c, 0x00, 0x40, 0x03, 0x03, 0x77, 0x04, 0x03, 0x77,
+	0x05, 0x03, 0x1d, 0x06, 0x03, 0x1d, 0x40, 0x00, 0x85, 0x02, 0x00, 0x86,
+	0x02, 0x00, 0x85, 0x0a, 0x00, 0xc0, 0xfb, 0x14, 0x00, 0x0c, 0xfc, 0x14,
+	0x00, 0x04, 0x02, 0x00, 0x05, 0x00, 0x00, 0x90, 0xfc, 0x14, 0x08, 0x08,
+	0x01, 0x0b, 0x03, 0x7f, 0x80, 0x08, 0x00, 0x0f, 0x8c, 0x02, 0x03, 0x8d,
+	0x02, 0x03, 0xeb, 0x14, 0x84, 0x0c, 0xec, 0x14, 0x85, 0x0c, 0x85, 0x02,
+	0x08, 0x86, 0x02, 0x08, 0x02, 0x00, 0x85, 0x0c, 0x00, 0x40, 0x03, 0x03,
+	0x77, 0x04, 0x03, 0x77, 0x05, 0x03, 0x1d, 0x06, 0x03, 0x1d, 0x40, 0x00,
+	0x85, 0x02, 0x00, 0x86, 0x02, 0x00, 0x85, 0x0a, 0x00, 0xc0, 0xfb, 0x14,
+	0x00, 0x0c, 0xfc, 0x14, 0x00, 0x08, 0x02, 0x00, 0x05, 0x00, 0x00, 0x91,
+	0xfc, 0x14, 0x10, 0x10, 0xfb, 0x14, 0x10, 0x10, 0x01, 0x89, 0x02, 0x02,
+	0x05, 0x03, 0x00, 0x44, 0x08, 0x01, 0x01, 0x85, 0x02, 0x14, 0x03, 0x03,
+	0x30, 0xfc, 0x14, 0x00, 0x10, 0x02, 0x00, 0x00, 0x05, 0x00, 0x00, 0x93,
+	0xfc, 0x14, 0x20, 0x20, 0xfb, 0x14, 0x20, 0x20, 0x01, 0x89, 0x02, 0x02,
+	0x06, 0x03, 0x00, 0x02, 0x00, 0x86, 0x02, 0x14, 0x04, 0x03, 0x30, 0xfc,
+	0x14, 0x00, 0x20, 0x02, 0x00, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x93,
+	0xfc, 0x14, 0x10, 0x10, 0x01, 0x44, 0x08, 0x00, 0x03, 0x03, 0x03, 0x70,
+	0x0b, 0x03, 0x7f, 0x85, 0x02, 0x00, 0x44, 0x08, 0x00, 0x03, 0x20, 0x00,
+	0xfb, 0x14, 0x00, 0x10, 0xfc, 0x14, 0x00, 0x10, 0x02, 0x00, 0x00, 0x00,
+	0x05, 0x00, 0x00, 0x94, 0xfc, 0x14, 0x20, 0x20, 0x01, 0x44, 0x08, 0x00,
+	0x30, 0x03, 0x03, 0x70, 0x0b, 0x03, 0x7f, 0x86, 0x02, 0x00, 0x44, 0x08,
+	0x00, 0x30, 0x20, 0x00, 0xfb, 0x14, 0x00, 0x20, 0xfc, 0x14, 0x00, 0x20,
+	0x02, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x05, 0x00, 0xc1, 0x05,
+	0x10, 0x13, 0x04, 0x00, 0xc1, 0x05, 0x00, 0x13, 0x05, 0x00, 0xd0, 0x05,
+	0x00, 0x03, 0x00, 0x00, 0x05, 0x00, 0xe0, 0x05, 0x00, 0x03, 0x00, 0x00,
+	0x05, 0x00, 0xd5, 0x14, 0xd5, 0x14, 0x0c, 0x00, 0x05, 0x00, 0xc1, 0x05,
+	0x03, 0x03, 0x00, 0x00, 0x05, 0x00, 0xc1, 0x05, 0x04, 0x04, 0x02, 0x00,
+	0xd0, 0x05, 0x02, 0x03, 0xc1, 0x05, 0x00, 0x04, 0x05, 0x00, 0xc1, 0x05,
+	0x08, 0x08, 0x02, 0x00, 0xe0, 0x05, 0x02, 0x03, 0xc1, 0x05, 0x00, 0x08,
+	0x05, 0x00, 0xd5, 0x14, 0xd5, 0x14, 0x00, 0x00, 0x05, 0x00, 0xff, 0x00,
+	0xf1, 0x14, 0x80, 0x08, 0x80, 0x08, 0x01, 0xff, 0x00, 0x01, 0xff, 0x00,
+	0x0b, 0x03, 0x0b, 0x03, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+	0x93, 0x90, 0x0d, 0x7e
+};
+unsigned int firmware_TaliseStream_bin_len = 4096;

atsc_app/bsp/dac38j82.c

@@ -0,0 +1,522 @@
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>  //define O_WRONLY and O_RDONLY
+#include <pthread.h>        /* mux-  */
+#include <unistd.h>         /* -System V */
+#include <sys/ioctl.h>      /* ioctl - BSD and Linux */
+#include <stropts.h>        /* -XSI STREAMS */
+#include <stdint.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <getopt.h>
+#include <fcntl.h>
+#include <sys/ioctl.h>
+#include <linux/types.h>
+#include <linux/spi/spidev.h>
+#include <memory.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <termios.h>
+#include <errno.h>
+#include <math.h>
+#include <string.h>
+
+#include "../inc/ispi.h"
+#include "../inc/dac38j82.h"
+#include "../inc/isys_config.h"
+#include "../inc/lcd_task.h"
+#include "../inc/isys_com.h"
+
+
+#if 0//USE_38J82
+
+int init_38j82_flg = 0;
+
+int dac38j82_spi_fd = -1;
+extern S_ATSC_PARA atsc_para;
+
+
+static void spi_dac38j82_init(void);
+static s8   spi_write_dac38j82(u8 addr, u16 data);
+static s8   spi_read_dac38j82(u8 addr, u16 *pdata);
+static void dac38j82_set_freq(uint32 u32freqMHz);
+static void cw_cfg(int cw);
+
+
+static void spi_dac38j82_init(void)
+{
+    unsigned char mode = SPI_MODE_3 ; // 1 0 --  1 闲时高电平， 0第一个边沿采样
+    unsigned char bits = 8;
+    unsigned int speed = 100000;
+    uint16 u16data = 0;
+
+    init_spi_dev(DAC38J82_SPI_NODE, &dac38j82_spi_fd, mode, bits, speed);
+
+
+    /* set SPI mode at 4-wire */
+    spi_read_dac38j82(REGMAP_ADDR_CONFIG2, &u16data);
+    u16data |= 0x80;
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG2, u16data); // 0x2092
+    spi_read_dac38j82(REGMAP_ADDR_CONFIG2, &u16data);
+    if(u16data & 0x80)
+    {
+        log_printf(LOG_INFO, I_SYS_STATUS, "spi mode set 4-wire done.\n");
+    }
+
+}
+
+
+static s8 spi_write_dac38j82(u8 addr, u16 data)
+{
+    int ret;
+
+    if (addr > 0xff) {
+        log_printf(LOG_ERR,I_SYS_STATUS,"spi_write_dac38j82 addr error!\r\n");
+        return -1;
+    }
+
+    ret = spi_w(dac38j82_spi_fd, addr, data);
+    if(ret == 0) {
+        return 0;
+    } else {
+        if(ret == -1)
+            log_printf(LOG_ERR,I_SYS_STATUS,"dac38j82_spi_fd err, < 0 \n");
+        else if(ret == -2)
+            log_printf(LOG_ERR,I_SYS_STATUS,"can't send spi message, for write dac38j82_spi_fd\n");
+
+        return -1;
+    }
+}
+
+static s8 spi_read_dac38j82(u8 addr, u16 *pdata)
+{
+    int ret;
+
+    if (addr > 0xff) {
+        log_printf(LOG_ERR,I_SYS_STATUS,"spi_read_dac38j82 addr error!\n");
+        return RET_FAIL;
+    }
+
+    ret = spi_r(dac38j82_spi_fd, addr, pdata);
+    if(ret == 0) {
+        return 0;
+    } else {
+        if(ret == -1)
+            log_printf(LOG_ERR,I_SYS_STATUS,"dac38j82_spi_fd err, < 0 \n");
+        else if(ret == -2)
+            log_printf(LOG_ERR,I_SYS_STATUS,"can't send spi message, for read dac38j82_spi_fd\n");
+        return -1;
+    }
+}
+
+/*****************************************************************************
+ * Function      : gpio_dac38j82_reset
+ * Description   : reset imx6ull's pin DA33_RESET  set low -> high now only high
+ * Input         : void
+ * Output        : None
+ * Return        :
+ * Others        :
+ * Record
+ * 1.Date        : 20220302
+ *   Author      : Shu.Wang
+ *   Modification: Created function
+
+*****************************************************************************/
+static void gpio_dac38j82_reset(void)
+{
+        // reset imx6ull's pin DA33_RESET  set low -> high now only high
+    log_printf(LOG_DEBUG,I_NOUSED,"RESETB : DA33_RESET 0--->1\n");
+    system("echo out > /sys/class/gpio/gpio116/direction");
+    system("echo  in > /sys/class/gpio/gpio116/direction");
+}
+
+/* OneShu@20220124
+    config20、 config21、config22
+
+    data = int(freqMHz*2^48/1920)
+
+*/
+static void dac38j82_set_freq(uint32 u32freqMHz)
+{
+    uint16 u16data = 0;
+    //u32freqMHz = u32freqMHz -15;
+    uint64 u64data =(uint64) (((uint64)u32freqMHz * (uint64)(2)<<(48-1)) / (uint64)1920);
+
+    log_printf(LOG_DEBUG,I_NOUSED,"do set freq %d MHz ~ (%#llx).\n", u32freqMHz, u64data);
+
+    u16data = (u64data>>0) & 0xFFFF;
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG20, u16data);
+
+    u16data = (u64data>>16) & 0xFFFF;
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG21, u16data);
+
+    u16data = (u64data>>32) & 0xFFFF;
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG22, u16data);
+
+    log_printf(LOG_DEBUG,I_NOUSED,"spi wr freq %d MHz to 38j82 success.\n", u32freqMHz);
+    return;
+}
+
+// off 0x0400
+// on  0x077D
+static void cw_cfg_config_12_13(int cw)
+{
+    // gaina 0x400 0x200 0x400 0x8400 0x400
+
+    if(cw == 0) {
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG12, 0x0400); // 0x0400 0x07FF
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG13, 0x0400); // 0x0400 0x07FF
+    }else {
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG12, 0x077D); // 0x0400 0x07FF
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG13, 0x077D); // 0x0400 0x07FF
+    }
+}
+
+
+
+
+// (自身数值减小的那个配置，必须先配置进38j82,使实际功率先降下来,再配置后面数值增加的那个cfg来提升功率)
+static void cw_cfg(int cw)
+{
+    log_printf(LOG_DEBUG,I_NOUSED,"cfg 38j82 cw = %d\n", cw);
+
+    if(cw == 0){  // cw 变 1
+
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG13, 0x0400); // ↓
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG12, 0x0400); // ↓
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG2,  0x20D2); // ↓
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG3,  0xC081); // ↑ (bit0:exenable)
+
+    }else if(cw == 1) { // cw 变 0
+
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG3,   0x2081); // ↓ (bit0:exenable)
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG12,  0x077D); // ↑
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG13,  0x077D); // ↑
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG2,   0x20F2); // ↑
+
+    }
+}
+
+static void *monitor_config100_thr(void*args)
+{
+    uint16 u16data = 0;
+    uint32 u32data = 0;
+    int i = 0;
+
+
+    while(1){
+        for(i=0; i<9; i++){
+            spi_write_dac38j82(REGMAP_ADDR_CONFIG100+i, 0x0000);
+            usleep(2);
+
+            spi_read_dac38j82(REGMAP_ADDR_CONFIG100+i, &u16data);
+            if(u16data && i==0) {
+                log_printf(LOG_DEBUG,I_NOUSED,"monitor alarm [config%d] 0x%x\n", REGMAP_ADDR_CONFIG100+i, u16data);
+            }
+        }
+
+
+//        fpga_i2c_sim_spi_read(0x08, &u32data);
+//        printf("read jesd204b 0x08  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x0c, &u32data);
+//        printf("read jesd204b 0x0c  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x10, &u32data);
+//        printf("read jesd204b 0x10  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x1C, &u32data);
+//        printf("read jesd204b 0x1C  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x20, &u32data);
+//        printf("read jesd204b 0x20  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x24, &u32data);
+//        printf("read jesd204b 0x24  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x28, &u32data);
+//        printf("read jesd204b 0x28  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x2C, &u32data);
+//        printf("read jesd204b 0x2C  = 0x%x\n", u32data);
+//        fpga_i2c_sim_spi_read(0x38, &u32data);
+//        printf("read jesd204b 0x38  = 0x%x\n", u32data);
+
+
+        usleep(5000000);
+    }
+}
+
+
+static void dac38j82_setup(DAC38J82_CFG_STEP step, uint32 u32freqMHz, int cw)
+{
+    u16 u16data = 0;
+
+
+    /* 1. Set TXENABLE Low . @ FPGA 0xB8*/ /* Has do it at jesd cfg function , done */
+    /* 2. supply all 0.9v */
+    /* 3. RESET JTAG by set TRSTB Low. @regmap-config*/
+    /* 4. Start DACCLK, 2871 give */
+
+    if(step == DAC38J82_CFG_STEP_ONE) {
+        /* 5. RESETB Low to reset SIF register */
+        /*  bit0[mem_sif_reset] : 1
+            bit4[NCO_ena] : 1 ,
+            bit6[ mixer_ena] : 1 ,
+            bit7[sif4_ena] : 1
+            bit13[zero_invalid_data] : 1
+        */
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG2,  (cw==0) ? 0x20D3:0x20F3);
+        log_printf(LOG_DEBUG,I_NOUSED,"only [step 0] set config2, nco en, mixer en, sif4 en, zero invalid data, sif rst 1\n");
+
+        spi_read_dac38j82(REGMAP_ADDR_CONFIG127, &u16data);
+        log_printf(LOG_DEBUG,I_NOUSED,"one read config127=0x%x. Vendor ID is %s 1 .\n",u16data, (0x08&u16data)?" ":"not");
+    }
+
+    if(cw == 0)
+        cw_cfg_config_12_13(0);
+
+    /* 6. Program the DAC PLL settings (config26, config49, config50, config51).
+     If the PLL is not used, set pll_sleep and pll_reset to 1 and pll_ena to 0.
+     pll_sleep : 1 */
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG26, 0x0023); // 0x0020 0x00A7 0x0020 0x0127
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG27, 0x0000); // 0x8000 0x0000
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG47, 0x0000);
+    // pll_n 1/5-> 0  ,  pll_n 2/5-> 0, pll_ena -> 0 ,pll_reset -> 1
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG49, 0x1018);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG50, 0x0400);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG51, 0x8000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG7,  0x0000);
+
+
+    /* 7.Program the SERDES settings (config61, config62) including the serdes_clk_sel and serdes_refclk_div. */
+    // cfg 59 - serdes_refclk_div --* 0x1800--->0x0800-->0x0000 0x1800 0x0800 0x1800
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG59, 0x1800);
+    //0x0028 - 0x0050 0x0028
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG60, 0x0028);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG61, 0x0088);
+    // 0x108 -> 0x128 -0x0108 0x128 0x8128 0x128
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG62, 0x0128);
+
+
+    /* 8. Program the SERDES lane settings (config63, config71, config73, config74, config96). */
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG63, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG70, 0x0044);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG71, 0x190A);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG72, 0x31C5); // subclass2 : 0x31C5 -0x31C1 0x31C5
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG73, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG96, 0x4567);
+
+
+    /* 9.Program clkjesd_div, cdrvser_sysref_mode, and interp */
+    // cfg37 log: 0x8000->0x6000 -0x0000!!!-->0x6000-0x0000-0x8000-0x6000 0x8000 0x6000 0x8000 0x6000
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG37, 0x6000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG36, 0x0000);
+    // 0x818--0x418--0x818 0x218 0x0018-0x818
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG0,  0x281A);// 0x0818 0x2818 281A
+
+
+    /* 10. Program the JESD settings (config3, config74-77, config79, config80-85, config92, config97). */
+    if(step == DAC38J82_CFG_STEP_ONE){
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG3,  (cw==0)?0xC080:0x2080 ); //0xF080 -- > 0xF081 0xC081 0xD081 0xC081 0xE081 0xc081 0xc080
+        log_printf(LOG_DEBUG,I_NOUSED,"step 0 set config3 0xC080, sif_txenable 0\n");
+    }else{
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG3,  (cw==0)?0xC081:0x2081);  // 0xC081 0xF081  0xC081
+        log_printf(LOG_DEBUG,I_NOUSED,"step 1 set config3 0xC081, sif_txenable 1\n");
+    }
+
+
+    // dual 1
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG74, 0x013E);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG75, 0x0003);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG76, 0x1F00);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG77, 0x0100);
+    // 0x0F0F - 0x0F2F
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG78, 0x0F2F);
+    //0x1cc1  0x1c41 -0x1c01 0x1c41 0x1cc1
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG79, 0x1CC1);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG80, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG81, 0x00ff);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG82, 0x00ff);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG83, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG84, 0x00ff);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG85, 0x00ff);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG92, 0x1100);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG94, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG95, 0x0123);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG97, 0x0013);
+
+
+    /* 11. Program the DIG block settings
+    (NCO, PA protection  <page 74config 32>, QMC, fractional delay, etc.)
+    and set the preferred SYNC modes for the digital blocks (config30-32). */
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG2,  (cw==0) ? 0x20D2 : 0x20F2);     // NCO_ena  mixer enable  0x20D2-0x20F2 0x2092 0x20D2
+    log_printf(LOG_DEBUG,I_NOUSED,"set config2, nco en, mixer en, sif4 en, zero invalid data; \n");
+    if(step == DAC38J82_CFG_STEP_TWO  && cw == 1)
+        cw_cfg_config_12_13(1);
+
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG16, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG18, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG19, 0x0000);
+
+    dac38j82_set_freq(u32freqMHz);
+
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG30, 0x1111);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG31, 0x1142); // sif sync --> 1
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG31, 0x1140); // sif sync --> 0
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG32, 0x0000);
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG34, 0x1B00); // 0x1B1B 0x0b0b 0x1B1B
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG38, 0x3001); // mem_dither_zero[15:15] 0x3001 0x3000 0x0000  0x3001
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG1,  0x0000); // 0x0080
+
+    /* 12 .  Verify the SERDES PLL lock status by checking the SERDES PLL alarms:
+        alarm_rw0_pll (alarm for lanes 0 through 3),
+        alarm_rw1_pll (alarm for lanes 4 through 7).*/
+    spi_read_dac38j82(REGMAP_ADDR_CONFIG108, &u16data);
+    #if 0
+    if(u16data & 0x02)
+        log_printf(LOG_DEBUG,I_NOUSED,"alarm_rw1_pll alarm!\n");
+    if(u16data & 0x04)
+        log_printf(LOG_DEBUG,I_NOUSED,"alarm_rw0_pll alarm!\n");
+    #endif
+
+    /* 13. Set init_state to "0000" and jesd_reset_n to "1" to start the JESD204B link initialization.*/
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG74, 0x0101); // state clear
+
+
+    /* 14 .Start the SYSREF generation. */
+    /* 15. Enable transmission of data by asserting the TXENABLE pin or setting sif_txenable to “1”. */
+    if(step == DAC38J82_CFG_STEP_ONE)
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG3,  (cw==0) ? 0xC081 : 0x2081);
+
+    /* 16. Clear the alarms, then wait approximately 1-2µs and check values. */
+    /*
+    for( i = 0; i < 9; i++){
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG100+i, 0x0000);
+        usleep(2);
+    }
+    */
+
+    /* 17. Verify that DAC output is the desired output */
+    jesd_reset_by_fpga();
+
+}
+
+/*****************************************************************************
+ * Function      : cfg_dac38j82
+ * Description   :
+ init setup
+1. Set TXENABLE low.
+2. Supply all 0.9-V supplies (VDDDIG09, VDDT09, VDDDAC09, VDDCLK09), all 1.8-V supplies (VDDR18,
+VDDS18, VQPS18, VDDIO18, VDDAPLL18, VDDAREF18), and all 3.3-V supplies (VDDADAC33). The
+supplies can be powered up simultaneously or in any order. There are no specific requirements on the ramp
+rate for the supplies.
+3. RESET the JTAG port by either toggling TRSTB low if using the JTAG port or holding TRSTB low if not using JTAG.
+4. Start the DACCLK generation.
+5. Toggle RESETB low to reset the SIF registers.
+6. Program the DAC PLL settings (config26, config49, config50, config51). If the PLL is not used, set pll_sleep
+and pll_reset to “1” and pll_ena to “0”.
+7. Program the SERDES settings (config61, config62) including the serdes_clk_sel and serdes_refclk_div.
+8. Program the SERDES lane settings (config63, config71, config73, config74, config96).
+9. Program clkjesd_div, cdrvser_sysref_mode, and interp.
+10. Program the JESD settings (config3, config74-77, config79, config80-85, config92, config97).
+11. Program the DIG block settings (NCO, PA protection, QMC, fractional delay, etc.) and set the preferred
+SYNC modes for the digital blocks (config30-32).
+12. Verify the SERDES PLL lock status by checking the SERDES PLL alarms: alarm_rw0_pll (alarm for lanes 0
+through 3) and alarm_rw1_pll (alarm for lanes 4 through 7).
+13. Set init_state to “0000” and jesd_reset_n to “1” to start the JESD204B link initialization.
+14. Start the SYSREF generation.
+15. Enable transmission of data by asserting the TXENABLE pin or setting sif_txenable to “1”.
+16. Clear the alarms, then wait approximately 1-2µs and check values.
+17. Verify that DAC output is the desired output
+
+ * Input         : void
+ * Output        : None
+ * Return        :
+ * Others        :
+ * Record
+ * 1.Date        : 20220117
+ *   Author      : Shu.Wang
+ *   Modification: Created function
+
+SPI
+
+*****************************************************************************/
+int cfg_dac38j82(uint8 txfreq, int cw)
+{
+    log_printf(LOG_DEBUG,I_NOUSED,"\n\n============38j82 start==================\n");
+    u16 u16data = 0;
+    int i = 0;
+    uint32 u32FreqMHz = 0;
+
+    u32FreqMHz = txfreq_to_hz(txfreq);
+    log_printf(LOG_DEBUG,I_NOUSED,"u32FreqMHz=%dMHz\n", u32FreqMHz);
+
+
+    if(init_38j82_flg == 0){
+        spi_dac38j82_init();
+        init_38j82_flg = 1;
+    }
+
+
+    cfg_jesd204b();
+    dac38j82_setup(DAC38J82_CFG_STEP_ONE, u32FreqMHz, cw);
+
+
+    /* Do cfg DAC38j82 option once again. */
+    log_printf(LOG_DEBUG,I_NOUSED,"\n\n [%s,%d] do jesd and 38j82 cfg again.\n\n",__FUNCTION__,__LINE__);
+    cfg_jesd204b();
+    spi_write_dac38j82(REGMAP_ADDR_CONFIG3,  (cw==0)? 0xC081 : 0x2081); // bit0:mem_sif_txenable 1
+    spi_read_dac38j82(REGMAP_ADDR_CONFIG127, &u16data);
+    log_printf(LOG_DEBUG,I_NOUSED,"222[%s,%d] read config127 = 0x%x.   Vendor ID is %s 1 .\n",__FUNCTION__,__LINE__,u16data, (0x08&u16data)?" ":"not");
+    dac38j82_setup(DAC38J82_CFG_STEP_TWO, u32FreqMHz, cw);
+
+
+
+    for( i = 0; i < 9; i++) {
+        spi_write_dac38j82(REGMAP_ADDR_CONFIG100+i, 0x0000);
+        usleep(2);
+        spi_read_dac38j82(REGMAP_ADDR_CONFIG100+i, &u16data);
+        if(u16data && i==0) {
+            printf("alarm [config%d] 0x%x\n", REGMAP_ADDR_CONFIG100+i, u16data);
+        }
+    }
+    log_printf(LOG_DEBUG,I_NOUSED,"\n============38j82 end==================\n\n");
+
+	return 0;
+}
+
+
+void chang_freq(int freq_changed)
+{
+    if(freq_changed > 1 || freq_changed <= 0)
+        return;
+
+    if(freq_changed){
+		turn_off_rf_agc_state(E_CHG_TX_FREQ);
+	
+        cfg_dac38j82(atsc_para.rf_para.txfreq, atsc_para.ad3_para.cw);
+    }
+
+    return;
+}
+
+
+void chang_cw(int cw_changed)
+{
+    if(cw_changed > 1 || cw_changed <= 0)
+        return ;
+
+    if(cw_changed) {
+		turn_off_rf_agc_state(E_CHG_CW);
+		
+        if(atsc_para.ad3_para.cw == 0)
+            cw_cfg(0);
+
+        cfg_dac38j82(atsc_para.rf_para.txfreq, atsc_para.ad3_para.cw);
+
+
+        if(atsc_para.ad3_para.cw == 1)
+            cw_cfg(1);
+    }
+}
+#endif //USE_38J82
+
+
+

atsc_app/bsp/delay.c

@@ -0,0 +1,109 @@
+/*************************************************************************
+系统延时相关函数
+
+***************************************************************************/
+
+/*
+#include "stm32f4xx.h"
+#include "type.h"
+#include "os_task.h"
+#include "FreeRTOS.h"
+*/
+#include "../inc/type.h"
+#include "../inc/delay.h"
+#include "../inc/isys_com.h"
+
+#include <unistd.h>
+extern volatile uint32 sys_ready;
+//extern SYS_TASK  sys_task;
+
+void delay_ms(uint32 nms)
+{
+
+	usleep(nms*1000);
+}
+
+void delay_us(uint32 nus)
+{
+    uint32 index = 0;
+    //系统钟168M,  循环一次4条指令, 42*4 = 168 约为1us
+    //系统钟396M,  循环一次4条指令, 99*4 = 396 约为1us
+    //for(index = (42 * nus); index != 0; index--)
+    for(index = (99 * nus); index != 0; index--)
+    {
+        ;
+    }
+
+    //usleep(nus);
+}
+
+void idelay_us(uint32 nus)
+{
+    usleep(nus);
+}
+
+/*
+void delay_us(uint32 nus)
+{
+    uint32 index = 0;
+    //系统钟168M,  循环一次4条指令, 42*4 = 168 约为1us
+    for(index = (42 * nus); index != 0; index--)
+    {
+        ;
+    }
+}*/
+
+uint32 check_delay_over(uint32 *ptick,uint32 cycle)
+{
+
+    unsigned long tick_bak = get_sys_tick();
+    //printf("cur_tick =%d\n",tick_bak);
+    if((*ptick)+cycle>tick_bak)//延时还没到。
+        return 0;
+    else
+    {
+        *ptick=get_sys_tick();
+        return 1;
+    }
+}
+void delay_ticks(uint32 ticks)
+{
+    if(!ticks)
+        return;
+
+    /*if(sys_ready)
+    {
+        vTaskDelay(ticks);
+    }
+    else
+    {
+        uint32 index = 0;
+
+        for(index = (41000 * OS_PER_TICK_MS*ticks); index != 0; index--)
+        {
+            ;
+        }
+    }*/
+
+	delay_ms(ticks*10);
+}
+
+void task_delay(uint32 nms)
+{
+    uint32 task_id;
+
+    /*if(!sys_ready)
+    {
+        delay_ms(nms);
+    }
+    get_current_task_id(&task_id);
+    if(task_id>=MAX_TASK)
+        return;
+
+    sys_task.pause[task_id] = (nms+999)/1000;  //转换为秒
+    vTaskDelay((nms +(OS_PER_TICK_MS-1)) / OS_PER_TICK_MS); //转化为tick值 处理结果,向上对齐 最小时间为10ms
+    sys_task.pause[task_id] = 0;
+	*/
+	usleep(nms*1000);
+}
+

atsc_app/bsp/flash.c

@@ -0,0 +1,407 @@
+#include <string.h>
+#include "type.h"
+
+//#include "stm32f4xx_spi.h"
+//#include "stm32f4xx_gpio.h"
+//#include "stm32f4xx_hal.h"
+
+#include "stm32f4xx_spi.h"
+#include "stm32f4xx_gpio.h"
+
+
+#include "config.h"
+#include "os_task.h"
+#include "delay.h"
+#include "flash.h"
+#include "sys_config.h"
+
+#if USE_SPI_FLASH
+
+#define SST25_SECTOR_PER_SIZE     (4096)               //一个扇区为4kB
+#define SST25_TOTAL_SIZE          (4*1024*1024*2/8)      //总大小为4Mb 512*2KB 128个扇区
+
+#define SST25_TOTAL_SECTOR_NUM    (SST25_TOTAL_SIZE/SST25_SECTOR_PER_SIZE)
+
+#define FLASH_SPI                  SPI1
+
+#define SST25_SELECT()             do{GPIO_ResetBits(GPIOA,GPIO_Pin_4);}while(0)
+#define SST25_DESELECT()           do{GPIO_SetBits(GPIOA,GPIO_Pin_4);}while(0)
+
+
+#define SST25_READDATA                         0x03
+#define SST25_FASTREADDATA                     0x0B
+#define SST25_4KBYTE_BLOCKERASE                0x20
+#define SST25_32KBYTE_BLOCKERASE               0x52
+#define SST25_64KBYTE_BLOCKERASE               0xD8
+#define SST25_CHIPERASE                        0xC7
+#define SST25_BYTEPORGRAM                      0x02
+#define SST25_AAI_WORDPROGRAM                  0xAD
+#define SST25_READSTATUSREG                    0x05
+#define SST25_ENABLEWRITESTATUSREG             0x50
+#define SST25_WRITESTATUSREG                   0x01
+#define SST25_WRITEENABLE                      0x06
+#define SST25_WRITEDISABLE                     0x04
+#define SST25_DEVICEID                         0x90
+#define SST25_JEDECDEVICEID                    0x9F
+#define SST25_EBSY                             0x70
+#define SST25_DBSY                             0x80
+
+//extern SPI_HandleTypeDef hspi1;
+
+static uint8 spi1_read_byte(void)
+{
+    while (SPI_I2S_GetFlagStatus(FLASH_SPI, SPI_I2S_FLAG_TXE) == RESET);
+    SPI_I2S_SendData(FLASH_SPI,0xff);
+    while (SPI_I2S_GetFlagStatus(FLASH_SPI, SPI_I2S_FLAG_RXNE) == RESET);
+    return (SPI_I2S_ReceiveData(FLASH_SPI));
+}
+static void spi1_write_byte(uint8 byte)
+{
+    while (SPI_I2S_GetFlagStatus(FLASH_SPI, SPI_I2S_FLAG_TXE) == RESET);
+    SPI_I2S_SendData(FLASH_SPI, byte);
+    while (SPI_I2S_GetFlagStatus(FLASH_SPI, SPI_I2S_FLAG_RXNE) == RESET);
+    (void)SPI_I2S_ReceiveData(FLASH_SPI);
+}
+/******************************************
+写一个命令
+******************************************/
+void sst25_write_cmd(uint8 cmd)
+{
+    SST25_SELECT();
+    spi1_write_byte(cmd);
+    SST25_DESELECT();
+}
+
+/******************************************
+写一个命令一个数据
+******************************************/
+void sst25_write_cmd_data(uint8 cmd,uint8 data)
+{
+    SST25_SELECT();
+    spi1_write_byte(cmd);
+    spi1_write_byte(data);
+    SST25_DESELECT();
+}
+/******************************************
+写一个命令三个数据
+******************************************/
+void sst25_write_cmd_data3(uint8 cmd, uint8* data)
+{
+    SST25_SELECT();
+    spi1_write_byte(cmd);
+    spi1_write_byte(*data++);
+    spi1_write_byte(*data++);
+    spi1_write_byte(*data);
+    SST25_DESELECT();
+}
+/******************************************
+写一个命令返回一个数据
+******************************************/
+uint8 sst25_read_data(uint8 cmd)
+{
+    uint8 temp;
+
+    SST25_SELECT();
+    spi1_write_byte(cmd);
+    temp = spi1_read_byte();
+    SST25_DESELECT();
+    return temp;
+}
+
+/******************************************
+写一个命令,三个地址 返回多个数据
+******************************************/
+void sst25_read_datas(uint8 cmd,uint8 *addr,uint8 *data,uint32 no)
+{
+    uint16 i;
+
+    SST25_SELECT();
+    spi1_write_byte(cmd);
+    spi1_write_byte(*addr++);
+    spi1_write_byte(*addr++);
+    spi1_write_byte(*addr);
+    for(i=0;i<no;i++)
+    {
+        data[i] = spi1_read_byte();
+    }
+    SST25_DESELECT();
+}
+/******************************************
+SST25读取状态寄存器
+******************************************/
+uint8 sst25_readsr(void)
+{
+    uint8 sr;
+
+    sr = sst25_read_data(SST25_READSTATUSREG);
+    return sr;
+}
+/******************************************
+SST25写状态寄存器
+******************************************/
+void sst25_writesr(uint8 cmd)
+{
+    sst25_write_cmd(SST25_ENABLEWRITESTATUSREG);
+    sst25_write_cmd_data(SST25_WRITESTATUSREG,cmd);
+}
+/******************************************
+SST25写使能
+******************************************/
+void sst25_wren(void)
+{
+    sst25_write_cmd(SST25_WRITEENABLE);
+}
+/******************************************
+SST25写失能
+******************************************/
+void sst25_wrdi(void)
+{
+    sst25_write_cmd(SST25_WRITEDISABLE);
+}
+/******************************************
+SST25忙检测
+1 忙
+******************************************/
+void sst25_wait_busy(void)
+{
+    while(sst25_readsr()&0x01);
+}
+/******************************************
+SST25允许软件写保护
+******************************************/
+void sst25_wpen(void)
+{
+    uint8 sta;
+
+    sta = sst25_read_data(SST25_READSTATUSREG)|0x1c;
+    sst25_write_cmd(SST25_ENABLEWRITESTATUSREG);
+    sst25_write_cmd_data(0x01,sta);
+}
+/******************************************
+SST25先取消保护位，再允许写
+******************************************/
+void sst25_writeen(void)
+{
+    uint8 sta;
+
+    sta = sst25_read_data(SST25_READSTATUSREG)&(~0x0c);
+    sst25_write_cmd(SST25_ENABLEWRITESTATUSREG);
+    sst25_write_cmd(0xff);
+    sst25_write_cmd_data(SST25_WRITESTATUSREG,sta);
+    sst25_write_cmd(SST25_WRITEENABLE);
+}
+/******************************************
+SST25 读芯片ID
+******************************************/
+uint16 sst25_readid(void)
+{
+    uint8 id[3]= {0,};
+    uint8 addr[3] = {0,0,0};
+
+    sst25_read_datas(SST25_DEVICEID,addr,id,2);
+    return ((id[0]<<8)+id[1]);
+}
+/******************************************
+SST25 擦除整块flash
+******************************************/
+void sst25_chip_erase(void)
+{
+    sst25_writesr(0x02);
+    sst25_wren();
+    sst25_write_cmd(SST25_CHIPERASE);
+    sst25_wait_busy();
+}
+/******************************************
+SST25 擦除扇区
+******************************************/
+void sst25_sector_erase(uint32 addr)
+{
+    uint8 ad[3]={0,};
+
+    ad[0] = ((addr>>16)&0xff);
+    ad[1] = ((addr>>8)&0xff);
+    ad[2] = (addr&0xff);
+
+    sst25_writesr(0x02);
+    sst25_wren();
+    SST25_SELECT();
+    spi1_write_byte(SST25_4KBYTE_BLOCKERASE);
+    spi1_write_byte(ad[0]);
+    spi1_write_byte(ad[1]);
+    spi1_write_byte(ad[2]);
+    SST25_DESELECT();
+
+    sst25_wait_busy();
+}
+/******************************************
+SST25 写入一个字节
+
+******************************************/
+void sst25_byte_write(uint32 addr,uint8 byte)
+{
+    sst25_writesr(0x02);
+    sst25_wren();
+    SST25_SELECT();
+    spi1_write_byte(SST25_BYTEPORGRAM);
+    spi1_write_byte((addr>>16)&0xff);
+    spi1_write_byte((addr>>8)&0xff);
+    spi1_write_byte(addr&0xff);
+    spi1_write_byte(byte);
+    SST25_DESELECT();
+    sst25_wait_busy();
+}
+/******************************************
+SST25 写入多个字节
+
+******************************************/
+void sst25_datas_write(uint32 addr,uint8 *buf,uint32 no)
+{
+    uint32 cnt;
+
+    if(no == 0)
+        return;
+
+    sst25_writesr(0x02);
+    sst25_wren();
+    if(no == 1)
+    {
+        sst25_byte_write(addr,*buf);
+    }
+
+    else
+    {
+        cnt = no;
+        SST25_SELECT();
+        spi1_write_byte(SST25_AAI_WORDPROGRAM);
+        spi1_write_byte((addr>>16)&0xff);
+        spi1_write_byte((addr>>8)&0xff);
+        spi1_write_byte(addr&0xff);
+        spi1_write_byte(*buf++);
+        spi1_write_byte(*buf++);
+        SST25_DESELECT();
+        cnt-=2;
+        sst25_wait_busy();
+
+        for(;cnt>1;cnt-=2)
+        {
+            SST25_SELECT();
+            spi1_write_byte(SST25_AAI_WORDPROGRAM);
+            spi1_write_byte(*buf++);
+            spi1_write_byte(*buf++);
+            SST25_DESELECT();
+            sst25_wait_busy();
+        }
+        sst25_wrdi();
+
+        if(cnt == 1)
+        {
+            sst25_wren();
+            sst25_byte_write(addr+no-1,*buf);
+        }
+    }
+    sst25_wpen();
+}
+/******************************************
+SST25 高速读
+
+******************************************/
+void sst25_readh(uint32 addr,uint8 *buf,uint32 no)
+{
+    uint16 i;
+
+    SST25_SELECT();
+    spi1_write_byte(SST25_FASTREADDATA);
+    spi1_write_byte((uint8)(addr>>16)&0xff);
+    spi1_write_byte((uint8)(addr>>8)&0xff);
+    spi1_write_byte((uint8)addr&0xff);
+    spi1_write_byte(0xff);
+
+    for(i=0;i<no;i++)
+    {
+        buf[i] = spi1_read_byte();
+    }
+    SST25_DESELECT();
+}
+/******************************************
+SST25 低速读
+
+******************************************/
+void sst25_readl(uint32 addr,uint8 *buf,uint32 no)
+{
+    uint8 ad[3];
+
+    ad[0] = (addr>>16)&0xff;
+    ad[1] = (addr>>8)&0xff;
+    ad[2] = addr&0xff;
+
+    sst25_read_datas(SST25_READDATA,ad,buf,no);
+}
+void flash_write_byte(uint8 byte,uint32 addr)
+{
+    uint32 secpos;
+
+    secpos = addr/SST25_SECTOR_PER_SIZE;
+    if(secpos>=SST25_TOTAL_SECTOR_NUM)
+        return;
+
+    sst25_sector_erase(secpos);
+    sst25_byte_write(addr,byte);
+}
+void flash_write_buf(uint8 *buf,uint32 num,uint32 addr)
+{
+    uint32 secpos;
+
+    secpos = addr/SST25_SECTOR_PER_SIZE;
+    if(secpos >= SST25_TOTAL_SECTOR_NUM)
+        return;
+
+    if(addr+num>SST25_TOTAL_SIZE)
+        num = SST25_TOTAL_SIZE - addr;
+
+    sst25_datas_write(addr, buf, num);
+}
+
+void flash_erase_sector(uint32 start_address,uint32 num)
+{
+    uint32 secpos,secoff,secremain;
+    uint16 secnum=0;
+    int32 i = 0;
+
+    secpos = start_address/SST25_SECTOR_PER_SIZE;
+    if(secpos >= SST25_TOTAL_SECTOR_NUM)
+        return;
+
+    if(start_address+num>SST25_TOTAL_SIZE)
+        num = SST25_TOTAL_SIZE - start_address;
+
+    secoff = start_address%SST25_SECTOR_PER_SIZE;
+    secremain = SST25_SECTOR_PER_SIZE-secoff;
+
+    if(num < secremain)
+    {
+        secnum = 1;
+    }
+    else
+    {
+        secnum = 1;
+        i = num -secremain;
+        do
+        {
+            secnum++;
+            i = i - SST25_SECTOR_PER_SIZE;
+        }while(i>0);
+    }
+
+    for(i=0;i<secnum;i++)
+    {
+        sst25_sector_erase((secpos+i)*SST25_SECTOR_PER_SIZE);
+    }
+}
+void flash_read_buf(uint8 *buf,uint32 len,uint32 addr)
+{
+    if(addr >= SST25_TOTAL_SIZE)
+        return;
+    sst25_readl(addr,buf,len);
+}
+
+#endif

atsc_app/bsp/general_api.c

@@ -0,0 +1,139 @@
+/******************************************************************************
+
+                  版权所有 (C), 2001-2011, 上海全波通信技术有限公司
+
+ ******************************************************************************
+  文 件 名   : general_api.c
+  版 本 号   : 初稿
+  作    者   : 郭金涛
+  生成日期   : 2013年7月31日
+  最近修改   :
+  功能描述   : 一些通用功能函数实现
+  函数列表   :
+  修改历史   :
+  1.日    期   : 2013年7月31日
+    作    者   : 郭金涛
+    修改内容   : 创建文件
+
+******************************************************************************/
+#include "../inc/general_api.h"
+#include <string.h>
+uint8 get_check_sum(void *p,uint32 len)
+{
+    uint8 sum = 0;
+    uint8 *pstr = (uint8*)p;
+
+    while(len--)
+        sum+=*pstr++;
+    return sum;
+}
+
+/***********************************************************/
+//CRC-16-CCITT(x16+x12+x5+1(0x1021))
+/***********************************************************/
+uint16 cal_crc_zb(const uint8 *ptr, uint32 len)
+{
+    uint16  crc = 0;
+    uint8 da;
+    static const uint16  crc_ta[256] = { // CRC 余式表 //
+          0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7,
+          0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef,
+          0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6,
+          0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de,
+          0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485,
+          0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d,
+          0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4,
+          0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc,
+          0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823,
+          0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b,
+          0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12,
+          0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a,
+          0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41,
+          0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49,
+          0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70,
+          0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78,
+          0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f,
+          0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067,
+          0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e,
+          0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256,
+          0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d,
+          0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405,
+          0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c,
+          0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634,
+          0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab,
+          0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3,
+          0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a,
+          0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92,
+          0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9,
+          0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1,
+          0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8,
+          0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0
+    };
+
+    while(len--)
+    {
+        da=(uint8) (crc/256); // 以8 位二进制数的形式暂存CRC 的高8 位 //
+        crc<<=8; // 左移8 位，相当于CRC 的低8 位乘以28 //
+        crc^=crc_ta[da^*ptr]; // 高8 位和当前字节相加后再查表求CRC ，再加上以前的CRC //
+        ptr++;
+    }
+    return crc;
+}
+
+void str_trunc_space(char *pstr)
+{
+    uint32 len = strlen(pstr);
+
+    while(len)
+    {   //在最后面若有空格,则置为0
+        if(pstr[len-1]==' ')
+        {
+            pstr[len-1]=0;
+            len--;
+        }
+        else
+        {
+            return;
+        }
+    }
+}
+
+uint8 bcd2byte(uint8 bcd)
+{
+    uint8 tmp = 0;
+
+    tmp = ((uint8)(bcd & (uint8)0xF0) >> (uint8)0x4) * 10;
+    return (tmp + (bcd & (uint8)0x0F));
+}
+
+uint8 byte2bcd(uint8 value)
+{
+    uint8 bcdhigh = 0;
+
+    while (value >= 10)
+    {
+        bcdhigh++;
+        value -= 10;
+    }
+
+    return  ((uint8)(bcdhigh << 4) | value);
+}
+/*
+__inline  __asm uint32 asm_rev_l(uint32 data)
+{
+        REV     R0,R0;
+        bx      lr;
+}
+__inline __asm uint32 asm_rev_s(uint32 data)
+{
+        REV16   R0,R0;
+        bx      lr;
+}
+__inline __asm uint32 asm_rbit_l(uint32 data)
+{
+        RBIT R0,R0;
+        BX   LR;
+}
+*/
+
+

atsc_app/bsp/igpio.c

@@ -0,0 +1,382 @@
+#if 1
+#include <errno.h>
+#include <pthread.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>  //define O_WRONLY and O_RDONLY
+#include "../inc/type.h"
+#include "../inc/igpio.h"
+#include "../inc/isys_com.h"
+
+
+extern int executeCMD(const char *cmd, char *result, u16 result_size);
+pthread_mutex_t  mutex_gpio;
+
+
+#define DIR_OUT_VAL      "out"
+#define DIR_IN_VAL       "in"
+#define GP_VAL_H         "1"
+#define GP_VAL_L         "0"
+
+
+int set_gpio_export(uint16_t gp_num)
+{
+#if SHELL_CTRL_GPIO
+    char cmd[300];
+    memset(cmd, 0, sizeof(cmd));
+    sprintf(cmd, "echo %d > /sys/class/gpio/export",gp_num);
+    system(cmd);
+#else
+	int  fd;
+    char s_gp_num[20];
+
+    pthread_mutex_lock(&mutex_gpio);
+    fd = open("/sys/class/gpio/export", O_WRONLY);
+    if(fd == -1) {
+		pthread_mutex_unlock(&mutex_gpio);
+        log_printf(LOG_ERR, I_NOUSED, "gpio %d pin open-export error.\n", gp_num);
+        return -1;
+    }
+    memset(s_gp_num,0,sizeof(s_gp_num));
+    sprintf(s_gp_num,"%d",gp_num);
+    write(fd, s_gp_num ,strlen(s_gp_num));
+	close(fd);
+	pthread_mutex_unlock(&mutex_gpio);
+#endif
+    return 0;
+}
+
+
+
+int set_gpio_unexport(uint16_t gp_num)
+{
+#if SHELL_CTRL_GPIO
+    char cmd[300];
+    memset(cmd, 0, sizeof(cmd));
+    sprintf(cmd, "echo %d > /sys/class/gpio/unexport",gp_num);
+    system(cmd);
+#else
+	int  fd;
+    char s_gp_num[20];
+
+	pthread_mutex_lock(&mutex_gpio);
+    fd = open("/sys/class/gpio/unexport", O_WRONLY);
+    if(fd == -1){
+    	pthread_mutex_unlock(&mutex_gpio);
+        log_printf(LOG_ERR,I_NOUSED,"ERR: gpio %d pin open-unexport error.\n",gp_num);
+        return -1;
+    }
+    log_printf(LOG_DEBUG,I_NOUSED,".setxpt sys/gpio/class/gpio/unexport");
+
+    memset(s_gp_num,0,sizeof(s_gp_num));
+    sprintf(s_gp_num,"%d",gp_num);
+
+    write(fd, s_gp_num ,strlen(s_gp_num));
+    close(fd);
+	pthread_mutex_unlock(&mutex_gpio);
+#endif
+    return 0;
+}
+
+
+int set_gpio_io_direct(uint16_t gp_num,E_IO io_dir)
+{
+	int  fd;
+    char cmd[300];
+    memset(cmd, 0, sizeof(cmd));
+
+#if SHELL_CTRL_GPIO
+    sprintf(cmd, "echo %s > /sys/class/gpio/gpio%d/direction",(io_dir==E_IO_OUT?"out":"in"),gp_num);
+    system(cmd);
+#else
+	
+    if(io_dir==E_IO_OUT) {
+        sprintf(cmd, "/sys/class/gpio/gpio%d/direction",gp_num);
+    }
+    else{//E_IO_IN
+        sprintf(cmd, "/sys/class/gpio/gpio%d/direction",gp_num);
+    }
+
+	pthread_mutex_lock(&mutex_gpio);
+    fd = open(cmd, O_WRONLY);
+    if(fd == -1) {
+		pthread_mutex_unlock(&mutex_gpio);
+        log_printf(LOG_ERR, I_NOUSED, "set io_dir, gpio %d pin open-direction error.\n",gp_num);
+        return -1;
+    }
+    if(io_dir==E_IO_OUT) {
+        write(fd, DIR_OUT_VAL, sizeof(DIR_OUT_VAL));
+    }
+    else{
+        write(fd, DIR_IN_VAL, sizeof(DIR_IN_VAL));
+    }
+	close(fd);
+	pthread_mutex_unlock(&mutex_gpio);
+#endif
+    return 0;
+}
+
+
+int set_gpio_value(uint16_t gp_num, E_IO_VAL val)
+{
+	int  fd;
+    char cmd[200];
+    memset(cmd, 0, sizeof(cmd));
+
+#if SHELL_CTRL_GPIO
+    sprintf(cmd, "echo %d > /sys/class/gpio/gpio%d/value",val,gp_num);
+    system(cmd);
+#else
+	char   logbuf[50]={0};
+    sprintf(cmd, "/sys/class/gpio/gpio%d/value",gp_num);
+
+	pthread_mutex_lock(&mutex_gpio);
+    fd = open(cmd, O_WRONLY);
+    if(fd == -1){
+    	pthread_mutex_unlock(&mutex_gpio);
+    	sprintf(logbuf,"error. set_io_val %d open\n",gp_num);
+		usr_sec_printf("%s",logbuf);
+        return -1;
+    }
+
+    if(val==E_IO_H){
+        write(fd, GP_VAL_H, sizeof(GP_VAL_H));
+    }
+    else{
+        write(fd, GP_VAL_L, sizeof(GP_VAL_L));
+    }
+	close(fd);
+	pthread_mutex_unlock(&mutex_gpio);
+#endif
+    return 0;
+}
+
+int get_gpio_value(uint16_t gp_num, uint8 *pval)
+{
+#if SHELL_CTRL_GPIO
+    char   cmd[300];
+    char   vbuf[20];
+    int ret = 0;
+
+    sprintf(cmd, "cat /sys/class/gpio/gpio%d/value",gp_num);
+    ret = executeCMD(cmd, vbuf, sizeof(cmd));
+    if(ret>=0){
+        *pval = atoi(vbuf);
+    }else{
+        log_printf(LOG_ERR,I_NOUSED,"%s  get value err\n", cmd);
+    }
+#else
+	int    fd;
+    char   cmd[300];
+    char   vbuf[20];
+    uint8  u8val;
+	char   logbuf[50]={0};
+
+    memset(cmd, 0, sizeof(cmd));
+
+    sprintf(cmd, "/sys/class/gpio/gpio%d/value",gp_num);
+	pthread_mutex_lock(&mutex_gpio);
+    fd = open(cmd, O_RDONLY);
+    if(fd == -1){
+    	pthread_mutex_unlock(&mutex_gpio);
+    	sprintf(logbuf,"error. get_io_val %d open\n",gp_num);
+		usr_sec_printf("%s",logbuf);
+        return -1;
+    }
+
+    memset(vbuf,0,sizeof(vbuf));
+	read(fd, vbuf, sizeof(vbuf));
+
+    if(vbuf!=NULL){
+        u8val = atoi(vbuf);
+        *pval = u8val;
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED,"gpio read err\n");
+    }
+	close(fd);
+	pthread_mutex_unlock(&mutex_gpio);
+#endif
+    return 0;
+}
+
+void key_gpio_init(void)
+{
+    /*printf("\n\ninit key gpio unexport.\n");
+    set_gpio_unexport(KEY1_GP_NUM);
+    set_gpio_unexport(KEY2_GP_NUM);
+    set_gpio_unexport(KEY3_GP_NUM);
+    set_gpio_unexport(KEY4_GP_NUM);
+    set_gpio_unexport(KEY5_GP_NUM);
+    set_gpio_unexport(KEY6_GP_NUM);*/
+
+    log_printf(LOG_INFO, I_SYS_STATUS, "init key gpio export\n");
+    set_gpio_export(KEY1_GP_NUM);
+    set_gpio_export(KEY2_GP_NUM);
+    set_gpio_export(KEY3_GP_NUM);
+    set_gpio_export(KEY4_GP_NUM);
+    set_gpio_export(KEY5_GP_NUM);
+    set_gpio_export(KEY6_GP_NUM);
+    log_printf(LOG_INFO, I_SYS_STATUS, "over. init key gpio export\n");
+
+    log_printf(LOG_INFO, I_SYS_STATUS, "init key gpio input\n");
+    set_gpio_io_direct(KEY1_GP_NUM, E_IO_IN);//E_IO_IN
+    set_gpio_io_direct(KEY2_GP_NUM, E_IO_IN);
+    set_gpio_io_direct(KEY3_GP_NUM, E_IO_IN);
+    set_gpio_io_direct(KEY4_GP_NUM, E_IO_IN);
+    set_gpio_io_direct(KEY5_GP_NUM, E_IO_IN);
+    set_gpio_io_direct(KEY6_GP_NUM, E_IO_IN);
+    log_printf(LOG_INFO, I_SYS_STATUS, "over. init key gpio input\n");
+}
+
+#define KEY_GPIO_MAX_NUM    6
+uint8 key_gp_list[KEY_GPIO_MAX_NUM]=
+{
+    KEY1_GP_NUM  ,
+    KEY2_GP_NUM  ,
+    KEY3_GP_NUM  ,
+    KEY4_GP_NUM  ,
+    KEY5_GP_NUM  ,
+    KEY6_GP_NUM  ,
+};
+
+#define LCD_GPIO_MAX_NUM    12
+uint8 lcd_gp_list[LCD_GPIO_MAX_NUM]=
+{
+    LCD_CTL_GP_NUM  ,
+    LCD_RS_GP_NUM   ,
+    LCD_E_GP_NUM    ,
+    LCD_RW_GP_NUM   ,
+    LCD_D1_GP_NUM   ,
+    LCD_D0_GP_NUM   ,
+    LCD_D3_GP_NUM   ,
+    LCD_D2_GP_NUM   ,
+    LCD_D5_GP_NUM   ,
+    LCD_D4_GP_NUM   ,
+    LCD_D7_GP_NUM   ,
+    LCD_D6_GP_NUM   ,
+};
+
+void gpio_mutex_init(void)
+{
+	pthread_mutex_init(&mutex_gpio, NULL);
+}
+
+void fpga_reset_gpio_init(void)
+{
+	set_gpio_export(FPGA_RST_GP_NUM);
+	set_gpio_io_direct(FPGA_RST_GP_NUM,E_IO_OUT);
+}
+
+void lcd_gpio_init(void)
+{
+    log_printf(LOG_INFO, I_SYS_STATUS, "init lcd gpio export\n");
+    set_gpio_export(LCD_CTL_GP_NUM);
+    set_gpio_export(LCD_RS_GP_NUM);
+    set_gpio_export(LCD_E_GP_NUM);
+    set_gpio_export(LCD_RW_GP_NUM);
+    set_gpio_export(LCD_D1_GP_NUM);
+    set_gpio_export(LCD_D0_GP_NUM);
+    set_gpio_export(LCD_D3_GP_NUM);
+    set_gpio_export(LCD_D2_GP_NUM);
+    set_gpio_export(LCD_D5_GP_NUM);
+    set_gpio_export(LCD_D4_GP_NUM);
+    set_gpio_export(LCD_D7_GP_NUM);
+    set_gpio_export(LCD_D6_GP_NUM);
+    log_printf(LOG_INFO, I_SYS_STATUS, "over. init lcd gpio export\n");
+
+
+    log_printf(LOG_INFO, I_SYS_STATUS, "init lcd gpio output\n");
+    set_gpio_io_direct(LCD_CTL_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_RS_GP_NUM, E_IO_OUT);
+    set_gpio_io_direct(LCD_E_GP_NUM,  E_IO_OUT);
+    set_gpio_io_direct(LCD_RW_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D1_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D0_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D3_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D2_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D5_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D4_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D7_GP_NUM,E_IO_OUT);
+    set_gpio_io_direct(LCD_D6_GP_NUM,E_IO_OUT);
+    log_printf(LOG_INFO, I_SYS_STATUS, "over. init lcd gpio output\n");
+
+
+    set_gpio_export(LCD_EN_GP_NUM);
+    set_gpio_io_direct(LCD_EN_GP_NUM, E_IO_OUT);
+    set_gpio_value(LCD_EN_GP_NUM, E_IO_H);
+}
+
+
+
+void i2c_gpio_init(void)
+{
+    log_printf(LOG_DEBUG,I_NOUSED,"\n\n>>>:init i2c gpio export.\n");
+    set_gpio_export(I2C2_SDA_GP_NUM);
+    set_gpio_export(I2C2_SCL_GP_NUM);
+
+    set_gpio_export(I2C1_SDA_GP_NUM);
+    set_gpio_export(I2C1_SCL_GP_NUM);
+    log_printf(LOG_DEBUG,I_NOUSED,"\n\n===:over. init i2c gpio export.\n");
+
+    log_printf(LOG_DEBUG,I_NOUSED,"\n\n>>>:init i2c gpio input.\n");
+    set_gpio_io_direct(I2C2_SDA_GP_NUM, E_IO_OUT);//E_IO_IN
+    set_gpio_io_direct(I2C2_SCL_GP_NUM, E_IO_OUT);
+
+    set_gpio_io_direct(I2C1_SDA_GP_NUM, E_IO_OUT);
+    set_gpio_io_direct(I2C1_SCL_GP_NUM, E_IO_OUT);
+    log_printf(LOG_DEBUG,I_NOUSED,"\n\n===:over. init i2c gpio output.\n");
+}
+
+
+
+
+#if 0//test
+
+void test_gpio_init()
+{
+    key_gpio_init();
+    lcd_gpio_init();
+}
+
+void test_key_lcd_gpio(void)
+{
+
+    static uint32 sec_cnt;
+    uint8  gp=0;
+
+    sec_cnt++;
+
+    for(gp=0;gp<KEY_GPIO_MAX_NUM;gp++){
+        set_gpio_value(key_gp_list[gp], (E_IO_VAL)(sec_cnt%2));
+    }
+
+    for(gp=0;gp<LCD_GPIO_MAX_NUM;gp++){
+        set_gpio_value(lcd_gp_list[gp], (E_IO_VAL)(sec_cnt%2));
+    }
+}
+
+
+#include "time.h"
+void main()
+{
+    int sec_cnt=0;
+    uint8 rdata=0;
+
+    test_gpio_init();
+
+    while(1)
+    {
+        sleep(2);
+        sec_cnt++;
+        test_key_lcd_gpio();
+
+        printf(".test round %d\n",sec_cnt);
+    }
+}
+#endif
+
+#endif
+

atsc_app/bsp/ihttp_get.c

@@ -0,0 +1,70 @@
+/*
+@add
+*/
+
+
+#include <string.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <pthread.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <termios.h>
+#include <errno.h>
+#include <getopt.h>
+#include <string.h>
+#include <stdlib.h>
+#include <arpa/inet.h>
+#include <sched.h>
+#include <time.h>
+
+
+#include "../inc/type.h"
+#include "../inc/delay.h"
+#include "../inc/lcd_task.h"
+#include "../inc/isys_config.h"
+#include "../inc/i2c_drv.h"
+#include "../inc/dpd_proc.h"
+#include "../inc/iuart_user.h"
+#include "../inc/eeprom.h"
+#include "../inc/gps.h"
+#include "../inc/main.h"
+#include "../inc/msg.h"
+#include "../inc/iweb_task.h"
+#include "../inc/general_api.h"
+#include "../inc/isys_com.h"
+#include "../inc/dac38j82.h"
+#include "../inc/os_task.h"
+#include "../inc/config.h"
+
+
+
+uint32 Net_write_RF(uint8 param)
+{
+#if USE_DRY_LOOP
+    if(dryloop_status.rf==INVALID_DATA)
+    {
+        remote_write_rf(param);
+        return UART_PARA_SET_ERR_OK;
+    }
+    else
+#endif
+    {
+        if(atsc_para.ad3_para.rc_cmd==0)  //IO
+        {
+            return UART_PARA_SET_ERR_DRYLOOP;
+        }
+        else        //WEB
+        {
+            remote_write_rf(param);
+            return UART_PARA_SET_ERR_OK;
+        }
+    }
+}
+
+

atsc_app/bsp/ii2c.c

@@ -0,0 +1,101 @@
+#if 1
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>  //define O_WRONLY and O_RDONLY
+
+#include <unistd.h>         /* System V */
+#include <sys/ioctl.h>      /* BSD and Linux */
+#include <stropts.h>        /* XSI STREAMS */
+
+#include "../inc/type.h"
+#include "../inc/igpio.h"
+#include "../inc/ii2c.h"
+//#include <i2c-dev.h>
+#include <linux/i2c-dev.h>
+
+#define __use_imx_i2c__     0
+#if __use_imx_i2c__
+int ii2c_com_init(const char*i2c_node_name,uint8 i2c_addr, int *pfd)
+{
+    int fd=-1;
+    int err;
+
+    fd = open(i2c_node_name, O_RDWR);
+    if(fd < 0)
+    {
+        log_printf(LOG_ERR,I_NOUSED,"i2c open %s err.\n",i2c_node_name);
+        return -1;
+    }
+
+	err = ioctl(fd, I2C_SLAVE, i2c_addr);
+	if (err < 0)
+	{
+	    log_printf(LOG_ERR,I_NOUSED,"can't set i2c dev slave addr.\n");
+        close(fd);
+        return -1;
+	}
+
+    *pfd = fd;
+}
+
+uint8 i2c_write(int fd, uint8 reg, uint8 val)
+{
+    int   retries;
+    uint8 wdata[2];
+    uint8 retLen = 0;
+
+    if(fd<0)
+        return -1;
+
+    wdata[0] = reg;
+    wdata[1] = val;
+
+    for (retries = 2; retries; retries--)
+    {
+        retLen = write(fd, wdata, 2);
+        if(retLen == 2)
+        {
+            return 0;
+        }
+
+        log_printf(LOG_DEBUG,I_NOUSED,"ret writeLen = %d\n",retLen);
+        usleep(1000 * 2);
+    }
+
+    return -1;
+}
+
+uint8 i2c_read(int fd, uint8 reg, uint8 *pval)
+{
+    int   retries;
+    uint8 retLen=0;
+
+    if(fd<0)
+        return -1;
+
+    for (retries = 2; retries; retries--)
+    {
+        retLen = write(fd, &reg, 1);
+
+        if(retLen == 1)
+        {
+            if (read(fd, pval, 1) == 1)
+            {
+                return 0;
+            }
+        }
+
+        log_printf(LOG_DEBUG,I_NOUSED,"ret writeLen = %d\n",retLen);
+        usleep(1000 * 2);
+    }
+
+    return -1;
+}
+#endif//__imx_i2c__
+
+
+#endif
+

atsc_app/bsp/ipara_cfg.c

@@ -0,0 +1,389 @@
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>  //define O_WRONLY and O_RDONLY
+
+#include "../inc/type.h"
+#include "../inc/eeprom.h"
+#include "../inc/ipara_cfg.h"
+#include "../inc/i2c_drv.h"
+#include "../inc/minIni.h"
+#include "../inc/isys_com.h"
+
+
+#define __un_used_ip2ts_i2c__       1
+#define MAP_ARRAY_SIZE(a)  (sizeof(a) / sizeof((a)[0]))
+
+
+
+#if 0 // map
+const S_PARA_IO_ELEMENT g_para_e1_map[65535] =
+{
+    { EEPROM_DEFAULT_PARAM_ADDR, E_HW_SYS_PARA_TYPE, "def_para", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_STANDARD_ADDR, E_HW_SYS_PARA_TYPE, "exc_std", 0, E_NORMAL_FILE_TYPE,  },
+    { EERPOM_RESET_TIME_ADDR, E_HW_SYS_PARA_TYPE, "rst_time", 0, E_NORMAL_FILE_TYPE,  },
+    { EERPOM_NEXT , E_HW_SYS_PARA_TYPE, "next", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ASI_ADDR , E_HW_SYS_PARA_TYPE, "asi", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_ADDR, E_HW_SYS_PARA_TYPE, "dpd", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_NET_ADDR, E_HW_SYS_PARA_TYPE, "net", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_GPS_ADDR, E_HW_SYS_PARA_TYPE, "gps", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_BAUD_ADDR, E_HW_SYS_PARA_TYPE, "baud", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ASI2_ADDR, E_HW_SYS_PARA_TYPE, "asi2", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_INPUT_ADDR, E_HW_SYS_PARA_TYPE, "input", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_SFN_ID_H, E_HW_SYS_PARA_TYPE, "sfn_id_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_SFN_ID_L, E_HW_SYS_PARA_TYPE, "sfn_id_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_CHANNEL_ADDR , E_HW_SYS_PARA_TYPE, "channel", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_RX_CH_ADDR, E_HW_SYS_PARA_TYPE, "rx_ch", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AGC_ADDR, E_HW_SYS_PARA_TYPE, "agc", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_HZ_UIH_ADDR, E_HW_SYS_PARA_TYPE, "hz_ui_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_HZ_UIL_ADDR, E_HW_SYS_PARA_TYPE, "hz_ui_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_POWER_UIH_ADDR, E_HW_SYS_PARA_TYPE, "power_ui_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_POWER_UIL_ADDR, E_HW_SYS_PARA_TYPE, "power_ui_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_CW_ADDR, E_HW_SYS_PARA_TYPE, "cw", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_RF_ADDR, E_HW_SYS_PARA_TYPE, "rf", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_0DBFLAGH_ADDR, E_HW_SYS_PARA_TYPE, "odb_flg_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_0DBFLAGL_ADDR, E_HW_SYS_PARA_TYPE, "odb_flg_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AGC_LAST_ADDR, E_HW_SYS_PARA_TYPE, "agc_last", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_LDPC_QAM_ADDR  , E_HW_SYS_PARA_TYPE, "ldpc_qam", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PN_ADDR, E_HW_SYS_PARA_TYPE, "pn", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ZBPILOT_ADDR, E_HW_SYS_PARA_TYPE, "zbpilot", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_INT_ADDR, E_HW_SYS_PARA_TYPE, "int", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DELAY_ADDR1, E_HW_SYS_PARA_TYPE, "delay_a1", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DELAY_ADDR2, E_HW_SYS_PARA_TYPE, "delay_a2", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DELAY_ADDR3, E_HW_SYS_PARA_TYPE, "delay_a3", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DELAY_ADDR4, E_HW_SYS_PARA_TYPE, "delay_a4", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_TXID_H_ADDR, E_HW_SYS_PARA_TYPE, "txid_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_TXID_L_ADDR, E_HW_SYS_PARA_TYPE, "txid_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_CF_ADDR, E_HW_SYS_PARA_TYPE, "cf", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_SIPDEL_ADDR, E_HW_SYS_PARA_TYPE, "sipdel", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ZP_ADDR, E_HW_SYS_PARA_TYPE, "zp", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DLY_SEC_ADDR, E_HW_SYS_PARA_TYPE, "dly_sec", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_TOD_EXT_ADDR, E_HW_SYS_PARA_TYPE, "tod_ext", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_BPS_ADDR     , E_HW_SYS_PARA_TYPE, "bps", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ID_ADDR, E_HW_SYS_PARA_TYPE, "id", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ID_ADDR_M, E_HW_SYS_PARA_TYPE, "id_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PCR_ADDR     , E_HW_SYS_PARA_TYPE, "pcr", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DS3_ADDR, E_HW_SYS_PARA_TYPE, "ds3", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_HI_ADDR, E_HW_SYS_PARA_TYPE, "hi", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_GNSS_ADDR, E_HW_SYS_PARA_TYPE, "gnss", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_UBLOX_ADDR, E_HW_SYS_PARA_TYPE, "ublox", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AUTO_ADPC_ADDR , E_HW_SYS_PARA_TYPE, "auto_adpc", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_A_DPD_TIME, E_HW_SYS_PARA_TYPE, "a_dpd_time", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_A_DPD_A_SNR, E_HW_SYS_PARA_TYPE, "a_dpd_a_snr", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_A_DPD_A_IMD, E_HW_SYS_PARA_TYPE, "a_dpd_a_imd", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_A_DPD_R_SNR, E_HW_SYS_PARA_TYPE, "a_dpd_r_snr", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_A_DPD_R_IMD, E_HW_SYS_PARA_TYPE, "a_dpd_r_imd", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_A_DPD_C_T, E_HW_SYS_PARA_TYPE, "a_dpd_c_t", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_A_DPD_USE_DPD, E_HW_SYS_PARA_TYPE, "a_dpd_dpd", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AD3_POWER_REF_H, E_HW_SYS_PARA_TYPE, "ad3_pwr_ref_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AD3_POWER_REF_L, E_HW_SYS_PARA_TYPE, "ad3_pwr_ref_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AD3_FWD_CAL, E_HW_SYS_PARA_TYPE, "ad3_fwd_cal", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AD3_BITRATE_THRESHOLD_HH, E_HW_SYS_PARA_TYPE, "ad3_btrate_th_hh", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AD3_BITRATE_THRESHOLD_HL, E_HW_SYS_PARA_TYPE, "ad3_btrate_th_hl", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AD3_BITRATE_THRESHOLD_LH, E_HW_SYS_PARA_TYPE, "ad3_btrate_th_lh", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AD3_BITRATE_THRESHOLD_LL, E_HW_SYS_PARA_TYPE, "ad3_btrate_th_ll", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PA_IP4_ADDR , E_HW_SYS_PARA_TYPE, "pa_ip4", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PA_GATEWAY_ADDR, E_HW_SYS_PARA_TYPE, "pa_gw", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PA_NETMASK_ADDR, E_HW_SYS_PARA_TYPE, "pa_netmask", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AGC_standard_addrH , E_HW_SYS_PARA_TYPE, "agc_std_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AGC_standard_addrL , E_HW_SYS_PARA_TYPE, "agc_std_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PWRVREF_O_HADDR, E_HW_SYS_PARA_TYPE, "pwr_ref0_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PWRVREF_O_LADDR, E_HW_SYS_PARA_TYPE, "pwr_ref0_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PWRVREF_VLDO_ADDR, E_HW_SYS_PARA_TYPE, "pwr_vld0", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_DISTORTION_SW, E_HW_SYS_PARA_TYPE, "dpd_distortion_sw", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_AGC_PWR_L, E_HW_SYS_PARA_TYPE, "dpd_agc_pwr_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_AGC_PWR_H, E_HW_SYS_PARA_TYPE, "dpd_agc_pwr_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_ERR_TH_L, E_HW_SYS_PARA_TYPE, "dpd_err_th_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_ERR_TH_H, E_HW_SYS_PARA_TYPE, "dpd_err_th_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_ERR_CNT_TH, E_HW_SYS_PARA_TYPE, "dpd_err_cnt_th", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_AMP_SAT_TH_L, E_HW_SYS_PARA_TYPE, "dpd_amp_sat_th_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_AMP_SAT_TH_H, E_HW_SYS_PARA_TYPE, "dpd_amp_sat_th_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_TEST_L, E_HW_SYS_PARA_TYPE, "dpd_test_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_TEST_H, E_HW_SYS_PARA_TYPE, "dpd_test_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_STEP, E_HW_SYS_PARA_TYPE, "dpd_step", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_FLASH_VALID, E_HW_SYS_PARA_TYPE, "dpd_flash_valid", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_PHASE6_MINUTE, E_HW_SYS_PARA_TYPE, "dpd_stg6_minute", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_WPP_TH_L, E_HW_SYS_PARA_TYPE, "dpd_wpp_th_l", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DPD_WPP_TH_H, E_HW_SYS_PARA_TYPE, "dpd_wpp_th_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_NOTICE_PART_END, E_HW_SYS_PARA_TYPE, "notice_end", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ASI_ADDR_M     , E_HW_SYS_PARA_TYPE, "asi_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_ADPC_ADDR_M, E_HW_SYS_PARA_TYPE, "adpc_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_GPS_ADDR_M, E_HW_SYS_PARA_TYPE, "gps_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_MON_ADDR_M, E_HW_SYS_PARA_TYPE, "mon_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PWRVREF_H_ADDR_M, E_HW_SYS_PARA_TYPE, "pwrref_h_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PWRVREF_L_ADDR_M, E_HW_SYS_PARA_TYPE, "pwrref_l_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_PWRVREF_VLDO_ADDR_M, E_HW_SYS_PARA_TYPE, "pwrref_vldo_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_CHANNEL_ADDR_M      , E_HW_SYS_PARA_TYPE, "channel_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_RXFREQ_ADDR_M, E_HW_SYS_PARA_TYPE, "rxfreq_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_CW_ADDR_M, E_HW_SYS_PARA_TYPE, "cw_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_RF_ADDR_M, E_HW_SYS_PARA_TYPE, "rf_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AGC_ADDR_M, E_HW_SYS_PARA_TYPE, "agc_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_0DBFLAGH_ADDR_M, E_HW_SYS_PARA_TYPE, "odbflag_h_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_0DBFLAGL_ADDR_M, E_HW_SYS_PARA_TYPE, "odbflag_l_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_POWER_UIH_ADDR_M, E_HW_SYS_PARA_TYPE, "pwr_uih_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_POWER_UIL_ADDR_M, E_HW_SYS_PARA_TYPE, "pwr_uil_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_HZ_H_ADDR_M, E_HW_SYS_PARA_TYPE, "hz_h_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_HZ_L_ADDR_M, E_HW_SYS_PARA_TYPE, "hz_l_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_NET_ADDR_M , E_HW_SYS_PARA_TYPE, "net_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DVBC_EN_ADDR_M, E_HW_SYS_PARA_TYPE, "dvbc_en_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_NET_FREQ_ADDR_M, E_HW_SYS_PARA_TYPE, "net_freq_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_QAM_ADDR_M, E_HW_SYS_PARA_TYPE, "qam_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_SYM_ADDR_M, E_HW_SYS_PARA_TYPE, "sys_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_INVER_ADDR_M, E_HW_SYS_PARA_TYPE, "inver_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_TXID_ADDR_M, E_HW_SYS_PARA_TYPE, "txid_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_AREA_ADDR_M, E_HW_SYS_PARA_TYPE, "area_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_TRANS_ADDR_M, E_HW_SYS_PARA_TYPE, "trans_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_SLOT_ADDR_M, E_HW_SYS_PARA_TYPE, "slot_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DLY_H_ADDR_M, E_HW_SYS_PARA_TYPE, "dly_h", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DLY_M_ADDR_M, E_HW_SYS_PARA_TYPE, "dly_m", 0, E_NORMAL_FILE_TYPE,  },
+    { EEPROM_DLY_L_ADDR_M, E_HW_SYS_PARA_TYPE, "dly_l", 0, E_NORMAL_FILE_TYPE,  },
+    //end
+    {0,  0,    "e",0, E_NULL_FILE_TYPE},
+};
+
+const S_PARA_IO_ELEMENT g_para_e2_map[65535] =
+{
+    { E2_AD3_POWER_REF_H, E_HW_SYS_PARA_TYPE, "ad3_pwr_ref_h", 0, E_BKP1_FILE_TYPE,  },
+    { E2_AD3_POWER_REF_L, E_HW_SYS_PARA_TYPE, "ad3_pwr_ref_l", 0, E_BKP1_FILE_TYPE,  },
+    { E2_PWRVREF_O_HADDR, E_HW_SYS_PARA_TYPE, "pwr_ref0_h", 0, E_BKP1_FILE_TYPE,  },
+    { E2_PWRVREF_O_LADDR, E_HW_SYS_PARA_TYPE, "pwr_ref0_l", 0, E_BKP1_FILE_TYPE,  },
+    { E2_PWRVREF_VLDO_ADDR, E_HW_SYS_PARA_TYPE, "pwr_vld0", 0, E_BKP1_FILE_TYPE,  },
+    { E2_AGC_ADDR, E_HW_SYS_PARA_TYPE, "agc", 0, E_BKP1_FILE_TYPE,  },
+    { E2_POWER_UIH_ADDR, E_HW_SYS_PARA_TYPE, "e2power_ui_h", 0, E_BKP1_FILE_TYPE,  },
+    { E2_POWER_UIL_ADDR, E_HW_SYS_PARA_TYPE, "e2power_ui_l", 0, E_BKP1_FILE_TYPE,  },
+    { E2_0DBFLAGH_ADDR, E_HW_SYS_PARA_TYPE, "odb_flg_h", 0, E_BKP1_FILE_TYPE,  },
+    { E2_0DBFLAGL_ADDR, E_HW_SYS_PARA_TYPE, "odb_flg_l", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_POWER_UIH_ADDR, E_HW_SYS_PARA_TYPE, "bak_power_ui_h", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_POWER_UIL_ADDR, E_HW_SYS_PARA_TYPE, "bak_power_ui_l", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_0DBFLAGH_ADDR, E_HW_SYS_PARA_TYPE, "bak_odb_flg_h", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_0DBFLAGL_ADDR, E_HW_SYS_PARA_TYPE, "bak_odb_flg_l", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_POWER_UIH_ADDR, E_HW_SYS_PARA_TYPE, "bak_e2power_ui_h", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_POWER_UIL_ADDR, E_HW_SYS_PARA_TYPE, "bak_e2power_ui_l", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_0DBFLAGH_ADDR, E_HW_SYS_PARA_TYPE, "bak_e2odb_flg_h", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_0DBFLAGL_ADDR, E_HW_SYS_PARA_TYPE, "bak_e2odb_flg_l", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_CHANNEL_ADDR, E_HW_SYS_PARA_TYPE, "bak_channel", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_RXCHANNEL_ADDR, E_HW_SYS_PARA_TYPE, "bak_rx_channel", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_POWER_UIH_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_power_ui_h_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_POWER_UIL_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_power_ui_l_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_0DBFLAGH_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_odb_flg_h_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_0DBFLAGL_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_odb_flg_l_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_POWER_UIH_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_e2power_ui_h_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_POWER_UIL_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_e2power_ui_l_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_0DBFLAGH_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_e2odb_flg_h_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_E2_0DBFLAGL_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_e2odb_flg_l_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_CHANNEL_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_channel_m", 0, E_BKP1_FILE_TYPE,  },
+    { BAK_EEPROM_RXCHANNEL_ADDR_M, E_HW_SYS_PARA_TYPE, "bak_rx_channel_m", 0, E_BKP1_FILE_TYPE,  },
+    //end
+    {0,  0, "e", 0, E_NULL_FILE_TYPE},
+};
+
+const S_PARA_IO_ELEMENT g_para_e3_map[65535] =
+{
+    //end
+    {0,  0, "e", 0, E_NULL_FILE_TYPE},
+};
+
+
+
+#endif //map
+
+
+#if 0
+
+static uint8 get_e1_para_from_file(uint16 para_id,const S_PARA_IO_ELEMENT *pmap, uint16 map_ele_num, char *pfile)
+{
+    uint16 i;
+    uint32 u32val;
+    char sname[30]={0};
+
+    //const S_PARA_IO_ELEMENT *pmap = &g_para_e1_map[0];
+
+    for(i=0;i<MAP_ARRAY_SIZE(g_para_e1_map);){
+
+        if(pmap->para_id == para_id){
+
+            if(pmap->para_type == E_HW_SYS_PARA_TYPE){
+                u32val = (uint32)ini_getl(STR_HW_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_FILE);
+            }
+            else if(pmap->para_type == E_LCD_SYS_PARA_TYPE){
+                u32val = (uint32)ini_getl(STR_LCD_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_FILE);
+            }
+            else{
+                u32val = (uint32)ini_getl(STR_HW_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_FILE);
+            }
+
+            return (uint8)u32val;
+        }
+        i++;
+        pmap = &g_para_e1_map[i];
+    }
+
+    sprintf(sname,"reg%d",para_id);
+    u32val = (uint32)ini_getl(STR_BLK_SYS_PARA_TYPE, sname, DEF_REG_PARA, F_EXC_CFG_PARA_FILE);
+    printf("Note.e1_map para not match for read.\n\n");
+
+}
+
+static uint8 get_e2_para_from_file(uint16 para_id)
+{
+    uint16 i;
+    uint32 u32val;
+    char sname[30]={0};
+
+    const S_PARA_IO_ELEMENT *pmap = &g_para_e2_map[0];
+
+    for(i=0;i<MAP_ARRAY_SIZE(g_para_e2_map);){
+
+        if(pmap->para_id == para_id){
+
+            if(pmap->para_type == E_HW_SYS_PARA_TYPE){
+                u32val = (uint32)ini_getl(STR_HW_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_BKP1_FILE);
+            }
+            else if(pmap->para_type == E_LCD_SYS_PARA_TYPE){
+                u32val = (uint32)ini_getl(STR_LCD_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_BKP1_FILE);
+            }
+            else{
+                u32val = (uint32)ini_getl(STR_HW_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_BKP1_FILE);
+            }
+
+            return (uint8)u32val;
+        }
+        i++;
+        pmap = &g_para_e2_map[i];
+    }
+    sprintf(sname,"reg%d",para_id);
+    u32val = (uint32)ini_getl(STR_BLK_SYS_PARA_TYPE, sname, DEF_REG_PARA, F_EXC_CFG_PARA_FILE);
+    printf("Err.e2_map para not match for read.\n\n");
+}
+
+static uint8 get_e3_para_from_file(uint16 para_id)
+{
+    uint16 i;
+    uint32 u32val;
+    char sname[30]={0};
+
+    const S_PARA_IO_ELEMENT *pmap = &g_para_e3_map[0];
+
+    for(i=0;i<MAP_ARRAY_SIZE(g_para_e3_map);){
+
+        if(pmap->para_id == para_id){
+
+            if(pmap->para_type == E_HW_SYS_PARA_TYPE){
+                u32val = (uint32)ini_getl(STR_HW_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_BKP2_FILE);
+            }
+            else if(pmap->para_type == E_LCD_SYS_PARA_TYPE){
+                u32val = (uint32)ini_getl(STR_LCD_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_BKP2_FILE);
+            }
+            else{
+                u32val = (uint32)ini_getl(STR_HW_SYS_PARA_TYPE, pmap->para_name, DEF_REG_PARA, F_EXC_CFG_PARA_BKP2_FILE);
+            }
+
+            return (uint8)u32val;
+        }
+
+        i++;
+        pmap = &g_para_e3_map[i];
+    }
+    sprintf(sname,"reg%d",para_id);
+    u32val = (uint32)ini_getl(STR_BLK_SYS_PARA_TYPE, sname, DEF_REG_PARA, F_EXC_CFG_PARA_FILE);
+    printf("Err.e3_map para not match for read.\n\n");
+}
+
+#endif
+
+static uint8 get_e_para_from_file(uint16 para_id,const S_PARA_IO_ELEMENT *pe_map, uint16 map_ele_num, char *pfile)
+{
+    uint32 u32val = 0;
+    char sname[30] = {0};
+
+    sprintf(sname, "reg%d", para_id);
+    u32val = (uint32)ini_getl(STR_BLK_SYS_PARA_TYPE, sname, DEF_REG_PARA, F_EXC_CFG_PARA_FILE);
+    return (uint8)u32val;
+}
+static uint8 get_e_para_from_file_v2(uint16 para_id, uint8 default_val, char *pfile)
+{
+    uint32 u32val = 0;
+    char sname[30] = {0};
+
+    sprintf(sname, "reg%d", para_id);
+    u32val = (uint32)ini_getl(STR_BLK_SYS_PARA_TYPE, sname, default_val, F_EXC_CFG_PARA_FILE);
+    return (uint8)u32val;
+}
+
+uint8 get_para_from_e_map(uint16 para_id, uint8 chip)
+{
+    uint32 data = 0;
+
+    if(chip==E2_CHIP_1){
+        data = get_e_para_from_file(para_id, NULL, 0, F_EXC_CFG_PARA_FILE);
+    }
+    else if(chip==E2_CHIP_2){
+        data = get_e_para_from_file(para_id, NULL, 0, F_EXC_CFG_PARA_BKP1_FILE);
+    }
+    else if(chip==E2_CHIP_3){
+        data = get_e_para_from_file(para_id, NULL, 0, F_EXC_CFG_PARA_BKP2_FILE);
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED,"chip num not match for read.\n\n");
+    }
+    return data;
+}
+
+uint8 get_para_from_e_map_v2(uint16 para_id, uint8 default_val, uint8 chip)
+{
+    uint32 data = 0;
+
+    if(chip==E2_CHIP_1){
+        data = get_e_para_from_file_v2(para_id, default_val, F_EXC_CFG_PARA_FILE);
+    }
+    else if(chip==E2_CHIP_2){
+        data = get_e_para_from_file_v2(para_id, default_val, F_EXC_CFG_PARA_BKP1_FILE);
+    }
+    else if(chip==E2_CHIP_3){
+        data = get_e_para_from_file_v2(para_id, default_val, F_EXC_CFG_PARA_BKP2_FILE);
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED,"chip num not match for read.\n\n");
+    }
+    return data;
+}
+
+static int set_e_para_to_file(uint16 para_id, uint8 para_val, const S_PARA_IO_ELEMENT *pe_map, uint16 map_ele_num, char *pfile)
+{
+    uint16 i;
+    uint32 u32val;
+    int    ret=0;
+    char   sname[30]={0};
+
+
+    sprintf(sname,"reg%d",para_id);
+    ret = ini_putl(STR_BLK_SYS_PARA_TYPE,  sname, para_val, pfile);
+    if(ret!=1){
+        log_printf(LOG_ERR,I_NOUSED,"e_map para write failed.\n\n");
+    }
+    return ret;
+}
+
+
+int set_para_to_e_map(uint16 para_id, uint8 para_val, uint8 chip)
+{
+    int ret=0;
+
+    if(chip==E2_CHIP_1){
+        ret = set_e_para_to_file(para_id, para_val, NULL, 0, F_EXC_CFG_PARA_FILE);
+    }
+    else if(chip==E2_CHIP_2){
+        ret = set_e_para_to_file(para_id, para_val, NULL, 0, F_EXC_CFG_PARA_BKP1_FILE);
+    }
+    else if(chip==E2_CHIP_3){
+        ret = set_e_para_to_file(para_id, para_val, NULL, 0, F_EXC_CFG_PARA_BKP2_FILE);
+    }
+    else{
+        log_printf(LOG_ERR,I_NOUSED,"chip num not match for write.\n\n");
+    }
+    return ret;
+}
+
+

atsc_app/bsp/ispi.c

@@ -0,0 +1,512 @@
+
+
+#include <stdint.h>
+#include <unistd.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <linux/types.h>
+#include <linux/spi/spidev.h>
+#include <sys/ioctl.h>
+#include <string.h>
+#include <fcntl.h>
+
+#include "../inc/ispi.h"
+#include "../inc/isys_com.h"
+
+
+
+static int openSpiDev(char *pDevName)
+{
+	int fd ;
+	int ret ;
+
+	if(pDevName == NULL)
+		return -2;
+
+	if(!access(pDevName, F_OK))
+	{
+		fd = open(pDevName, O_RDWR);
+	  	if(fd < 0)
+		{
+			log_printf(LOG_ERR,I_NOUSED,"open error %s \n",pDevName);
+			return -1;
+		}
+	}
+	else
+	{
+		return -1;
+	}
+
+    //spidev_fd = fd;
+
+	return (fd);
+}
+
+static int initSpiDev(int fd, u8 mode, u8 bits, int speed)
+{
+	int err;
+
+	err = ioctl(fd, SPI_IOC_WR_MODE, &mode);
+	if (err == -1)
+	{
+	    log_printf(LOG_ERR,I_NOUSED,"can't set spi SPI_IOC_WR_MODE\n");
+        return err;
+	}
+
+    err = ioctl(fd, SPI_IOC_RD_MODE, &mode);
+	if (err == -1)
+	{
+	    log_printf(LOG_ERR,I_NOUSED,"can't set spi SPI_IOC_RD_MODE\n");
+        return err;
+	}
+
+    err = ioctl(fd, SPI_IOC_WR_BITS_PER_WORD, &bits);
+	if (err == -1)
+	{
+	    log_printf(LOG_ERR,I_NOUSED,"can't set spi SPI_IOC_WR_BITS_PER_WORD\n");
+        return err;
+	}
+
+    err = ioctl(fd, SPI_IOC_RD_BITS_PER_WORD, &bits);
+	if (err == -1)
+	{
+	    log_printf(LOG_ERR,I_NOUSED,"can't set spi SPI_IOC_RD_BITS_PER_WORD\n");
+        return err;
+	}
+
+//    err = ioctl(fd, SPI_IOC_WR_MAX_SPEED_HZ, &speed);
+//	if (err == -1)
+//	{
+//	    printf("can't set spi SPI_IOC_WR_MAX_SPEED_HZ\n");
+//        return err;
+//	}
+
+    err = ioctl(fd, SPI_IOC_RD_MAX_SPEED_HZ, &speed);
+	if (err == -1)
+	{
+	    log_printf(LOG_ERR,I_NOUSED,"can't set spi SPI_IOC_RD_MAX_SPEED_HZ\n");
+        return err;
+	}
+    return 0;
+}
+
+static int transfer_r(int fd, u16 addr, u8 *pdata)
+{
+    int ret;
+    uint8_t rx[3] = {0};
+    uint8_t tx[3] = {0};
+    u16 writeInstruct = 0;
+
+    if(fd < 0 || pdata == NULL)
+        return -1;
+
+	writeInstruct= (addr|0x8000);
+	tx[0]= writeInstruct>>8;
+	tx[1]= (u8)(writeInstruct&0xff);
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs = SPI_DELAY,
+        .speed_hz = SPEED,
+        .bits_per_word = 8,
+    };
+
+
+    ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr);
+    if (ret < 1)
+    {
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message,for read %d\n",fd);
+        return -1;
+    }
+
+    //printf("addr=%.2x  rd: ",addr);
+    /*printf("r Tx:");
+    for (ret = 0; ret < ARRAY_SIZE(tx); ret++)
+    {
+        printf("%.2X ", tx[ret]);
+    }
+
+    printf("r Rx:");
+    for (ret = 0; ret < ARRAY_SIZE(tx); ret++)
+    {
+        printf("%.2X ", rx[ret]);
+    }
+    printf("\n");
+    */
+    *pdata = rx[2];
+    return 0;
+}
+
+static int transfer_w(int fd, u32 addr, u8 data)
+{
+    int ret;
+    uint8_t rx[3] = {0};
+    uint8_t tx[3] = {0};
+
+    if(fd < 0)
+        return -1;
+
+	addr &=~0x8000;
+	tx[0] =(u8)((addr & 0xFF00) >> 8);
+	tx[1] =(u8)(addr & 0x00FF);
+	tx[2] = data;
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+    ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr);
+    if (ret < 1)
+    {
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message, for write fd %d\n",fd);
+        return -1;
+    }
+
+    //printf("[sub]addr=%.2x  w-rd: ",addr);
+
+    /*printf("w Tx:");
+    for (ret = 0; ret < ARRAY_SIZE(tx); ret++)
+    {
+        printf(" %.2X ", tx[ret]);
+    }
+    printf("\n");
+
+    printf("w Rx:\n");
+    for (ret = 0; ret < ARRAY_SIZE(tx); ret++)
+    {
+        printf(" %.2X ", rx[ret]);
+    }
+    printf("\n");*/
+
+    return 0;
+}
+
+
+
+
+/* 4 wrie need tx and rx len : 3 ,return: ff xx xx*/
+int spi_r(int fd, u8 addr, u16 *pdata)
+{
+    int ret;
+    uint8_t rx[3] = {0};
+    uint8_t tx[3] = {0};
+
+    if(fd < 0)
+        return -1;
+
+    tx[0] = (u8)(addr | 0x80);
+    tx[1] = 0x00;
+    tx[2] = 0x00;
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+    ret = ioctl(fd, SPI_IOC_MESSAGE(HALF_DUPLEX), &tr);
+    if (ret < 1){
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message, for write fd %d\n",fd);
+        return -1;
+    }
+
+    *pdata = (rx[1]<<8) + rx[2];
+
+    return 0;
+}
+
+
+
+/* 4 wrie need tx and rx len : 3 ,return: ff xx xx*/
+int spi_r_addr16_data8(int fd, u16 addr, u8 *pdata)
+{
+    int ret;
+    uint8_t rx[3] = {0};
+    uint8_t tx[3] = {0};
+
+    if(fd < 0)
+        return -1;
+
+    tx[0] = (u8)((addr>>8)&0xff | 0x80);
+    tx[1] = (u8)( addr&0xff);
+    tx[2] = 0x00;
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+    ret = ioctl(fd, SPI_IOC_MESSAGE(HALF_DUPLEX), &tr);
+    if (ret < 1){
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message, for write fd %d\n",fd);
+        return -1;
+    }
+
+    *pdata = rx[2];
+
+    return 0;
+}
+
+
+uint8_t spi_rx_buff[35] = {0};
+uint8_t spi_tx_buff[35] = {0};
+
+int spi_transfer_big_block(int spi_fd, uint8 *pdata, int bytelen)
+{
+    int ret;
+
+    if(spi_fd < 0)
+        return -1;
+
+    if(bytelen>SPI_BUFF_MAX)
+        printf("[%s,%d] buff full!! %d > 4KB\n", __func__,__LINE__, bytelen);
+
+	memset(spi_tx_buff, 0, sizeof(spi_tx_buff));
+    memcpy(spi_tx_buff, pdata, bytelen);
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)spi_tx_buff,
+        .rx_buf = (unsigned long)spi_rx_buff,
+        .len    = bytelen,//ARRAY_SIZE(spi_tx_buff),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+#if 1
+    /*  SPI_IOC_MESSAGE(n) --  [n] means numbers of  struct spi_ioc_transfer, so 1. */
+    ret = ioctl(spi_fd, SPI_IOC_MESSAGE(1), &tr);
+    if (ret < 1) {
+        printf(" [%s,%d]send spi msg err, len=%d ret=%d rx[0]=%d tx[0]=%d (%d)\n", __func__,__LINE__,  bytelen,ret, spi_rx_buff[0],spi_tx_buff[0], tr.len);
+        //pabort("can't send spi message");
+        return -1;
+    }
+#endif
+
+    return 0;
+}
+
+int spi_receiver_big_block(int spi_fd, uint8 *pdata, int bytelen)
+{
+    int ret;
+
+    if(spi_fd < 0)
+        return -1;
+
+    if(bytelen>SPI_BUFF_MAX)
+        printf("[%s,%d] buff full!! %d > 4KB\n", __func__,__LINE__, bytelen);
+
+	memset(spi_tx_buff, 0, sizeof(spi_tx_buff));
+    memcpy(spi_tx_buff, pdata, 3);
+	
+	memset(spi_rx_buff, 0, sizeof(spi_rx_buff));
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)spi_tx_buff,
+        .rx_buf = (unsigned long)spi_rx_buff,
+        .len    = bytelen,//ARRAY_SIZE(spi_tx_buff),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+#if 1
+    /*  SPI_IOC_MESSAGE(n) --  [n] means numbers of  struct spi_ioc_transfer, so 1. */
+    ret = ioctl(spi_fd, SPI_IOC_MESSAGE(1), &tr);
+    if (ret < 1) {
+        printf(" [%s,%d]send spi msg err, len=%d ret=%d rx[0]=%d tx[0]=%d (%d)\n", __func__,__LINE__,  bytelen,ret, spi_rx_buff[0],spi_tx_buff[0], tr.len);
+        return -1;
+    }
+
+	//printf(" rxbuf[3-4]= 0x%02x 0x%02x\n",spi_rx_buff[3], spi_rx_buff[4]);
+	memcpy(pdata, spi_rx_buff, bytelen);
+#endif
+
+    return 0;
+}
+
+
+int spi_w(int fd, u8 addr, uint16_t u16_data)
+{
+    int ret;
+    uint8_t rx[3] = {0};
+    uint8_t tx[3] = {0};
+    uint32 u32addr = (uint32)addr << 16;
+
+    if(fd < 0)
+        return -1;
+
+	u32addr &= ~0x800000;
+    u32addr |= u16_data;
+
+	tx[0] = (u8)((u32addr >> 16) & 0xFF);
+	tx[1] = (u8)((u32addr >>  8) & 0xFF);
+	tx[2] = (u8)((u32addr >>  0) & 0xFF);
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+    ret = ioctl(fd, SPI_IOC_MESSAGE(HALF_DUPLEX), &tr);
+    if (ret < 1){
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message, for write fd %d\n",fd);
+        return -1;
+    }
+
+    return 0;
+}
+
+
+int spi_w_addr16_data8(int fd, u16 addr, uint8_t data)
+{
+    int ret;
+    uint8_t rx[3] = {0};
+    uint8_t tx[3] = {0};
+    uint32 u16addr=0;
+
+    if(fd < 0)
+        return -1;
+
+	u16addr &= ~0x8000;
+    u16addr |= (addr&0x7fff);
+
+	tx[0] = (u8)((u16addr >> 8) & 0xFF);
+	tx[1] = (u8)((u16addr) & 0xFF);
+	tx[2] = (u8)((data) & 0xFF);
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+    ret = ioctl(fd, SPI_IOC_MESSAGE(HALF_DUPLEX), &tr);
+    if (ret < 1){
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message, for write fd %d\n",fd);
+        return -1;
+    }
+
+    return 0;
+}
+
+
+
+uint8_t iSPI_I2S_SendData(int spi_fd, uint16_t Data)
+{
+    int ret;
+    uint8_t rx[2] = {0};
+    uint8_t tx[2] = {0};
+
+    if(spi_fd < 0)
+        return -1;
+
+	tx[0] = (u8)((Data & 0xFF00) >> 8);
+	tx[1] = (u8)((Data & 0x00FF) >> 0);
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+    ret = ioctl(spi_fd, SPI_IOC_MESSAGE(1), &tr);
+    if (ret < 1)
+    {
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message, for write fd %d\n",spi_fd);
+        return -1;
+    }
+
+    return 0;
+}
+
+
+
+
+uint8_t iSPI_I2S_Send4Byte(int spi_fd, uint8 *pdata)
+{
+    int ret;
+    uint8_t rx[4] = {0};
+    uint8_t tx[4] = {0};
+
+    if(spi_fd < 0)
+        return -1;
+
+    memcpy(tx, pdata, 4);
+
+    struct spi_ioc_transfer tr = {
+        .tx_buf = (unsigned long)tx,
+        .rx_buf = (unsigned long)rx,
+        .len = ARRAY_SIZE(tx),
+        .delay_usecs    = SPI_DELAY,
+        .speed_hz       = SPEED,
+        .bits_per_word  = 8,
+    };
+
+    /*  SPI_IOC_MESSAGE(n) --  [n] means numbers of  struct spi_ioc_transfer, so 1. */
+    ret = ioctl(spi_fd, SPI_IOC_MESSAGE(1), &tr);
+    if (ret < 1) {
+        log_printf(LOG_ERR,I_NOUSED,"can't send spi message, for write fd %d\n", spi_fd);
+        return -1;
+    }
+
+    return 0;
+}
+
+int init_spi_dev(char *pspi_node_name, int *pfd, uint8 mode, uint8 bits, uint8 speed)
+{
+    int ret;
+    int fd=-1;
+
+	/*
+		wr/rd speed: defined through macro definitions[ SPEED ].
+	*/
+//    unsigned char mode = SPI_MODE_3 ;
+//    unsigned char bits = 8;
+//    unsigned int speed = 100000;
+
+    fd = openSpiDev(pspi_node_name);
+    if(fd < 0) {
+        log_printf(LOG_ERR, I_NOUSED, "init_spi_dev >%s< open failed!\n", pspi_node_name);
+    }
+
+    ret = initSpiDev(fd, mode, bits, speed);
+    if(ret < 0 ) {
+        log_printf(LOG_ERR, I_NOUSED, "init_spi_dev >%s< init failed!\n", pspi_node_name);
+        return -1;
+    }
+
+    log_printf(LOG_INFO, I_SYS_STATUS, "init_spi_dev >%s< init ok!!\n", pspi_node_name);
+
+    *pfd = fd;
+}
+
+
+
+
+
+

atsc_app/bsp/isys_com.c

@@ -0,0 +1,572 @@
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <time.h>
+#include <string.h>
+#include <sys/prctl.h>
+#include <dirent.h>
+#include <sys/types.h>
+#include <sys/dir.h>
+#include <errno.h>
+#include <fcntl.h>
+#include <time.h>
+#include <stdarg.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include <signal.h>
+
+
+#include "../inc/type.h"
+#include "../inc/isys_com.h"
+#include "../inc/ipara_cfg.h"
+#include "../inc/eeprom.h"
+#include "../inc/i2c_drv.h"
+
+
+#define SYNC_PARA_TO_BKP_FILE   "sh /aw/anywave/sync_to_bkp_file.sh"
+#define LOAD_PARA_TO_CFG_FILE   "sh /aw/anywave/load_to_cfg_file.sh"
+extern int executeCMD(const char *cmd, char *result, u16 result_size);
+
+typedef void (*sighandler_t)(int);
+
+
+int read_file_data(char *file_name,char *buff, int len)
+{
+	int fd;
+    int ret = 0;
+
+	fd = open(file_name,O_RDONLY);
+	if(fd == -1) {
+        log_printf(LOG_ERR,I_NOUSED," open %s failed\n",file_name);
+        return -1;
+    }
+
+	if(read(fd,buff,len)==-1) {
+		log_printf(LOG_ERR,I_NOUSED,"read %d bytes from %s failed\n", len, file_name);
+        close(fd);
+        return -1;
+	} else {
+        close(fd);
+        return 0;
+	}
+}
+
+int check_file_exist(char *filename)
+{
+    if(filename == NULL) {
+        log_printf(LOG_ERR,I_NOUSED,"filename is null. \n");
+        return -1;
+    }
+
+    int ret;
+    if(!access(filename, F_OK))
+        return 0;
+    else
+        return -1;
+}
+
+#if 1//verify_sys_com
+
+unsigned long  get_sys_tick(void) // 10ms
+{
+    struct timeval  tv;
+    struct timezone tz;
+
+    gettimeofday(&tv, &tz);
+
+    return (unsigned long)(tv.tv_sec*1000+tv.tv_usec/1000);
+
+    //return ((unsigned long) time( NULL)); // us
+}
+
+int get_sys_time(S_SYS_TIME *ptime)
+{
+    if(!ptime)
+        return -1;
+
+    /*ptime->hour = date_time.hour;
+    ptime->min  = date_time.min;
+    ptime->sec  = date_time.sec;
+    ptime->date = date_time.date;
+    ptime->month= date_time.month;
+    ptime->year = date_time.year;*/
+
+    struct tm *tim;
+    struct timeval t;
+    time_t b_time;
+
+
+    b_time = time(NULL);
+    tim = localtime(&b_time);
+//    gettimeofday(&t, NULL);
+
+    ptime->hour = tim->tm_hour;
+    ptime->min  = tim->tm_min;
+    ptime->sec  = tim->tm_sec;
+
+    ptime->date = tim->tm_mday;
+    ptime->month= tim->tm_mon + 1;
+    ptime->year = tim->tm_year + 1900;
+
+    //printf("%d-%d-%d  %d:%d:%d\n",ptime->year,ptime->month, ptime->date, ptime->hour,ptime->min,ptime->sec );
+
+    return ((int)tim->tm_wday);
+}
+
+
+void utc2localtime(time_t tUtcTime, struct tm *ptNow, int iZoneOffset)
+{
+    int month[] = {0, 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
+
+    if (tUtcTime <= 0 || ptNow == NULL) {
+        return;
+    }
+
+    gmtime_r(&tUtcTime, ptNow);
+
+    ptNow->tm_year += 1900;
+    ptNow->tm_mon += 1;
+
+    ptNow->tm_hour += iZoneOffset;
+
+    if (ptNow->tm_hour >= 24) {
+        ptNow->tm_hour -= 24;
+        ptNow->tm_mday += 1;
+    } else if (ptNow->tm_hour < 0) {
+        ptNow->tm_hour += 24;
+        ptNow->tm_mday -= 1;
+    }
+
+    int current_month_max = month[ptNow->tm_mon];
+    if (ptNow->tm_mon == 2) {
+        if ((ptNow->tm_year % 400 == 0) || (ptNow->tm_year % 4 == 0 && ptNow->tm_year % 100 != 0)) {
+            current_month_max = 29;
+        }
+    }
+
+    if (ptNow->tm_mday > current_month_max) {
+        ptNow->tm_mday = 1;
+        ptNow->tm_mon += 1;
+    } else if (ptNow->tm_mday < 1) {
+        ptNow->tm_mon -= 1;
+        if (ptNow->tm_mon < 1) {
+            ptNow->tm_mon = 12;
+            ptNow->tm_year -= 1;
+        }
+
+        int prev_month = ptNow->tm_mon;
+        int prev_month_max = month[prev_month];
+        if (prev_month == 2) {
+            if ((ptNow->tm_year % 400 == 0) || (ptNow->tm_year % 4 == 0 && ptNow->tm_year % 100 != 0)) {
+                prev_month_max = 29;
+            }
+        }
+        ptNow->tm_mday = prev_month_max;
+    }
+
+    if (ptNow->tm_mon > 12) {
+        ptNow->tm_mon = 1;
+        ptNow->tm_year += 1;
+    } else if (ptNow->tm_mon < 1) {
+        ptNow->tm_mon = 12;
+        ptNow->tm_year -= 1;
+    }
+}
+
+
+void get_beijing_time(struct tm *ptmBJ)
+{
+    time_t  time_cur = 0;
+    int BeiJing_zone_dffset = 8; //Beijing +8
+
+    memset(ptmBJ, 0, sizeof(struct tm));
+
+    time_cur = time(NULL);
+
+    utc2localtime(time_cur, ptmBJ, BeiJing_zone_dffset);
+}
+
+void set_sys_time(S_SYS_TIME *p)
+{
+#if 1
+    struct tm tptr;
+    struct timeval tv;
+
+    if(!p) {
+        return;
+    }
+
+    tptr.tm_year = p->year - 1900;
+    tptr.tm_mon = p->month - 1;
+    tptr.tm_mday = p->date;
+    tptr.tm_hour = p->hour;
+    tptr.tm_min = p->min;
+    tptr.tm_sec = p->sec;
+
+    tv.tv_sec = mktime(&tptr);
+    tv.tv_usec = 0;
+    settimeofday(&tv, NULL);
+
+#else
+
+    RTC_DateTypeDef date;
+    RTC_TimeTypeDef time;
+
+    if(!p) {
+        return;
+    }
+
+    date.RTC_Year = p->year-2000;
+    date.RTC_Date = p->date;
+    date.RTC_Month= p->month;
+
+    time.RTC_Hours  = p->hour;
+    time.RTC_Minutes= p->min;
+    time.RTC_Seconds= p->sec;
+
+    rtc_set_date_time(&date,&time);
+    #endif
+
+}
+
+void usr_print_current_time(void)
+{
+    struct timeval tv;
+    gettimeofday(&tv, NULL);
+    log_printf(LOG_DEBUG,I_NOUSED,"time: %d.%d\n",tv.tv_sec,tv.tv_usec/1000);
+}
+
+uint32 usr_get_cur_time_ms(void)
+{
+    struct timeval tv;
+    gettimeofday(&tv, NULL);
+    return (tv.tv_sec*1000+tv.tv_usec/1000);
+//    printf("time: %d.%d\n",tv.tv_sec,tv.tv_usec/1000);
+}
+
+
+void thread_setnamev(const char* pname)
+{
+    prctl(PR_SET_NAME,pname,NULL,NULL,NULL);
+}
+
+#if 1
+#include <stdarg.h>
+static struct tm bkp_time={0};
+
+int check_sec_change(void)
+{
+	int ret=-1;
+	struct tm *tim;
+	struct tm *bk_tim;
+	static struct tm bkp_time={0};
+	time_t t_time;
+
+	t_time = time(NULL);
+	tim    = localtime(&t_time);
+	if(tim->tm_sec != bkp_time.tm_sec){
+		bkp_time.tm_sec = tim->tm_sec;
+		//printf("sec=%d\n",tim->tm_sec);
+		ret = 1;
+	}
+
+	return ret;
+}
+
+
+
+void printf_wrapperV(const char* format, va_list args_list)
+{
+    vprintf(format, args_list);
+}
+
+void usr_sec_printf(const char* format, ...)
+{
+    va_list marker;
+
+	if(check_sec_change()>0)
+	{
+	    va_start(marker, format);
+	    printf_wrapperV(format, marker);
+	    va_end(marker);
+	}
+}
+
+#endif
+int pox_system(const char *cmd_line)
+{
+    int ret = 0;
+    sighandler_t old_handler;
+    old_handler = signal(SIGCHLD, SIG_DFL);
+    ret = system(cmd_line);
+    signal(SIGCHLD, old_handler);
+    return ret;
+}
+
+int usr_set_sys_rtc_time(S_SYS_TIME *psys_time)
+{
+    char cmd[100] = {0};
+    struct tm usr_tm;
+    struct tm *p_utc_tm;
+    int zone_offset = 0; // beijing +8
+
+
+    usr_tm.tm_year = psys_time->year;// 2022-1900
+    usr_tm.tm_mon  = psys_time->month-1;
+    usr_tm.tm_mday = psys_time->date;
+    usr_tm.tm_hour = psys_time->hour;
+    usr_tm.tm_min  = psys_time->min;
+    usr_tm.tm_sec  = psys_time->sec;
+
+    time_t timestamp = mktime(&usr_tm) - (zone_offset*60*60);
+
+    p_utc_tm = localtime(&timestamp);
+    if(p_utc_tm==NULL)
+        return -1;
+
+    memset(cmd, 0, sizeof(cmd));
+    sprintf(cmd, "date -s '%d-%02d-%02d %02d:%02d:%02d'",
+        p_utc_tm->tm_year+1900,
+        p_utc_tm->tm_mon+1,
+        p_utc_tm->tm_mday,
+        p_utc_tm->tm_hour,
+        p_utc_tm->tm_min,
+        p_utc_tm->tm_sec);
+
+
+    log_printf(LOG_DEBUG,I_NOUSED,"cmd=%s\n", cmd);
+
+    system(cmd);
+
+    system("hwclock -w");
+
+}
+
+void usr_get_sys_rtc_time(S_SYS_TIME *psys_time,S_ADVANCE_DT_PARA *pdt_time)
+{
+    time_t  time_cur = 0;
+    struct tm tmBJ;
+    int BeiJing_zone_dffset = 8; //Beijing +8
+
+
+    memset(&tmBJ, 0, sizeof(struct tm));
+    time_cur = time(NULL);
+    utc2localtime(time_cur, &tmBJ, BeiJing_zone_dffset);
+
+    if(pdt_time!=NULL){
+        pdt_time->dd.RTC_Year    = tmBJ.tm_year-1900;
+        pdt_time->dd.RTC_Month   = tmBJ.tm_mon;
+        pdt_time->dd.RTC_Date    = tmBJ.tm_mday;
+
+        pdt_time->tt.RTC_Hours   = tmBJ.tm_hour;
+        pdt_time->tt.RTC_Minutes = tmBJ.tm_min;
+        pdt_time->tt.RTC_Seconds = tmBJ.tm_sec;
+        pdt_time->tt.RTC_H12 = 0;// 0-AM24h 1-PM12h*/
+    }
+
+    if(psys_time!=NULL){
+        psys_time->year = tmBJ.tm_year-1900;
+        psys_time->month= tmBJ.tm_mon;
+        psys_time->date = tmBJ.tm_mday;
+
+        psys_time->hour = tmBJ.tm_hour;
+        psys_time->min  = tmBJ.tm_min;
+        psys_time->sec  = tmBJ.tm_sec;
+    }
+}
+
+#if 1
+extern char release_ver[30];
+
+enum
+{
+    RUN_INFO_LOG_STEP_START=0,
+    RUN_INFO_LOG_TOTAL_CPU_STEP,
+    RUN_INFO_LOG_TOTAL_MEM_STEP,
+    RUN_INFO_LOG_TOTAL_DISK_STEP,
+    RUN_INFO_LOG_RUNTIME_STEP,
+    RUN_INFO_LOG_APP_CPU_RAM_STEP,
+    RUN_INFO_LOG_STEP_END
+};
+
+static void hardware_log_info(unsigned char log_step)
+{
+    int ret=0;
+	char shellCmd[300];
+    
+    if(log_step >= RUN_INFO_LOG_STEP_END)
+    {
+        return;
+    }
+
+    switch(log_step)
+    {
+        case RUN_INFO_LOG_STEP_START:
+            //version
+            //usr_normal_printf("log imx-app-ver:%s\n",release_ver);
+			log_printf(LOG_INFO, I_RUN_STATUS, "log imx-app-ver:%s\n",release_ver);
+            break;
+		
+        case RUN_INFO_LOG_TOTAL_CPU_STEP:
+            //cpu
+            memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"top -n 1 -b | grep CPU | head -n 1 >&1");//len=54
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "Err.shell cmd get total CPU err.\n");
+            break;
+        case RUN_INFO_LOG_TOTAL_MEM_STEP:
+            //mem
+            memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"top -n 1 -b | grep Mem | head -n 1 >&1");
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "Err.shell cmd get total Mem err.\n");
+            break;
+        case RUN_INFO_LOG_TOTAL_DISK_STEP:
+            //disk
+            memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"df -h | grep Size >&1");
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "shell cmd df err.\n");
+            memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"df -h | grep / | head -n 1 >&1");
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "Err.shell cmd df err.\n");
+				//usr_normal_printf("Err.shell cmd df err.\n");
+            break;
+        case RUN_INFO_LOG_RUNTIME_STEP:
+            //runtime
+            memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"uptime >&1");
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "Err.shell cmd uptime err.\n");
+            break;
+        case RUN_INFO_LOG_APP_CPU_RAM_STEP:
+            //app cpu/ram
+            memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"top -n 1 -b | grep VSZ | head -n 1 >&1");
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "Err.shell cmd uptime err.\n");
+
+            memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"top -n 1 -b | grep imx_atsc_app | head -n 1 >&1");
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "Err.shell cmd uptime err.\n");
+
+			memset(shellCmd,0,sizeof(shellCmd));
+            sprintf(shellCmd,"top -n 1 -b | grep http | head -n 1 >&1");
+            ret = pox_system(shellCmd);
+            if(ret<0)
+				log_printf(LOG_ERR, I_RUN_STATUS, "Err.shell cmd uptime err.\n");
+            break; 
+        default:break;
+    }
+}
+
+
+void check_and_load_bkppara_to_cfgfile()
+{
+	u8 ret;
+	char shellCmd[100] = {0};
+
+	//cfg
+	ret  = check_file_exist(F_EXC_CFG_PARA_FILE);
+	if(ret==0)
+		log_printf(LOG_INFO, I_RUN_STATUS, "cfg_file exist\n");
+	else
+		log_printf(LOG_INFO, I_RUN_STATUS, "cfg_file is non-exist\n");
+
+	//bkp
+	ret = check_file_exist(F_EXC_CFG_PARA_BKP_FILE);
+	
+	if(ret==0){
+		//memset(shellCmd,0,sizeof(shellCmd));
+        //sprintf(shellCmd,"%s");//len=54
+        ret = pox_system(LOAD_PARA_TO_CFG_FILE);
+		
+	    //ret = executeCMD(LOAD_PARA_TO_CFG_FILE, msg);
+		if(ret==0)
+			log_printf(LOG_INFO, I_RUN_STATUS, "bkp_file is load to cfg_file\n");
+		else
+			log_printf(LOG_ERR,  I_RUN_STATUS, "bkp_file failed load to cfg_file\n");
+	}else{
+		log_printf(LOG_WARN, I_RUN_STATUS, "bkp_file is non-existent\n");
+	}
+}
+
+static void sync_cfgpara_to_bkpfile()
+{
+	u8 ret;
+	char msg[20] = {0};
+	
+	ret = check_file_exist(F_EXC_CFG_PARA_FILE);
+	
+		
+	if(ret==0 && (E2PROM_MAGIC_WORD==c256_byteread(EEPROM_DEFAULT_PARAM_ADDR))){
+		ret = pox_system(SYNC_PARA_TO_BKP_FILE);
+		//ret = executeCMD(SYNC_PARA_TO_BKP_FILE, msg);
+		if(ret==0)
+			log_printf(LOG_INFO, I_RUN_STATUS, "cfg file is sync to bkp file\n");
+		else
+			log_printf(LOG_ERR,  I_RUN_STATUS, "cfg file failed sync to bkp file\n");
+	}else{
+		log_printf(LOG_WARN, I_RUN_STATUS, "cfg file is non-existent\n");
+	}
+}
+
+void syslog_thr(void * pvParameters)
+{
+	static int  sec_cnt=0;
+	static char log_record_flg=0;
+	static char log_step=RUN_INFO_LOG_STEP_START;
+	static char boot_flg=1;
+	
+	log_printf(LOG_INFO, I_NOUSED, "===syslog_thr start===\n");
+	
+	while(1)
+	{
+		sec_cnt++;
+		// 2hour || boot 2min
+		if( (sec_cnt%(2*60*60)==0) || (sec_cnt>=120 && boot_flg) ){
+			boot_flg=0;
+			log_record_flg=1;
+		}
+
+		if(log_record_flg)
+        {
+            if(log_step >= RUN_INFO_LOG_STEP_END){
+                log_record_flg  = 0;
+                log_step        = RUN_INFO_LOG_STEP_START;
+                //usr_normal_printf("Sta.finish record run info to log.\n");
+				log_printf(LOG_INFO, I_RUN_STATUS, "Sta.finish record run info to log.\n");
+
+				sync_cfgpara_to_bkpfile();
+            }
+            else{
+                hardware_log_info(log_step);
+                log_step++;
+            }
+        }
+
+		
+		sleep(1);
+	}
+
+}
+#endif
+
+
+#endif//verify_sys_com
+
+
+
+
+
+

atsc_app/bsp/key_gpio.c

@@ -0,0 +1,169 @@
+#include <stdio.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <stdlib.h>
+#include <string.h>
+#include <poll.h>
+#include <sys/select.h>
+#include <sys/time.h>
+#include <linux/ioctl.h>
+#include <errno.h>
+#include <pthread.h>
+#include <signal.h>
+#include <time.h>
+
+#include "../inc/key_gpio.h"
+#include "../inc/config.h"
+#include "../inc/igpio.h"
+
+#define _DEBUG_KEY_PR_ 0
+
+#if _DEBUG_KEY_PR_
+#define PR_KEY(...) printf(__VA_ARGS__)
+#else
+#define PR_KEY(...)
+#endif
+
+#define KEY_MAX_NUM      6
+
+const uint32 c_key_gpio_arry[KEY_MAX_NUM]=
+{
+    KEY1_GP_NUM,    // LEFT
+    KEY2_GP_NUM,    // RIGHT ---> UP
+    KEY3_GP_NUM,    // UP
+    KEY4_GP_NUM,    // DOWN
+    KEY5_GP_NUM,    // EXIT
+    KEY6_GP_NUM,    // OK
+};
+
+uint8 pr_key(uint8 keyvalue)
+{
+    uint8 key = KEY_NULL;
+
+    switch(keyvalue)
+    {
+        case 2:
+            key=KEY_RIGHT;
+            break;
+        case 1:
+            key=KEY_LEFT;
+            break;
+        case 4:
+            key=KEY_UP;
+            break;
+        case 8:
+            key=KEY_DOWN;
+            break;
+        case 16:
+            key=KEY_ENTER;
+            break;
+        case 14:
+            key=KEY_RIGHT_UP_DOWN;
+            break;
+        case 12:
+            key=KEY_UP_DOWN;
+            break;
+        case 3:
+            key=KEY_LEFT_RIGHT;
+            break;
+        case 13:
+            key=KEY_LEFT_UP_DOWN;
+            break;
+        case 32:
+            key=KEY_EXIT;
+            break;
+        default:
+            break;
+    }
+    return key;
+}
+
+uint8 get_key_value(void)
+{
+    uint8 key = KEY_NULL;
+    uint8 i=0;
+    uint8 high_level=0;
+    uint8 tmpval=0;
+
+    for(i = 0; i < KEY_MAX_NUM; i++)
+    {
+        get_gpio_value(c_key_gpio_arry[i], &high_level);
+        if(high_level)
+        {
+            tmpval &= ~(uint8)(1 << i);
+        }
+        else
+        {
+            tmpval |= (uint8)(1 << i);
+        }
+    }
+
+    key = pr_key(tmpval);
+    if(key != KEY_NULL) {
+        PR_KEY("\n======KeyVal=%d======\n\n", tmpval);
+    }
+    return key;
+}
+
+uint8 printf_key_longpress(uint8 tmpval)
+{
+    uint8 key = KEY_NULL;
+
+    switch(tmpval)
+    {
+        case 1:
+            key=KEY_LEFT;
+            PR_KEY("\n long press  LEFT\n\n");
+            break;
+        case 2:
+            key=KEY_RIGHT;
+            PR_KEY("\n long press  RIGHT\n\n");
+            break;
+        case 4:
+            key=KEY_UP;
+            PR_KEY("\n long press  UP\n\n");
+            break;
+        case 8:
+            key=KEY_DOWN;
+            PR_KEY("\n long press  DOWN\n\n");
+            break;
+        default:
+            break;
+    }
+
+    return key;
+}
+
+char key_value[] = {0x01,0x02,0x04,0x08,0x10,0x20};
+char key_value_index[] = {0,0,1,0,2,0,0,0,3};
+uint8 check_long_press(uint8 key)
+{
+    int i = 0;
+    uint8 high_level = 0;
+
+    if(key == key_value[2] || key == key_value[3]) {
+        i = key_value_index[key];
+        get_gpio_value(c_key_gpio_arry[i], &high_level);
+        return high_level ? 0 : 1;
+    }
+
+    return 0;
+}
+
+uint8 get_long_press(void)
+{
+    uint8 key = 0x00;
+    uint8 high_level = 0;
+    int i = 0;
+
+    for(i=0; i<4; i++) {
+        get_gpio_value(c_key_gpio_arry[i], &high_level);
+        if(high_level==0) {
+            key += key_value[i];
+        }
+    }
+
+    return printf_key_longpress(key);
+}

atsc_app/bsp/lcd.c

@@ -0,0 +1,306 @@
+#include <string.h>
+#include <stdio.h>
+
+#include "../inc/type.h"
+#include "../inc/config.h"
+#include "../inc/lcd.h"
+#include "../inc/os_task.h"
+#include "../inc/delay.h"
+#include "../inc/isys_com.h"
+
+
+#if USE_LCD_CACHE
+static char lcd_cache[2][42];
+#endif
+
+#define LCD_HW_SUPPORT_CHAR_TYPE    88
+
+uint8 lcd_show_char[LCD_HW_SUPPORT_CHAR_TYPE] =
+{
+    '!','$','$','%','&','(',')','*','+',',','-','.',
+    '0','1','2','3','4','5','6','7','8','9',':',';','<','=','>','?',
+    '@','A','B','C','D','E','F','G','H','I','J','K','L','M','N','O',
+    'P','Q','R','S','T','U','V','W','X','Y','Z','[',']','^','_',
+    'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p',
+    'q','r','s','t','u','v','w','x','y','z','{','|','}'
+};
+
+const uint32 c_lcd_gpio_arry[8]=
+{
+    LCD_D0_GP_NUM,
+    LCD_D1_GP_NUM,
+    LCD_D2_GP_NUM,
+    LCD_D3_GP_NUM,
+    LCD_D4_GP_NUM,
+    LCD_D5_GP_NUM,
+    LCD_D6_GP_NUM,
+    LCD_D7_GP_NUM
+};
+
+
+static void LCD_EN_SET(void)
+{
+   set_gpio_value(LCD_E_GP_NUM, E_IO_H);
+}
+static void LCD_EN_CLEAR(void)
+{
+    set_gpio_value(LCD_E_GP_NUM, E_IO_L);
+}
+
+static void LCD_RW_CLEAR(void)
+{
+    set_gpio_value(LCD_RW_GP_NUM, E_IO_L);
+}
+
+static void LCD_RS_SET(void)
+{
+    set_gpio_value(LCD_RS_GP_NUM, E_IO_H);
+}
+static void LCD_RS_CLEAR(void)
+{
+   set_gpio_value(LCD_RS_GP_NUM, E_IO_L);
+}
+
+static void LCD_EN_Write(void)
+{
+    LCD_EN_SET();
+    delay_us(20);
+    LCD_EN_CLEAR();
+    delay_us(20);
+}
+
+static void Lcd_Write_Data(uint8 LCD_DATA)
+{
+    uint16 data;
+    uint8  temp;
+    uint8  i;
+
+    LCD_RW_CLEAR();
+    LCD_RS_SET();
+    for (i = 0; i < 8; i++)
+    {
+        temp = (LCD_DATA >> i) & 0x01;
+        set_gpio_value(c_lcd_gpio_arry[i], (E_IO_VAL)temp);
+    }
+    LCD_EN_Write();
+}
+
+static void Lcd_Write_Cmd(uint8 LCD_CMD)
+{
+    uint16 data;
+    uint8  temp;
+    uint8  i;
+
+    LCD_RW_CLEAR();
+    LCD_RS_CLEAR();
+    for (i = 0; i < 8; i++)
+    {
+        temp = (LCD_CMD >> i) & 0x01;
+        set_gpio_value(c_lcd_gpio_arry[i], (E_IO_VAL)temp);
+    }
+    LCD_EN_Write();
+}
+
+#define LCD_INIT_TIME 3//
+
+void lcd_init(void)
+{
+    int i = 0;
+
+    log_printf(LOG_INFO, I_SYS_STATUS, "init lcd display.\n");
+    do {
+        //delay_ms(150);
+        Lcd_Write_Cmd(0x38);
+        delay_ms(1);
+        Lcd_Write_Cmd(0x0c);
+        delay_ms(1);
+        Lcd_Write_Cmd(0x01);
+        delay_ms(500);
+    }while(++i<LCD_INIT_TIME);
+    log_printf(LOG_INFO, I_SYS_STATUS, "over. init lcd display.\n");
+}
+
+
+static void LCD_SET_XY(uint8 x,uint8 y)
+{
+    if(x==0)
+    {
+        Lcd_Write_Cmd(0x80+y);
+    }
+    else
+    {
+        Lcd_Write_Cmd(0xc0+y);
+    }
+}
+
+void lcd_write_arrow(uint32 x,uint32 y,ARROW_DIRECTON direct)
+{
+#if USE_LCD_CACHE
+     if(direct==ARROW_LEFT)
+    {
+        lcd_cache[x][y]=0x7f;
+     #if ARROW_CHAR_NUM==2
+        lcd_cache[x][y+1]=0x2d;
+     #endif
+    }
+    else if(direct==ARROW_RIGHT)
+    {
+     #if ARROW_CHAR_NUM==2
+        lcd_cache[x][y]=0x2d;
+        lcd_cache[x][y+1]=0x7e;
+     #else
+        lcd_cache[x][y]=0x7e;
+     #endif
+    }
+#else
+    if(direct==ARROW_LEFT)
+    {
+        LCD_SET_XY(x,y);
+        delay_us(5);
+        Lcd_Write_Data(0x7f);
+     #if ARROW_CHAR_NUM==2
+        Lcd_Write_Data(0x2D);
+     #endif
+    }
+    else if(direct==ARROW_RIGHT)
+    {
+        LCD_SET_XY(x,y);
+        delay_us(5);
+     #if ARROW_CHAR_NUM==2
+        Lcd_Write_Data(0x2D);
+     #endif
+        Lcd_Write_Data(0x7e);
+    }
+#endif
+}
+void lcd_write_temp_f(uint8 x,uint8 y)
+{
+#if USE_LCD_CACHE
+    if((x==LINE_1)||(x==LINE_2))
+    {
+        lcd_cache[x][y]=0xdf;
+        lcd_cache[x][y+1]='F';
+    }
+#else
+    LCD_SET_XY(x,y);
+    delay_us(5);
+    Lcd_Write_Data(0xdf);
+    Lcd_Write_Data('F');
+#endif
+}
+void lcd_write_temp_c(uint8 x,uint8 y)
+{
+#if USE_LCD_CACHE
+    if((x==LINE_1)||(x==LINE_2))
+    {
+        lcd_cache[x][y]=0xdf;
+        lcd_cache[x][y+1]='C';
+    }
+#else
+    LCD_SET_XY(x,y);
+    delay_us(5);
+    Lcd_Write_Data(0xdf);
+    Lcd_Write_Data('C');
+#endif
+}
+
+
+void lcd_write_string(uint8 X,uint8 Y,void *s)
+{
+#if USE_LCD_CACHE
+    uint32 i = 0;
+    char *pstr = (char*)s;
+
+    if(1)//sys_ready
+    {
+        if(X==LINE_1)
+        {
+            i = strlen((const char *)pstr)>LCD_CHAR_NUM-Y?LCD_CHAR_NUM-Y:strlen((const char *)pstr);
+            memcpy(&lcd_cache[0][Y],pstr,i);
+        }
+        if(X==LINE_2)
+        {
+            i = strlen((const char *)pstr)>LCD_CHAR_NUM-Y?LCD_CHAR_NUM-Y:strlen((const char *)pstr);
+            memcpy(&lcd_cache[1][Y],pstr,i);
+        }
+    }
+    else
+    {
+        LCD_SET_XY( X, Y );
+        delay_us(10);
+        while(*pstr)
+        {
+            Lcd_Write_Data(*pstr++);
+        }
+    }
+#else
+    char *pstr = (char*)s;
+
+    LCD_SET_XY( X, Y );
+    delay_us(10);
+    while(*pstr)
+    {
+        Lcd_Write_Data(*pstr++);
+    }
+#endif
+}
+
+void lcd_write_cache(void)
+{
+#if USE_LCD_CACHE
+    uint32 i = 0;
+
+    if(1)//sys_ready
+    {
+        LCD_SET_XY(0,0);
+        delay_us(10);
+        for(i=0;i<LCD_CHAR_NUM;i++)
+        {
+            Lcd_Write_Data(lcd_cache[0][i]);
+        }
+
+        LCD_SET_XY(1,0);
+        delay_us(10);
+        for(i=0;i<LCD_CHAR_NUM;i++)
+        {
+            Lcd_Write_Data(lcd_cache[1][i]);
+        }
+    }
+#else
+#endif
+}
+
+/***********************************/
+// LCD backup light control
+/***********************************/
+
+//turn on the light
+void light_on(void)
+{
+    //log_printf(LOG_INFO, I_SYS_STATUS, "Turn on LCD light\n");
+    set_gpio_value(LCD_CTL_GP_NUM, E_IO_H);
+}
+
+void light_off(void)
+{
+    log_printf(LOG_INFO, I_SYS_STATUS, "Turn off LCD light\n");
+    set_gpio_value(LCD_CTL_GP_NUM, E_IO_L);
+}
+
+
+
+void set_gpio_fpga_reset(uint8 set_val)
+{
+	
+	if(set_val==1){
+		printf("set_gpio_fpga_reset High\n");
+	    set_gpio_value(FPGA_RST_GP_NUM, E_IO_H);
+	}
+	else{
+		printf("set_gpio_fpga_reset Low\n");
+		set_gpio_value(FPGA_RST_GP_NUM, E_IO_L);
+	}
+}
+/**********************************************END**************************************/
+
+

atsc_app/bsp/minIni.c

@@ -0,0 +1,876 @@
+/*  minIni - Multi-Platform INI file parser, suitable for embedded systems
+ *
+ *  These routines are in part based on the article "Multiplatform .INI Files"
+ *  by Joseph J. Graf in the March 1994 issue of Dr. Dobb's Journal.
+ *
+ *  Copyright (c) CompuPhase, 2008-2017
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may not
+ *  use this file except in compliance with the License. You may obtain a copy
+ *  of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ *  License for the specific language governing permissions and limitations
+ *  under the License.
+ *
+ *  Version: $Id: minIni.c 53 2015-01-18 13:35:11Z thiadmer.riemersma@gmail.com $
+ */
+
+#if (defined _UNICODE || defined __UNICODE__ || defined UNICODE) && !defined INI_ANSIONLY
+# if !defined UNICODE   /* for Windows */
+#   define UNICODE
+# endif
+# if !defined _UNICODE  /* for C library */
+#   define _UNICODE
+# endif
+#endif
+
+#define MININI_IMPLEMENTATION
+#include "../inc/minIni.h"
+#if defined NDEBUG
+  #define assert(e)
+#else
+  #include <assert.h>
+#endif
+
+#if !defined __T || defined INI_ANSIONLY
+  #include <ctype.h>
+  #include <string.h>
+  #include <stdlib.h>
+  #define TCHAR     char
+  #define __T(s)    s
+  #define _tcscat   strcat
+  #define _tcschr   strchr
+  #define _tcscmp   strcmp
+  #define _tcscpy   strcpy
+  #define _tcsicmp  stricmp
+  #define _tcslen   strlen
+  #define _tcsncmp  strncmp
+  #define _tcsnicmp strnicmp
+  #define _tcsrchr  strrchr
+  #define _tcstol   strtol
+  #define _tcstod   strtod
+  #define _totupper toupper
+  #define _stprintf sprintf
+  #define _tfgets   fgets
+  #define _tfputs   fputs
+  #define _tfopen   fopen
+  #define _tremove  remove
+  #define _trename  rename
+#endif
+
+#if defined __linux || defined __linux__
+  #define __LINUX__
+#elif defined FREEBSD && !defined __FreeBSD__
+  #define __FreeBSD__
+#elif defined(_MSC_VER)
+  #pragma warning(disable: 4996)	/* for Microsoft Visual C/C++ */
+#endif
+#if !defined strnicmp && !defined PORTABLE_STRNICMP
+  #if defined __LINUX__ || defined __FreeBSD__ || defined __OpenBSD__ || defined __APPLE__
+    #define strnicmp  strncasecmp
+  #endif
+#endif
+#if !defined _totupper
+  #define _totupper toupper
+#endif
+
+#if !defined INI_LINETERM
+  #if defined __LINUX__ || defined __FreeBSD__ || defined __OpenBSD__ || defined __APPLE__
+    #define INI_LINETERM    __T("\n")
+  #else
+    #define INI_LINETERM    __T("\r\n")
+  #endif
+#endif
+#if !defined INI_FILETYPE
+  #error Missing definition for INI_FILETYPE.
+#endif
+
+#if !defined sizearray
+  #define sizearray(a)    (sizeof(a) / sizeof((a)[0]))
+#endif
+
+enum quote_option {
+  QUOTE_NONE,
+  QUOTE_ENQUOTE,
+  QUOTE_DEQUOTE,
+};
+
+#if defined PORTABLE_STRNICMP
+int strnicmp(const TCHAR *s1, const TCHAR *s2, size_t n)
+{
+  while (n-- != 0 && (*s1 || *s2)) {
+    register int c1, c2;
+    c1 = *s1++;
+    if ('a' <= c1 && c1 <= 'z')
+      c1 += ('A' - 'a');
+    c2 = *s2++;
+    if ('a' <= c2 && c2 <= 'z')
+      c2 += ('A' - 'a');
+    if (c1 != c2)
+      return c1 - c2;
+  } /* while */
+  return 0;
+}
+#endif /* PORTABLE_STRNICMP */
+
+static TCHAR *skipleading(const TCHAR *str)
+{
+  assert(str != NULL);
+  while ('\0' < *str && *str <= ' ')
+    str++;
+  return (TCHAR *)str;
+}
+
+static TCHAR *skiptrailing(const TCHAR *str, const TCHAR *base)
+{
+  assert(str != NULL);
+  assert(base != NULL);
+  while (str > base && '\0' < *(str-1) && *(str-1) <= ' ')
+    str--;
+  return (TCHAR *)str;
+}
+
+static TCHAR *striptrailing(TCHAR *str)
+{
+  TCHAR *ptr = skiptrailing(_tcschr(str, '\0'), str);
+  assert(ptr != NULL);
+  *ptr = '\0';
+  return str;
+}
+
+static TCHAR *ini_strncpy(TCHAR *dest, const TCHAR *source, size_t maxlen, enum quote_option option)
+{
+  size_t d, s;
+
+  assert(maxlen>0);
+  assert(source != NULL && dest != NULL);
+  assert((dest < source || (dest == source && option != QUOTE_ENQUOTE)) || dest > source + strlen(source));
+  if (option == QUOTE_ENQUOTE && maxlen < 3)
+    option = QUOTE_NONE;  /* cannot store two quotes and a terminating zero in less than 3 characters */
+
+  switch (option) {
+  case QUOTE_NONE:
+    for (d = 0; d < maxlen - 1 && source[d] != '\0'; d++)
+      dest[d] = source[d];
+    assert(d < maxlen);
+    dest[d] = '\0';
+    break;
+  case QUOTE_ENQUOTE:
+    d = 0;
+    dest[d++] = '"';
+    for (s = 0; source[s] != '\0' && d < maxlen - 2; s++, d++) {
+      if (source[s] == '"') {
+        if (d >= maxlen - 3)
+          break;  /* no space to store the escape character plus the one that follows it */
+        dest[d++] = '\\';
+      } /* if */
+      dest[d] = source[s];
+    } /* for */
+    dest[d++] = '"';
+    dest[d] = '\0';
+    break;
+  case QUOTE_DEQUOTE:
+    for (d = s = 0; source[s] != '\0' && d < maxlen - 1; s++, d++) {
+      if ((source[s] == '"' || source[s] == '\\') && source[s + 1] == '"')
+        s++;
+      dest[d] = source[s];
+    } /* for */
+    dest[d] = '\0';
+    break;
+  default:
+    assert(0);
+  } /* switch */
+
+  return dest;
+}
+
+static TCHAR *cleanstring(TCHAR *string, enum quote_option *quotes)
+{
+  int isstring;
+  TCHAR *ep;
+
+  assert(string != NULL);
+  assert(quotes != NULL);
+
+  /* Remove a trailing comment */
+  isstring = 0;
+  for (ep = string; *ep != '\0' && ((*ep != ';' && *ep != '#') || isstring); ep++) {
+    if (*ep == '"') {
+      if (*(ep + 1) == '"')
+        ep++;                 /* skip "" (both quotes) */
+      else
+        isstring = !isstring; /* single quote, toggle isstring */
+    } else if (*ep == '\\' && *(ep + 1) == '"') {
+      ep++;                   /* skip \" (both quotes */
+    } /* if */
+  } /* for */
+  assert(ep != NULL && (*ep == '\0' || *ep == ';' || *ep == '#'));
+  *ep = '\0';                 /* terminate at a comment */
+  striptrailing(string);
+  /* Remove double quotes surrounding a value */
+  *quotes = QUOTE_NONE;
+  if (*string == '"' && (ep = _tcschr(string, '\0')) != NULL && *(ep - 1) == '"') {
+    string++;
+    *--ep = '\0';
+    *quotes = QUOTE_DEQUOTE;  /* this is a string, so remove escaped characters */
+  } /* if */
+  return string;
+}
+
+static int getkeystring(INI_FILETYPE *fp, const TCHAR *Section, const TCHAR *Key,
+                        int idxSection, int idxKey, TCHAR *Buffer, int BufferSize,
+                        INI_FILEPOS *mark)
+{
+  TCHAR *sp, *ep;
+  int len, idx;
+  enum quote_option quotes;
+  TCHAR LocalBuffer[INI_BUFFERSIZE];
+
+  assert(fp != NULL);
+  /* Move through file 1 line at a time until a section is matched or EOF. If
+   * parameter Section is NULL, only look at keys above the first section. If
+   * idxSection is postive, copy the relevant section name.
+   */
+  len = (Section != NULL) ? (int)_tcslen(Section) : 0;
+  if (len > 0 || idxSection >= 0) {
+    assert(idxSection >= 0 || Section != NULL);
+    idx = -1;
+    do {
+      if (!ini_read(LocalBuffer, INI_BUFFERSIZE, fp))
+        return 0;
+      sp = skipleading(LocalBuffer);
+      ep = _tcsrchr(sp, ']');
+    } while (*sp != '[' || ep == NULL ||
+             (((int)(ep-sp-1) != len || Section == NULL || _tcsnicmp(sp+1,Section,len) != 0) && ++idx != idxSection));
+    if (idxSection >= 0) {
+      if (idx == idxSection) {
+        assert(ep != NULL);
+        assert(*ep == ']');
+        *ep = '\0';
+        ini_strncpy(Buffer, sp + 1, BufferSize, QUOTE_NONE);
+        return 1;
+      } /* if */
+      return 0; /* no more section found */
+    } /* if */
+  } /* if */
+
+  /* Now that the section has been found, find the entry.
+   * Stop searching upon leaving the section's area.
+   */
+  assert(Key != NULL || idxKey >= 0);
+  len = (Key != NULL) ? (int)_tcslen(Key) : 0;
+  idx = -1;
+  do {
+    if (mark != NULL)
+      ini_tell(fp, mark);   /* optionally keep the mark to the start of the line */
+    if (!ini_read(LocalBuffer,INI_BUFFERSIZE,fp) || *(sp = skipleading(LocalBuffer)) == '[')
+      return 0;
+    sp = skipleading(LocalBuffer);
+    ep = _tcschr(sp, '=');  /* Parse out the equal sign */
+    if (ep == NULL)
+      ep = _tcschr(sp, ':');
+  } while (*sp == ';' || *sp == '#' || ep == NULL
+           || ((len == 0 || (int)(skiptrailing(ep,sp)-sp) != len || _tcsnicmp(sp,Key,len) != 0) && ++idx != idxKey));
+  if (idxKey >= 0) {
+    if (idx == idxKey) {
+      assert(ep != NULL);
+      assert(*ep == '=' || *ep == ':');
+      *ep = '\0';
+      striptrailing(sp);
+      ini_strncpy(Buffer, sp, BufferSize, QUOTE_NONE);
+      return 1;
+    } /* if */
+    return 0;   /* no more key found (in this section) */
+  } /* if */
+
+  /* Copy up to BufferSize chars to buffer */
+  assert(ep != NULL);
+  assert(*ep == '=' || *ep == ':');
+  sp = skipleading(ep + 1);
+  sp = cleanstring(sp, &quotes);  /* Remove a trailing comment */
+  ini_strncpy(Buffer, sp, BufferSize, quotes);
+  return 1;
+}
+
+/** ini_gets()
+ * \param Section     the name of the section to search for
+ * \param Key         the name of the entry to find the value of
+ * \param DefValue    default string in the event of a failed read
+ * \param Buffer      a pointer to the buffer to copy into
+ * \param BufferSize  the maximum number of characters to copy
+ * \param Filename    the name and full path of the .ini file to read from
+ *
+ * \return            the number of characters copied into the supplied buffer
+ */
+int ini_gets(const TCHAR *Section, const TCHAR *Key, const TCHAR *DefValue,
+             TCHAR *Buffer, int BufferSize, const TCHAR *Filename)
+{
+  INI_FILETYPE fp;
+  int ok = 0;
+
+  if (Buffer == NULL || BufferSize <= 0 || Key == NULL)
+    return 0;
+  if (ini_openread(Filename, &fp)) {
+    ok = getkeystring(&fp, Section, Key, -1, -1, Buffer, BufferSize, NULL);
+    (void)ini_close(&fp);
+  } /* if */
+  if (!ok)
+    ini_strncpy(Buffer, (DefValue != NULL) ? DefValue : __T(""), BufferSize, QUOTE_NONE);
+  return (int)_tcslen(Buffer);
+}
+
+/** ini_getl()
+ * \param Section     the name of the section to search for
+ * \param Key         the name of the entry to find the value of
+ * \param DefValue    the default value in the event of a failed read
+ * \param Filename    the name of the .ini file to read from
+ *
+ * \return            the value located at Key
+ */
+long ini_getl(const TCHAR *Section, const TCHAR *Key, long DefValue, const TCHAR *Filename)
+{
+  TCHAR LocalBuffer[64] = {0};
+  int len = ini_gets(Section, Key, __T(""), LocalBuffer, sizearray(LocalBuffer), Filename);
+  return (len == 0) ? DefValue
+                    : ((len >= 2 && _totupper((int)LocalBuffer[1]) == 'X') ? _tcstol(LocalBuffer, NULL, 16)
+                                                                           : _tcstol(LocalBuffer, NULL, 10));
+}
+
+#if defined INI_REAL
+/** ini_getf()
+ * \param Section     the name of the section to search for
+ * \param Key         the name of the entry to find the value of
+ * \param DefValue    the default value in the event of a failed read
+ * \param Filename    the name of the .ini file to read from
+ *
+ * \return            the value located at Key
+ */
+INI_REAL ini_getf(const TCHAR *Section, const TCHAR *Key, INI_REAL DefValue, const TCHAR *Filename)
+{
+  TCHAR LocalBuffer[64];
+  int len = ini_gets(Section, Key, __T(""), LocalBuffer, sizearray(LocalBuffer), Filename);
+  return (len == 0) ? DefValue : ini_atof(LocalBuffer);
+}
+#endif
+
+/** ini_getbool()
+ * \param Section     the name of the section to search for
+ * \param Key         the name of the entry to find the value of
+ * \param DefValue    default value in the event of a failed read; it should
+ *                    zero (0) or one (1).
+ * \param Filename    the name and full path of the .ini file to read from
+ *
+ * A true boolean is found if one of the following is matched:
+ * - A string starting with 'y' or 'Y'
+ * - A string starting with 't' or 'T'
+ * - A string starting with '1'
+ *
+ * A false boolean is found if one of the following is matched:
+ * - A string starting with 'n' or 'N'
+ * - A string starting with 'f' or 'F'
+ * - A string starting with '0'
+ *
+ * \return            the true/false flag as interpreted at Key
+ */
+int ini_getbool(const TCHAR *Section, const TCHAR *Key, int DefValue, const TCHAR *Filename)
+{
+  TCHAR LocalBuffer[2] = __T("");
+  int ret;
+
+  ini_gets(Section, Key, __T(""), LocalBuffer, sizearray(LocalBuffer), Filename);
+  LocalBuffer[0] = (TCHAR)_totupper((int)LocalBuffer[0]);
+  if (LocalBuffer[0] == 'Y' || LocalBuffer[0] == '1' || LocalBuffer[0] == 'T')
+    ret = 1;
+  else if (LocalBuffer[0] == 'N' || LocalBuffer[0] == '0' || LocalBuffer[0] == 'F')
+    ret = 0;
+  else
+    ret = DefValue;
+
+  return(ret);
+}
+
+/** ini_getsection()
+ * \param idx         the zero-based sequence number of the section to return
+ * \param Buffer      a pointer to the buffer to copy into
+ * \param BufferSize  the maximum number of characters to copy
+ * \param Filename    the name and full path of the .ini file to read from
+ *
+ * \return            the number of characters copied into the supplied buffer
+ */
+int  ini_getsection(int idx, TCHAR *Buffer, int BufferSize, const TCHAR *Filename)
+{
+  INI_FILETYPE fp;
+  int ok = 0;
+
+  if (Buffer == NULL || BufferSize <= 0 || idx < 0)
+    return 0;
+  if (ini_openread(Filename, &fp)) {
+    ok = getkeystring(&fp, NULL, NULL, idx, -1, Buffer, BufferSize, NULL);
+    (void)ini_close(&fp);
+  } /* if */
+  if (!ok)
+    *Buffer = '\0';
+  return (int)_tcslen(Buffer);
+}
+
+/** ini_getkey()
+ * \param Section     the name of the section to browse through, or NULL to
+ *                    browse through the keys outside any section
+ * \param idx         the zero-based sequence number of the key to return
+ * \param Buffer      a pointer to the buffer to copy into
+ * \param BufferSize  the maximum number of characters to copy
+ * \param Filename    the name and full path of the .ini file to read from
+ *
+ * \return            the number of characters copied into the supplied buffer
+ */
+int  ini_getkey(const TCHAR *Section, int idx, TCHAR *Buffer, int BufferSize, const TCHAR *Filename)
+{
+  INI_FILETYPE fp;
+  int ok = 0;
+
+  if (Buffer == NULL || BufferSize <= 0 || idx < 0)
+    return 0;
+  if (ini_openread(Filename, &fp)) {
+    ok = getkeystring(&fp, Section, NULL, -1, idx, Buffer, BufferSize, NULL);
+    (void)ini_close(&fp);
+  } /* if */
+  if (!ok)
+    *Buffer = '\0';
+  return (int)_tcslen(Buffer);
+}
+
+
+#if !defined INI_NOBROWSE
+/** ini_browse()
+ * \param Callback    a pointer to a function that will be called for every
+ *                    setting in the INI file.
+ * \param UserData    arbitrary data, which the function passes on the the
+ *                    \c Callback function
+ * \param Filename    the name and full path of the .ini file to read from
+ *
+ * \return            1 on success, 0 on failure (INI file not found)
+ *
+ * \note              The \c Callback function must return 1 to continue
+ *                    browsing through the INI file, or 0 to stop. Even when the
+ *                    callback stops the browsing, this function will return 1
+ *                    (for success).
+ */
+int  ini_browse(INI_CALLBACK Callback, void *UserData, const TCHAR *Filename)
+{
+  TCHAR LocalBuffer[INI_BUFFERSIZE];
+  int lenSec, lenKey;
+  enum quote_option quotes;
+  INI_FILETYPE fp;
+
+  if (Callback == NULL)
+    return 0;
+  if (!ini_openread(Filename, &fp))
+    return 0;
+
+  LocalBuffer[0] = '\0';   /* copy an empty section in the buffer */
+  lenSec = (int)_tcslen(LocalBuffer) + 1;
+  for ( ;; ) {
+    TCHAR *sp, *ep;
+    if (!ini_read(LocalBuffer + lenSec, INI_BUFFERSIZE - lenSec, &fp))
+      break;
+    sp = skipleading(LocalBuffer + lenSec);
+    /* ignore empty strings and comments */
+    if (*sp == '\0' || *sp == ';' || *sp == '#')
+      continue;
+    /* see whether we reached a new section */
+    ep = _tcsrchr(sp, ']');
+    if (*sp == '[' && ep != NULL) {
+      *ep = '\0';
+      ini_strncpy(LocalBuffer, sp + 1, INI_BUFFERSIZE, QUOTE_NONE);
+      lenSec = (int)_tcslen(LocalBuffer) + 1;
+      continue;
+    } /* if */
+    /* not a new section, test for a key/value pair */
+    ep = _tcschr(sp, '=');    /* test for the equal sign or colon */
+    if (ep == NULL)
+      ep = _tcschr(sp, ':');
+    if (ep == NULL)
+      continue;               /* invalid line, ignore */
+    *ep++ = '\0';             /* split the key from the value */
+    striptrailing(sp);
+    ini_strncpy(LocalBuffer + lenSec, sp, INI_BUFFERSIZE - lenSec, QUOTE_NONE);
+    lenKey = (int)_tcslen(LocalBuffer + lenSec) + 1;
+    /* clean up the value */
+    sp = skipleading(ep);
+    sp = cleanstring(sp, &quotes);  /* Remove a trailing comment */
+    ini_strncpy(LocalBuffer + lenSec + lenKey, sp, INI_BUFFERSIZE - lenSec - lenKey, quotes);
+    /* call the callback */
+    if (!Callback(LocalBuffer, LocalBuffer + lenSec, LocalBuffer + lenSec + lenKey, UserData))
+      break;
+  } /* for */
+
+  (void)ini_close(&fp);
+  return 1;
+}
+#endif /* INI_NOBROWSE */
+
+#if ! defined INI_READONLY
+static void ini_tempname(TCHAR *dest, const TCHAR *source, int maxlength)
+{
+  TCHAR *p;
+
+  ini_strncpy(dest, source, maxlength, QUOTE_NONE);
+  p = _tcsrchr(dest, '\0');
+  assert(p != NULL);
+  *(p - 1) = '~';
+}
+
+static enum quote_option check_enquote(const TCHAR *Value)
+{
+  const TCHAR *p;
+
+  /* run through the value, if it has trailing spaces, or '"', ';' or '#'
+   * characters, enquote it
+   */
+  assert(Value != NULL);
+  for (p = Value; *p != '\0' && *p != '"' && *p != ';' && *p != '#'; p++)
+    /* nothing */;
+  return (*p != '\0' || (p > Value && *(p - 1) == ' ')) ? QUOTE_ENQUOTE : QUOTE_NONE;
+}
+
+static void writesection(TCHAR *LocalBuffer, const TCHAR *Section, INI_FILETYPE *fp)
+{
+  if (Section != NULL && _tcslen(Section) > 0) {
+    TCHAR *p;
+    LocalBuffer[0] = '[';
+    ini_strncpy(LocalBuffer + 1, Section, INI_BUFFERSIZE - 4, QUOTE_NONE);  /* -1 for '[', -1 for ']', -2 for '\r\n' */
+    p = _tcsrchr(LocalBuffer, '\0');
+    assert(p != NULL);
+    *p++ = ']';
+    _tcscpy(p, INI_LINETERM); /* copy line terminator (typically "\n") */
+    if (fp != NULL)
+      (void)ini_write(LocalBuffer, fp);
+  } /* if */
+}
+
+static void writekey(TCHAR *LocalBuffer, const TCHAR *Key, const TCHAR *Value, INI_FILETYPE *fp)
+{
+  TCHAR *p;
+  enum quote_option option = check_enquote(Value);
+  ini_strncpy(LocalBuffer, Key, INI_BUFFERSIZE - 3, QUOTE_NONE);  /* -1 for '=', -2 for '\r\n' */
+  p = _tcsrchr(LocalBuffer, '\0');
+  assert(p != NULL);
+  *p++ = '=';
+  ini_strncpy(p, Value, INI_BUFFERSIZE - (p - LocalBuffer) - 2, option); /* -2 for '\r\n' */
+  p = _tcsrchr(LocalBuffer, '\0');
+  assert(p != NULL);
+  _tcscpy(p, INI_LINETERM); /* copy line terminator (typically "\n") */
+  if (fp != NULL)
+    (void)ini_write(LocalBuffer, fp);
+}
+
+static int cache_accum(const TCHAR *string, int *size, int max)
+{
+  int len = (int)_tcslen(string);
+  if (*size + len >= max)
+    return 0;
+  *size += len;
+  return 1;
+}
+
+static int cache_flush(TCHAR *buffer, int *size,
+                      INI_FILETYPE *rfp, INI_FILETYPE *wfp, INI_FILEPOS *mark)
+{
+  int terminator_len = (int)_tcslen(INI_LINETERM);
+  int pos = 0;
+
+  (void)ini_seek(rfp, mark);
+  assert(buffer != NULL);
+  buffer[0] = '\0';
+  assert(size != NULL);
+  assert(*size <= INI_BUFFERSIZE);
+  while (pos < *size) {
+    (void)ini_read(buffer + pos, INI_BUFFERSIZE - pos, rfp);
+    while (pos < *size && buffer[pos] != '\0')
+      pos++;            /* cannot use _tcslen() because buffer may not be zero-terminated */
+  } /* while */
+  if (buffer[0] != '\0') {
+    assert(pos > 0 && pos <= INI_BUFFERSIZE);
+    if (pos == INI_BUFFERSIZE)
+      pos--;
+    buffer[pos] = '\0'; /* force zero-termination (may be left unterminated in the above while loop) */
+    (void)ini_write(buffer, wfp);
+  }
+  ini_tell(rfp, mark);  /* update mark */
+  *size = 0;
+  /* return whether the buffer ended with a line termination */
+  return (pos > terminator_len) && (_tcscmp(buffer + pos - terminator_len, INI_LINETERM) == 0);
+}
+
+static int close_rename(INI_FILETYPE *rfp, INI_FILETYPE *wfp, const TCHAR *filename, TCHAR *buffer)
+{
+  (void)ini_close(rfp);
+  (void)ini_close(wfp);
+  (void)ini_remove(filename);
+  (void)ini_tempname(buffer, filename, INI_BUFFERSIZE);
+  (void)ini_rename(buffer, filename);
+  return 1;
+}
+
+/** ini_puts()
+ * \param Section     the name of the section to write the string in
+ * \param Key         the name of the entry to write, or NULL to erase all keys in the section
+ * \param Value       a pointer to the buffer the string, or NULL to erase the key
+ * \param Filename    the name and full path of the .ini file to write to
+ *
+ * \return            1 if successful, otherwise 0
+ */
+int ini_puts(const TCHAR *Section, const TCHAR *Key, const TCHAR *Value, const TCHAR *Filename)
+{
+  INI_FILETYPE rfp;
+  INI_FILETYPE wfp;
+  INI_FILEPOS mark;
+  INI_FILEPOS head, tail;
+  TCHAR *sp, *ep;
+  TCHAR LocalBuffer[INI_BUFFERSIZE];
+  int len, match, flag, cachelen;
+
+  assert(Filename != NULL);
+  if (!ini_openread(Filename, &rfp)) {
+    /* If the .ini file doesn't exist, make a new file */
+    if (Key != NULL && Value != NULL) {
+      if (!ini_openwrite(Filename, &wfp))
+        return 0;
+      writesection(LocalBuffer, Section, &wfp);
+      writekey(LocalBuffer, Key, Value, &wfp);
+      (void)ini_close(&wfp);
+    } /* if */
+    return 1;
+  } /* if */
+
+  /* If parameters Key and Value are valid (so this is not an "erase" request)
+   * and the setting already exists, there are two short-cuts to avoid rewriting
+   * the INI file.
+   */
+  if (Key != NULL && Value != NULL) {
+    ini_tell(&rfp, &mark);
+    match = getkeystring(&rfp, Section, Key, -1, -1, LocalBuffer, sizearray(LocalBuffer), &head);
+    if (match) {
+      /* if the current setting is identical to the one to write, there is
+       * nothing to do.
+       */
+      if (_tcscmp(LocalBuffer,Value) == 0) {
+        (void)ini_close(&rfp);
+        return 1;
+      } /* if */
+      /* if the new setting has the same length as the current setting, and the
+       * glue file permits file read/write access, we can modify in place.
+       */
+      #if defined ini_openrewrite
+        /* we already have the start of the (raw) line, get the end too */
+        ini_tell(&rfp, &tail);
+        /* create new buffer (without writing it to file) */
+        writekey(LocalBuffer, Key, Value, NULL);
+        if (_tcslen(LocalBuffer) == (size_t)(tail - head)) {
+          /* length matches, close the file & re-open for read/write, then
+           * write at the correct position
+           */
+          (void)ini_close(&rfp);
+          if (!ini_openrewrite(Filename, &wfp))
+            return 0;
+          (void)ini_seek(&wfp, &head);
+          (void)ini_write(LocalBuffer, &wfp);
+          (void)ini_close(&wfp);
+          return 1;
+        } /* if */
+      #endif
+    } /* if */
+    /* key not found, or different value & length -> proceed (but rewind the
+     * input file first)
+     */
+    (void)ini_seek(&rfp, &mark);
+  } /* if */
+
+  /* Get a temporary file name to copy to. Use the existing name, but with
+   * the last character set to a '~'.
+   */
+  ini_tempname(LocalBuffer, Filename, INI_BUFFERSIZE);
+  if (!ini_openwrite(LocalBuffer, &wfp)) {
+    (void)ini_close(&rfp);
+    return 0;
+  } /* if */
+  (void)ini_tell(&rfp, &mark);
+  cachelen = 0;
+
+  /* Move through the file one line at a time until a section is
+   * matched or until EOF. Copy to temp file as it is read.
+   */
+  len = (Section != NULL) ? (int)_tcslen(Section) : 0;
+  if (len > 0) {
+    do {
+      if (!ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp)) {
+        /* Failed to find section, so add one to the end */
+        flag = cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+        if (Key!=NULL && Value!=NULL) {
+          if (!flag)
+            (void)ini_write(INI_LINETERM, &wfp);  /* force a new line behind the last line of the INI file */
+          writesection(LocalBuffer, Section, &wfp);
+          writekey(LocalBuffer, Key, Value, &wfp);
+        } /* if */
+        return close_rename(&rfp, &wfp, Filename, LocalBuffer);  /* clean up and rename */
+      } /* if */
+      /* Copy the line from source to dest, but not if this is the section that
+       * we are looking for and this section must be removed
+       */
+      sp = skipleading(LocalBuffer);
+      ep = _tcsrchr(sp, ']');
+      match = (*sp == '[' && ep != NULL && (int)(ep-sp-1) == len && _tcsnicmp(sp + 1,Section,len) == 0);
+      if (!match || Key != NULL) {
+        if (!cache_accum(LocalBuffer, &cachelen, INI_BUFFERSIZE)) {
+          cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+          (void)ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp);
+          cache_accum(LocalBuffer, &cachelen, INI_BUFFERSIZE);
+        } /* if */
+      } /* if */
+    } while (!match);
+  } /* if */
+  cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+  /* when deleting a section, the section head that was just found has not been
+   * copied to the output file, but because this line was not "accumulated" in
+   * the cache, the position in the input file was reset to the point just
+   * before the section; this must now be skipped (again)
+   */
+  if (Key == NULL) {
+    (void)ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp);
+    (void)ini_tell(&rfp, &mark);
+  } /* if */
+
+  /* Now that the section has been found, find the entry. Stop searching
+   * upon leaving the section's area. Copy the file as it is read
+   * and create an entry if one is not found.
+   */
+  len = (Key != NULL) ? (int)_tcslen(Key) : 0;
+  for( ;; ) {
+    if (!ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp)) {
+      /* EOF without an entry so make one */
+      flag = cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+      if (Key!=NULL && Value!=NULL) {
+        if (!flag)
+          (void)ini_write(INI_LINETERM, &wfp);  /* force a new line behind the last line of the INI file */
+        writekey(LocalBuffer, Key, Value, &wfp);
+      } /* if */
+      return close_rename(&rfp, &wfp, Filename, LocalBuffer);  /* clean up and rename */
+    } /* if */
+    sp = skipleading(LocalBuffer);
+    ep = _tcschr(sp, '='); /* Parse out the equal sign */
+    if (ep == NULL)
+      ep = _tcschr(sp, ':');
+    match = (ep != NULL && len > 0 && (int)(skiptrailing(ep,sp)-sp) == len && _tcsnicmp(sp,Key,len) == 0);
+    if ((Key != NULL && match) || *sp == '[')
+      break;  /* found the key, or found a new section */
+    /* copy other keys in the section */
+    if (Key == NULL) {
+      (void)ini_tell(&rfp, &mark);  /* we are deleting the entire section, so update the read position */
+    } else {
+      if (!cache_accum(LocalBuffer, &cachelen, INI_BUFFERSIZE)) {
+        cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+        (void)ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp);
+        cache_accum(LocalBuffer, &cachelen, INI_BUFFERSIZE);
+      } /* if */
+    } /* if */
+  } /* for */
+  /* the key was found, or we just dropped on the next section (meaning that it
+   * wasn't found); in both cases we need to write the key, but in the latter
+   * case, we also need to write the line starting the new section after writing
+   * the key
+   */
+  flag = (*sp == '[');
+  cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+  if (Key != NULL && Value != NULL)
+    writekey(LocalBuffer, Key, Value, &wfp);
+  /* cache_flush() reset the "read pointer" to the start of the line with the
+   * previous key or the new section; read it again (because writekey() destroyed
+   * the buffer)
+   */
+  (void)ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp);
+  if (flag) {
+    /* the new section heading needs to be copied to the output file */
+    cache_accum(LocalBuffer, &cachelen, INI_BUFFERSIZE);
+  } else {
+    /* forget the old key line */
+    (void)ini_tell(&rfp, &mark);
+  } /* if */
+  /* Copy the rest of the INI file */
+  while (ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp)) {
+    if (!cache_accum(LocalBuffer, &cachelen, INI_BUFFERSIZE)) {
+      cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+      (void)ini_read(LocalBuffer, INI_BUFFERSIZE, &rfp);
+      cache_accum(LocalBuffer, &cachelen, INI_BUFFERSIZE);
+    } /* if */
+  } /* while */
+  cache_flush(LocalBuffer, &cachelen, &rfp, &wfp, &mark);
+  return close_rename(&rfp, &wfp, Filename, LocalBuffer);  /* clean up and rename */
+}
+
+/* Ansi C "itoa" based on Kernighan & Ritchie's "Ansi C" book. */
+#define ABS(v)  ((v) < 0 ? -(v) : (v))
+
+static void strreverse(TCHAR *str)
+{
+  int i, j;
+  for (i = 0, j = (int)_tcslen(str) - 1; i < j; i++, j--) {
+    TCHAR t = str[i];
+    str[i] = str[j];
+    str[j] = t;
+  } /* for */
+}
+
+static void long2str(long value, TCHAR *str)
+{
+  int i = 0;
+  long sign = value;
+
+  /* generate digits in reverse order */
+  do {
+    int n = (int)(value % 10);          /* get next lowest digit */
+    str[i++] = (TCHAR)(ABS(n) + '0');   /* handle case of negative digit */
+  } while (value /= 10);                /* delete the lowest digit */
+  if (sign < 0)
+    str[i++] = '-';
+  str[i] = '\0';
+
+  strreverse(str);
+}
+
+/** ini_putl()
+ * \param Section     the name of the section to write the value in
+ * \param Key         the name of the entry to write
+ * \param Value       the value to write
+ * \param Filename    the name and full path of the .ini file to write to
+ *
+ * \return            1 if successful, otherwise 0
+ */
+int ini_putl(const TCHAR *Section, const TCHAR *Key, long Value, const TCHAR *Filename)
+{
+  TCHAR LocalBuffer[32];
+  long2str(Value, LocalBuffer);
+  return ini_puts(Section, Key, LocalBuffer, Filename);
+}
+
+#if defined INI_REAL
+/** ini_putf()
+ * \param Section     the name of the section to write the value in
+ * \param Key         the name of the entry to write
+ * \param Value       the value to write
+ * \param Filename    the name and full path of the .ini file to write to
+ *
+ * \return            1 if successful, otherwise 0
+ */
+int ini_putf(const TCHAR *Section, const TCHAR *Key, INI_REAL Value, const TCHAR *Filename)
+{
+  TCHAR LocalBuffer[64];
+  ini_ftoa(LocalBuffer, Value);
+  return ini_puts(Section, Key, LocalBuffer, Filename);
+}
+#endif /* INI_REAL */
+#endif /* !INI_READONLY */

atsc_app/bsp/mq.c

@@ -0,0 +1,272 @@
+#include "../inc/mq.h"
+#include <string.h>                //for memcpy
+#include <stdlib.h>                //for malloc free
+#include <sys/time.h>              //for struct timeval gettimeofday
+#include <signal.h>                //for signal sigset_t sigfillset pthread_sigmask SIG*
+#include <sys/msg.h>               //for msgget msgsnd msgrcv
+#include <unistd.h>                //for pipe write read close
+#include <pthread.h>               //for pthread*
+#include <errno.h>                 //for errno E*
+#include "../inc/rbtree.h"
+#include <stdio.h> 
+
+#define QUE_MSGTYPE    1l
+
+static int timer_alive = 0;
+static pthread_t timer_tid;
+static pthread_mutex_t timer_mutex = PTHREAD_MUTEX_INITIALIZER;
+static pthread_cond_t timer_cond = PTHREAD_COND_INITIALIZER;
+static rbtree_t timer_root;
+
+typedef struct timer_node_s timer_node_t;
+struct timer_node_s{
+	pthread_t tid;
+	uint64_t expire;
+	int status;//0 default, 1 timeout
+	rbtree_node_t rbtree_node;
+};
+
+int is_thread_alive(pthread_t tid){
+	int kill_rc = pthread_kill(tid,0);//0 success, ESRCH 线程不存在, EINVAL 信号不合法 
+	int ret = 1;//alive
+	if(kill_rc == ESRCH){
+		ret = 0;
+	}
+	return ret;
+}
+
+static void* timer_loop(void*arg);
+
+static int timer_create_new(){
+	if(timer_alive == 1){
+		return 0;
+	}
+
+	pthread_mutex_lock(&timer_mutex);
+	if(timer_alive == 1){
+		pthread_mutex_unlock(&timer_mutex);
+		return 0;
+	}
+
+	rbtree_init(&timer_root);
+	pthread_create(&timer_tid,NULL,timer_loop,NULL);
+	timer_alive = 1;
+	pthread_detach(timer_tid);//分离线程
+
+	pthread_mutex_unlock(&timer_mutex);
+	return 0;
+}
+
+static void* timer_loop(void*arg){
+	sigset_t sigset;
+    sigfillset(&sigset);
+	pthread_sigmask(SIG_SETMASK,&sigset,NULL);//当前线程屏蔽所有信号
+
+	uint64_t now;
+	struct timespec now_ts;
+	struct timespec timeout_ts;
+	rbtree_node_t *rbtree_node;
+	timer_node_t *timer_node=NULL,*timer_node_will_expire=NULL;
+
+	for(;;){
+		//加锁
+		pthread_mutex_lock(&timer_mutex);
+		clock_gettime(CLOCK_REALTIME, &now_ts);
+		now = (uint64_t)((uint64_t)now_ts.tv_sec*1000) + (uint64_t)((uint64_t)now_ts.tv_nsec/1000000);
+
+		timer_node = NULL;
+		timer_node_will_expire = NULL;
+		for(rbtree_node = rbtree_min(&timer_root,timer_root.root);
+			rbtree_node!=NULL;
+			rbtree_node = rbtree_next(&timer_root,rbtree_node)
+		){
+			timer_node = rbtree_data(rbtree_node,timer_node_t,rbtree_node);
+            //printf("[tim]loop now=%llu,exp=%llu\n",now,timer_node->expire);
+			if(timer_node->expire <= now){
+                printf("[tim]kill loop now=%llu,exp=%llu\n",now,timer_node->expire);
+				//超时, 则信号通知
+				timer_node->status = 1;
+				pthread_kill(timer_node->tid,SIGUSR1);
+				continue;
+			}
+			timer_node_will_expire = timer_node;
+            printf("[tim]loop now=%llu,exp=%llu\n",now,timer_node->expire);
+			break;
+		}
+
+		//条件等待
+		if(timer_node_will_expire == NULL){
+			pthread_cond_wait(&timer_cond,&timer_mutex);
+		}else{
+		    //printf("[tim].will=%llu\n",timer_node_will_expire->expire);
+			timeout_ts.tv_sec  = (uint64_t)((uint64_t)timer_node_will_expire->expire/1000);
+			timeout_ts.tv_nsec = (uint64_t)((uint64_t)timer_node_will_expire->expire%1000)*1000000;
+            printf("[tim]con sec=%llu,nsec=%llu\n",(uint64_t)timeout_ts.tv_sec, (uint64_t)timeout_ts.tv_nsec);
+			pthread_cond_timedwait(&timer_cond,&timer_mutex,&timeout_ts);//注意, 时间不能是NULL
+		}
+		
+		//解锁
+		pthread_mutex_unlock(&timer_mutex);
+	}
+	timer_alive = 0;
+	pthread_exit(NULL);
+}
+
+int add_timer(timer_node_t *node,size_t timeout){//单位ms
+	node->tid = pthread_self();
+	node->status = 0;
+	struct timespec ts;
+    uint64_t lldata;
+	clock_gettime(CLOCK_REALTIME, &ts);
+	node->expire = (uint64_t)(((uint64_t)ts.tv_sec*1000)+ (uint64_t)timeout + (uint64_t)((uint64_t)ts.tv_nsec/1000000));
+	node->rbtree_node.key = node->expire;
+    lldata = (uint64_t)(((uint64_t)ts.tv_sec*1000) + (uint64_t)((uint64_t)ts.tv_nsec/1000000));
+    
+    printf("[rec].time_exp=%llu\n",node->expire);
+	printf("[rec].time_cur=%llu\n",lldata);
+    
+	pthread_mutex_lock(&timer_mutex);
+	rbtree_insert(&timer_root,&node->rbtree_node);
+	pthread_cond_signal(&timer_cond);
+	pthread_mutex_unlock(&timer_mutex); 
+	//pthread_cond_signal(&timer_cond);
+	return 0;
+}
+
+int delete_timer(timer_node_t *node){
+	pthread_mutex_lock(&timer_mutex);
+	rbtree_delete(&timer_root,&node->rbtree_node);
+	pthread_mutex_unlock(&timer_mutex);
+	return 0;
+}
+
+int _signal(int signo, void (*sighandler)(int))
+{
+    struct sigaction sa;
+    sigset_t set;
+    //sigemptyset(&set);//当进入sighandler时,不屏蔽所有信号,可被其他信号中断
+	sigfillset(&set);//当进入sighandler时,屏蔽所有信号
+    sa.sa_mask = set;
+    sa.sa_handler = sighandler;
+    sa.sa_restorer = NULL;
+    sa.sa_flags = 0;
+    return sigaction(signo, &sa, NULL);
+}
+
+void timer_sighandler(int signo){
+    return;
+}
+
+typedef struct {
+	long msgtype;	
+	unsigned char buffer[0];
+} MSGBUF;
+
+ssize_t send_que_timedwait(key_t qid,void* pdata,size_t len,int timeout){
+	int	msgqid,retu;
+	timer_node_t node = {0};
+	unsigned char* buf = NULL;
+	MSGBUF* que_msgbuf;
+
+	//https://man7.org/linux/man-pages/man2/msgget.2.html
+	msgqid=msgget(qid,0666);
+	if(msgqid == -1){
+		if(errno == ENOENT){
+			msgqid=msgget(qid,IPC_CREAT|0666);
+		}
+		if(msgqid == -1)
+			return -1;
+	}
+
+	buf = malloc(sizeof(MSGBUF) + len);
+	if(buf == NULL)
+		return -1;
+	
+	que_msgbuf = (MSGBUF*)buf;
+	que_msgbuf->msgtype = QUE_MSGTYPE;
+	memcpy(que_msgbuf->buffer,pdata,len);
+
+	// int msgsnd(int msqid, const void *msgp, size_t msgsz, int msgflg)
+	// msgflag
+	// 0：当消息队列满时，msgsnd将会阻塞，直到消息能写进消息队列
+	// IPC_NOWAIT：当消息队列已满的时候，msgsnd函数不等待立即返回
+	// IPC_NOERROR：若发送的消息大于size字节，则把该消息截断，截断部分将被丢弃，且不通知发送进程。
+	// 返回值
+	// 成功：0
+	// 出错：-1，错误原因存于error中
+	// EAGAIN：参数msgflg设为IPC_NOWAIT，而消息队列已满
+	// EIDRM：标识符为msqid的消息队列已被删除
+	// EACCESS：无权限写入消息队列
+	// EFAULT：参数msgp指向无效的内存地址
+	// EINTR：队列已满而处于等待情况下被信号中断
+	// EINVAL：无效的参数msqid、msgsz或参数消息类型type小于0
+
+	if(timeout == -1){
+		retu=msgsnd(msgqid,buf,len,0);
+        //printf("");
+	}
+	else if(timeout == 0){
+		retu=msgsnd(msgqid,buf,len,IPC_NOWAIT);
+	}else{
+		timer_create_new();
+		
+		_signal(SIGUSR1,timer_sighandler);
+		add_timer(&node,timeout);
+		retu=msgsnd(msgqid,buf,len,0);
+		delete_timer(&node);
+		if(errno == EINTR && node.status == 1){
+			errno = ETIMEDOUT;
+		}
+	}
+
+	free(buf);
+	return retu;
+}
+
+ssize_t read_que_timedwait(key_t qid,void* pdata,size_t len,int timeout){
+	int	msgqid,retu;
+	timer_node_t node = {0};
+	unsigned char* buf = NULL;
+	MSGBUF* que_msgbuf = NULL;
+
+	msgqid=msgget(qid,0666);//https://man7.org/linux/man-pages/man2/msgget.2.html
+	if(msgqid == -1){
+		if(errno == ENOENT){
+			msgqid=msgget(qid,IPC_CREAT|0666);
+		}
+		if(msgqid == -1)
+            printf("msgget err.\n");
+			return -1;
+	}
+
+	buf = malloc(sizeof(MSGBUF) + len);
+	if(buf == NULL){
+        printf("malloc err.\n");
+		return -1;
+	}
+
+	if(timeout == -1){
+		retu=msgrcv(msgqid,buf,len,0,0);
+	}
+	else if(timeout == 0){
+		retu=msgrcv(msgqid,buf,len,0,IPC_NOWAIT);
+	}else{
+		timer_create_new();
+		
+		_signal(SIGUSR1,timer_sighandler);
+		add_timer(&node,timeout);
+		retu=msgrcv(msgqid,buf,len,0,0);
+		delete_timer(&node);
+		if(errno == EINTR && node.status == 1){
+			errno = ETIMEDOUT;
+		}	
+	}
+
+	que_msgbuf = (MSGBUF*)buf;
+	if(retu > 0){
+		memcpy(pdata,que_msgbuf->buffer,retu);
+	}
+
+	free(buf);
+	return retu;
+}

atsc_app/bsp/msg.c

@@ -0,0 +1,594 @@
+#include <stdio.h>
+#include <sys/types.h>
+#include <sys/ipc.h>
+#include <sys/msg.h>
+#include <string.h>
+#include <unistd.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <errno.h>
+#include <sys/msg.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+#include <fcntl.h>
+#include <termios.h>
+#include <errno.h>
+#include <math.h>
+#include <pthread.h>
+#include <semaphore.h>
+#include <string.h>
+#include <unistd.h>
+#include <sys/prctl.h>
+
+#include "../inc/main.h"
+#include "../inc/msg.h"
+#include "../inc/isys_config.h"
+#include "../inc/iweb_task.h"
+#include "../inc/os_task.h"
+#include "../inc/iuart_user.h"
+#include "../inc/http_get.h"
+#include "../inc/upgrade.h"
+#include "../inc/isys_com.h"
+
+
+
+//extern void http_save_sys_para(S_CGI_SYS_PARA_T *ppara);
+//extern void lcd_save_web_sys_para(MSG* pmsg);
+extern void uart_remote(MSG *pmsg);
+extern void uart_hw_init(void);
+extern void uart_hw_deinit(void);
+extern void udp_imgp_reinit(MSG *pmsg);
+
+extern void rs232_uart_hw_init(void);
+extern void rs232_uart_hw_deinit(void);
+
+
+#if 1//@CONFIRMED
+int sys_msg_send(MSG *p_msg, key_t keyid)
+{
+
+    struct msg_st data;
+
+    int msgid = -1;
+
+    // creat msg queue
+    msgid = msgget((key_t)keyid, 0666 | IPC_CREAT);
+    if(msgid == -1) {
+        fprintf(stderr, "msgget failed with error: %d, keyid=%d\n", errno,keyid);
+        return -1;
+    }
+
+    switch (keyid)
+    {
+    case WEB_MSG_KEY_ID:
+        data.mtype = MSGQ_TYPE_WEB;
+        break;
+    case LCD_MSG_KEY_ID:
+        data.mtype = MSGQ_TYPE_LCD;
+        break;
+    case UART_MSG_KEY_ID:
+        data.mtype = MSGQ_TYPE_UART;
+        break;
+    case TSOIP_MSG_KEY_ID:
+        data.mtype = MSGQ_TYPE_TSOIP;
+        break;
+    case LOG_MSG_KEY_ID:
+        data.mtype = MSGQ_TYPE_LOG;
+        break;
+	case GPS_UART_MSG_KEY_ID:
+		data.mtype = MSGQ_TYPE_GPS_UART;
+		break;
+	//....
+	//add hear
+	//....
+    default:
+        data.mtype = MSGQ_TYPE_ALL;
+        break;
+    }
+    memcpy(&data.msg, p_msg, sizeof(MSG));
+
+    // send msg
+    if(msgsnd(msgid, (void*)&data, MAX_TEXT, 0) == -1) {
+            fprintf(stderr, "a-msgsnd failed, errno=%d, keyid=%d, msgid=%d\n",errno,keyid,msgid);
+            return -1;
+    }
+
+    //printf("send type=%d, rpdata= 0x%x ,lpara=0x%lx\n", p_msg->type , p_msg->rPara, p_msg->lPara);
+    return 0;
+}
+
+#endif
+
+
+#if DEF_NEED_TO_EN	//@NEED_TO_EN
+
+static void * log_msg_recv_thr(void * args)
+{
+    int running = 1;
+    int msgid = -1;
+    struct msg_st data;
+    long int msgtype = MSGQ_TYPE_LOG; //注意1
+
+    //建立消息队列
+    msgid = msgget((key_t)LOG_MSG_KEY_ID, 0666 | IPC_CREAT);
+    if(msgid == -1) {
+        fprintf(stderr, "msgget failed with error: %d\n", errno);
+        goto TSOIP_MSG_RECV_ERR_EXIT;
+    }
+
+    //从队列中获取消息
+    while(running) {
+        if(msgrcv(msgid, (void*)&data, BUFSIZ, msgtype, 0) == -1) {
+            fprintf(stderr, "msgrcv failed with errno: %d\n", errno);
+            goto TSOIP_MSG_RECV_ERR_EXIT;
+        }
+
+        //printf("[LOG MSG  recv ]getmsg: data.msg_type=%ld , data.msg.type=%u\n",data.mtype, data.msg.type);
+
+        switch(data.msg.type)
+        {
+        case MSG_LOG:
+
+            break;
+
+        case MSG_LOG_RECORD_RESET:
+
+            break;
+        }
+        usleep(50000);
+    }
+
+
+TSOIP_MSG_RECV_ERR_EXIT:
+
+    //删除消息队列
+    if(msgctl(msgid, IPC_RMID, 0) == -1) {
+        fprintf(stderr, "msgctl(IPC_RMID) failed\n");
+    }
+    return (void*)NULL;
+}
+#endif//DEF_NEED_TO_EN
+#if 1
+static void * tsoip_msg_recv_thr(void * args)
+{
+    int running = 1;
+    int msgid = -1;
+    struct msg_st data;
+    long int msgtype = MSGQ_TYPE_TSOIP; //注意1
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.] tsoip_msg_recv_thr Start.\n");
+
+    //建立消息队列
+    msgid = msgget((key_t)TSOIP_MSG_KEY_ID, 0666 | IPC_CREAT);
+    if(msgid == -1) {
+        fprintf(stderr, "msgget failed with error: %d\n", errno);
+        goto TSOIP_MSG_RECV_ERR_EXIT;
+    }
+	log_printf(LOG_DEBUG,I_NOUSED,"tsoip msg_id=%d\n",msgid);
+
+    //从队列中获取消息
+    while(running) {
+
+        if(get_upgrade_flg()){
+            usleep(1000000);
+            continue;
+        }
+        if(msgrcv(msgid, (void*)&data, BUFSIZ, msgtype, 0) == -1) {
+            fprintf(stderr, "msgrcv failed with errno: %d\n", errno);
+            goto TSOIP_MSG_RECV_ERR_EXIT;
+        }
+
+        //printf("[UART MSG  recv ]getmsg: data.msg_type=%ld , data.msg.type=%u\n",data.mtype, data.msg.type);
+        switch(data.msg.type)
+        {
+        case MSG_IGMP_REINIT:
+            udp_imgp_reinit(&data.msg);
+            break;
+        }
+
+//        if(data.msg.need_free==MSG_NEED_FREE)
+//            free(&data.msg);
+        usleep(50000);
+    }
+
+
+TSOIP_MSG_RECV_ERR_EXIT:
+
+    //删除消息队列
+    if(msgctl(msgid, IPC_RMID, 0) == -1) {
+        fprintf(stderr, "msgctl(IPC_RMID) failed\n");
+    }
+    return (void*)NULL;
+}
+#endif
+
+#if 1
+
+static void * uart_msg_recv_thr(void * args)
+{
+	int running = 1;
+	int msgid = -1;
+	struct msg_st data;
+	long int msgtype = MSGQ_TYPE_UART; //注意1
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.] uart_msg_recv_thr Start.\n");
+
+	//建立消息队列
+	msgid = msgget((key_t)UART_MSG_KEY_ID, 0666 | IPC_CREAT);
+	if(msgid == -1) {
+		fprintf(stderr, "msgget failed with error: %d\n", errno);
+		goto UART_MSG_RECV_ERR_EXIT;
+	}
+	log_printf(LOG_DEBUG,I_NOUSED,"u232 msg_id=%d\n",msgid);
+
+	//从队列中获取消息
+	while(running) {
+
+        if(get_upgrade_flg()){
+            usleep(1000000);
+            continue;
+        }
+		if(msgrcv(msgid, (void*)&data, BUFSIZ, msgtype, 0) == -1) {
+			fprintf(stderr, "msgrcv failed with errno: %d\n", errno);
+			goto UART_MSG_RECV_ERR_EXIT;
+		}
+
+        //printf("[UART MSG  recv ]getmsg: data.msg_type=%ld , data.msg.type=%u\n",data.mtype, data.msg.type);
+        switch(data.msg.type)
+        {
+        case MSG_RS232:
+            uart_remote(&data.msg);
+            break;
+        case MSG_UART_RE_INIT:
+            uart_hw_deinit();
+            uart_hw_init();
+			rs232_uart_hw_init();
+            break;
+
+        }
+
+        usleep(1000);
+	}
+
+
+UART_MSG_RECV_ERR_EXIT:
+
+    //删除消息队列
+    if(msgctl(msgid, IPC_RMID, 0) == -1) {
+        fprintf(stderr, "msgctl(IPC_RMID) failed\n");
+    }
+
+	return (void*)NULL;
+}
+
+extern void gps_uart_proc(MSG *pmsg);
+extern void ublox_proc_state(void);
+static void * gps_uart_msg_recv_thr(void * args)
+{
+	int running = 1;
+	int msgid = -1;
+	struct msg_st data;
+	long int msgtype = MSGQ_TYPE_GPS_UART; //注意1
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.] gps_uart_msg_recv_thr Start.\n");
+
+	//建立消息队列
+	msgid = msgget((key_t)GPS_UART_MSG_KEY_ID, 0666 | IPC_CREAT);
+	if(msgid == -1) {
+		log_printf(LOG_ERR,I_NOUSED,"msgget failed with error\n");
+
+		fprintf(stderr, "msgget failed with error: %d\n", errno);
+		goto GPS_UART_MSG_RECV_ERR_EXIT;
+	}
+
+	log_printf(LOG_DEBUG,I_NOUSED,"gps msg_id=%d\n",msgid);
+
+	//从队列中获取消息
+	while(running) {
+		if(msgrcv(msgid, (void*)&data, BUFSIZ, msgtype, 0) == -1) {
+			log_printf(LOG_ERR,I_NOUSED,"msgrcv failed with errno\n");
+			fprintf(stderr, "msgrcv failed with errno: %d\n", errno);
+			goto GPS_UART_MSG_RECV_ERR_EXIT;
+		}
+
+		//printf("[UART MSG  recv ]getmsg: data.msg_type=%ld , data.msg.type=%u\n",data.mtype, data.msg.type);
+		switch(data.msg.type)
+		{
+		case MSG_RS232:
+			log_printf(LOG_DEBUG,I_NOUSED," gps_uart get MSG_RS232 id=%d\n",msgid);
+			gps_uart_proc(&data.msg);
+			break;
+		case MSG_SEC:
+			//printf(" gps_uart get MSG_SEC\n");
+			ublox_proc_state();
+			break;
+		default:
+			break;
+		}
+
+		usleep(1000);
+	}
+
+
+GPS_UART_MSG_RECV_ERR_EXIT:
+
+	//删除消息队列
+	if(msgctl(msgid, IPC_RMID, 0) == -1) {
+		fprintf(stderr, "msgctl(IPC_RMID) failed\n");
+	}
+
+	return (void*)NULL;
+}
+
+
+#endif
+//@tmp
+/*uint8 g_flg_load=0;
+uint8 g_web_flg_load=0;
+#include "../inc/dpd_proc.h"*/
+
+static void * lcd_msg_recv_thr(void * args)
+{
+	int running = 1;
+	int msgid = -1;
+	struct msg_st data;
+	long int msgtype = MSGQ_TYPE_LCD; //注意1
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.] lcd_msg_recv_thr Start.\n");
+
+	//建立消息队列
+	msgid = msgget((key_t)LCD_MSG_KEY_ID, 0666 | IPC_CREAT);
+	if(msgid == -1) {
+		fprintf(stderr, "msgget failed with error: %d\n", errno);
+		goto LCD_MSG_RECV_ERR_EXIT;
+	}
+	log_printf(LOG_DEBUG,I_NOUSED,"lcd msg_id=%d\n",msgid);
+
+	//从队列中获取消息
+	while(running) {
+
+        if(get_upgrade_flg()){
+            usleep(2000000);
+            continue;
+        }
+		if(msgrcv(msgid, (void*)&data, BUFSIZ, msgtype, 0) == -1) {
+			fprintf(stderr, "msgrcv failed with errno: %d\n", errno);
+            log_printf(LOG_ERR,I_NOUSED,"msgrcv failed with errno: %d\n", errno);
+			goto LCD_MSG_RECV_ERR_EXIT;
+		}
+
+        //printf("[LCD MSG ]getmsg: data.msg_type=%ld , data.msg.type=%u\n",data.mtype, data.msg.type);
+
+        switch(data.msg.type)
+        {
+	        case MSG_WEB_SAVE_PARA:
+				http_save_change_para(&data.msg);
+	            break;
+
+			case MSG_PSTS_UPDATE:
+            #if USE_PSTS
+                psts_para_update(&atsc_para.psts_para);
+            #endif
+                break;
+        }
+        usleep(50000);
+	}
+
+
+LCD_MSG_RECV_ERR_EXIT:
+
+    //删除消息队列
+    if(msgctl(msgid, IPC_RMID, 0) == -1) {
+        fprintf(stderr, "msgctl(IPC_RMID) failed\n");
+    }
+
+	return (void*)NULL;
+}
+
+
+static void * web_msg_recv_thr(void * args)
+{
+	int running = 1;
+	int msgid = -1;
+	struct msg_st data;
+	long int msgtype = MSGQ_TYPE_WEB; //注意
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.] web_msg_recv_thr Start.\n");
+
+	//建立消息队列
+	msgid = msgget((key_t)WEB_MSG_KEY_ID, 0666 | IPC_CREAT);
+	if(msgid == -1) {
+		fprintf(stderr, "msgget failed with error: %d\n", errno);
+		goto WEB_MSG_RECV_ERR_EXIT;
+	}
+	log_printf(LOG_DEBUG,I_NOUSED,"web msg_id=%d\n",msgid);
+
+	while(running) {
+
+        if(get_upgrade_flg()){
+            usleep(1000000);
+            continue;
+        }
+
+        // recv msg
+		if(msgrcv(msgid, (void*)&data, BUFSIZ, msgtype, 0) == -1) {
+			fprintf(stderr, "msgrcv failed with errno: %d\n", errno);
+			goto WEB_MSG_RECV_ERR_EXIT;
+		}
+#if 0
+	    printf("[web msg] getmsg: data.msg_type=%ld , data.msg.type=%u, %s lpara=0x%lx\n",
+	        data.mtype,
+	        data.msg.type,
+	        (data.msg.need_free==MSG_NEED_FREE)?"needfree":" ",
+	        data.msg.lPara);
+#endif
+
+
+#if 1//proc on lcd, NEED_TO_EN
+        http_save_change_para(&data.msg);
+#endif
+        usleep(50000);
+	}
+
+
+WEB_MSG_RECV_ERR_EXIT:
+
+    //删除消息队列
+    if(msgctl(msgid, IPC_RMID, 0) == -1) {
+        fprintf(stderr, "msgctl(IPC_RMID) failed\n");
+    }
+
+	return (void*)NULL;
+}
+
+
+int creat_web_msg_thread(void)
+{
+    int ret = -1;
+    pthread_t web_msg_thr_id;
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.]->-\n");
+    ret = pthread_create(&web_msg_thr_id, NULL, (void *)web_msg_recv_thr, NULL);
+    if(ret != 0) {
+        log_printf(LOG_ERR,I_NOUSED," creat thread err.\n");
+        return -1;
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED," Ok. creat thread succeed.\n");
+    }
+
+    return 0;
+}
+
+//@tmp
+/*void send_msg_for_tst(){
+ static MSG msg;
+ MSG *pmsg;
+
+ pmsg = &msg;
+
+ pmsg->type = 0xff;//0xffMSG_WEB_SAVE_PARA
+ pmsg->wPara =0xff; // CGI_CTTB_WEB_SYSPARA
+ pmsg->lPara =0;
+ pmsg->need_free = MSG_NO_NEED_FREE;
+ printf("[%s,%d]\n",__FUNCTION__,__LINE__);
+ printf("send msg to LCd\n");
+
+ cttb_msg_send_to_lcd(pmsg);
+}*/
+
+int creat_lcd_msg_thread(void)
+{
+    int ret = -1;
+    pthread_t lcd_msg_thr_id;
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.]->-\n");
+    ret = pthread_create(&lcd_msg_thr_id, NULL, (void *)lcd_msg_recv_thr, NULL);
+    if(ret != 0) {
+        log_printf(LOG_ERR,I_NOUSED,"  creat thread err.\n");
+        return -1;
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED," Ok . creat thread succeed.\n");
+    }
+
+    return 0;
+}
+
+#if 1
+
+int creat_uart_msg_thread(void)
+{
+    int ret = -1;
+    pthread_t uart_msg_thr_id;
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.]->-\n");
+    ret = pthread_create(&uart_msg_thr_id, NULL, (void *)uart_msg_recv_thr, NULL);
+    if(ret != 0) {
+        log_printf(LOG_ERR,I_NOUSED," creat thread err.\n");
+        return -1;
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED," Ok. creat thread succeed.\n");
+    }
+
+    return 0;
+}
+
+extern uint8 g_gps_init_ok;
+void sec_msg_to_gps_uart_thr(void)
+{
+	MSG msg;
+
+	if(g_gps_init_ok==1){
+	    msg.type        = MSG_SEC;
+	    msg.need_free   = MSG_NO_NEED_FREE; // lpara no need free
+	    msg.rPara       = UART_USER_232_COM;
+	    msg_send_to_gps_uart(&msg);//cttb_msg_send_to_uart
+	}
+}
+
+int creat_gps_uart_msg_thread(void)
+{
+    int ret = -1;
+    pthread_t gps_uart_msg_thr_id;
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.]->-\n");
+    ret = pthread_create(&gps_uart_msg_thr_id, NULL, (void *)gps_uart_msg_recv_thr, NULL);
+    if(ret != 0) {
+        log_printf(LOG_ERR,I_NOUSED,"  creat thread err.\n");
+        return -1;
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED," Ok . creat thread succeed.\n");
+    }
+
+    return 0;
+}
+
+#endif
+
+#if 1
+int creat_tsoip_msg_thread(void)
+{
+    int ret = -1;
+    pthread_t tsoip_msg_thr_id;
+
+	log_printf(LOG_DEBUG,I_NOUSED,"[.thr.]->-\n");
+    ret = pthread_create(&tsoip_msg_thr_id, NULL, (void *)tsoip_msg_recv_thr, NULL);
+    if(ret != 0) {
+        log_printf(LOG_ERR,I_NOUSED,"  creat thread err.\n");
+        return -1;
+    }
+    else{
+        log_printf(LOG_DEBUG,I_NOUSED," Ok. creat thread succeed.\n");
+    }
+
+    return 0;
+}
+#endif
+
+#if DEF_NEED_TO_EN	//@NEED_TO_EN
+
+int creat_log_msg_thread(void)
+{
+    int ret = -1;
+    pthread_t log_msg_thr_id;
+
+    ret = pthread_create(&log_msg_thr_id, NULL, (void *)log_msg_recv_thr, NULL);
+    if(ret != 0) {
+        printf(" Err.[%s,%d] creat thread err.\n", __FUNCTION__,__LINE__);
+        return -1;
+    }
+    else{
+        printf(" Ok .[%s,%d] creat thread succeed.\n", __FUNCTION__,__LINE__);
+    }
+
+    return 0;
+}
+#endif//DEF_NEED_TO_EN
+

atsc_app/bsp/network_monitor.c

@@ -0,0 +1,368 @@
+
+#include "config.h"
+#include "type.h"
+#include "lwipopts.h"
+#include "string.h"
+#include "opt.h"
+extern struct tcp_pcb *usr_tcp_pcb_addr[MEMP_NUM_TCP_PCB];
+extern struct memp    *usr_seg_addr[MEMP_NUM_TCP_SEG];
+extern struct pbuf *usr_pbuf_pool_addr[PBUF_POOL_SIZE];
+
+static uint32 g_port;
+
+#if USE_RESET_TCP
+#include "lwip/netif.h"
+#include "stm32f4xx_hal_eth.h"
+
+extern struct netif gnetif; /* network interface structure */
+extern ETH_HandleTypeDef heth;
+void usr_close_network(void)
+{
+    HAL_ETH_Stop(&heth);
+    netif_set_down(&gnetif);
+}
+void usr_open_network(void)
+{
+    
+    netif_set_up(&gnetif);
+    HAL_ETH_Start(&heth);
+}
+
+/*
+0.检测tcp_seg的内存是否已经用尽；
+1.定位到占用相应tcp_seg的内存对应的tcp_pcb；
+2.将tcp_pcb从tcp_pcb_lists中清除；
+3.释放相应的tcp_pcb；
+*/
+extern struct stats_ lwip_stats;
+extern struct tcp_pcb *tcp_bound_pcbs;
+extern union tcp_listen_pcbs_t tcp_listen_pcbs;
+extern struct tcp_pcb *tcp_active_pcbs;
+extern struct tcp_pcb *tcp_tw_pcbs;
+#include "tcp.h"
+extern void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb);
+
+static uint16 occupyed_num=0;
+static uint16 rels_lis_num=0;
+static uint16 rels_bod_num=0;
+static uint16 rels_act_num=0;
+static uint16 rels_tw_num=0;
+static uint16 checked_times=0;
+static uint16 reset_pbuf_pool_cnt=0;
+
+uint16 get_tcp_seg_errnum(void)
+{
+    return lwip_stats.memp[4]->err;
+}
+
+uint16 get_tcp_seg_occupy(void)
+{
+    return (uint16)lwip_stats.memp[4]->used*100/lwip_stats.memp[4]->avail;
+}
+
+
+uint8 check_pcb_buf_err(void)
+{
+    if(((lwip_stats.memp[4]->used >= lwip_stats.memp[4]->avail) && (lwip_stats.memp[4]->err >= 50))//tcp_seg
+        ||((lwip_stats.memp[4]->used >= lwip_stats.memp[4]->avail*3/4) && (lwip_stats.memp[4]->err >= 50))){
+        return 1;
+    }
+    else if((lwip_stats.memp[14]->used >= lwip_stats.memp[14]->avail*3/4) && (lwip_stats.memp[14]->err >= 50)){//pbuf_pool
+        return 2;
+    }
+    else{
+        return 0;
+    }
+}
+
+void check_and_release_pbuf_pool(void)
+{
+    struct pbuf *p;
+    uint16 i;
+    
+    for (i=0; i<PBUF_POOL_SIZE; i++){
+        p = usr_pbuf_pool_addr[i];
+		pbuf_free(p);
+    }
+
+    lwip_stats.memp[14]->err=0;
+    reset_pbuf_pool_cnt++;
+    if(reset_pbuf_pool_cnt>=2000)reset_pbuf_pool_cnt=10;
+}
+void check_and_release_pcb(void)
+{
+    struct tcp_pcb *pcb_occupy[MEMP_NUM_TCP_PCB]={NULL};
+    struct tcp_pcb *poccupy;
+    struct tcp_pcb *pcb;
+//    static uint16 check_cnt=0;
+    uint16 occupy_index=0;
+    uint16 rels_lis_cnt=0;
+    uint16 rels_bod_cnt=0;
+    uint16 rels_act_cnt=0;
+    uint16 rels_tw_cnt=0;
+    uint16 i,j;
+
+    //定位
+    for(i=0;i<MEMP_NUM_TCP_PCB;i++)
+    {
+        for(j=0;j<MEMP_NUM_TCP_SEG;j++)
+        {
+            if((usr_tcp_pcb_addr[i]->unsent == (struct tcp_seg *)((uint8*)usr_seg_addr[j]+MEMP_SIZE))
+                ||(usr_tcp_pcb_addr[i]->unacked == (struct tcp_seg *)((uint8*)usr_seg_addr[j]+MEMP_SIZE))
+                ||(usr_tcp_pcb_addr[i]->ooseq == (struct tcp_seg *)((uint8*)usr_seg_addr[j]+MEMP_SIZE))
+		    )
+            {
+                pcb_occupy[occupy_index] = usr_tcp_pcb_addr[i];
+                printf("pcb_occupy:0x%8x\n",pcb_occupy[occupy_index]);
+                occupy_index++;
+            }
+        }
+     }
+
+    //释放
+    for(poccupy = pcb_occupy[0],i=0;poccupy!=NULL&&i<50;poccupy=pcb_occupy[i])
+    {
+        for (pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next)
+        {
+            if(pcb==poccupy){//刚好就是被占用的pcb
+                tcp_pcb_remove(&tcp_active_pcbs, pcb);
+                printf("checked and remove tcp form tcp_active_pcb 0x%8x\n",pcb);
+                rels_act_cnt++;
+                break;
+            }
+        }
+
+        for (pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next)
+        {
+            if(pcb==poccupy){//刚好就是被占用的pcb
+                tcp_pcb_remove(&tcp_tw_pcbs, pcb);
+                printf("checked and remove tcp form tcp_tw_pcbs 0x%8x\n",pcb);
+                rels_tw_cnt++;
+                break;
+            }
+        }
+
+        for (pcb = tcp_bound_pcbs; pcb != NULL; pcb = pcb->next)
+        {
+            if(pcb==poccupy){//刚好就是被占用的pcb
+                tcp_pcb_remove(&tcp_bound_pcbs, pcb);
+                printf("checked and remove tcp form tcp_bound_pcbs 0x%8x\n",pcb);
+                rels_bod_cnt++;
+                break;
+            }
+        }
+
+        i++;
+
+        /*for (pcb = (struct tcp_pcb *)tcp_listen_pcbs->pcbs; pcb != NULL; pcb = pcb->next)
+        {
+            if(pcb==poccupy){//刚好就是被占用的pcb
+                //tcp_pcb_remove(&tcp_listen_pcbs, pcb);
+                printf("checked tcp form tcp_listen_pcbs 0x%8x\n",pcb);
+                rels_lis_cnt++;
+                break;
+            }
+        }*/
+
+    }
+	
+    lwip_stats.memp[4]->err=0;
+	
+    occupyed_num = occupy_index;
+    checked_times++;
+
+    rels_lis_num = rels_lis_cnt;
+    rels_bod_num = rels_bod_cnt;
+    rels_act_num = rels_act_cnt;
+    rels_tw_num  = rels_tw_cnt;
+
+}
+
+#endif//USE_RESET_TCP
+
+
+#if USE_UART_CMD_PRINT_LWIP
+
+//------------------------------
+static char strBuf[100];
+extern void uart_send_string(uint32 port,const uint8 *pbuf,uint32 len);
+void usr_print(const char *pbuf,uint32 len)
+{
+    uart_send_string(g_port,(uint8 *)pbuf,len);
+}
+
+void usr_lwip_print(char *pbuf,uint32 value)
+{
+    sprintf(strBuf,pbuf,value);
+    usr_print(strBuf,strlen(strBuf));
+}
+
+
+#define STATS_PRINT(x) do {printf x;} while(0)
+#include <stdio.h>
+#include <stdlib.h>
+
+//#if USE_ETH_DBG
+extern s_USR_DBG_ETH udbg_eth;  
+
+//打印自定义的状态
+void usr_stats_print()
+{
+    /*STATS_PRINT(("\n%s\n\t", "usr_eth"));
+    STATS_PRINT(("eth_int: %d\n\t", udbg_eth.eth_int_in_cnt));
+    STATS_PRINT(("eth_recv_sem: %d\n\t", udbg_eth.eth_recv_sem_cnt));
+    STATS_PRINT(("eth_tcpip: %d\n\t", udbg_eth.eth_recv_tcpip_cnt));
+    STATS_PRINT(("eth_tcp_in: %d\n\t", udbg_eth.eth_tcp_in_cnt));
+    STATS_PRINT(("eth_ip4_in: %d\n\t", udbg_eth.eth_ip4_in_cnt));
+    STATS_PRINT(("eth_udp_in: %d\n\t", udbg_eth.eth_udp_in_cnt));
+    STATS_PRINT(("eth_icmp_in: %d\n\t", udbg_eth.eth_icmp_in_cnt));
+    STATS_PRINT(("eth_tcp_listen: %d\n\t", udbg_eth.eth_tcp_listen_cnt));
+    STATS_PRINT(("http_accept: %d\n\t", udbg_eth.eth_http_accept_c));
+    STATS_PRINT(("http_recv: %d\n\t", udbg_eth.eth_http_recv_c));
+    STATS_PRINT(("http_parse: %d\n\t", udbg_eth.eth_http_parse_c));
+    STATS_PRINT(("http_sent: %d\n\t", udbg_eth.eth_http_send_c));
+    STATS_PRINT(("tcp_out: %d\n\t", udbg_eth.eth_tcp_out_c));
+    STATS_PRINT(("lvl_alloc_err: %d\n\t", udbg_eth.low_level_in_alloc_err));
+    STATS_PRINT(("memp_tcp_seg_reset: %d\n\t", udbg_eth.memp_tcp_seg_reset_c));*/
+    
+    usr_lwip_print("\nusr_eth %d\n\t", 0);
+    usr_lwip_print("eth_int: %d\n\t", udbg_eth.eth_int_in_cnt);
+    usr_lwip_print("eth_recv_sem: %d\n\t", udbg_eth.eth_recv_sem_cnt);
+    usr_lwip_print("eth_tcpip: %d\n\t", udbg_eth.eth_recv_tcpip_cnt);
+    usr_lwip_print("eth_tcp_in: %d\n\t", udbg_eth.eth_tcp_in_cnt);
+    usr_lwip_print("eth_ip4_in: %d\n\t", udbg_eth.eth_ip4_in_cnt);
+    usr_lwip_print("eth_udp_in: %d\n\t", udbg_eth.eth_udp_in_cnt);
+    usr_lwip_print("eth_icmp_in: %d\n\t", udbg_eth.eth_icmp_in_cnt);
+    usr_lwip_print("eth_tcp_listen: %d\n\t", udbg_eth.eth_tcp_listen_cnt);
+    usr_lwip_print("http_accept: %d\n\t", udbg_eth.eth_http_accept_c);
+    usr_lwip_print("http_recv: %d\n\t", udbg_eth.eth_http_recv_c);
+    usr_lwip_print("http_parse: %d\n\t", udbg_eth.eth_http_parse_c);
+    usr_lwip_print("http_sent: %d\n\t", udbg_eth.eth_http_send_c);
+    usr_lwip_print("tcp_out: %d\n\t", udbg_eth.eth_tcp_out_c);
+    usr_lwip_print("lvl_alloc_err: %d\n\t", udbg_eth.low_level_in_alloc_err);
+    usr_lwip_print("memp_tcp_seg_reset: %d\n\t", udbg_eth.memp_tcp_seg_reset_c);
+}
+
+#include "memp_priv.h"
+extern uint8 other_place_call_seg;
+
+//打印seg使用状态
+void usr_seg_stats_print()
+{
+    uint8  i=0;
+    /*STATS_PRINT(("\n%s\n\t", "tcp_seg_alloc"));
+    STATS_PRINT(("other_call_seg: %d\n\t", other_place_call_seg));
+    for(i=0;i<MEMP_NUM_TCP_SEG;i++){
+        STATS_PRINT(("seg_addr%2d: 0x%x alloc_id:%4d release_id:%4d \n\t", i,usr_seg_addr[i],usr_seg_addr[i]->claimer_id,usr_seg_addr[i]->release_id));
+    }*/
+
+    sprintf(strBuf,"\ntcp_seg_alloc\n\t");
+    usr_print(strBuf,strlen(strBuf));
+    sprintf(strBuf,"other_call_seg: %d\n\t", other_place_call_seg);
+    usr_print(strBuf,strlen(strBuf));
+    for(i=0;i<MEMP_NUM_TCP_SEG;i++){
+        sprintf(strBuf,"seg_adr%2d: 0x%x aloc_id:%4d rels_id:%4d \n\t", i,usr_seg_addr[i],usr_seg_addr[i]->claimer_id,usr_seg_addr[i]->release_id);
+        usr_print(strBuf,strlen(strBuf));
+    }
+}
+
+#include "tcp.h"
+#include "memp_priv.h"
+//打印tcp_pcb使用情况
+void usr_tcp_pcb_stats_print()
+{
+    struct tcp_seg * unsent;
+    struct tcp_seg * unacked;
+    struct tcp_seg * ooseq;
+    uint8  i=0;
+    //STATS_PRINT(("\n%s\n\t", "tcp_pcb_stats"));
+    
+    sprintf(strBuf,"\ntcp_pcb_stats\n\t");
+    usr_print(strBuf,strlen(strBuf));
+        
+    for(i=0;i<MEMP_NUM_TCP_PCB;i++){
+        if(usr_tcp_pcb_addr[i]->unsent!=NULL){
+            unsent = (struct tcp_seg *)((uint8*)usr_tcp_pcb_addr[i]->unsent - MEMP_SIZE);
+        }else{
+            unsent = usr_tcp_pcb_addr[i]->unsent;
+        }
+
+        if(usr_tcp_pcb_addr[i]->unacked!=NULL){
+            unacked = (struct tcp_seg *)((uint8*)usr_tcp_pcb_addr[i]->unacked - MEMP_SIZE);
+        }else{
+            unacked = usr_tcp_pcb_addr[i]->unacked;
+        }
+
+        if(usr_tcp_pcb_addr[i]->ooseq!=NULL){
+            ooseq = (struct tcp_seg *)((uint8*)usr_tcp_pcb_addr[i]->ooseq - MEMP_SIZE);
+        }else{
+            ooseq = usr_tcp_pcb_addr[i]->ooseq;
+        }
+
+        
+        /*STATS_PRINT(("tcp_pcb ofs %2d: stat-%2d unsend-0x%8x uack-0x%8x ooseq-0x%8x \n\t", i,
+            usr_tcp_pcb_addr[i]->state,unsent,unacked,ooseq));*/
+            
+        sprintf(strBuf,"tcp_pcb ofs %2d: stat-%2d unsend-0x%8x uack-0x%8x ooseq-0x%8x \n\t", i,
+            usr_tcp_pcb_addr[i]->state,unsent,unacked,ooseq);
+        usr_print(strBuf,strlen(strBuf));
+    }
+}
+
+
+#define USR_PRINTF_TIME     1000   // 10s
+extern void   stats_display(void);
+extern uint32 check_delay_over(uint32 *ptick,uint32 cycle);
+
+
+
+static void lwip_stats_print(uint32 port)
+{
+    //static uint32 print_intv;
+    g_port = port;
+    
+    if(1){
+        //if(check_delay_over(&print_intv,USR_PRINTF_TIME)){
+            stats_display();
+            
+            usr_stats_print();
+            usr_seg_stats_print();
+            usr_tcp_pcb_stats_print();
+            
+            /*printf("checked_rels_times:%3d occupy:%3d rels_lis:%3d rels_bod:%3d rels_act:%3d rels_tw:%3d \n",checked_times,occupyed_num,
+                rels_lis_num,rels_bod_num,rels_act_num,rels_tw_num);*/
+
+            sprintf(strBuf,"rels_times:%3d occupy:%3d rels_lis:%3d rels_bod:%3d rels_act:%3d rels_tw:%3d \n\t", checked_times,occupyed_num,
+                rels_lis_num,rels_bod_num,rels_act_num,rels_tw_num);
+            usr_print(strBuf,strlen(strBuf));
+
+            
+            sprintf(strBuf,"reset_pbufPool:%4d used:%3d \n\t", reset_pbuf_pool_cnt,lwip_stats.memp[14]->used);
+            usr_print(strBuf,strlen(strBuf));
+        //}
+    }
+}
+
+
+uint32 protocol_print_lwip_info(uint8 *pbufin,uint32 port)
+{
+    if(pbufin[3]==0x70)
+    {
+        lwip_stats_print(port);
+        return 0;
+    }
+    return 1;
+}
+
+#endif//USE_UART_CMD_PRINT_LWIP
+
+
+
+
+
+
+
+
+
+
+

atsc_app/bsp/rbtree.c

@@ -0,0 +1,382 @@
+#include <stddef.h> //for NULL
+#include "../inc/rbtree.h"
+
+#define rbtree_black 0
+#define rbtree_red   1
+
+void rbtree_init(rbtree_t *tree){
+    if(tree == NULL)
+        return;
+
+    tree->sentinel.left = &tree->sentinel;
+    tree->sentinel.right = &tree->sentinel;
+    tree->sentinel.parent = &tree->sentinel;
+    tree->sentinel.color = rbtree_black;
+
+    tree->root = &tree->sentinel;
+
+    return;
+}
+
+void rbtree_destory(rbtree_t *tree){
+    if(tree == NULL)
+        return;
+
+    tree->root = &tree->sentinel;
+}
+
+static void rbtree_left_rotate(rbtree_t *tree,rbtree_node_t* x){
+    if(x == &tree->sentinel){
+        return;
+    }
+
+    rbtree_node_t*y = x->right;
+    if(y == &tree->sentinel){
+        return;
+    }
+
+    x->right = y->left;
+    if(y->left != &tree->sentinel){
+        y->left->parent = x;
+    }
+
+    y->parent = x->parent;
+    if(x == tree->root){
+        tree->root = y;
+    }else if(x == x->parent->left){
+        x->parent->left = y;
+    }else{
+        x->parent->right = y;
+    }
+
+    x->parent = y;
+    y->left = x;
+
+    return;
+}
+
+static void rbtree_right_rotate(rbtree_t *tree,rbtree_node_t* x){
+    if(x == &tree->sentinel){
+        return;
+    }
+
+    rbtree_node_t*y = x->left;
+    if(y == &tree->sentinel){
+        return;
+    }
+
+    x->left = y->right;
+    if(y->right != &tree->sentinel){
+        y->right->parent = x;
+    }
+
+    y->parent = x->parent;
+    if(x == tree->root){
+        tree->root = y;
+    }else if(x == x->parent->left){
+        x->parent->left = y;
+    }else{
+        x->parent->right = y;
+    }
+
+    x->parent = y;
+    y->right = x;
+
+    return;
+}
+
+void rbtree_insert(rbtree_t *tree,rbtree_node_t* node){
+    if(tree == NULL || node == NULL || node == &tree->sentinel)
+        return;
+
+    rbtree_node_t *x,*x_tmp;
+    x = tree->root;
+    x_tmp = &tree->sentinel;
+    while(x != &tree->sentinel){
+        if(node->key<x->key){
+            x_tmp = x;
+            x = x->left;
+        }else{
+            x_tmp = x;
+            x = x->right;
+        }
+    }
+
+    node->parent = x_tmp;
+    node->left = &tree->sentinel;
+    node->right = &tree->sentinel;
+    node->color = rbtree_red;
+
+    if(tree->root == &tree->sentinel){
+        tree->root = node;
+    }else if(node->key < x_tmp->key){
+        x_tmp->left = node;
+    }else{
+        x_tmp->right = node;
+    }
+
+    while(node->parent->color == rbtree_red){
+
+        if(node->parent == node->parent->parent->left){
+            x = node->parent->parent->right;
+            if(x->color == rbtree_red){
+                node->parent->color = rbtree_black;
+                x->color = rbtree_black;
+                node->parent->parent->color = rbtree_red;
+                node = node->parent->parent;
+            }else{
+                if(node == node->parent->right){
+                    node = node->parent;
+                    rbtree_left_rotate(tree,node);
+                }
+
+                node->parent->color = rbtree_black;
+                node->parent->parent->color = rbtree_red;
+                rbtree_right_rotate(tree,node->parent->parent);
+            }
+        }else{
+            x = node->parent->parent->left;
+            if(x->color == rbtree_red){
+                node->parent->color = rbtree_black;
+                x->color = rbtree_black;
+                node->parent->parent->color = rbtree_red;
+                node = node->parent->parent;
+            }else{
+                if(node == node->parent->left){
+                    node = node->parent;
+                    rbtree_right_rotate(tree,node);
+                }
+
+                node->parent->color = rbtree_black;
+                node->parent->parent->color = rbtree_red;
+                rbtree_left_rotate(tree,node->parent->parent);
+            }
+        }
+
+    }
+    tree->root->color = rbtree_black;
+    return;
+}
+
+static rbtree_node_t* rbtree_min_node(rbtree_t *tree,rbtree_node_t* node){
+    while(node->left != &tree->sentinel){
+        node = node->left;
+    }
+    return node;
+}
+
+void rbtree_delete(rbtree_t *tree,rbtree_node_t* node){
+    if(tree == NULL || node == NULL || node == &tree->sentinel){
+        return;
+    }
+
+    if(node->left == NULL || node->right == NULL || node->parent == NULL){
+        return;
+    }
+
+    rbtree_node_t *temp,*subst,*w;
+    unsigned char color;
+
+    if(node->left == &tree->sentinel){
+        subst = node;
+        temp = node->right;
+    }else if(node->right == &tree->sentinel){
+        subst = node;
+        temp = node->left;
+    }else{
+        subst = rbtree_min_node(tree,node->right);
+        temp = subst->right;
+    }
+
+
+    if(subst == tree->root){
+        tree->root = temp;
+        temp->color = rbtree_black;
+        temp->parent = &tree->sentinel;
+        
+        node->left = NULL;
+        node->right = NULL;
+        node->parent = NULL;
+
+        tree->sentinel.parent = &tree->sentinel;
+        return;
+    }
+
+    color = subst->color;
+
+    if(subst == subst->parent->left){
+        subst->parent->left = temp;
+    }else{
+        subst->parent->right = temp;
+    }
+
+    if(subst == node){
+        temp->parent = subst->parent;
+    }else{
+        if(subst->parent == node){
+            temp->parent = subst;
+        }else{
+            temp->parent = subst->parent;
+        }
+        subst->left = node->left;
+        subst->right = node->right;
+        subst->parent = node->parent;
+        subst->color = node->color;
+
+        if(node == tree->root){
+            tree->root = subst;
+        }else{
+            if(node == node->parent->left){
+                node->parent->left = subst;
+            }else{
+                node->parent->right = subst;
+            }
+        }
+        
+        if(subst->left != &tree->sentinel){
+            subst->left->parent = subst;
+        }
+
+        if(subst->right != &tree->sentinel){
+            subst->right->parent = subst;
+        }
+    }
+
+    node->left = NULL;
+    node->right = NULL;
+    node->parent = NULL;
+
+    if(color == rbtree_red){
+        tree->sentinel.parent = &tree->sentinel;
+        return;
+    }
+
+    while(temp != tree->root && temp->color == rbtree_black){
+        if(temp == temp->parent->left){
+            w = temp->parent->right;
+            if(w->color == rbtree_red){
+                w->color = rbtree_black;
+                temp->parent->color = rbtree_red;
+                rbtree_left_rotate(tree,temp->parent);
+                w = temp->parent->right;
+            }
+
+            if(w->left->color == rbtree_black && w->right->color == rbtree_black){
+                w->color = rbtree_red;
+                temp = temp->parent;
+            }else{
+                if(w->left->color == rbtree_red){
+                    w->color = rbtree_red;
+                    w->left->color = rbtree_black;
+                    rbtree_right_rotate(tree,w);
+                    w = temp->parent->right;
+                }
+
+                w->color = temp->parent->color;
+                temp->parent->color = rbtree_black;
+                w->right->color = rbtree_black;
+                rbtree_left_rotate(tree,temp->parent);
+                temp = tree->root;
+            }
+        }else{
+            w = temp->parent->left;
+            if(w->color == rbtree_red){
+                w->color = rbtree_black;
+                temp->parent->color = rbtree_red;
+                rbtree_right_rotate(tree,temp->parent);
+                w = temp->parent->left;
+            }
+
+            if(w->left->color == rbtree_black && w->right->color == rbtree_black){
+                w->color = rbtree_red;
+                temp = temp->parent;
+            }else{
+                if(w->right->color == rbtree_red){
+                    w->color = rbtree_red;
+                    w->right->color = rbtree_black;
+                    rbtree_left_rotate(tree,w);
+                    w = temp->parent->left;
+                }
+
+                w->color = temp->parent->color;
+                temp->parent->color = rbtree_black;
+                w->left->color = rbtree_black;
+                rbtree_right_rotate(tree,temp->parent);
+                temp = tree->root;
+            }
+        }
+    }
+    
+    temp->color = rbtree_black;
+
+    tree->sentinel.parent = &tree->sentinel;
+
+    return;
+}
+
+rbtree_node_t* rbtree_search(rbtree_t *tree,uint64_t key){
+    if(tree == NULL)
+        return NULL;
+
+    rbtree_node_t *node = tree->root;
+    while(node != &tree->sentinel){
+        if(key == node->key){
+            break;
+        }else if(key < node->key){
+            node = node->left;
+        }else{
+            node = node->right;
+        }
+    }
+
+    if(node == &tree->sentinel){
+        node = NULL;
+    }
+    
+    return node;
+}
+
+rbtree_node_t* rbtree_min(rbtree_t *tree,rbtree_node_t* node){
+    if(tree == NULL || node == NULL || node==&tree->sentinel){
+        return NULL;
+    }
+
+    if(node->left == NULL || node->right == NULL || node->parent == NULL){
+        return NULL;
+    }
+
+    while(node->left != &tree->sentinel){
+        node = node->left;
+    }
+    if(node == &tree->sentinel){
+        node = NULL;
+    }
+    return node;
+}
+
+rbtree_node_t* rbtree_next(rbtree_t *tree,rbtree_node_t* node){
+    if(node == NULL || node == NULL || node == &tree->sentinel){
+        return NULL;
+    }
+
+    if(node->left == NULL || node->right == NULL || node->parent == NULL){
+        return NULL;
+    }
+
+    if(node->right != &tree->sentinel){
+        return rbtree_min(tree,node->right);
+    }
+
+
+    for(;;){
+        if(node == tree->root){
+            return NULL;
+            //return tree->sentinel;
+        }
+
+        if(node == node->parent->left){
+            return node->parent;
+        }
+        node = node->parent;
+    }
+}

atsc_app/bsp/rtc.c

@@ -0,0 +1,355 @@
+
+/*
+@NOT_ACT_USED
+*/
+
+
+
+
+
+/******************************************************************************
+
+                  版权所有 (C), 2001-2011, 上海全波通信技术有限公司
+
+ ******************************************************************************
+  文 件 名   : rtc.c
+  版 本 号   : 初稿
+  作    者   : 郭金涛
+  生成日期   : 2013年7月30日
+  最近修改   :
+  功能描述   : RTC应用层相关API及初始化函数
+  函数列表   :
+              rtc_back_mem_para_init
+              rtc_init
+  修改历史   :
+  1.日    期   : 2013年7月30日
+    作    者   : 郭金涛
+    修改内容   : 创建文件
+
+******************************************************************************/
+
+#include <string.h>
+#include "type.h"
+#include "rtc.h"
+#include "os_task.h"
+#include "stm32f4xx.h"
+#include "delay.h"
+
+#include "eeprom.h"
+
+#include "stm32f4xx_hal.h"
+
+#if 1//_USE_RVL_
+#include "i2c_drv.h"
+#endif
+#include "sys_config.h"
+#define RTC_SET_MAGIC_FLAG         0XF236
+
+static S_BACKUP_MEM  *pbackup_mem = NULL;
+RTC_HandleTypeDef hrtc;
+static void rtc_config(void)
+{
+    //
+    //uint32 time_out = 0;
+
+    /* Enable the PWR clock */
+    //RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+    __HAL_RCC_PWR_CLK_ENABLE();
+
+    /* Allow access to RTC */
+    //PWR_BackupAccessCmd(ENABLE);
+    HAL_PWR_EnableBkUpAccess();
+
+    /* Enable the LSE OSC */
+    //RCC_LSEConfig(RCC_LSE_ON);
+    __HAL_RCC_LSE_CONFIG(RCC_LSE_ON);
+
+    //time_out = 0x10000;
+    //delay_ms(500);
+    /* Wait till LSE is ready */
+    while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
+    {
+        //if (time_out-- == 0)
+        //{
+        //    RCC_LSEConfig(RCC_LSE_OFF);
+        //    return;
+        //}
+    }
+
+
+    /* Select the RTC Clock Source */
+    //RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);
+    __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
+    
+    /* Enable the RTC Clock */
+    //RCC_RTCCLKCmd(ENABLE);
+    __HAL_RCC_RTC_ENABLE();
+    
+    //RTC_WaitForSynchro();
+    HAL_RTC_WaitForSynchro(&hrtc);
+
+    //RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);
+    __HAL_RCC_BKPSRAM_CLK_ENABLE();
+
+    //PWR_BackupRegulatorCmd(ENABLE);
+    HAL_PWREx_EnableBkUpReg();
+
+    while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET)
+    {
+    }
+}
+
+/*****************************************************************************
+ 函 数 名  : rtc_init
+ 功能描述  : 初始化RTC,当前系统使用的是32.768的LSE外部时钟
+ 输入参数  : void
+ 输出参数  : 无
+ 返 回 值  :
+ 调用函数  :
+ 被调函数  :
+
+ 修改历史      :
+  1.日    期   : 2013年7月24日
+    作    者   : 郭金涛
+    修改内容   : 新生成函数
+
+*****************************************************************************/
+uint32 rtc_init(void)
+{
+    
+    uint8 rtc_err = 0;
+
+    printf("%s..\n",__FUNCTION__);
+
+    //RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);
+    __HAL_RCC_PWR_CLK_ENABLE();
+    
+    //使能备份区内存功能
+    //PWR_BackupAccessCmd(ENABLE);
+    HAL_PWR_EnableBkUpAccess();
+
+    hrtc.Instance  =RTC;
+    //if(HAL_RTCEx_BKUPRead(&hrtc,RTC_BKP_DR0) != RTC_SET_MAGIC_FLAG)
+    if(RTC_ReadBackupRegister(RTC_BKP_DR0) != RTC_SET_MAGIC_FLAG)
+    {//DR0,存放的为RTC初始化标识
+        RTC_DateTypeDef d;
+        RTC_TimeTypeDef t;
+
+        printf("rtc is do not set.\n",__FUNCTION__);
+        rtc_config();
+        RTC_WriteBackupRegister(RTC_BKP_DR0,RTC_SET_MAGIC_FLAG);
+        //HAL_RTCEx_BKUPWrite(&hrtc,RTC_BKP_DR0,RTC_SET_MAGIC_FLAG);
+
+        d.RTC_Year = 14;
+        d.RTC_Month = 1;
+        d.RTC_Date  = 1;
+
+        t.RTC_Hours = 0;
+        t.RTC_Minutes = 0;
+        t.RTC_Seconds = 0;
+        rtc_set_date_time(&d,&t);
+    }
+    else
+    {
+        /* Wait for RTC APB registers synchronisation */
+        if ( HAL_RTC_WaitForSynchro(&hrtc) == ERROR)
+        {
+            rtc_err = 2;
+            return rtc_err;
+        }
+        //RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM, ENABLE);
+        __HAL_RCC_BKPSRAM_CLK_ENABLE();
+    }
+
+    printf("%s success.\n",__FUNCTION__);
+    return 0;
+}
+
+//初始化备份区的内存变量信息,此处内存可有电池供电,掉电不丢失
+//预计有日志等部分变量放在备份内存区,也可以把临终遗言dump进去
+uint32 rtc_back_mem_para_init(void)
+{
+    uint32 *ptest;
+    uint32 reset_flag = 0;
+    uint16 i=0;
+
+    printf("%s ..\n",__FUNCTION__);
+    ptest = (uint32*)BACK_MEM_START_ADDRESS;
+
+    if(*ptest!=0x33ffda1d)
+    {
+        printf("back_mem need init.\n");
+        *ptest = 0x33ffda1d;
+        if(*ptest!=0x33ffda1d)
+        {
+            printf("%s failed 1.\n",__FUNCTION__);
+            pbackup_mem = NULL;
+            return 1;
+        }
+        reset_flag = 1;
+    }
+
+
+    if(sizeof(S_BACKUP_MEM)>BACK_MEM_SIZE-sizeof(uint32))
+    {
+        printf("%s failed 2.\n",__FUNCTION__);
+        pbackup_mem = NULL;
+        return 2;
+    }
+
+    //实际可用的为BACK_MEM_START_ADDRESS+4
+    pbackup_mem = (S_BACKUP_MEM*)(BACK_MEM_START_ADDRESS+sizeof(uint32));
+    printf("%s success.\n",__FUNCTION__);
+
+    if(reset_flag)
+    {
+        #if 1//_USE_RVL_
+        i = (c256_byteread(EERPOM_RESET_TIME_ADDR)<<8)|c256_byteread(EERPOM_RESET_TIME_ADDR+1);
+        if(i==0xffff)
+        {
+            i = 0;
+            c256_bytewrite(EERPOM_RESET_TIME_ADDR,0);
+            c256_bytewrite(EERPOM_RESET_TIME_ADDR+1,0);
+        }
+        #endif
+        pbackup_mem->reset_total_time = i;
+        memset(&pbackup_mem->close_time,0,sizeof(pbackup_mem->close_time));
+        return 0;
+    }
+    pbackup_mem->reset_total_time++;
+    #if 1//_USE_RVL_
+    c256_bytewrite(EERPOM_RESET_TIME_ADDR,pbackup_mem->reset_total_time>>8);
+    c256_bytewrite(EERPOM_RESET_TIME_ADDR+1,pbackup_mem->reset_total_time);
+    #endif
+    printf("total reset time:%d.\n",pbackup_mem->reset_total_time);
+    printf("last close sys time:%04d-%02d-%02d %02d:%02d:%02d.\n",
+          pbackup_mem->close_time.year,pbackup_mem->close_time.month,pbackup_mem->close_time.date,
+          pbackup_mem->close_time.hour,pbackup_mem->close_time.min,pbackup_mem->close_time.sec);
+    (void)pbackup_mem;
+
+    return 0;
+}
+
+uint32 sys_get_rst_time(void)
+{
+    if(!pbackup_mem)
+        return 0;
+
+    return pbackup_mem->reset_total_time;
+}
+void sys_reset_rst_time(void)
+{
+     if(pbackup_mem)
+     {
+        pbackup_mem->reset_total_time = 0;
+     }
+#if 1//_USE_RVL_
+     c256_bytewrite(EERPOM_RESET_TIME_ADDR,0);
+     c256_bytewrite(EERPOM_RESET_TIME_ADDR+1,0);
+#endif
+}
+
+void rtc_get_date_time(RTC_DateTypeDef *pd,RTC_TimeTypeDef *pt)
+{
+    if((!pd)||(!pt))
+    {
+        return;
+    }
+    //RTC_GetTime(RTC_Format_BIN, pt);
+    //RTC_GetDate(RTC_Format_BIN, pd);
+    
+    HAL_RTC_GetTime(&hrtc, pt, RTC_FORMAT_BIN);
+    HAL_RTC_GetDate(&hrtc, pd, RTC_FORMAT_BIN);
+}
+//必须先读取时间,后读日期,否则若刚设置过日期,则日期会读取异常
+void rtc_get_date(RTC_DateTypeDef *pd)
+{
+    if(pd)
+    {
+        //RTC_GetDate(RTC_Format_BIN, pd);
+        HAL_RTC_GetDate(&hrtc, pd, RTC_FORMAT_BIN);
+    }
+}
+void rtc_get_time(RTC_TimeTypeDef *pt)
+{
+    if(pt)
+    {
+        //RTC_GetTime(RTC_Format_BIN, pt);
+        HAL_RTC_GetTime(&hrtc, pt, RTC_FORMAT_BIN);
+    }
+}
+
+void rtc_set_date_time(RTC_DateTypeDef *pd,RTC_TimeTypeDef *pt)
+{
+    uint32 ret = 0;
+
+    if((!pd)||(!pt))
+    {
+        return;
+    }
+    pd->RTC_WeekDay = 1;
+    //ret = RTC_SetDate(RTC_Format_BIN, pd);
+    ret = HAL_RTC_SetDate(&hrtc, pd, RTC_FORMAT_BIN);
+    if(ERROR==ret)
+    {
+        printf("set date err!\n");
+    }
+    //ret = RTC_SetTime(RTC_Format_BIN, pt);
+    ret = HAL_RTC_SetTime(&hrtc, pt, RTC_FORMAT_BIN);
+    if(ERROR==ret)
+    {
+        printf("set time err!\n");
+    }
+}
+
+void rtc_set_date(RTC_DateTypeDef *pd)
+{
+    uint32 ret = 0;
+    if(pd)
+    {
+        pd->RTC_WeekDay = 1;
+        //RTC_SetDate(RTC_Format_BIN, pd);
+        ret = HAL_RTC_SetDate(&hrtc, pd, RTC_FORMAT_BIN);
+    }
+}
+void rtc_set_time(RTC_TimeTypeDef *pt)
+{
+    uint32 ret = 0;
+    if(pt)
+    {
+        //RTC_SetTime(RTC_Format_BIN, pt);
+        ret = HAL_RTC_SetTime(&hrtc, pt, RTC_FORMAT_BIN);
+    }
+}
+
+//更新系统关闭时间
+void rtc_update_close_time(void)
+{
+    if(pbackup_mem)
+    {
+        get_sys_time(&pbackup_mem->close_time);
+    }
+}
+
+void rtc_get_last_close_time(S_SYS_TIME *ptime)
+{
+    if(pbackup_mem)
+    {
+        *ptime = pbackup_mem->close_time;
+    }
+}
+
+void* rtc_get_log_mem_address(void)
+{
+    if(pbackup_mem)
+    {
+        return (void*)&pbackup_mem->os_log[0];
+    }
+    else
+    {
+        return (void*)0;
+    }
+}
+
+
+

atsc_app/bsp/stm32f4x7_eth_bsp.c

@@ -0,0 +1,334 @@
+
+/*
+@NOT_ACT_USED
+*/
+
+
+/**
+  ******************************************************************************
+  * @file    stm32f4x7_eth_bsp.c
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    31-October-2011
+  * @brief   STM32F4x7 Ethernet hardware configuration.
+  ******************************************************************************
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include <stdio.h>
+#include "stm32f4x7_eth.h"
+#include "stm32f4x7_eth_bsp.h"
+#include "web_server.h"
+
+
+void delay_ms(uint32 nms);
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+__IO uint32_t  EthInitStatus = 0;
+
+/* Private function prototypes -----------------------------------------------*/
+static void ETH_GPIO_Config(void);
+static void ETH_NVIC_Config(void);
+static void ETH_MACDMA_Config(void);
+
+/* Private functions ---------------------------------------------------------*/
+
+/**
+  * @brief  ETH_BSP_Config
+  * @param  None
+  * @retval None
+  */
+void ETH_BSP_Config(void)
+{
+  /* Configure the GPIO ports for ethernet pins */
+  ETH_GPIO_Config();
+
+  /* Config NVIC for Ethernet */
+  ETH_NVIC_Config();
+
+  /* Configure the Ethernet MAC/DMA */
+  ETH_MACDMA_Config();
+
+  if (EthInitStatus != 0)
+  {
+    printf("%s init failed! Err Num:%d.\n",__FUNCTION__,EthInitStatus);
+    //delay_ms(100);
+  }
+
+  /* Configure the PHY to generate an interrupt on change of link status */
+  //Eth_Link_PHYITConfig(DP83848_PHY_ADDRESS);
+
+  /* Configure the EXTI for Ethernet link status. */
+  //Eth_Link_EXTIConfig();   //取消外部中断配置
+}
+
+/**
+  * @brief  Configures the Ethernet Interface
+  * @param  None
+  * @retval None
+  */
+static void ETH_MACDMA_Config(void)
+{
+  ETH_InitTypeDef ETH_InitStructure;
+
+  /* Enable ETHERNET clock  */
+  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC | RCC_AHB1Periph_ETH_MAC_Tx |
+                         RCC_AHB1Periph_ETH_MAC_Rx, ENABLE);
+
+  /* Reset ETHERNET on AHB Bus */
+  ETH_DeInit();
+
+  /* Software reset */
+  ETH_SoftwareReset();
+
+  /* Wait for software reset */
+  while (ETH_GetSoftwareResetStatus() == SET);
+
+  /* ETHERNET Configuration --------------------------------------------------*/
+  /* Call ETH_StructInit if you don't like to configure all ETH_InitStructure parameter */
+  ETH_StructInit(&ETH_InitStructure);
+
+  /* Fill ETH_InitStructure parametrs */
+  /*------------------------   MAC   -----------------------------------*/
+  //ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Enable;
+  ETH_InitStructure.ETH_AutoNegotiation = ETH_AutoNegotiation_Disable;
+  ETH_InitStructure.ETH_Speed = ETH_Speed_100M;
+  ETH_InitStructure.ETH_Mode = ETH_Mode_FullDuplex;
+
+  ETH_InitStructure.ETH_LoopbackMode = ETH_LoopbackMode_Disable;
+  ETH_InitStructure.ETH_RetryTransmission = ETH_RetryTransmission_Disable;
+  ETH_InitStructure.ETH_AutomaticPadCRCStrip = ETH_AutomaticPadCRCStrip_Disable;
+  ETH_InitStructure.ETH_ReceiveAll = ETH_ReceiveAll_Disable;
+  ETH_InitStructure.ETH_BroadcastFramesReception = ETH_BroadcastFramesReception_Enable;
+  ETH_InitStructure.ETH_PromiscuousMode = ETH_PromiscuousMode_Disable;
+  ETH_InitStructure.ETH_MulticastFramesFilter = ETH_MulticastFramesFilter_Perfect;
+  ETH_InitStructure.ETH_UnicastFramesFilter = ETH_UnicastFramesFilter_Perfect;
+#ifdef CHECKSUM_BY_HARDWARE
+  ETH_InitStructure.ETH_ChecksumOffload = ETH_ChecksumOffload_Enable;
+#endif
+
+  /*------------------------   DMA   -----------------------------------*/
+
+  /* When we use the Checksum offload feature, we need to enable the Store and Forward mode:
+  the store and forward guarantee that a whole frame is stored in the FIFO, so the MAC can insert/verify the checksum,
+  if the checksum is OK the DMA can handle the frame otherwise the frame is dropped */
+  ETH_InitStructure.ETH_DropTCPIPChecksumErrorFrame = ETH_DropTCPIPChecksumErrorFrame_Enable;
+  ETH_InitStructure.ETH_ReceiveStoreForward = ETH_ReceiveStoreForward_Enable;
+  ETH_InitStructure.ETH_TransmitStoreForward = ETH_TransmitStoreForward_Enable;
+
+  ETH_InitStructure.ETH_ForwardErrorFrames = ETH_ForwardErrorFrames_Disable;
+  ETH_InitStructure.ETH_ForwardUndersizedGoodFrames = ETH_ForwardUndersizedGoodFrames_Disable;
+  ETH_InitStructure.ETH_SecondFrameOperate = ETH_SecondFrameOperate_Enable;
+  ETH_InitStructure.ETH_AddressAlignedBeats = ETH_AddressAlignedBeats_Enable;
+  ETH_InitStructure.ETH_FixedBurst = ETH_FixedBurst_Enable;
+  ETH_InitStructure.ETH_RxDMABurstLength = ETH_RxDMABurstLength_32Beat;
+  ETH_InitStructure.ETH_TxDMABurstLength = ETH_TxDMABurstLength_32Beat;
+  ETH_InitStructure.ETH_DMAArbitration = ETH_DMAArbitration_RoundRobin_RxTx_2_1;
+
+  /* Configure Ethernet */
+  EthInitStatus = ETH_Init(&ETH_InitStructure, DP83848_PHY_ADDRESS);
+
+  /* Enable the Ethernet Rx Interrupt */
+  ETH_DMAITConfig(ETH_DMA_IT_NIS | ETH_DMA_IT_R, ENABLE);
+}
+
+/**
+  * @brief  Configures the different GPIO ports.
+  * @param  None
+  * @retval None
+  */
+void ETH_GPIO_Config(void)
+{
+  GPIO_InitTypeDef GPIO_InitStructure;
+
+  /* Enable GPIOs clocks */
+  RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB |
+                         RCC_AHB1Periph_GPIOC | RCC_AHB1Periph_GPIOE |
+                         RCC_AHB1Periph_GPIOG , ENABLE);
+
+  /* Enable SYSCFG clock */
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
+
+  /* MII/RMII Media interface selection --------------------------------------*/
+#ifdef MII_MODE
+ #ifdef PHY_CLOCK_MCO
+  /* Configure MCO (PA8) */
+
+  /* Output HSE clock (25MHz) on MCO pin (PA8) to clock the PHY */
+  RCC_MCO1Config(RCC_MCO1Source_HSE, RCC_MCO1Div_1);
+ #endif /* PHY_CLOCK_MCO */
+
+  SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_MII);
+#elif defined RMII_MODE
+  SYSCFG_ETH_MediaInterfaceConfig(SYSCFG_ETH_MediaInterface_RMII);
+#endif
+
+/* Ethernet pins configuration ************************************************/
+   /*
+        ETH_MDIO ------------------------->    PA2
+        ETH_MDC -------------------------->    PC1
+        ETH_PPS_OUT ---------------------->    未连接
+        ETH_MII_CRS ---------------------->    PA0
+        ETH_MII_COL ---------------------->    PA3
+        ETH_MII_RX_ER -------------------->    PB10
+        ETH_MII_RXD2 --------------------->    PB0
+        ETH_MII_RXD3 --------------------->    PB1
+        ETH_MII_TX_CLK ------------------->    PC3
+        ETH_MII_TXD2 --------------------->    PC2
+        ETH_MII_TXD3 --------------------->    PE2
+        ETH_MII_RX_CLK/ETH_RMII_REF_CLK--->    PA1
+        ETH_MII_RX_DV/ETH_RMII_CRS_DV ---->    PA7
+        ETH_MII_RXD0/ETH_RMII_RXD0 ------->    PC4
+        ETH_MII_RXD1/ETH_RMII_RXD1 ------->    PC5
+        ETH_MII_TX_EN/ETH_RMII_TX_EN ----->    PG11
+        ETH_MII_TXD0/ETH_RMII_TXD0 ------->    PG13
+        ETH_MII_TXD1/ETH_RMII_TXD1 ------->    PG14
+                                                  */
+  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_100MHz;
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
+  GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
+  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL ;
+
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 |GPIO_Pin_1| GPIO_Pin_2 |GPIO_Pin_3|GPIO_Pin_7;
+  GPIO_Init(GPIOA, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource0, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_ETH);
+
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0|GPIO_Pin_1|GPIO_Pin_10;
+  GPIO_Init(GPIOB, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOB, GPIO_PinSource0, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOB, GPIO_PinSource1, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOB, GPIO_PinSource10, GPIO_AF_ETH);
+
+  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
+  GPIO_Init(GPIOC, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource2, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource3, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_ETH);
+
+  GPIO_InitStructure.GPIO_Pin =  GPIO_Pin_2;
+  GPIO_Init(GPIOE, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOE, GPIO_PinSource2, GPIO_AF_ETH);
+
+  GPIO_InitStructure.GPIO_Pin =  GPIO_Pin_11 | GPIO_Pin_13 | GPIO_Pin_14;
+  GPIO_Init(GPIOG, &GPIO_InitStructure);
+  GPIO_PinAFConfig(GPIOG, GPIO_PinSource11, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOG, GPIO_PinSource13, GPIO_AF_ETH);
+  GPIO_PinAFConfig(GPIOG, GPIO_PinSource14, GPIO_AF_ETH);
+}
+
+/**
+  * @brief  Configures and enable the Ethernet global interrupt.
+  * @param  None
+  * @retval None
+  */
+void ETH_NVIC_Config(void)
+{
+  NVIC_InitTypeDef   NVIC_InitStructure;
+
+  /* 2 bit for pre-emption priority, 2 bits for subpriority */
+  //NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
+
+  /* Enable the Ethernet global Interrupt */
+  NVIC_InitStructure.NVIC_IRQChannel = ETH_IRQn;
+  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 13;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+  NVIC_Init(&NVIC_InitStructure);
+}
+
+/**
+  * @brief  Configure the PHY to generate an interrupt on change of link status.
+  * @param PHYAddress: external PHY address
+  * @retval None
+  */
+uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress)
+{
+  uint32_t tmpreg = 0;
+
+  /* Read MICR register */
+  tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MICR);
+
+  /* Enable output interrupt events to signal via the INT pin */
+  tmpreg |= (uint32_t)PHY_MICR_INT_EN | PHY_MICR_INT_OE;
+  if(!(ETH_WritePHYRegister(PHYAddress, PHY_MICR, tmpreg)))
+  {
+    /* Return ERROR in case of write timeout */
+    return ETH_ERROR;
+  }
+
+  /* Read MISR register */
+  tmpreg = ETH_ReadPHYRegister(PHYAddress, PHY_MISR);
+
+  /* Enable Interrupt on change of link status */
+  tmpreg |= (uint32_t)PHY_MISR_LINK_INT_EN;
+  if(!(ETH_WritePHYRegister(PHYAddress, PHY_MISR, tmpreg)))
+  {
+    /* Return ERROR in case of write timeout */
+    return ETH_ERROR;
+  }
+  /* Return SUCCESS */
+  return ETH_SUCCESS;
+}
+
+/**
+  * @brief  EXTI configuration for Ethernet link status.
+  * @param PHYAddress: external PHY address
+  * @retval None
+  */
+void Eth_Link_EXTIConfig(void)
+{
+  GPIO_InitTypeDef GPIO_InitStructure;
+  EXTI_InitTypeDef EXTI_InitStructure;
+  NVIC_InitTypeDef NVIC_InitStructure;
+
+  /* Enable the INT (PB14) Clock */
+  RCC_AHB1PeriphClockCmd(ETH_LINK_GPIO_CLK, ENABLE);
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE);
+
+  /* Configure INT pin as input */
+  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
+  GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
+  GPIO_InitStructure.GPIO_Pin = ETH_LINK_PIN;
+  GPIO_Init(ETH_LINK_GPIO_PORT, &GPIO_InitStructure);
+
+  /* Connect EXTI Line to INT Pin */
+  SYSCFG_EXTILineConfig(ETH_LINK_EXTI_PORT_SOURCE, ETH_LINK_EXTI_PIN_SOURCE);
+
+  /* Configure EXTI line */
+  EXTI_InitStructure.EXTI_Line = ETH_LINK_EXTI_LINE;
+  EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt;
+  EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling;
+  EXTI_InitStructure.EXTI_LineCmd = ENABLE;
+  EXTI_Init(&EXTI_InitStructure);
+
+  /* Enable and set the EXTI interrupt to the highest priority */
+  //NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);
+  NVIC_InitStructure.NVIC_IRQChannel = EXTI15_10_IRQn;
+  NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0;
+  NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;
+  NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
+  NVIC_Init(&NVIC_InitStructure);
+}
+
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/

atsc_app/bsp/stm32f4xx_it.c

@@ -0,0 +1,216 @@
+
+/*
+@NOT_ACT_USED
+*/
+
+
+
+/**
+  ******************************************************************************
+  * @file    stm32f4xx_it.c
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    31-October-2011
+  * @brief   Main Interrupt Service Routines.
+  *          This file provides template for all exceptions handler and
+  *          peripherals interrupt service routine.
+  ******************************************************************************
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32f4xx_it.h"
+#include "main.h"
+#include "stm32f4x7_eth.h"
+
+/* Scheduler includes */
+#include "FreeRTOS.h"
+#include "task.h"
+#include "queue.h"
+
+/* lwip includes */
+#include "lwip/sys.h"
+
+/* Private typedef -----------------------------------------------------------*/
+/* Private define ------------------------------------------------------------*/
+/* Private macro -------------------------------------------------------------*/
+/* Private variables ---------------------------------------------------------*/
+extern xSemaphoreHandle s_xSemaphore;
+/* Private function prototypes -----------------------------------------------*/
+extern void xPortSysTickHandler(void);
+/* Private functions ---------------------------------------------------------*/
+
+/******************************************************************************/
+/*            Cortex-M4 Processor Exceptions Handlers                         */
+/******************************************************************************/
+
+/**
+  * @brief   This function handles NMI exception.
+  * @param  None
+  * @retval None
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Hard Fault exception.
+  * @param  None
+  * @retval None
+  */
+void HardFault_Handler(void)
+{
+  /* Go to infinite loop when Hard Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Memory Manage exception.
+  * @param  None
+  * @retval None
+  */
+void MemManage_Handler(void)
+{
+  /* Go to infinite loop when Memory Manage exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Bus Fault exception.
+  * @param  None
+  * @retval None
+  */
+void BusFault_Handler(void)
+{
+  /* Go to infinite loop when Bus Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles Usage Fault exception.
+  * @param  None
+  * @retval None
+  */
+void UsageFault_Handler(void)
+{
+  /* Go to infinite loop when Usage Fault exception occurs */
+  while (1)
+  {
+  }
+}
+
+/**
+  * @brief  This function handles SVCall exception.
+  * @param  None
+  * @retval None
+  */
+void SVC_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles Debug Monitor exception.
+  * @param  None
+  * @retval None
+  */
+void DebugMon_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles PendSVC exception.
+  * @param  None
+  * @retval None
+  */
+void PendSV_Handler(void)
+{
+}
+
+/**
+  * @brief  This function handles SysTick Handler.
+  * @param  None
+  * @retval None
+  */
+void SysTick_Handler(void)
+{
+  xPortSysTickHandler();
+}
+
+/**
+  * @brief  This function handles External line 10 interrupt request.
+  * @param  None
+  * @retval None
+  */
+#if 0
+void EXTI15_10_IRQHandler(void)
+{
+  if(EXTI_GetITStatus(ETH_LINK_EXTI_LINE) != RESET)
+  {
+    Eth_Link_ITHandler(DP83848_PHY_ADDRESS);
+    /* Clear interrupt pending bit */
+    EXTI_ClearITPendingBit(ETH_LINK_EXTI_LINE);
+  }
+}
+#endif
+/**
+  * @brief  This function handles ethernet DMA interrupt request.
+  * @param  None
+  * @retval None
+  */
+void ETH_IRQHandler(void)
+{
+    portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
+
+    /* Frame received */
+    if ( ETH_GetDMAFlagStatus(ETH_DMA_FLAG_R) == SET)
+    {
+        /* Give the semaphore to wakeup LwIP task */
+        xSemaphoreGiveFromISR( s_xSemaphore, &xHigherPriorityTaskWoken );
+        /* Switch tasks if necessary. */
+
+        portEND_SWITCHING_ISR( xHigherPriorityTaskWoken );
+
+    }
+    /* Clear the interrupt flags. */
+    /* Clear the Eth DMA Rx IT pending bits */
+    ETH_DMAClearITPendingBit(ETH_DMA_IT_R);
+    ETH_DMAClearITPendingBit(ETH_DMA_IT_NIS);
+}
+
+
+
+
+
+/******************************************************************************/
+/*                 STM32F4xx Peripherals Interrupt Handlers                   */
+/*  Add here the Interrupt Handler for the used peripheral(s) (PPP), for the  */
+/*  available peripheral interrupt handler's name please refer to the startup */
+/*  file (startup_stm32f4xx.s).                                               */
+/******************************************************************************/
+/**
+  * @brief  This function handles PPP interrupt request.
+  * @param  None
+  * @retval None
+  */
+/*void PPP_IRQHandler(void)
+{
+}*/
+
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/

atsc_app/bsp/system_stm32f4xx.c

@@ -0,0 +1,567 @@
+
+/*
+@NOT_ACT_USED
+*/
+
+/**
+  ******************************************************************************
+  * @file    system_stm32f4xx.c
+  * @author  MCD Application Team
+  * @version V1.0.1
+  * @date    06-September-2012
+  * @brief   CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
+  *          This file contains the system clock configuration for STM32F4xx devices,
+  *          and is generated by the clock configuration tool
+  *          stm32f4xx_Clock_Configuration_V1.0.0.xls
+  *
+  * 1.  This file provides two functions and one global variable to be called from
+  *     user application:
+  *      - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
+  *                      and Divider factors, AHB/APBx prescalers and Flash settings),
+  *                      depending on the configuration made in the clock xls tool.
+  *                      This function is called at startup just after reset and
+  *                      before branch to main program. This call is made inside
+  *                      the "startup_stm32f4xx.s" file.
+  *
+  *      - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
+  *                                  by the user application to setup the SysTick
+  *                                  timer or configure other parameters.
+  *
+  *      - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
+  *                                 be called whenever the core clock is changed
+  *                                 during program execution.
+  *
+  * 2. After each device reset the HSI (16 MHz) is used as system clock source.
+  *    Then SystemInit() function is called, in "startup_stm32f4xx.s" file, to
+  *    configure the system clock before to branch to main program.
+  *
+  * 3. If the system clock source selected by user fails to startup, the SystemInit()
+  *    function will do nothing and HSI still used as system clock source. User can
+  *    add some code to deal with this issue inside the SetSysClock() function.
+  *
+  * 4. The default value of HSE crystal is set to 25MHz, refer to "HSE_VALUE" define
+  *    in "stm32f4xx.h" file. When HSE is used as system clock source, directly or
+  *    through PLL, and you are using different crystal you have to adapt the HSE
+  *    value to your own configuration.
+  *
+  * 5. This file configures the system clock as follows:
+  *=============================================================================
+  *=============================================================================
+  *        Supported STM32F4xx device revision    | Rev A
+  *-----------------------------------------------------------------------------
+  *        System Clock source                    | PLL (HSE)
+  *-----------------------------------------------------------------------------
+  *        SYSCLK(Hz)                             | 168000000
+  *-----------------------------------------------------------------------------
+  *        HCLK(Hz)                               | 168000000
+  *-----------------------------------------------------------------------------
+  *        AHB Prescaler                          | 1
+  *-----------------------------------------------------------------------------
+  *        APB1 Prescaler                         | 4
+  *-----------------------------------------------------------------------------
+  *        APB2 Prescaler                         | 2
+  *-----------------------------------------------------------------------------
+  *        HSE Frequency(Hz)                      | 25000000
+  *-----------------------------------------------------------------------------
+  *        PLL_M                                  | 25
+  *-----------------------------------------------------------------------------
+  *        PLL_N                                  | 336
+  *-----------------------------------------------------------------------------
+  *        PLL_P                                  | 2
+  *-----------------------------------------------------------------------------
+  *        PLL_Q                                  | 7
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_N                               | NA
+  *-----------------------------------------------------------------------------
+  *        PLLI2S_R                               | NA
+  *-----------------------------------------------------------------------------
+  *        I2S input clock                        | NA
+  *-----------------------------------------------------------------------------
+  *        VDD(V)                                 | 3.3
+  *-----------------------------------------------------------------------------
+  *        Main regulator output voltage          | Scale1 mode
+  *-----------------------------------------------------------------------------
+  *        Flash Latency(WS)                      | 5
+  *-----------------------------------------------------------------------------
+  *        Prefetch Buffer                        | OFF
+  *-----------------------------------------------------------------------------
+  *        Instruction cache                      | ON
+  *-----------------------------------------------------------------------------
+  *        Data cache                             | ON
+  *-----------------------------------------------------------------------------
+  *        Require 48MHz for USB OTG FS,          | Enabled
+  *        SDIO and RNG clock                     |
+  *-----------------------------------------------------------------------------
+  *=============================================================================
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; COPYRIGHT 2012 STMicroelectronics</center></h2>
+  *
+  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * You may not use this file except in compliance with the License.
+  * You may obtain a copy of the License at:
+  *
+  *        http://www.st.com/software_license_agreement_liberty_v2
+  *
+  * Unless required by applicable law or agreed to in writing, software
+  * distributed under the License is distributed on an "AS IS" BASIS,
+  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * See the License for the specific language governing permissions and
+  * limitations under the License.
+  *
+  ******************************************************************************
+  */
+
+/** @addtogroup CMSIS
+  * @{
+  */
+
+/** @addtogroup stm32f4xx_system
+  * @{
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Includes
+  * @{
+  */
+
+#include "stm32f4xx.h"
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_TypesDefinitions
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Defines
+  * @{
+  */
+
+/************************* Miscellaneous Configuration ************************/
+/*!< Uncomment the following line if you need to use external SRAM mounted
+     on STM324xG_EVAL board as data memory  */
+/* #define DATA_IN_ExtSRAM */
+
+/*!< Uncomment the following line if you need to relocate your vector Table in
+     Internal SRAM. */
+/* #define VECT_TAB_SRAM */
+
+/******************************************************************************/
+
+/************************* PLL Parameters *************************************/
+/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */
+#define PLL_M      25
+#define PLL_N      336
+
+/* SYSCLK = PLL_VCO / PLL_P */
+#define PLL_P      2
+
+/* USB OTG FS, SDIO and RNG Clock =  PLL_VCO / PLLQ */
+#define PLL_Q      7
+
+/******************************************************************************/
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Macros
+  * @{
+  */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Variables
+  * @{
+  */
+
+static uint32_t SystemCoreClock = 168000000;
+
+  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
+  * @{
+  */
+
+static void SetSysClock(void);
+#ifdef DATA_IN_ExtSRAM
+  static void SystemInit_ExtMemCtl(void);
+#endif /* DATA_IN_ExtSRAM */
+
+/**
+  * @}
+  */
+
+/** @addtogroup STM32F4xx_System_Private_Functions
+  * @{
+  */
+
+/**
+  * @brief  Setup the microcontroller system
+  *         Initialize the Embedded Flash Interface, the PLL and update the
+  *         SystemFrequency variable.
+  * @param  None
+  * @retval None
+  */
+void SystemInit(void)
+{
+  /* FPU settings ------------------------------------------------------------*/
+  #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
+    SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2));  /* set CP10 and CP11 Full Access 0b11, */
+  #endif
+
+  /* Reset the RCC clock configuration to the default reset state ------------*/
+  /* Set HSION bit */
+  RCC->CR |= (uint32_t)0x00000001;
+
+  /* Reset CFGR register */
+  RCC->CFGR = 0x00000000;
+
+  /* Reset HSEON, CSSON and PLLON bits */
+  RCC->CR &= (uint32_t)0xFEF6FFFF;
+
+  /* Reset PLLCFGR register */
+  RCC->PLLCFGR = 0x24003010;
+
+  /* Reset HSEBYP bit */
+  RCC->CR &= (uint32_t)0xFFFBFFFF;
+
+  /* Disable all interrupts */
+  RCC->CIR = 0x00000000;
+
+#ifdef DATA_IN_ExtSRAM
+  SystemInit_ExtMemCtl();
+#endif /* DATA_IN_ExtSRAM */
+
+  /* Configure the System clock source, PLL Multiplier and Divider factors,
+     AHB/APBx prescalers and Flash settings ----------------------------------*/
+  SetSysClock();
+
+  /* Configure the Vector Table location add offset address ------------------*/
+#ifdef VECT_TAB_SRAM
+  SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
+#else
+  SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
+#endif
+}
+
+/**
+   * @brief  Update SystemCoreClock variable according to Clock Register Values.
+  *         The SystemCoreClock variable contains the core clock (HCLK), it can
+  *         be used by the user application to setup the SysTick timer or configure
+  *         other parameters.
+  *
+  * @note   Each time the core clock (HCLK) changes, this function must be called
+  *         to update SystemCoreClock variable value. Otherwise, any configuration
+  *         based on this variable will be incorrect.
+  *
+  * @note   - The system frequency computed by this function is not the real
+  *           frequency in the chip. It is calculated based on the predefined
+  *           constant and the selected clock source:
+  *
+  *           - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
+  *
+  *           - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
+  *
+  *           - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
+  *             or HSI_VALUE(*) multiplied/divided by the PLL factors.
+  *
+  *         (*) HSI_VALUE is a constant defined in stm32f4xx.h file (default value
+  *             16 MHz) but the real value may vary depending on the variations
+  *             in voltage and temperature.
+  *
+  *         (**) HSE_VALUE is a constant defined in stm32f4xx.h file (default value
+  *              25 MHz), user has to ensure that HSE_VALUE is same as the real
+  *              frequency of the crystal used. Otherwise, this function may
+  *              have wrong result.
+  *
+  *         - The result of this function could be not correct when using fractional
+  *           value for HSE crystal.
+  *
+  * @param  None
+  * @retval None
+  */
+void SystemCoreClockUpdate(void)
+{
+  uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
+
+  /* Get SYSCLK source -------------------------------------------------------*/
+  tmp = RCC->CFGR & RCC_CFGR_SWS;
+
+  switch (tmp)
+  {
+    case 0x00:  /* HSI used as system clock source */
+      SystemCoreClock = HSI_VALUE;
+      break;
+    case 0x04:  /* HSE used as system clock source */
+      SystemCoreClock = HSE_VALUE;
+      break;
+    case 0x08:  /* PLL used as system clock source */
+
+      /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
+         SYSCLK = PLL_VCO / PLL_P
+         */
+      pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
+      pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
+
+      if (pllsource != 0)
+      {
+        /* HSE used as PLL clock source */
+        pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+      else
+      {
+        /* HSI used as PLL clock source */
+        pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
+      }
+
+      pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
+      SystemCoreClock = pllvco/pllp;
+      break;
+    default:
+      SystemCoreClock = HSI_VALUE;
+      break;
+  }
+  /* Compute HCLK frequency --------------------------------------------------*/
+  /* Get HCLK prescaler */
+  tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
+  /* HCLK frequency */
+  SystemCoreClock >>= tmp;
+}
+
+/**
+  * @brief  Configures the System clock source, PLL Multiplier and Divider factors,
+  *         AHB/APBx prescalers and Flash settings
+  * @Note   This function should be called only once the RCC clock configuration
+  *         is reset to the default reset state (done in SystemInit() function).
+  * @param  None
+  * @retval None
+  */
+static void SetSysClock(void)
+{
+/******************************************************************************/
+/*            PLL (clocked by HSE) used as System clock source                */
+/******************************************************************************/
+  __IO uint32_t StartUpCounter = 0, HSEStatus = 0;
+
+  /* Enable HSE */
+  RCC->CR |= ((uint32_t)RCC_CR_HSEON);
+
+  /* Wait till HSE is ready and if Time out is reached exit */
+  do
+  {
+    HSEStatus = RCC->CR & RCC_CR_HSERDY;
+    StartUpCounter++;
+  } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT));
+
+  if ((RCC->CR & RCC_CR_HSERDY) != RESET)
+  {
+    HSEStatus = (uint32_t)0x01;
+  }
+  else
+  {
+    HSEStatus = (uint32_t)0x00;
+  }
+
+  if (HSEStatus == (uint32_t)0x01)
+  {
+    /* Select regulator voltage output Scale 1 mode, System frequency up to 168 MHz */
+    RCC->APB1ENR |= RCC_APB1ENR_PWREN;
+    PWR->CR |= PWR_CR_VOS;
+
+    /* HCLK = SYSCLK / 1*/
+    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;
+
+    /* PCLK2 = HCLK / 2*/
+    RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;
+
+    /* PCLK1 = HCLK / 4*/
+    RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;
+
+    /* Configure the main PLL */
+    RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |
+                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);
+
+    /* Enable the main PLL */
+    RCC->CR |= RCC_CR_PLLON;
+
+    /* Wait till the main PLL is ready */
+    while((RCC->CR & RCC_CR_PLLRDY) == 0)
+    {
+    }
+
+    /* Configure Flash prefetch, Instruction cache, Data cache and wait state */
+    /* Flash prefetch OFF, Instruction/Data caches ON and 5 wait states */
+    FLASH->ACR = FLASH_ACR_ICEN |FLASH_ACR_DCEN |FLASH_ACR_LATENCY_5WS;
+    /* Select the main PLL as system clock source */
+    RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW));
+    RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+    /* Wait till the main PLL is used as system clock source */
+    while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS ) != RCC_CFGR_SWS_PLL);
+    {
+    }
+  }
+  else
+  { /* If HSE fails to start-up, the application will have wrong clock
+         configuration. User can add here some code to deal with this error */
+  }
+
+}
+
+/**
+  * @brief  Setup the external memory controller. Called in startup_stm32f4xx.s
+  *          before jump to __main
+  * @param  None
+  * @retval None
+  */
+#ifdef DATA_IN_ExtSRAM
+/**
+  * @brief  Setup the external memory controller.
+  *         Called in startup_stm32f4xx.s before jump to main.
+  *         This function configures the external SRAM mounted on STM324xG_EVAL board
+  *         This SRAM will be used as program data memory (including heap and stack).
+  * @param  None
+  * @retval None
+  */
+void SystemInit_ExtMemCtl(void)
+{
+/*-- GPIOs Configuration -----------------------------------------------------*/
+/*
+ +-------------------+--------------------+------------------+------------------+
+ +                       SRAM pins assignment                                   +
+ +-------------------+--------------------+------------------+------------------+
+ | PD0  <-> FSMC_D2  | PE0  <-> FSMC_NBL0 | PF0  <-> FSMC_A0 | PG0 <-> FSMC_A10 |
+ | PD1  <-> FSMC_D3  | PE1  <-> FSMC_NBL1 | PF1  <-> FSMC_A1 | PG1 <-> FSMC_A11 |
+ | PD4  <-> FSMC_NOE | PE3  <-> FSMC_A19  | PF2  <-> FSMC_A2 | PG2 <-> FSMC_A12 |
+ | PD5  <-> FSMC_NWE | PE4  <-> FSMC_A20  | PF3  <-> FSMC_A3 | PG3 <-> FSMC_A13 |
+ | PD8  <-> FSMC_D13 | PE7  <-> FSMC_D4   | PF4  <-> FSMC_A4 | PG4 <-> FSMC_A14 |
+ | PD9  <-> FSMC_D14 | PE8  <-> FSMC_D5   | PF5  <-> FSMC_A5 | PG5 <-> FSMC_A15 |
+ | PD10 <-> FSMC_D15 | PE9  <-> FSMC_D6   | PF12 <-> FSMC_A6 | PG9 <-> FSMC_NE2 |
+ | PD11 <-> FSMC_A16 | PE10 <-> FSMC_D7   | PF13 <-> FSMC_A7 |------------------+
+ | PD12 <-> FSMC_A17 | PE11 <-> FSMC_D8   | PF14 <-> FSMC_A8 |
+ | PD13 <-> FSMC_A18 | PE12 <-> FSMC_D9   | PF15 <-> FSMC_A9 |
+ | PD14 <-> FSMC_D0  | PE13 <-> FSMC_D10  |------------------+
+ | PD15 <-> FSMC_D1  | PE14 <-> FSMC_D11  |
+ |                   | PE15 <-> FSMC_D12  |
+ +-------------------+--------------------+
+*/
+   /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */
+  RCC->AHB1ENR   = 0x00000078;
+
+  /* Connect PDx pins to FSMC Alternate function */
+  GPIOD->AFR[0]  = 0x00cc00cc;
+  GPIOD->AFR[1]  = 0xcc0ccccc;
+  /* Configure PDx pins in Alternate function mode */
+  GPIOD->MODER   = 0xaaaa0a0a;
+  /* Configure PDx pins speed to 100 MHz */
+  GPIOD->OSPEEDR = 0xffff0f0f;
+  /* Configure PDx pins Output type to push-pull */
+  GPIOD->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PDx pins */
+  GPIOD->PUPDR   = 0x00000000;
+
+  /* Connect PEx pins to FSMC Alternate function */
+  GPIOE->AFR[0]  = 0xc00cc0cc;
+  GPIOE->AFR[1]  = 0xcccccccc;
+  /* Configure PEx pins in Alternate function mode */
+  GPIOE->MODER   = 0xaaaa828a;
+  /* Configure PEx pins speed to 100 MHz */
+  GPIOE->OSPEEDR = 0xffffc3cf;
+  /* Configure PEx pins Output type to push-pull */
+  GPIOE->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PEx pins */
+  GPIOE->PUPDR   = 0x00000000;
+
+  /* Connect PFx pins to FSMC Alternate function */
+  GPIOF->AFR[0]  = 0x00cccccc;
+  GPIOF->AFR[1]  = 0xcccc0000;
+  /* Configure PFx pins in Alternate function mode */
+  GPIOF->MODER   = 0xaa000aaa;
+  /* Configure PFx pins speed to 100 MHz */
+  GPIOF->OSPEEDR = 0xff000fff;
+  /* Configure PFx pins Output type to push-pull */
+  GPIOF->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PFx pins */
+  GPIOF->PUPDR   = 0x00000000;
+
+  /* Connect PGx pins to FSMC Alternate function */
+  GPIOG->AFR[0]  = 0x00cccccc;
+  GPIOG->AFR[1]  = 0x000000c0;
+  /* Configure PGx pins in Alternate function mode */
+  GPIOG->MODER   = 0x00080aaa;
+  /* Configure PGx pins speed to 100 MHz */
+  GPIOG->OSPEEDR = 0x000c0fff;
+  /* Configure PGx pins Output type to push-pull */
+  GPIOG->OTYPER  = 0x00000000;
+  /* No pull-up, pull-down for PGx pins */
+  GPIOG->PUPDR   = 0x00000000;
+
+/*-- FSMC Configuration ------------------------------------------------------*/
+  /* Enable the FSMC interface clock */
+  RCC->AHB3ENR         = 0x00000001;
+
+  /* Configure and enable Bank1_SRAM2 */
+  FSMC_Bank1->BTCR[2]  = 0x00001015;
+  FSMC_Bank1->BTCR[3]  = 0x00010603;
+  FSMC_Bank1E->BWTR[2] = 0x0fffffff;
+/*
+  Bank1_SRAM2 is configured as follow:
+
+  p.FSMC_AddressSetupTime = 3;
+  p.FSMC_AddressHoldTime = 0;
+  p.FSMC_DataSetupTime = 6;
+  p.FSMC_BusTurnAroundDuration = 1;
+  p.FSMC_CLKDivision = 0;
+  p.FSMC_DataLatency = 0;
+  p.FSMC_AccessMode = FSMC_AccessMode_A;
+
+  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2;
+  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_PSRAM;
+  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
+  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
+  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
+  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
+  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
+  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
+  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
+*/
+
+}
+#endif /* DATA_IN_ExtSRAM */
+
+
+uint32_t get_sys_clk(void)
+{
+    return SystemCoreClock;
+}
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

atsc_app/inc/FreeRTOSConfig.h

@@ -0,0 +1,136 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.0.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+ /* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */   	      
+/* Section where include file can be added */
+/* USER CODE END Includes */ 
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+#endif
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          1
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      1//_USE_RVL_
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)100)
+#define configMAX_PRIORITIES                     (8)
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)60*1024)//75360
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  1
+
+#define  configUSE_COUNTING_SEMAPHORES           1
+
+/*当前正在使用的配置文件*/
+
+
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet            1
+#define INCLUDE_uxTaskPriorityGet           1
+#define INCLUDE_vTaskDelete                 1
+#define INCLUDE_vTaskCleanUpResources       0
+#define INCLUDE_vTaskSuspend                1
+#define INCLUDE_vTaskDelayUntil             0
+#define INCLUDE_vTaskDelay                  1
+#define INCLUDE_xTaskGetSchedulerState      1
+
+/* Cortex-M specific definitions. */
+#ifdef __NVIC_PRIO_BITS
+ /* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
+ #define configPRIO_BITS         __NVIC_PRIO_BITS
+#else
+ #define configPRIO_BITS         4
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority"
+function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY   15
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );} 
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+ 
+#define xPortSysTickHandler SysTick_Handler
+
+/* USER CODE BEGIN Defines */   	      
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */ 
+
+#endif /* FREERTOS_CONFIG_H */

atsc_app/inc/adrv9009_ext.h

@@ -0,0 +1,13 @@
+#ifndef _ADRV9009_EXT_H_
+#define _ADRV9009_EXT_H_
+
+void cfg_adrv_att(uint16 set_att);
+void cfg_adrv_orx_manu_gain(uint8 orx_manu_gain_index);
+void chang_freq(uint8 radio_ctl, int freq_changed);
+void cfg_fpga_agc_att(uint8 agc_att);
+void get_adrv9009_c0_orx_range(uint8 *pmin ,uint8 *pmax);
+void cfg_adrv9009_spi_ctrl_source(uint8 ctrl_src);
+int adrv9009_set_tx_path_enable(uint8 enable);
+
+#endif
+

atsc_app/inc/cgifuncs.h

@@ -0,0 +1,34 @@
+
+#ifndef __CGIFUNCS_H__
+#define __CGIFUNCS_H__
+
+//*****************************************************************************
+//
+// Prototypes of functions exported by this module.
+//
+//*****************************************************************************
+int FindCGIParameter(const char *pcToFind, char *pcParam[], int iNumParams);
+tBoolean IsValidHexDigit(const char cDigit);
+unsigned char HexDigit(const char cDigit);
+tBoolean DecodeHexEscape(const char *pcEncoded, char *pcDecoded);
+unsigned long EncodeFormString(const char *pcDecoded, char *pcEncoded,
+                               unsigned long ulLen);
+unsigned long DecodeFormString(const  char *pcEncoded, char *pcDecoded,
+                               unsigned long ulLen);
+tBoolean CheckDecimalParam(const char *pcValue, long *plValue);
+long GetCGIParam(const char *pcName, char *pcParams[], char *pcValue[],
+                 int iNumParams, tBoolean *pbError);
+long GetCGIStringParam(const char *pcName, char *pcParams[], char *pcValue[],
+            int iNumParams,char *pbuf,int buflen,int ign_quotation);
+
+long GetCGIHexParam(const char *pcName, char *pcParams[], char *pcValue[],
+            int iNumParams, tBoolean *pbError);
+void CheckStringParam(const char *pcValue, char *pbuf);
+tBoolean
+CheckHexParam(const char *pcValue, long *plValue);
+long
+GetCGIHexParam(const char *pcName, char *pcParams[], char *pcValue[],
+            int iNumParams, tBoolean *pbError);
+
+#endif // __CGIFUNCS_H__
+

atsc_app/inc/config.h

@@ -0,0 +1,322 @@
+
+#ifndef __CONFIG_H__
+#define __CONFIG_H__
+
+
+#define		AW_ATSC_5X		1
+
+//判断是否定义美国或者全波版本(5K+)
+#if USA_ATSC_5X
+#define  USA_ATSC_5X  1
+#else
+#define  USA_ATSC_5X  0
+#endif
+
+#if AW_ATSC_5X
+#define  AW_ATSC_5X  1
+#else
+#define  AW_ATSC_5X  0
+#endif
+
+#if USA_ATSC_5X && AW_ATSC_5X
+#error "Only could define one exciter type!!!"
+#endif
+
+#if (USA_ATSC_5X==0) && (AW_ATSC_5X==0)
+#error "Must define The exciter type!!!"
+#endif
+
+#define xQueueHandle  int*
+#define tskIDLE_PRIORITY   1
+
+
+#ifndef USE_HW_REPT
+#define USE_HW_REPT							0
+#endif
+
+#if 1
+#define USE_DRY_LOOP                0   //@NOT_USED
+#endif
+
+//------------------usr-define------------------------
+//测试用-发布时需要开放
+#define USE_DBG_PASS_TUNER_INIT     0 //跳过tuner init
+
+
+#define USE_UART_DEV_LINK           1
+
+/*
+ * Prefer the local key/LCD path when the single-core CPU is busy with IQ
+ * analysis.  Set to 0 to restore the original thread priorities.
+ */
+#define USE_UI_RESPONSE_PRIORITY    1
+
+/*
+ * Keep the physical RF output muted while FPGA/ADRV9009/JESD/DPD are being
+ * initialized.  The saved/user-requested RF state is restored only after the
+ * whole RF chain is ready, avoiding boot transients at the output.
+ */
+#define USE_DELAYED_RF_ENABLE       1
+#define RF_BOOT_STABLE_DELAY_MS     2000
+//---------------------------------------------------
+//if   use korea -- need check ca     //V173
+//else use us    -- ca default bypass
+#define USE_KOREA_VERSION			(0)
+
+//#define SPL_CURV_LOAD_STORE         0
+
+
+#if USA_ATSC_5X
+
+ #if USE_HW_REPT
+    #define SW_VERSION          "V6.1A_150107T"
+ #else
+    #define SW_VERSION          "V6.1A_150107"
+ #endif
+ 
+    #define ERR_TO_LCM          1
+    #define USE_DRYLOOP_I2C     0     //美国5K+,暂时使用串口模式
+    #define USE_TUNER_88436     1     //TUNER88436 外部解码 tuner18273 需要fpga解码,18273只是个高频头
+    #define USE_TUNER_18273     0     //两个只能同时使用1个
+
+    #define USE_PSTS            0
+    #define USE_NEW_DIO_MODE    0    //是否使用美国新的dio模式 在原先的dio基础上对部分按键做了重定义
+#elif AW_ATSC_5X
+
+ #if USE_HW_REPT
+    #undef  USE_DBG_PASS_TUNER_INIT
+    #define USE_DBG_PASS_TUNER_INIT   (1)
+    #define SW_VERSION          "V5.2AW_210902T"  //"V5.2AW_210822T" 
+ #else
+    #define SW_VERSION          "V5.2AW_220331R"  //"V5.2AW_211217" 
+ #endif
+
+    #define ERR_TO_LCM          1
+    #define USE_DRYLOOP_I2C     0
+    #define USE_TUNER_88436     0
+    #define USE_TUNER_18273     0     //三个只能同时使用1个,或者不用
+
+    #define USE_PSTS            1
+    #define USE_NEW_DIO_MODE    1    //是否使用美国新的dio模式 在原先的dio基础上对部分按键做了重定义
+#endif
+
+
+#define USE_STD_USART_SEND_RECV     1
+
+/*开启该功能时，需要调整网页ADPC的选项*/
+#define USE_UPDATA5                 0//禁用
+#define USE_RESET_TCP               (1)//重置tcp
+#define USE_UART_CMD_PRINT_LWIP     (1)//串口命令可以打印:80 46 06 70 3C 96
+
+//调试使用
+#define DBG_ADPC_NO_FEEDBACK_ERR    0
+
+//------------------<<<<<<<<<<------------------------
+
+#define ATSC_TITLE_LEN          16
+#define ATSC_WEB_TITLE          "Digital Exciter"
+#define SNTP_TIME_STRING_LEN    8
+#define SNTP_DATE_STRING_LEN    10
+
+
+
+
+#define I2C_MAX_NUM       5
+
+#define DEBUG_AUTO_ADPC   0
+#define ATSC_USA_AMP      1
+
+
+
+//@TO_DISABLE
+#define I2C_SOFT_GPIO     0    //只能为1
+
+#define USE_SONYCXD6801GL   1
+
+
+#if ((USE_TUNER_18273==1)&&(USE_TUNER_88436==1)) || ((USE_TUNER_18273==1)&&(USE_SONYCXD6801GL==1)) || ((USE_TUNER_88436==1)&&(USE_SONYCXD6801GL==1))
+#error "must choose only one tuner type!"
+#endif
+
+#if (USE_TUNER_18273==1)||(USE_TUNER_88436==1)||(USE_SONYCXD6801GL==1)
+#define USE_TUNER        1   //1
+#else
+#define USE_TUNER        0
+#endif
+
+
+//++++++++++++++++++++++++++++++++++++++++++
+#if 1//usr_def
+#define TMP_DISABLE_BOOT_SNR_UPDATE	(0)
+
+
+#define  DBG_DISABLE_I2C    		(0)
+#define  DBG_DISABLE_TUNER			(0)
+#if DBG_DISABLE_TUNER
+ #ifdef USE_TUNER
+ #undef USE_TUNER
+ #define USE_TUNER    				(0)
+ #endif
+#endif
+
+#define  DBG_I2C_ERR_DELAY			1
+
+//#define USE_TUNER		1
+
+//暂时先关闭
+#define THR_GPS			0
+
+#define THR_LCD			1
+
+//+++++++++++++++++++++++++++++++++++++++++++
+
+
+#define NO_USE	0 //@NOT_USED
+
+#define ETH_UPGRADE 0
+/*#ifndef ETH_UPGRADE  //默认打开升级模式
+#define ETH_UPGRADE 1
+#else
+#define ETH_UPGRADE 0
+#endif*/
+
+#define TMP_UNUSE_LCD			1
+
+//@NOT_USED
+//#define USE_GPS                 1
+#define USE_GPS                 1
+
+//@TMP_UNUSED_FOR_MAKE
+#define TMP_UNUSE_GPS_TIME		0
+
+//@TMP_UNUSED_FOR_MAKE
+#define NEED_TO_EN				0
+
+//NEED_TO_EN
+#define FPGA_UP_MSG				1
+#define NEED_SEND_ALM			0
+
+//对于5段地址冲突的部分需要禁用
+#define ADDR_CONFLICT_DISABLED		1
+
+#endif//usr_def
+//+++++++++++++++++++++++++++++++++++++++
+
+
+#define SYSTICKHZ               (configTICK_RATE_HZ)
+#define SYSTICKMS               (1000 / configTICK_RATE_HZ)
+
+#define E2_ROM_SIZE             (32*1024)  // e2rom 32Kbyte
+#define E2_ROM_PAGE             (64)     // e2rom 页
+
+
+#define USE_SWAP_DATA           1
+#define USE_SPI_FLASH           1     //flash开关
+#define SHOW_DEBUG_INFO         0
+#define TEST_E2_ROM             0
+#define SCAN_NEED_CHANGE_MODE   0
+#define USE_CTRL_MODE           1
+#define USE_HTTP_LOGIN          1
+#define USE_TCP_COMM            1    //网络通讯
+
+#define USE_NEW_FPGA            1
+
+
+#define USE_LCD_CACHE           1
+#define USE_BIG_LCD             1
+#define USE_HTTP                1
+#define FPGA_UPGRADE            1
+
+#define USE_SNR_ADJ             1
+
+#define UPGRADE_LISTEN_PORT     1234
+#define TCP_COMM_PORT           4003
+#define TCP_COMM_DATA_PORT      4017
+
+
+#define SYSTICK_INT_PRIORITY    0x80
+#define ETHERNET_INT_PRIORITY   0xC0
+
+#define ALARM_USE_UDP           1 //那个版本以后,待定
+
+
+///////////////////////////////////////////////////////////////////////////
+
+//#define USE_NLOGO_VER			0 //对于正式发布的atsc5x+需要配0
+
+/*#if USE_NLOGO_VER
+#define TEMPREATURE_DEGREE      1 //温度
+#else
+#define TEMPREATURE_DEGREE      0 //温度
+#endif**/
+
+//系统组件配置
+
+
+#define USE_SPECT_DATA_TASK     1    // 是否需要通过tcp向上位机传送数据  8000型有此功能
+#define USE_ADPC_LONG           1    // 预校正加长代码
+#define USE_NEW_AGC             0
+#define USE_TS_CHECK            1
+#define USE_GPS_UBLOX6          1
+#define USE_GPS_CHECK           1
+#define USE_TS2IP               1
+#define USE_SNTP_SNYC_TIME      1
+#define USE_TEMPERATURE_CHECK   1
+#define USE_OVERFLOW_CHECK      1
+
+#define USE_NETWORK_DNS         0   // 是否配置dns
+#define USE_NEW_POWER_CFG       1   // HMC472 + ADRV9009 power allocation
+#define USE_FREQ_CHANGE_RESET_PWR 1 // 切换频点后是否先将输出功率降到-25dB
+
+
+#if USE_BIG_LCD
+    #define LCD_CHAR_NUM        40
+#else
+    #define LCD_CHAR_NUM        20
+#endif
+
+
+#define TEST_GPS_MOUDLE         1
+
+// RF 相关注释
+#define   setbit(x,y)      (x)= (1<<(y))        //将X的第Y位置1,清其他位,
+#define   setbits(x,y)     (x)|=(1<<(y))        //将X的第Y位置1,保留其他位,
+#define   clrbit(x,y)      (x)&=~(1<<(y))       //将X的第Y位清0,
+#define   clrbits(x,y,z)   (x)&=~((z)<<(y))     //从Y位开始,以Z为整体对X某些位清0,
+#define   _STATUS_RF     0   //Bit0=1无输出 为0正常  串口返回时 单独 "或1" 处理,
+#define   _KEY_RF        1   //Bit 1
+#define   _KEY_WH        2   //Bit 2
+#define   _KEY_TX        2   //Bit 2
+#define   _LOCAL_REMOET  2   //Bit 2
+#define   _PIN_DRYLOOP   3
+#define   _MISS_OTHER    4
+#define   _MISS_TS       5
+#define   _MISS_10M      6
+#define   _MISS_1PPS     7
+
+#define    MAC_DEFAULT   (0x13<<16) | (0x05<<8) | (0x03)
+
+#define  BAK_PARA_CHECK     1
+#define  DEBUG_ERR_CHECK    0  // WC屏参数激励器不试用，可用来调试
+//Bit 0 为0时正常，为1时不正常
+#define  BAK_ERR_OK         0
+#define  BAK_ERR_ERR        1
+#define  BAK_ERR_TXFREQ     1<<1
+#define  BAK_ERR_RXFREQ     1<<2
+#define  BAK_ERR_POWER      1<<3
+#define  BAK_ERR_DB         1<<4
+#define  BAK_ERR_WE_LEAK    1<<5
+#define  BAK_ERR_DEBUG      1<<7
+
+#define  LEN_ADPC_DATE_BUF  4096
+
+
+
+//#define ADPC_DEBUG         1
+
+
+#endif
+
+
+
+/************************************END********************************/

atsc_app/inc/console_ctrl.h

@@ -0,0 +1,6 @@
+#ifndef __CONSOLE_CTRL_H__
+#define __CONSOLE_CTRL_H__
+
+int creat_console_ctrl_thread(void);
+
+#endif

atsc_app/inc/dac38j82.h

@@ -0,0 +1,124 @@
+#ifndef __DAC38J82_H__
+#define __DAC38J82_H__
+
+#include "type.h"
+
+
+#define DAC38J82_SPI_NODE               "/dev/spidev32766.1"
+
+#define WIDTH_32BIT                     4
+#define WIDTH_24BIT                     3
+#define WIDTH_16BIT                     2
+#define WIDTH_8BIT                      1
+
+typedef enum _do_cfg_38j82_step{
+    DAC38J82_CFG_STEP_ONE=               0,
+    DAC38J82_CFG_STEP_TWO=               1,
+    DAC38J82_CFG_STEP_DONE
+}DAC38J82_CFG_STEP;
+
+
+#define CLR_BIT(x,bitops)               (x &= ~(1<<bitops))
+#define SET_BIT(x,bitops)               (x |= (1<<bitops))
+
+#define REGMAP_ADDR_CONFIG0             0
+#define REGMAP_ADDR_CONFIG1             1
+#define REGMAP_ADDR_CONFIG2             2
+#define REGMAP_ADDR_CONFIG3             3
+#define REGMAP_ADDR_CONFIG4             4
+#define REGMAP_ADDR_CONFIG5             5
+#define REGMAP_ADDR_CONFIG6             6
+#define REGMAP_ADDR_CONFIG7             7
+#define REGMAP_ADDR_CONFIG8             8
+#define REGMAP_ADDR_CONFIG9             9
+#define REGMAP_ADDR_CONFIG10            10
+#define REGMAP_ADDR_CONFIG11            11
+#define REGMAP_ADDR_CONFIG12            12
+#define REGMAP_ADDR_CONFIG13            13
+#define REGMAP_ADDR_CONFIG14            14
+#define REGMAP_ADDR_CONFIG15            15
+#define REGMAP_ADDR_CONFIG16            16
+#define REGMAP_ADDR_CONFIG17            17
+#define REGMAP_ADDR_CONFIG18            18
+#define REGMAP_ADDR_CONFIG19            19
+#define REGMAP_ADDR_CONFIG20            20
+#define REGMAP_ADDR_CONFIG21            21
+#define REGMAP_ADDR_CONFIG22            22
+
+#define REGMAP_ADDR_CONFIG26            26
+#define REGMAP_ADDR_CONFIG27            27
+
+#define REGMAP_ADDR_CONFIG30            30
+#define REGMAP_ADDR_CONFIG31            31
+#define REGMAP_ADDR_CONFIG32            32
+#define REGMAP_ADDR_CONFIG34            34
+
+#define REGMAP_ADDR_CONFIG36            36
+#define REGMAP_ADDR_CONFIG37            37
+#define REGMAP_ADDR_CONFIG38            38
+
+#define REGMAP_ADDR_CONFIG47            47
+
+#define REGMAP_ADDR_CONFIG49            49
+#define REGMAP_ADDR_CONFIG50            50
+#define REGMAP_ADDR_CONFIG51            51
+
+#define REGMAP_ADDR_CONFIG59            59
+
+#define REGMAP_ADDR_CONFIG60            60
+
+#define REGMAP_ADDR_CONFIG61            61
+#define REGMAP_ADDR_CONFIG62            62
+
+#define REGMAP_ADDR_CONFIG63            63
+#define REGMAP_ADDR_CONFIG70            70
+#define REGMAP_ADDR_CONFIG71            71
+#define REGMAP_ADDR_CONFIG72            72
+
+#define REGMAP_ADDR_CONFIG73            73
+#define REGMAP_ADDR_CONFIG74            74
+#define REGMAP_ADDR_CONFIG75            75
+#define REGMAP_ADDR_CONFIG76            76
+#define REGMAP_ADDR_CONFIG77            77
+#define REGMAP_ADDR_CONFIG78            78
+#define REGMAP_ADDR_CONFIG79            79
+
+#define REGMAP_ADDR_CONFIG80            80
+#define REGMAP_ADDR_CONFIG81            81
+#define REGMAP_ADDR_CONFIG82            82
+#define REGMAP_ADDR_CONFIG83            83
+#define REGMAP_ADDR_CONFIG84            84
+#define REGMAP_ADDR_CONFIG85            85
+
+#define REGMAP_ADDR_CONFIG92            92
+
+#define REGMAP_ADDR_CONFIG94            94
+#define REGMAP_ADDR_CONFIG95            (95)
+#define REGMAP_ADDR_CONFIG96            (96)
+#define REGMAP_ADDR_CONFIG97            (97)
+
+#define REGMAP_ADDR_CONFIG100           (100)
+#define REGMAP_ADDR_CONFIG101           (101)
+#define REGMAP_ADDR_CONFIG102           (102)
+#define REGMAP_ADDR_CONFIG103           (103)
+#define REGMAP_ADDR_CONFIG104           (104)
+#define REGMAP_ADDR_CONFIG105           (105)
+#define REGMAP_ADDR_CONFIG106           (106)
+#define REGMAP_ADDR_CONFIG107           (107)
+#define REGMAP_ADDR_CONFIG108           (108)
+
+#define REGMAP_ADDR_CONFIG112           (112)
+#define REGMAP_ADDR_CONFIG116           (116)
+#define REGMAP_ADDR_CONFIG117           (117)
+
+#define REGMAP_ADDR_CONFIG126           (0x7E)
+#define REGMAP_ADDR_CONFIG127           (0x7F)
+
+
+extern int  cfg_dac38j82(uint8 txfreq, int cw);
+extern void chang_freq(uint8 radio_ctl, int freq_changed);
+extern void chang_cw(int cw_changed);
+
+#endif // __DAC38J82_H__
+
+

atsc_app/inc/delay.h

@@ -0,0 +1,19 @@
+#ifndef __DELAY_H
+#define __DELAY_H
+#include "type.h"
+
+//任务延时函数,单位ms
+
+void task_delay(uint32 nms);
+
+void delay_us(uint32 nus);
+void delay_ms(uint32 nms);
+//uint32 check_delay_over(uint32 *ptick,uint32 cycle);
+void delay_ticks(uint32 ticks);
+
+//#define delay_sec(sec)  delay_ticks((sec)*SYSTICKHZ)
+
+void idelay_us(uint32 nus);
+extern uint32 check_delay_over(uint32 *ptick,uint32 cycle);
+#endif
+

atsc_app/inc/dpd_proc.h

@@ -0,0 +1,239 @@
+#ifndef _DPD_PROC_H_
+#define _DPD_PROC_H_
+
+#include "type.h"
+
+#define     DPD_LOG_ENABLE          1
+#define     DPD_LOG_FILE            "/aw/anywave/dpd_log/log"
+
+#define FPGA_ADDR_DPD_LOG_TRIG   0x15
+//----Write Only--------------
+//ok
+#define FPGA_ADDR_DPD_CTRL1      0x20
+#define FPGA_ADDR_DPD_CTRL2      0x21
+#define FPGA_ADDR_DPD_CTRL3      0x22
+//ok
+#define FPGA_ADDR_DPD_IQB_UPD    0x23
+#define FPGA_ADDR_DPD_CFG_STEP   0x24
+
+
+//wpp
+#define FPGA_ADDR_WPP_EN_CLR     0x0d
+#define FPGA_ADDR_WPP_TH_L       0x0e
+#define FPGA_ADDR_WPP_TH_H       0x0f
+
+#define MASK_WPP_ENABLE  		(1)
+#define MASK_WPP_CLR            (1<<1)
+
+
+//#define FPGA_ADDR_DPD_SYNCOFFSET    ??
+
+#define FPGA_ADDR_DPD_TEST_L     0x02
+#define FPGA_ADDR_DPD_TEST_H     0x03
+
+//----Read Only--------------
+#define FPGA_ADDR_DPD_STATUS1    0x01
+
+//---------------------------
+#define MASK_RFAGC_DOWN_LIMIT	(1<<1)
+#define MASK_RFAGC_UP_LIMIT		(1<<2)
+
+#define SPI_BLK_LEN				35//Byte
+
+enum{
+	E_RFAGC_NORMAL=0,
+	E_RFAGC_DOWN_LIMIT,
+	E_RFAGC_UP_LIMIT,
+}E_AGC_ERR_CODE;
+	/*
+	E_RFAGC_POWER_LOW,
+	E_RFAGC_POWER_HIGH,
+	*/
+
+//ok
+#define MASK_DPD_ERR  			(0x0001)
+#define MASK_DPD_PWRHIGH 		(0x0001<<1)
+#define MASK_DPD_PWRLOW  		(0x0001<<2)
+#define MASK_DPD_DAGC_TOOHIGH	(0x0001<<3)
+#define MASK_DPD_DAGC_TOOLOW	(0x0001<<4)
+#define MASK_DPD_ERR_ABORT		(0x0001<<5)
+#define MASK_DPD_TRX_SYNC_OK	(0x0001<<6)
+#define MASK_DPD_SAT_FLG     	(0x0001<<7)
+
+//ok
+#define DPD_CTRL1_DPD_START		(0x0001)
+#define DPD_CTRL1_DPD_ALLCLR	(0x0001<<1)
+#define DPD_CTRL1_ALL_BYPS		(0x0001<<2)
+
+#define DPD_CTRL2_LIN_UPDATE	(0x0001)
+#define DPD_CTRL2_NONLIN_UPDATE	(0x0001<<1)
+#define DPD_CTRL2_SET_NONLIN_UDP_MOD(x)  		(((x)&0x03)<<2)    /*01 : POLY; 10: CRST*/
+#define DPD_CTRL2_AMP_CHK		(0x0001<<4)
+#define DPD_CTRL2_PRL_UPDATE	(0x0001<<5)
+#define DPD_CTRL2_RXEQ_UPDATE   (0x0001<<6)
+
+#define DPD_CTRL2_POLYESTI_UPDATE   		(0x0001<<7)
+
+//ok
+#define INTER_DISTORTION_SW_MAX (7)
+
+
+//ok
+#define DPD_CTRL3_FAGC_UPDATE  	(0x0001)
+#define DPD_CTRL3_FAGC_SLOWDN  	(0x0001<<1)
+#define DPD_CTRL3_DAGC_UPDATE  	(0x0001<<2)
+#define DPD_CTRL3_DAGC_SLOWDN  	(0x0001<<3)
+#define DPD_CTRL3_DCRM_UPDATE  	(0x0001<<4)
+#define DPD_CTRL3_ROT_UPDATE   	(0x0001<<5)
+#define DPD_CTRL3_SYNC_UPDATE  	(0x0001<<6)
+#define DPD_CTRL3_SYNC_RESTART 	(0x0001<<7)
+//ok
+#define DPD_IQB_UPDATE  	    (0x0001)
+#define DPD_IQB_BP_MASK  	    (0x0001<<1)
+//#define DPD_IQB_SYNC_MASK       (0x0001<<2)
+#define DPD_SYNC_MODE_MASK       (0x0001<<2)
+
+#define DPD_RF_SEL_BEFORE       (0x0001<<3)
+
+#define DPD_SET_100M			(0x00)
+#define DPD_SET_25M				(0x01)
+
+#define SET_DPDFAGC_REFPWR(x)				((x))
+#define DPD_SET_CRST_ADDR_STRUCT_2  ((0x01)<<17)
+#define DPD_SET_ERR_TH(x)			(((x)&0xffff))
+#define DPD_SET_ERR_CNT_TH(x)		(((x)&0xff)<<16)
+#define DPD_SET_DGAIN(x)		(((x)&0xffff)<<2)
+#define DPD_SET_FIX_DLY(x)		(0x8000 & ((x)&0x7ff))
+#define DPD_SET_CRST_REFAD(x)	((x)[0] | ((x)[1]<<4) |  ((x)[2]<<8) |  ((x)[3]<<12) |  ((x)[4]<<16) |  ((x)[5]<<20))
+
+#define DPD_MAX_TX_AMP_SAT			65535
+//#define TX_FREQ_IN_HZ				2550000000
+
+
+#define DPD_SEG                      5
+
+#define MASK_DPD_DATA_AREA0_MODE     ((1)&0xff)
+#define MASK_DPD_DATA_AREA1_MODE     ((1<<1)&0xff)
+#define MASK_DPD_DATA_AREA2_MODE     ((1<<2)&0xff)
+#define MASK_DPD_DATA_AREA3_MODE     ((1<<3)&0xff)
+
+//#define MASK_TO_FPGA_WRITE_ENABLE    ((1))
+#define MASK_TO_SPI_WR_RD_ENABLE     (1)
+#define MASK_TO_FPGA_REFRESH_DATA    (1<<1)
+#define MASK_TO_FPGA_CHECK_CLEAR     (1<<2)
+
+enum{E_CHECK_FOR_RAED=0, E_CHECK_FOR_WIRTE=1};
+
+typedef struct{
+	u32   area_fpga_w_check;
+	u32   area_fpga_r_check;
+	u32   area_imx_w_check;
+	u32   area_imx_r_check;
+}S_CHECK_SUM;
+
+//--------------------------------------------
+
+/*Add Bit Ctrl*/
+typedef struct{
+ uint8 iqb_upd:1;
+ uint8 iqb_bp:1;
+ uint8 sync_mode:1; /* !! sync_mode 与 re_sel 相反 */
+ uint8 rf_sel:1;    /* !! sync_mode 与 re_sel 相反 */
+}S_DPD_REG23;
+
+typedef union
+{
+    S_DPD_REG23 dpd_bt;
+    uint8 u8val;
+}U_DPDCTL_REG23;
+#define TSNR_FIX    3.5*100
+
+enum{E_READ=0,E_WRITE=1};
+
+typedef enum
+{
+    DPD_STATE_OK=0,
+    DPD_STATE_ERR=0x10,
+    DPD_STATE_POWER_HIGH,
+    DPD_STATE_POWER_LOW,
+    DPD_STATE_POWER_TOO_HIGH,
+    DPD_STATE_POWER_TOO_LOW,
+    DPD_STATE_ERR_OVER_RANGE,
+    DPD_STATE_SYNC_OK,
+
+    DPD_READ_CKECK_ERR,
+    DPD_WRITE_CHECK_ERR,
+
+	DPD_SYNC_TIMEOUT,
+    DPD_CHECK_WPP_ERR_EXIT_HOLD,
+
+    //...
+
+    DPD_IDLE_ERR=0x30,
+
+
+    DPD_PROC_EXIT =  0x99,
+    DPD_UPDATING,
+    DPD_SAVE_DATA =  0xAA,
+    DPD_LOAD_DATA =  0xBB,
+    DPD_STATUS_UPDATING  =  0xff
+}E_DPD_STATE;
+
+typedef enum{
+E_DPD_NSAVE_NFLITER=0x00,//0x00
+E_DPD_NSAVE_FLITER =0x01,//0x01
+E_DPD_SAVE_NFLITER =0x10,//0x10
+E_DPD_SAVE_FLITER  =0x11,//0x11
+}E_CTL_DPD;//cttb_para.wh_para.ctl_dpd
+
+
+//
+typedef enum
+{
+    E_LOAD_TO_MCU,
+    E_LOAD_TO_FPGA,
+}E_DPD_CURVE_PROC;
+
+typedef enum
+{
+    E_DPD_AREA0=0,
+    E_DPD_AREA1,
+    E_DPD_AREA2,
+    E_DPD_AREA3,
+    E_DPD_AREA_FIRST_4K,
+}E_DPD_CURVE_AREA;
+
+
+typedef struct
+{
+    uint32 tx_data_iq_i;
+    uint32 rx_data_iq_i;
+    uint16 ob_wpp_max_i;
+    uint16 txaveamp_i;
+    uint16 txpow_cur_i;
+    uint16 rx_dgain_i;
+    uint16 rx_fgain_cw_i;
+}S_DPD_LOG_TYPE;
+
+void refresh_update_dpd(void *parg,void *parv);
+int dpd_curve_proc(uint8 proc_mode);
+
+void dpd_exit(void);
+void dpd_set_clr(void);
+uint8 get_fpga_dpd_check(void);
+void dpd_boot_run_init(void);
+extern void set_dpd_unit_area_auto_inc(uint8 inc_flg);
+extern void set_tsnr_update_flg(uint8 up_flg);
+extern int update_tsnr_uimd_limd(uint8 rst_flg,uint8* p_phase);
+extern uint8 get_tsnr_update_flg(void);
+extern void remote_set_dpd_clr(void);
+extern uint8 conv_adpc_err_output(uint8 raw_dpd_err);
+
+extern void clear_dpd_data_file(void);
+extern void set_ab_switch(E_AB_SEL ab_val);
+extern u32 read_fpga_area_u32_check_sum(u8 check_type);
+extern void clear_check_sum(S_CHECK_SUM *parea_check);
+extern void calc_area_u32_check_sum(u32 *pcheck, u8 *pbuf, u32 len);
+extern void calc_area_check_sum(u8 *pcheck, u8 *pbuf, u32 len);
+#endif
+

atsc_app/inc/dryloop.h

@@ -0,0 +1,134 @@
+
+/********************************************************************
+**dryloop通讯模块头文件
+
+********************************************************************/
+#ifndef DRYLOOP_H
+#define DRYLOOP_H
+
+
+#define DRYLOOP_UART_DEBUG   0
+#if DRYLOOP_UART_DEBUG
+#define dryloop_printf   printf
+#else
+#define dryloop_printf(p,...)   do{;}while(0)       //若没开启调试模式,printf定义为空
+#endif
+
+
+
+#define MODE_SYNC   0     //异步模式  不可阻塞型
+#define MODE_ASYN   1     //同步模式  阻塞型     必须等应答后才能发下一条命令
+
+#define DRYLOOP_UART_NUM  (3)
+#define DRYLOOP_UART_BPS  (115200)
+
+#define DRYLOOP_UART_SEND_MODE     MODE_ASYN       //异步发送,还是同步发送
+#define DRYLOOP_UART_BUF_MAX_LEN   128
+#define DRYLOOP_UART_TIMEOUT       (300/SYSTICKMS)   //超时时间300ms
+
+typedef enum
+{
+    DRYLOOP_I2C_RF_KEY    = 0X00,
+    DRYLOOP_I2C_PWRDW_KEY = 0X01,
+    DRYLOOP_I2C_PWRUP_KEY = 0X02,
+    DRYLOOP_I2C_VER       = 0X03,
+    DRYLOOP_I2C_VERYY     = 0X04,
+    DRYLOOP_I2C_VERMM     = 0X05,
+    DRYLOOP_I2C_VERDD     = 0X06,
+    DRYLOOP_I2C_AMP_KEY   = 0X07,   //读取寄存器
+
+    //配置寄存器
+    DRYLOOP_I2C_TS_LED      = 0X10,
+    DRYLOOP_I2C_RF_LED      = 0X11,
+    DRYLOOP_I2C_SYSERR_LED  = 0X12,
+    DRYLOOP_I2C_FWD_ADDR    = 0X13
+}E_DRYLOOP_I2C_ADDRESS;
+
+#define DRYLOOP_UART_COMM_HEAD  (0XFA)
+typedef struct
+{
+    uint8  rec[DRYLOOP_UART_BUF_MAX_LEN];
+    uint8  send[DRYLOOP_UART_BUF_MAX_LEN];
+    uint32 rec_index;
+    BOOL   rec_proc_flag;
+    uint32 un_resp_flag;              //未应答标志 为0时才能发新命令,发送命令置位,超时或收到应答后清零
+    uint32 send_tick;
+}S_DRYLOOP_UART_BUF,*pS_DRYLOOP_UART_BUF;
+
+typedef struct
+{
+    BOOL rf;
+    BOOL rf_need_send;
+    uint32 rf_send_tick;
+    BOOL ts;
+    BOOL ts_need_send;
+    uint32 ts_send_tick;
+    BOOL sys_err;
+    BOOL sys_need_send;
+    uint32 sys_send_tick;
+}S_DRYLOOP_LED_STATUS,*pS_DRYLOOP_LED_STATUS;
+
+typedef struct
+{
+    BOOL   rf_need_get;
+    uint32 rf_get_tick;
+
+    BOOL   power_need_get;
+    uint32 power_get_tick;
+
+    BOOL   amp_need_get;
+    uint32 amp_get_tick;
+}S_DRYLOOP_GET_STATUS,*pS_DRYLOOP_GET_STATUS;
+
+//__packed 
+#pragma pack(1)
+typedef struct
+{
+    uint8 header;
+    uint8 data_len;
+    uint8 cmd;
+    uint8 other[100];
+}S_DRYLOOP_UART_PROTOCOL,*pS_DRYLOOP_UART_PROTOCOL;
+#pragma pack()
+
+
+#define DRYLOOP_UART_PROTOCOL_ANS_CMD (0X3F)
+#define DRYLOOP_UART_PROTOCOL_ANS_OK  (1<<7)
+#define DRYLOOP_UART_PROTOCOL_ANS_ERR (1<<6)
+
+#define DRYLOOP_UART_PROTOCOL_ERR_SUM         (1)
+#define DRYLOOP_UART_PROTOCOL_ERR_UNKNOW_CMD  (2)
+#define DRYLOOP_UART_PROTOCOL_ERR_RESERVE1    (3)
+#define DRYLOOP_UART_PROTOCOL_ERR_RESERVE2    (4)
+
+#define DRYLOOP_TIMER_CYCLE         5
+#define DRYLOOO_CHECK_VERSION       10
+#define DRYLOOO_CHECK_CYCLE         15          //  单位tick  1tick 10ms
+#define DRYLOOP_SEND_CYCLE          9*10
+
+#define DRYLOOP_SEND_CHECK_CYCLE    500  //单位tick  5s    周期性的发送状态周期
+#define DRYLOOP_GET_CHECK_CYCLE     50   //单位tick  500ms 周期性的获取状态周期
+
+//由数据区长度获取整个报文的长度
+#define GET_UART_LEN_BY_DATA_LEN(data_len,frame_len) \
+do{\
+    (frame_len) = (data_len)+5;\
+}while(0)
+
+
+extern S_DRYLOOP dryloop_status;
+
+extern void dryloop_init(void);
+extern void dryloop_check(void);
+extern void dryloop_send(void);
+extern void dryloop_reset(void);
+extern void dryloop_process(void);
+extern void dryloop_amp_on(BOOL flag);
+extern void dryloop_uart_buf_check(uint8* pbuf,uint32 len);
+
+#endif
+
+
+
+/***************************END*************************************/
+

atsc_app/inc/eeprom.h

@@ -0,0 +1,559 @@
+#ifndef __EEPROM_H_
+#define __EEPROM_H_
+#include "log_task.h"
+
+
+#define E2PROM_MAGIC_WORD        0XA6 //ldl a6->a8
+#define E2PROM_MAGIC_WORD_BAK    0X55
+
+#define PSIP_PER_E2_SIZE         16
+
+typedef enum
+{
+    EEPROM_DEFAULT_PARAM_ADDR=0,
+    EEPROM_STANDARD_ADDR,
+    EERPOM_RESET_TIME_ADDR,
+    EERPOM_RESET_TIME_ADDR_XXX = EERPOM_RESET_TIME_ADDR+2,
+
+    EEPROM_OCXO_ADDR  = 0x30,    //SYStem para
+    EEPROM_ASI_ADDR,
+    EEPROM_SYS_INPUT,
+    EEPROM_DPD_ADDR,
+    EEPROM_NET_ADDR,
+    EEPROM_GPS_ADDR,
+    EEPROM_RFOUT_DATA_ADDR,
+    EEPROM_TEST_SIG_ADDR,
+    EEPROM_CTRL_ADDR,
+    EEPROM_GPR1_ADDR,
+    EEPROM_GPR2_ADDR,
+    EEPROM_MON_ADDR,
+    EEPROM_MODE_ADDR,
+    EEPROM_SNTP_ENABLE, // sntp enable
+    EEPROM_SNTP_SIP1,   // sntp server ip
+    EEPROM_SNTP_SIP2,
+    EEPROM_SNTP_SIP3,
+    EEPROM_SNTP_SIP4,
+    EEPROM_AGC_ATT,
+	EEPROM_ADRV9009_ATT_H,//2
+	EEPROM_ADRV9009_ATT_L,
+	EEPROM_ADRV9009_ORX_MANU_GAIN,
+	EEPROM_SPEC_ENABLE,
+
+
+    EEPROM_CHANNEL_ADDR = 0x50,   //RF 相关
+    EEPROM_RXCHANNEL_ADDR,
+    EEPROM_HZ_UIH_ADDR,
+    EEPROM_HZ_UIM_ADDR,
+    EEPROM_HZ_UIL_ADDR,
+    EEPROM_POWER_UIH_ADDR,
+    EEPROM_POWER_UIL_ADDR,
+    EEPROM_POWER_ADDRH,     //未用
+    EEPROM_POWER_ADDRL,     //未用
+    EEPROM_0DBFLAGH_ADDR,
+    EEPROM_0DBFLAGL_ADDR,
+    EEPROM_PARA_CW_ADDR,
+    EEPROM_RF_ADDR,
+    EEPROM_AGC_ADDR,
+    EEPROM_AGC_standard_addrH,  //未用
+    EEPROM_AGC_standard_addrL,  //未用
+    EEPROM_PWRVREF_O_HADDR,     //功率参考电平地址，高1字节
+    EEPROM_PWRVREF_O_LADDR,     //低1字节
+    EEPROM_PWRVREF_VLDO_ADDR,   //参考电平有效指示
+    EEPROM_REF_AGC_ADDR,        //未用
+    EEPROM_REF_AGC_WEB_ADDR,    //未用
+    EEPROM_RF_TX,
+    EEPROM_TEST_PVD,
+
+	//DPD
+	EEPROM_DPD_GAIN_LIMIT_L=0x6E,
+    EEPROM_DPD_GAIN_LIMIT_H=0x6F,
+	EEPROM_DPD_DISTORTION_SW=0x70,
+	EEPROM_DPD_AGC_PWR_L,
+	EEPROM_DPD_AGC_PWR_H,
+	EEPROM_DPD_ERR_TH_L,
+	EEPROM_DPD_ERR_TH_H,
+	EEPROM_DPD_ERR_CNT_TH,
+	EEPROM_DPD_AMP_SAT_TH_L,
+	EEPROM_DPD_AMP_SAT_TH_H,
+	EEPROM_DPD_TEST_L,
+	EEPROM_DPD_TEST_H,
+	EEPROM_DPD_STEP,//0x7A
+	EEPROM_DPD_FLASH_VALID,
+	EEPROM_DPD_PHASE6_MINUTE,
+	EEPROM_DPD_WPP_TH_L,
+	EEPROM_DPD_WPP_TH_H,//0x7e
+	EEPROM_NOTICE_PART_END,//0x7f
+
+
+    EEPROM_BPS_ADDR   = 0x80,
+    EEPROM_ID_ADDR,
+    EEPROM_PA_LINK_CTRL_RF_ADDR,
+    EEPROM_DPD_CTL_TST,
+
+    EEPROM_NET_DELAY_ADDR = 0x90,
+    EEPROM_NET_TXID_ADDR  = EEPROM_NET_DELAY_ADDR+3,
+    EEPROM_NET_NETID_ADDR,
+    EEPROM_NET_BRATIO_ADDR,
+
+
+    EEPROM_MODE_SYNC,
+    EEPROM_MODE_TCP_C,
+    EEPROM_MODE_ZP1F,
+
+
+    EEPROM_PCR_ADDR    = 0xb0,   //ad1
+    EEPROM_PCR2_ADDR,
+    EEPROM_SLOW_UP_ADDR,
+    EEPROM_SLOW_DOWN_ADDR,
+    EEPROM_CUST_POWER_MAX_ADDR_H,
+    EEPROM_CUST_POWER_MAX_ADDR_L,
+    EEPROM_ASIOUT_ADDR,
+
+
+    EEPROM_M_TS_ADDR   =0xc0,
+    EEPROM_M_10M_ADDR,
+    EEPROM_M_1PPS_ADDR,
+    EEPROM_M_DLY_ADDR,
+    EEPROM_M_DLY_ADDR_MM,
+    EEPROM_M_DLY_ADDR_SS,
+
+
+    EEPROM_ADVANCED_RATEA_ADDR  = 0xd0,
+    EEPROM_ADVANCED_MAPA_ADDR,
+    EEPROM_ADVANCED_TIA_ADDR,
+    EEPROM_ADVANCED_RATEB_ADDR,
+    EEPROM_ADVANCED_MAPB_ADDR,
+    EEPROM_ADVANCED_TIB_ADDR,
+    EEPROM_ADVANCED_RATEC_ADDR,
+    EEPROM_ADVANCED_MAPC_ADDR,
+    EEPROM_ADVANCED_TIC_ADDR,
+
+    EEPROM_AD3_RC_CMD   = 0xE0,
+    EEPROM_AD3_FWD_CAL,
+    EEPROM_AD3_POWER_REF_H,
+    EEPROM_AD3_POWER_REF_L,
+    EEPROM_AD3_TYPE,
+    EEPROM_AD3_MPTV,
+    EEPROM_AD3_MAX_PWR_H,
+    EEPROM_AD3_MAX_PWR_L,
+
+    EEPROM_AD5_RSNR_ADDR = 0XF0,
+    EEPROM_AD5_RIMD_ADDR,
+    EEPROM_AD5_TIME_ADDR,
+    EEPROM_AD5_TSNR_ADDR,
+    EEPROM_AD5_IMD_ADDR,
+    EEPROM_AD4_ATSNR_ADDR,
+    EEPROM_AD4_AIMD_ADDR,
+    EEPROM_AD5_DPD_ADDR,
+
+
+    EEPROM_RESVER1=0X100,
+    EEPROM_SN_H2,
+    EEPROM_SN_H1,
+    EEPROM_SN_L4,
+    EEPROM_SN_L3,
+    EEPROM_SN_L2,
+    EEPROM_SN_L1,
+    EEPROM_KEY_H2,      //GUI_KEY
+    EEPROM_KEY_H1,
+    EEPROM_KEY_L2,
+    EEPROM_KEY_L1,
+
+    EEPROM_EAS_KEY1,
+    EEPROM_EAS_KEY2,
+    EEPROM_EAS_KEY3,
+    EEPROM_EAS_KEY4,
+
+    EEPROM_RESVER2=EEPROM_EAS_KEY4+0X8,
+
+    EEPROM_PA_IP4_ADDR,
+    EEPROM_PA_GATEWAY_ADDR = EEPROM_PA_IP4_ADDR+4,
+    EEPROM_PA_NETMASK_ADDR = EEPROM_PA_GATEWAY_ADDR+4,
+    EEPROM_EAS_KEY_MAGIC   = EEPROM_PA_NETMASK_ADDR+4,
+
+
+    //工厂菜单,每屏预留32字节
+    EEPROM_WB_ADDR = 0x130,
+    EEPROM_WC_ADDR = EEPROM_WB_ADDR+0X20,
+    EEPROM_WD_ADDR = EEPROM_WC_ADDR+0X20,
+    EEPROM_WE_ADDR = EEPROM_WD_ADDR+0X20,
+    EEPROM_WF_ADDR = EEPROM_WE_ADDR+0X20,
+    EEPROM_WH_ADDR = EEPROM_WF_ADDR+0X20,
+    EEPROM_RI_ADDR = EEPROM_WH_ADDR+0X20,
+    EEPROM_WJ_ADDR = EEPROM_RI_ADDR+0X20,
+    EEPROM_WK_ADDR = EEPROM_WJ_ADDR+0X20,
+    EEPROM_WL_ADDR = EEPROM_WK_ADDR+0x20,
+
+
+    //工厂菜单当前WK为0x220,  工厂菜单power定义到0x300,中间预留部分空间
+    EEPROM_CH1_POWER_ADDR = 0x300,  //约60多字节
+    EEPROM_CH2_POWER_ADDR = 0X400,  //1.42(3X+)功率控制字
+
+    EEPROM_PSTS_TS_EDIT = 0x600,    //开关
+    EEPROM_PSTS_TSIDH,              //tsid
+    EEPROM_PSTS_TSIDL,
+    EEPROM_PSTS_CHANEL,             //channel total
+    EEPROM_PSTS_UP_FLAG,
+    EEPROM_PSTS_CH_START,
+    EEPROM_PSTS_CH_END=EEPROM_PSTS_CH_START+PSIP_PER_E2_SIZE*24,    //实际每个需要16字节,一共有13个
+    EEPROM_PSIP_KEY_H2,
+    EEPROM_PSIP_KEY_H1,
+    EEPROM_PSIP_KEY_L2,
+    EEPROM_PSIP_KEY_L1,
+    EEPROM_PSIP_KEY_MAGIC,
+    EEPROM_WD_SPE_ADDR,
+    EEPROM_WEB_TITLE_ADDR,     //共16字节
+    EEPROM_NTP_SWITCH=EEPROM_WEB_TITLE_ADDR+16,
+    EEPROM_NTP_SERVER_IP,// 4
+
+    EEPROM_USER_INFO_MAGIC  = 0X1000,    //用户名是否配置 用户名,用户密码 各预留32字节
+    EEPROM_USER_INFO,
+    EEPROM_USER_INFO_NM,
+    EEPROM_USER_INFO_PW = EEPROM_USER_INFO_NM+0X20,
+
+
+    EEPROM_ADPC_BEGIN1_ADDR = 0X7000,
+    EEPROM_ADPC_END1_ADDR   = 0X75FF,   //apdc 线性区地址,预留1K
+
+
+    /*备份参数标记段*/
+    EEPROM_FQPW_CHECK_FLAG=0x7ED0,// 频点，功率标记位
+	EEPROM_DNS_ADDR,     //
+
+    EEPROM_IP4_ADDR  = 0x7f00,    //网络通讯地址相关的统一放在此处,顺序也需一样,所有平台均是,否则远程升级代码不好统一.
+    EEPROM_GATEWAY_ADDR =EEPROM_IP4_ADDR+4,
+    EEPROM_NETMASK_ADDR =EEPROM_GATEWAY_ADDR+4,
+    EEPROM_NET_MAC_H = EEPROM_NETMASK_ADDR+4,
+    EEPROM_NET_MAC_M,
+    EEPROM_NET_MAC_L,
+
+	/* TSOIP 1 */
+	EEPROM_IP_DIRECT_ADDR = EEPROM_NET_MAC_L+1, 	//ip方向
+	EEPROM_MULTI_ADDR = EEPROM_IP_DIRECT_ADDR+1,
+	EEPROM_PORT_ADDR  = EEPROM_MULTI_ADDR+4,
+	EEPROM_UDP_RTP_ADDR = EEPROM_PORT_ADDR+2,
+	EEPROM_PAK_LEN_ADDR = EEPROM_UDP_RTP_ADDR+1,
+	EEPROM_RECE_TYPE_ADDR=EEPROM_PAK_LEN_ADDR+1,
+	EEPROM_FEC_ADDR 	= EEPROM_RECE_TYPE_ADDR+1,
+	EEPROM_ROW_ADDR 	= EEPROM_FEC_ADDR+2,
+	EEPROM_COL_ADDR 	= EEPROM_ROW_ADDR+2,
+	EEPROM_FEC_DLY_ADDR = EEPROM_COL_ADDR+2,
+	EEPROM_DEST_IP_ADDR = EEPROM_FEC_DLY_ADDR+2,
+	EEPROM_DEST_PORT_ADDR = EEPROM_DEST_IP_ADDR+4,
+	EEPROM_IP2TS_SELECT_TO_FPGA = EEPROM_DEST_PORT_ADDR+2,//h20190221
+	EEPROM_SFN_MFN_SEL = EEPROM_IP2TS_SELECT_TO_FPGA+1, //h20211201
+	EEPROM_PHY_TYPE = EEPROM_SFN_MFN_SEL+1, 			   //配置的PHY类型 0:百兆  1:千兆
+	EEPROM_TSOIP_1_IP4_ADDR = EEPROM_PHY_TYPE+1,
+	EEPROM_TSOIP_1_MASK_ADDR = EEPROM_TSOIP_1_IP4_ADDR+4,
+	EEPROM_TSOIP_1_GATEWAY_ADDR = EEPROM_TSOIP_1_MASK_ADDR+4,
+
+	/* TSOIP 2 */
+	EEPROM_TSOIP_2_IP4_ADDR = EEPROM_TSOIP_1_GATEWAY_ADDR+4,
+	EEPROM_TSOIP_2_MASK_ADDR = EEPROM_TSOIP_2_IP4_ADDR+4,
+	EEPROM_TSOIP_2_GATEWAY_ADDR = EEPROM_TSOIP_2_MASK_ADDR+4,
+	EEPROM_IP_DIRECT_2_ADDR = EEPROM_TSOIP_2_GATEWAY_ADDR+4,	 //ip方向
+	EEPROM_MULTI_2_ADDR = EEPROM_IP_DIRECT_2_ADDR+1,
+	EEPROM_PORT_2_ADDR	= EEPROM_MULTI_2_ADDR+4,
+	EEPROM_UDP_RTP_2_ADDR = EEPROM_PORT_2_ADDR+2,
+	EEPROM_PAK_LEN_2_ADDR = EEPROM_UDP_RTP_2_ADDR+1,
+	EEPROM_RECE_TYPE_2_ADDR=EEPROM_PAK_LEN_2_ADDR+1,
+	EEPROM_FEC_2_ADDR	  = EEPROM_RECE_TYPE_2_ADDR+1,
+	EEPROM_ROW_2_ADDR	  = EEPROM_FEC_2_ADDR+2,
+	EEPROM_COL_2_ADDR	  = EEPROM_ROW_2_ADDR+2,
+	EEPROM_FEC_DLY_2_ADDR = EEPROM_COL_2_ADDR+2,
+	EEPROM_DEST_IP_2_ADDR = EEPROM_FEC_DLY_2_ADDR+2,
+	EEPROM_DEST_PORT_2_ADDR = EEPROM_DEST_IP_2_ADDR+4,
+	EEPROM_IP2TS_SELECT_TO_FPGA_2 = EEPROM_DEST_PORT_2_ADDR+2,//h20190221
+	EEPROM_SFN_MFN_SEL_2 = EEPROM_IP2TS_SELECT_TO_FPGA_2+1, //h20211201
+	EEPROM_PHY_TYPE_2 = EEPROM_SFN_MFN_SEL_2+1, 			   //配置的PHY类型 0:百兆  1:千兆
+
+    EEPROM_TSOIP1_MAC_H  = EEPROM_PHY_TYPE_2+1,   // tsoip1 的mac
+    EEPROM_TSOIP1_MAC_M  = EEPROM_TSOIP1_MAC_H+1,
+    EEPROM_TSOIP1_MAC_L  = EEPROM_TSOIP1_MAC_M+1,
+    EEPROM_TSOIP2_MAC_H  = EEPROM_TSOIP1_MAC_L+1,   // tsoip2 的mac
+    EEPROM_TSOIP2_MAC_M  = EEPROM_TSOIP2_MAC_H+1,
+    EEPROM_TSOIP2_MAC_L  = EEPROM_TSOIP2_MAC_M+1,
+
+
+
+
+    EEPROM_END_ADDRESS = 0X7FFF,
+}EEPROM_ADDR;
+
+typedef enum
+{
+    E2_DEFAULT_PARAM_ADDR=0,
+    E2_AD3_POWER_REF_H,
+    E2_AD3_POWER_REF_L,
+    E2_PWRVREF_O_HADDR,    //功率参考电平地址
+    E2_PWRVREF_O_LADDR,
+    E2_PWRVREF_VLDO_ADDR,  //参考电平有效指示
+    E2_AGC_ADDR,
+    E2_POWER_UIH_ADDR,  //rf power
+    E2_POWER_UIL_ADDR,
+    E2_0DBFLAGH_ADDR,   //rf db
+    E2_0DBFLAGL_ADDR,
+
+    /*以上为普通数据增加E2地址段*/
+
+    E2_AD3_POWER_REF_H_ATV=0X20,
+    E2_AD3_POWER_REF_L_ATV,
+    E2_PWRVREF_O_HADDR_ATV,    //功率参考电平地址
+    E2_PWRVREF_O_LADDR_ATV,
+    E2_PWRVREF_VLDO_ADDR_ATV,  //参考电平有效指示
+    E2_AGC_ADDR_ATV,
+    E2_POWER_UIH_ADDR_ATV,  //rf power
+    E2_POWER_UIL_ADDR_ATV,
+    E2_0DBFLAGH_ADDR_ATV,   //rf db
+    E2_0DBFLAGL_ADDR_ATV,
+
+    E2_ADPC_BEGIN1_ADDR =0x1000,
+    E2_ADPC_END1_ADDR   =0X15FF,  //adpc1 当前大约有近400字节 空间保留2K
+    E2_ADPC_BEGIN1_ADDR_ATV =0X1600,
+    E2_ADPC_END1_ADDR_ATV =0x1BFF,
+    /*以上为普通数据增加E2地址段*/
+
+
+    E2_SYSTEM_LOG_VALID_ADDRESS = 5*1024-3,
+    E2_SYSTEM_LOG_CURRENT_INDEX_ADDRESS,
+    E2_SYSTEM_LOG_CURRENT_NUM_ADDRESS,
+    E2_SYSTEM_LOG_START_ADDRESS,   //此处必须64字节对齐
+    E2_SYSTEM_LOG_END_ADDRESS   = E2_SYSTEM_LOG_START_ADDRESS+LOG_MAX_RECORD_NUM*LOG_PER_RECORD_SIZE-1,
+
+    E2_SYSTEM_LOG_VALID_ADDRESS_ATV = E2_SYSTEM_LOG_END_ADDRESS+1,
+    E2_SYSTEM_LOG_CURRENT_INDEX_ADDRESS_ATV,
+    E2_SYSTEM_LOG_CURRENT_NUM_ADDRESS_ATV,
+    E2_SYSTEM_LOG_START_ADDRESS_ATV,   //此处必须64字节对齐
+    E2_SYSTEM_LOG_END_ADDRESS_ATV   = E2_SYSTEM_LOG_START_ADDRESS_ATV+LOG_MAX_RECORD_NUM*LOG_PER_RECORD_SIZE-1,
+
+
+
+
+    //备份暂定起始地址
+    BAK_E2_DEFAULT_PARAM_ADDR=0x6700, //除载漏外参数,可用256字节
+    BAK_EEPROM_POWER_UIH_ADDR,
+    BAK_EEPROM_POWER_UIL_ADDR,
+    BAK_EEPROM_0DBFLAGH_ADDR,
+    BAK_EEPROM_0DBFLAGL_ADDR,
+    BAK_E2_POWER_UIH_ADDR,  //rf power
+    BAK_E2_POWER_UIL_ADDR,
+    BAK_E2_0DBFLAGH_ADDR,   //rf db
+    BAK_E2_0DBFLAGL_ADDR,
+    BAK_EEPROM_CHANNEL_ADDR,
+    BAK_EEPROM_RXCHANNEL_ADDR,
+
+    END_BAK_EEPROM_ADDR, //不要删掉
+
+    BAK_E2_DEFAULT_PARAM_ADDR_ATV=0x6800,
+    BAK_EEPROM_POWER_UIH_ADDR_ATV,
+    BAK_EEPROM_POWER_UIL_ADDR_ATV,
+    BAK_EEPROM_0DBFLAGH_ADDR_ATV,
+    BAK_EEPROM_0DBFLAGL_ADDR_ATV,
+    BAK_E2_POWER_UIH_ADDR_ATV,  //rf power
+    BAK_E2_POWER_UIL_ADDR_ATV,
+    BAK_E2_0DBFLAGH_ADDR_ATV,   //rf db
+    BAK_E2_0DBFLAGL_ADDR_ATV,
+    BAK_EEPROM_CHANNEL_ADDR_ATV,
+    BAK_EEPROM_RXCHANNEL_ADDR_ATV,
+
+    END_BAK_EEPROM_ADDR_ATV, //不要删掉
+
+
+    BAK_EEPROM_PARA_END=0x7FFF,
+}EEPROM2_ADDR;
+
+
+#define E3_BACKUP_PER_SCREEN_SIZE    64      //每屏参数预留64字节,刚好1页
+typedef enum
+{
+    //出厂参数保存地址
+    E3_BACKUP_PARA_PREF_VALID = 0,
+    E3_BACKUP_PARA_CUST_VALID,
+    E3_BACKUP_PARA_PREF_VALID_ATV,
+    E3_BACKUP_PARA_CUST_VALID_ATV,
+
+    E3_BACKUP_PARA_PREF_SYSTEM = 64,   //页对齐
+    E3_BACKUP_PARA_PREF_RF     = E3_BACKUP_PARA_PREF_SYSTEM+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_NET    = E3_BACKUP_PARA_PREF_RF+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_MODE   = E3_BACKUP_PARA_PREF_NET+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_CONFIG = E3_BACKUP_PARA_PREF_MODE+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_1           = E3_BACKUP_PARA_PREF_CONFIG+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_2           = E3_BACKUP_PARA_1+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_3           = E3_BACKUP_PARA_2+E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_PREF_AD1    = E3_BACKUP_PARA_3+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD2    = E3_BACKUP_PARA_PREF_AD1+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD3    = E3_BACKUP_PARA_PREF_AD2+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD4    = E3_BACKUP_PARA_PREF_AD3+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD5    = E3_BACKUP_PARA_PREF_AD4+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD6    = E3_BACKUP_PARA_PREF_AD5+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD7    = E3_BACKUP_PARA_PREF_AD6+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD8    = E3_BACKUP_PARA_PREF_AD7+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD9    = E3_BACKUP_PARA_PREF_AD8+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD10   = E3_BACKUP_PARA_PREF_AD9+E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_PREF_WB     = E3_BACKUP_PARA_PREF_AD10+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WC     = E3_BACKUP_PARA_PREF_WB+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WD     = E3_BACKUP_PARA_PREF_WC+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WE     = E3_BACKUP_PARA_PREF_WD+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WF     = E3_BACKUP_PARA_PREF_WE+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_RG     = E3_BACKUP_PARA_PREF_WF+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WH     = E3_BACKUP_PARA_PREF_RG+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WI     = E3_BACKUP_PARA_PREF_WH+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WJ     = E3_BACKUP_PARA_PREF_WI+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WK     = E3_BACKUP_PARA_PREF_WJ+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WL     = E3_BACKUP_PARA_PREF_WK+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WM     = E3_BACKUP_PARA_PREF_WL+E3_BACKUP_PER_SCREEN_SIZE,
+
+
+    E3_RESERVED1_START     = E3_BACKUP_PARA_PREF_WM+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_RESERVED1_END =E3_RESERVED1_START+512-1,   //暂时中间预留512空间,方便后续扩充
+
+    E3_BACKUP_PARA_POWER_PREF_START,
+    E3_BACKUP_PARA_POWER_PREF_END = E3_BACKUP_PARA_POWER_PREF_START+1024-1,  //功率预留1024 可能有不同带宽类型的参数
+
+    E3_RESERVED2_START,
+    E3_RESERVED2_END =E3_RESERVED2_START+1024-1,   //暂时中间预留1K空间
+
+    //两者定义类型保持一致
+    //客户手动保存参数地址
+
+    E3_BACKUP_PARA_CUST_SYSTEM,
+    E3_BACKUP_PARA_CUST_RF     = E3_BACKUP_PARA_CUST_SYSTEM+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_NET    = E3_BACKUP_PARA_CUST_RF+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_MODE   = E3_BACKUP_PARA_CUST_NET+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_CONFIG = E3_BACKUP_PARA_CUST_MODE+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST1       = E3_BACKUP_PARA_CUST_CONFIG+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST2       = E3_BACKUP_PARA_CUST1+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST3       = E3_BACKUP_PARA_CUST2+E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_CUST_AD1    = E3_BACKUP_PARA_CUST_CONFIG+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD2    = E3_BACKUP_PARA_CUST_AD1+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD3    = E3_BACKUP_PARA_CUST_AD2+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD4    = E3_BACKUP_PARA_CUST_AD3+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD5    = E3_BACKUP_PARA_CUST_AD4+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD6    = E3_BACKUP_PARA_CUST_AD5+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD7    = E3_BACKUP_PARA_CUST_AD6+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD8    = E3_BACKUP_PARA_CUST_AD7+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD9    = E3_BACKUP_PARA_CUST_AD8+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD10   = E3_BACKUP_PARA_CUST_AD9+E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_CUST_WB     = E3_BACKUP_PARA_CUST_AD5+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WC     = E3_BACKUP_PARA_CUST_WB+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WD     = E3_BACKUP_PARA_CUST_WC+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WE     = E3_BACKUP_PARA_CUST_WD+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WF     = E3_BACKUP_PARA_CUST_WE+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_RG     = E3_BACKUP_PARA_CUST_WF+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WH     = E3_BACKUP_PARA_CUST_RG+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WI     = E3_BACKUP_PARA_CUST_WH+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WJ     = E3_BACKUP_PARA_CUST_WI+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WK     = E3_BACKUP_PARA_CUST_WJ+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WL     = E3_BACKUP_PARA_CUST_WK+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WM     = E3_BACKUP_PARA_CUST_WL+E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_RESERVED3_START     = E3_BACKUP_PARA_CUST_WM+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_RESERVED3_END =E3_RESERVED3_START+512-1,   //暂时中间预留512空间
+
+    E3_BACKUP_PARA_POWER_CUST_START,
+    E3_BACKUP_PARA_POWER_CUST_END = E3_BACKUP_PARA_POWER_CUST_START+1024-1,  //功率预留1024 可能有不同带宽类型的参数
+
+
+    E3_BACKUP_PARA_PREF_SYSTEM_ATV = E3_BACKUP_PARA_POWER_CUST_END+1,   //页对齐
+    E3_BACKUP_PARA_PREF_RF_ATV     = E3_BACKUP_PARA_PREF_SYSTEM_ATV+E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_NET_ATV    = E3_BACKUP_PARA_PREF_RF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_MODE_ATV    = E3_BACKUP_PARA_PREF_NET_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_CONFIG_ATV  = E3_BACKUP_PARA_PREF_MODE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_1_ATV            = E3_BACKUP_PARA_PREF_CONFIG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_2_ATV            = E3_BACKUP_PARA_1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_3_ATV            = E3_BACKUP_PARA_2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_PREF_AD1_ATV     = E3_BACKUP_PARA_3_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD2_ATV     = E3_BACKUP_PARA_PREF_AD1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD3_ATV     = E3_BACKUP_PARA_PREF_AD2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD4_ATV     = E3_BACKUP_PARA_PREF_AD3_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD5_ATV     = E3_BACKUP_PARA_PREF_AD4_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD6_ATV     = E3_BACKUP_PARA_PREF_AD5_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD7_ATV     = E3_BACKUP_PARA_PREF_AD6_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD8_ATV     = E3_BACKUP_PARA_PREF_AD7_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD9_ATV     = E3_BACKUP_PARA_PREF_AD8_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_AD10_ATV    = E3_BACKUP_PARA_PREF_AD9_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_PREF_WB_ATV      = E3_BACKUP_PARA_PREF_AD10_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WC_ATV      = E3_BACKUP_PARA_PREF_WB_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WD_ATV      = E3_BACKUP_PARA_PREF_WC_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WE_ATV      = E3_BACKUP_PARA_PREF_WD_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WF_ATV      = E3_BACKUP_PARA_PREF_WE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_RG_ATV      = E3_BACKUP_PARA_PREF_WF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WH_ATV      = E3_BACKUP_PARA_PREF_RG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WI_ATV      = E3_BACKUP_PARA_PREF_WH_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WJ_ATV      = E3_BACKUP_PARA_PREF_WI_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WK_ATV      = E3_BACKUP_PARA_PREF_WJ_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WL_ATV      = E3_BACKUP_PARA_PREF_WK_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_PREF_WM_ATV      = E3_BACKUP_PARA_PREF_WL_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+
+
+    E3_RESERVED1_START_ATV      = E3_BACKUP_PARA_PREF_WM_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_RESERVED1_END_ATV  =E3_RESERVED1_START_ATV +512-1,   //暂时中间预留512空间,方便后续扩充
+
+    E3_BACKUP_PARA_POWER_PREF_START_ATV ,
+    E3_BACKUP_PARA_POWER_PREF_END_ATV  = E3_BACKUP_PARA_POWER_PREF_START_ATV +1024-1,  //功率预留1024 可能有不同带宽类型的参数
+
+    E3_RESERVED2_START_ATV ,
+    E3_RESERVED2_END_ATV  =E3_RESERVED2_START_ATV +1024-1,   //暂时中间预留1K空间
+
+    //两者定义类型保持一致
+    //客户手动保存参数地址
+
+    E3_BACKUP_PARA_CUST_SYSTEM_ATV ,
+    E3_BACKUP_PARA_CUST_RF_ATV      = E3_BACKUP_PARA_CUST_SYSTEM_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_NET_ATV     = E3_BACKUP_PARA_CUST_RF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_MODE_ATV    = E3_BACKUP_PARA_CUST_NET_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_CONFIG_ATV  = E3_BACKUP_PARA_CUST_MODE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST1_ATV        = E3_BACKUP_PARA_CUST_CONFIG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST2_ATV        = E3_BACKUP_PARA_CUST1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST3_ATV        = E3_BACKUP_PARA_CUST2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_CUST_AD1_ATV     = E3_BACKUP_PARA_CUST_CONFIG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD2_ATV     = E3_BACKUP_PARA_CUST_AD1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD3_ATV     = E3_BACKUP_PARA_CUST_AD2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD4_ATV     = E3_BACKUP_PARA_CUST_AD3_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD5_ATV     = E3_BACKUP_PARA_CUST_AD4_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD6_ATV     = E3_BACKUP_PARA_CUST_AD5_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD7_ATV     = E3_BACKUP_PARA_CUST_AD6_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD8_ATV     = E3_BACKUP_PARA_CUST_AD7_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD9_ATV     = E3_BACKUP_PARA_CUST_AD8_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_AD10_ATV    = E3_BACKUP_PARA_CUST_AD9_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_BACKUP_PARA_CUST_WB_ATV      = E3_BACKUP_PARA_CUST_AD5_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WC_ATV      = E3_BACKUP_PARA_CUST_WB_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WD_ATV      = E3_BACKUP_PARA_CUST_WC_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WE_ATV      = E3_BACKUP_PARA_CUST_WD_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WF_ATV      = E3_BACKUP_PARA_CUST_WE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_RG_ATV      = E3_BACKUP_PARA_CUST_WF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WH_ATV      = E3_BACKUP_PARA_CUST_RG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WI_ATV      = E3_BACKUP_PARA_CUST_WH_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WJ_ATV      = E3_BACKUP_PARA_CUST_WI_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WK_ATV      = E3_BACKUP_PARA_CUST_WJ_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WL_ATV      = E3_BACKUP_PARA_CUST_WK_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_BACKUP_PARA_CUST_WM_ATV      = E3_BACKUP_PARA_CUST_WL_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+
+    E3_RESERVED3_START_ATV      = E3_BACKUP_PARA_CUST_WM_ATV +E3_BACKUP_PER_SCREEN_SIZE,
+    E3_RESERVED3_END_ATV  =E3_RESERVED3_START_ATV +512-1,   //暂时中间预留512空间
+
+    E3_BACKUP_PARA_POWER_CUST_START_ATV ,
+    E3_BACKUP_PARA_POWER_CUST_END_ATV  = E3_BACKUP_PARA_POWER_CUST_START_ATV +1024-1,  //功率预留1024 可能有不同带宽类型的参数
+
+
+    EEPROM3_END_ADDRESS = 0X7FFF,
+}EEPROM3_ADDR;
+uint32 eeprom_backup_all_para_atsc(uint32 type);
+uint32 eeprom_reload_all_para_atsc(uint32 type);
+
+#include "lcd_task.h"
+void e2rom_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *p_tsoip_para);
+void ts_load_default_para(int tsoip_index, S_TSOIP_CONFIG_PARA *p_tsoip_config_param);
+
+
+void e2rom_read_all_para(void);
+
+#endif

atsc_app/inc/ethernetif.h

@@ -0,0 +1,56 @@
+/**
+ ******************************************************************************
+  * File Name          : ethernetif.h
+  * Description        : This file provides initialization code for LWIP
+  *                      middleWare.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+  
+
+#ifndef __ETHERNETIF_H__
+#define __ETHERNETIF_H__
+
+#include "lwip/err.h"
+#include "lwip/netif.h"
+#include "cmsis_os.h"
+
+/* Exported types ------------------------------------------------------------*/
+/* Structure that include link thread parameters */
+struct link_str {
+  struct netif *netif;
+  osSemaphoreId semaphore;
+};
+
+/* Within 'USER CODE' section, code will be kept by default at each generation */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Exported functions ------------------------------------------------------- */
+err_t ethernetif_init(struct netif *netif);
+
+void ethernetif_input(void const * argument);
+void ethernetif_set_link(void const *argument);
+void ethernetif_update_config(struct netif *netif);
+void ethernetif_notify_conn_changed(struct netif *netif);
+
+u32_t sys_jiffies(void);
+u32_t sys_now(void);
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */
+#endif
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

atsc_app/inc/flash.h

@@ -0,0 +1,13 @@
+#ifndef __FLASH_H_
+#define __FLASH_H_
+
+#if USE_SPI_FLASH
+
+void flash_write_byte(uint8 byte,uint32 addr);
+void flash_write_buf(uint8 *buf,uint32 num,uint32 addr);
+void flash_read_buf(uint8 *buf,uint32 len,uint32 addr);
+void flash_erase_sector(uint32 start_address,uint32 num);
+#endif
+
+#endif
+

atsc_app/inc/fpga.h

@@ -0,0 +1,145 @@
+#ifndef __FPGA_H_
+#define __FPGA_H_
+#include "type.h"
+#include "lcd_task.h"
+
+#define I2C_REG_ADDRES                  (0xE0)
+
+#define FPGA_UPGRADE_I2C_REG_ADDRES    (0xE0)
+
+#define RW_ADPC_SAVE      0        //保存ADPC数据 读FPGA,写E2/FLASH
+#define RW_ADPC_LOAD      1        //加载ADPC数据 读E
+
+
+//新平台ADPC曲线配置 线性区还是只有一条,非线性区有多条
+#define FPGA_ADPC_DATA_NUM               7
+
+//每条曲线非线性大概16k,线性400多字节
+#define FPGA_ADPC_CURRENT_NONLINER_SIZE  16         //当前实际的非线性区大小(KB)
+
+
+#define FPGA_ADPC_NONLINER_DATA_ADDRESS  (0)
+#define FPGA_ADPC_NONLINER_DATA_SIZE     (16*1024)
+#define E2_FPGA_ADPC_NONLINER_DATA_ADDRESS  (FPGA_ADPC_NONLINER_DATA_SIZE*7)
+
+#if 1//@MK_MTB_TSOIP
+typedef enum{IP2TS_SEL_IP1=1,IP2TS_SEL_IP2=2,IP2TS_SEL_IP_AUTO}en_IP2TS_SEL;
+
+typedef union
+{
+    struct
+    {
+        unsigned char port   :1;//0:asi 1:ip
+        unsigned char ret    :1;
+        unsigned char asi_sel:2;//00:asi1 01:asi2 other:auto
+    }bitFiled;
+    unsigned char asi_s;
+}UN_ASI_SEL;
+
+typedef enum
+{
+    FPGA_IP_ADDR1    = 0X01,
+    FPGA_IP_ADDR2    = 0X02,
+    FPGA_IP_ADDR3    = 0X03,
+    FPGA_IP_ADDR4    = 0X04,  //单播与组播IP地址复用  收端
+
+    FPGA_REC_PORT_HIGH   = 0X05,
+    FPGA_REC_PORT_LOW    = 0X06,
+
+    FPGA_BROAD_TYPE     = 0X07,   //单/组播
+    FPGA_TS_PACKET_LEN  = 0X08,   //对外播放时的TS包长
+    FPGA_TS_PACKET_TYPE = 0X09,   //PACK_UDP 0  PACK_RTP 1
+
+    FPGA_HW_VER         = 0X0A,   //VER
+
+    FPGA_TS_FEC         = 0X0b,   //收端只读
+    FPGA_TS_ROW         = 0X0c,
+    FPGA_TS_COL         = 0X0d,
+    FPGA_DELAY_H        = 0X0E,
+    FPGA_DELAY_L        = 0X0F,
+
+    FPGA_LED_STATUS     = 0X10,  //bit0: ts err  bit1:ts out  bit2:ip in  bit3: MCU的MAC未响应FPGA发来的包(1,错误)
+                                 //bit4: ip err(网线没连,收不到网络包)
+
+    FPGA_VER_YY         = 0X11,
+    FPGA_VER_MM         = 0X12,
+    FPGA_VER_DD         = 0X13,
+
+    FPGA_IP_PK_NUM_H    = 0X14,
+    FPGA_IP_PK_NUM_L    = 0X15,
+
+    FPGA_IP_CTIME_H     = 0X16,
+    FPGA_IP_CTIME_M     = 0X17,
+    FPGA_IP_CTIME_L     = 0X18, //用于计算IP输入码率
+                                //rate = (pk_num*188*8)/(ctime*12.5*1e-9)bit/s
+
+//    FPGA_ASI_RATE_HH    = 0X19,
+//    FPGA_ASI_RATE_HL    = 0X1A,
+//    FPGA_ASI_RATE_LH    = 0X1B,
+//    FPGA_ASI_RATE_LL    = 0X1C,//asi输入码率 bps
+
+    FPGA_TSIO_STATE     = 0X19,//获取到ip12的选择和锁定状态  //h20190221
+
+    FPGA_PHY_RST        = 0X1F,
+
+    FPGA_IP_DEST1       = 0X20,
+    FPGA_IP_DEST2       = 0X21,
+    FPGA_IP_DEST3       = 0X22,
+    FPGA_IP_DEST4       = 0X23,  //ip流目标地址
+
+    FPGA_MAC_SOURCE1    = 0X24,
+    FPGA_MAC_SOURCE2    = 0X25,
+    FPGA_MAC_SOURCE3    = 0X26,
+    FPGA_MAC_SOURCE4    = 0X27,
+    FPGA_MAC_SOURCE5    = 0X28,
+    FPGA_MAC_SOURCE6    = 0X29,
+
+    FPGA_MAC_DEST1      = 0X2A,
+    FPGA_MAC_DEST2      = 0X2B,
+    FPGA_MAC_DEST3      = 0X2C,
+    FPGA_MAC_DEST4      = 0X2D,
+    FPGA_MAC_DEST5      = 0X2E,
+    FPGA_MAC_DEST6      = 0X2F,
+
+    FPGA_PHY_TYPE       = 0X30,   //0:100M  1:GB  2:AUTO
+
+    FPGA_DEST_PORT_HIGH = 0X31,
+    FPGA_DEST_PORT_LOW  = 0X32,
+
+    FPGA_RTP_UDP        = 0X33,    //还未用
+
+    FPGA_DEST_LCL_ADDR1 = 0X34,
+    FPGA_DEST_LCL_ADDR2 = 0X35,
+    FPGA_DEST_LCL_ADDR3 = 0X36,
+    FPGA_DEST_LCL_ADDR4 = 0X37,    //固定向FPGA配置本地IP地址,作为发端时,FPGA必须要用该值
+
+    FPGA_IP12_SELECT    = 0X38,    //选择IP1或IP2作为输入(该参数由激励器端接收到，并向IP端的FPGA设置) //h20190221
+    FPGA_SFN_MFN_SELECT = 0x39,
+}E_FPGA_IP2TS_PARA_ADDRESS;
+
+extern uint8  send_ip12sel_tsoip(uint8 ip_sel);
+extern void fpga_save_dpd_para(S_DPD_PARA *ppara);
+extern void fpga_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *ppara);
+extern void fpga_save_dest_mac(void);
+extern uint32 internal_set_base_delay(uint32 delay);
+#endif//@MK_MTB_TSOIP
+
+void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf);
+void fpga_set_rf_output(uint8 rf);
+void fpga_boot_rf_hold_begin(void);
+void fpga_boot_rf_hold_release(void);
+void erase_adpc_data(void);
+void config_fpga_para(void);
+
+
+#if 1//@ALD_UP
+void fpga_save_wl(S_WL_PARA *ppara);
+
+void fpga_save_dest_mac(void);
+void fpga_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *ppara);
+void boot_reset_for_test(void);
+void boot_cfg_fagc_update();
+
+#endif
+
+#endif

atsc_app/inc/fs.h

@@ -0,0 +1,100 @@
+/**
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * All rights reserved. 
+ * 
+ * Redistribution and use in source and binary forms, with or without modification, 
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission. 
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT 
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT 
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ * 
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ **/
+#ifndef __FS_H__
+#define __FS_H__
+
+#include "lwip/opt.h"
+
+/** Set this to 1 and provide the functions:
+ * - "int fs_open_custom(struct fs_file *file, const char *name)"
+ *    Called first for every opened file to allow opening files
+ *    that are not included in fsdata(_custom).c
+ * - "void fs_close_custom(struct fs_file *file)"
+ *    Called to free resources allocated by fs_open_custom().
+ */
+#ifndef LWIP_HTTPD_CUSTOM_FILES
+#define LWIP_HTTPD_CUSTOM_FILES       0
+#endif
+
+/** Set this to 1 to include an application state argument per file
+ * that is opened. This allows to keep a state per connection/file.
+ */
+#ifndef LWIP_HTTPD_FILE_STATE
+#define LWIP_HTTPD_FILE_STATE         0
+#endif
+
+/** HTTPD_PRECALCULATED_CHECKSUM==1: include precompiled checksums for
+ * predefined (MSS-sized) chunks of the files to prevent having to calculate
+ * the checksums at runtime. */
+#ifndef HTTPD_PRECALCULATED_CHECKSUM
+#define HTTPD_PRECALCULATED_CHECKSUM  0
+#endif
+
+#if HTTPD_PRECALCULATED_CHECKSUM
+struct fsdata_chksum {
+  u32_t offset;
+  u16_t chksum;
+  u16_t len;
+};
+#endif /* HTTPD_PRECALCULATED_CHECKSUM */
+
+struct fs_file {
+  const char *data;
+  int len;
+  int index;
+  void *pextension;
+#if HTTPD_PRECALCULATED_CHECKSUM
+  const struct fsdata_chksum *chksum;
+  u16_t chksum_count;
+#endif /* HTTPD_PRECALCULATED_CHECKSUM */
+  u8_t http_header_included;
+#if LWIP_HTTPD_CUSTOM_FILES
+  u8_t is_custom_file;
+#endif /* LWIP_HTTPD_CUSTOM_FILES */
+#if LWIP_HTTPD_FILE_STATE
+  void *state;
+#endif /* LWIP_HTTPD_FILE_STATE */
+};
+
+struct fs_file *fs_open(const char *name);
+void fs_close(struct fs_file *file);
+int fs_read(struct fs_file *file, char *buffer, int count);
+int fs_bytes_left(struct fs_file *file);
+
+#if LWIP_HTTPD_FILE_STATE
+/** This user-defined function is called when a file is opened. */
+void *fs_state_init(struct fs_file *file, const char *name);
+/** This user-defined function is called when a file is closed. */
+void fs_state_free(struct fs_file *file, void *state);
+#endif /* #if LWIP_HTTPD_FILE_STATE */
+
+#endif /* __FS_H__ */

atsc_app/inc/fsdata.h

@@ -0,0 +1,50 @@
+/**
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ **/
+#ifndef __FSDATA_H__
+#define __FSDATA_H__
+
+#include "lwip/opt.h"
+#include "fs.h"
+
+struct fsdata_file {
+  const struct fsdata_file *next;
+  const unsigned char *name;
+  const unsigned char *data;
+  int 	len;
+  u8_t 	http_header_included;
+#if HTTPD_PRECALCULATED_CHECKSUM
+  u16_t chksum_count;
+  const struct fsdata_chksum *chksum;
+#endif /* HTTPD_PRECALCULATED_CHECKSUM */
+};
+
+#endif /* __FSDATA_H__ */

atsc_app/inc/general_api.h

@@ -0,0 +1,34 @@
+#ifndef __GENERAL_API_H_
+#define __GENERAL_API_H_
+#include "type.h"
+
+uint8 get_check_sum(void *p,uint32 len);
+
+/*
+__inline __asm uint32 asm_rev_l(uint32 data);
+__inline __asm uint32 asm_rev_s(uint32 data);
+__inline __asm  uint32 asm_rbit_l(uint32 data);
+*/
+
+uint16 cal_crc_zb(const uint8 *ptr, uint32 len);
+uint8 bcd2byte(uint8 bcd);
+uint8 byte2bcd(uint8 value);
+
+/*
+//将long类型的变量按半字进行字节反转  0x12345678->0x78563412
+#define  rev_l(data)  asm_rev_l(data)
+
+//将short类型的变量按字节进行反转  0x1234 ->0x3412
+#define rev_s(data)   asm_rev_s(data)
+
+//按位反转
+#define rbit_l(data)  asm_rbit_l(data)
+
+
+*/
+
+void str_trunc_space(char *pstr);
+
+
+#endif
+

atsc_app/inc/gps.h

@@ -0,0 +1,544 @@
+#ifndef GPS_H
+#define GPS_H
+#include "type.h"
+#include "config.h"
+
+#define GPS_COMM_NUM  0
+
+#define GPS_COMM_BAUD  (9600)
+
+#ifndef SYSTICKHZ
+#define SYSTICKHZ         OS_TICKS_PER_SEC
+#endif
+
+
+
+#define GPS_FRAME_DEBUG 0
+#define GPS_INFO_DEBUG  0
+
+
+#define GPS_TEST_DEBUG  0  //调试使用,正式版本关闭
+
+#if  GPS_FRAME_DEBUG
+#define gps_frame_printf printf
+#else
+#define gps_frame_printf(p,...)  do{;}while(0)
+#endif
+
+
+#if  GPS_INFO_DEBUG
+#define gps_info_printf printf
+#else
+#define gps_info_printf(p,...)  do{;}while(0)
+#endif
+
+
+
+
+#define UBLOX_SYNC_CHAR1  (0XB5)
+#define UBLOX_SYNC_CHAR2  (0X62)
+
+#define UBLOX_MAX_DATE_SND_BUF_LEN    100   //发送缓冲区大小
+#define UBLOX_MAX_DATE_REC_BUF_LEN    400   //接收缓冲区大小
+
+#define UBLOX_CFG_MSG_MAX (10)
+
+#define UBLOX_MON_HW_READ_CYCLE 10   //单位s
+
+
+#define UBLOX_TP5_FREQ_PULSE_RATIO           (50)
+#define UBLOX_TP5_FREQ_PERIOD                (0)   //默认配置为8M
+#define UBLOX_TP5_FREQ_PULSE_LEN_RATIO(per)  ((uint32)(0xFFFFFFFFUL/(100/per)+1))
+
+
+#define UBLOX_TIME_MODE_DISABLE    0
+#define UBLOX_TIME_MODE_SURVEY_IN  1
+#define UBLOX_TIME_MODE_FIXED_MODE 2
+
+#define UBLOX_FIND_SAT_TIME        180   //配置为survey in模式时,配置的等待时间
+#define UBLOX_FIND_SAT_ACCURACY    5     //配置为survey in模式时,配置的精度值
+
+#define UBLOX_NO_SAT_TIMEOUT           (UBLOX_FIND_SAT_TIME+100)       //在配置时间基础上增加一定余量
+#define UBLOX_LOCK_TO_UNLOCK_TIMEWAIT   (3*60*SYSTICKHZ)                //锁定变为失锁等待时间
+
+#define UBLOX_RXM_RAW_READ_INTERVAL 0 //60   //读取卫星原始数据信息周期,单位秒,0,关闭
+#define UBLOX_RXM_RAW_MAX_SV_NUM    12   //最多解析的卫星个数
+
+
+typedef enum
+{
+    UBLOX_STATE_ANT_CFG_READ = 0,
+    UBLOX_STATE_ANT_CFG,
+    UBLOX_STATE_TP5_CFG_READ,  //先读取,在配置
+    UBLOX_STATE_TP5_CFG,
+    UBLOX_STATE_TP5_CFG2,      //需两条命令,此命令仅配置pulse 模式
+    UBLOX_STATE_MODE_READ,
+    UBLOX_STATE_MODE_CFG,
+    UBLOX_STATE_MSG_CFG,       //仅需额外配置一个消息,若由多个,需重复配置
+    UBLOX_STATE_SAVE_CFG,
+    UBLOX_STATE_INIT_OVER
+}E_UBLOX_STATE;
+
+
+#pragma pack(1)
+
+//__packed 
+typedef struct
+{
+    uint16 flag;
+    uint16 pins;
+}S_UBLOX_ANT_PARA;
+
+//__packed 
+typedef struct
+{
+    uint8  tp_index;
+    uint8  reserved0;
+    uint16 reserved1;
+    int16  ant_cable_delay;
+    int16  rf_group_delay;
+    uint32 freq_period;
+    uint32 freq_period_lock;
+    uint32 pulse_len_ratio;
+    uint32 pulse_len_ratio_lock;
+    int32  user_config_delay;
+    uint32 flags;
+}S_UBLOX_TP5_PARA;
+
+//__packed 
+typedef struct
+{
+    uint32 time_mode;
+    int32  fixed_posx;
+    int32  fixed_posy;
+    int32  fixed_posz;
+    uint32 fixed_pos_var;
+    uint32 svin_mindur;
+    uint32 svin_varlinmit;
+}S_UBLOX_TMODE_PARA;
+
+//__packed 
+typedef struct
+{
+    uint32  pin_sel;
+    uint32  pin_bank;
+    uint32  pin_dir;
+    uint32  pin_var;
+    uint16  noise_perms;
+    uint16  agc_cnt;
+    uint8   a_status;
+    uint8   a_power;
+    uint8   flags;
+    uint8   reserved1;
+    int32   used_mask;
+    uint8   vp[25];
+    uint8   jam_ind;
+    uint16  reserved2;
+    int32   pin_irq;
+    int32   pull_h;
+    int32   pull_l;
+}S_UBLOX_HW_PARA;
+
+//__packed 
+typedef struct
+{
+    uint32 clear_mask;
+    uint32 save_mask;
+    uint32 load_mask;
+    uint8  device_mask;
+}S_UBLOX_CFG_PARA;
+
+//__packed 
+typedef struct
+{
+    uint16 nav_bbr_mask;
+    uint8  reset_mode;
+    uint8  reserved1;
+}S_UBLOX_RST_PARA;
+#pragma pack()
+
+
+typedef struct
+{
+    double cp_mes;
+    double pr_mes;
+    float  do_mes;
+    uint8  sv;
+    int8   mes_qi;
+    int8   cno;
+    uint8  lli;
+}S_UBLOX_RAW_SV_PARA;
+
+typedef struct
+{
+    int32  i_tow;
+    int16  week;
+    uint8  num_sv;
+    uint8  reserved1;
+    S_UBLOX_RAW_SV_PARA sv_raw[UBLOX_RXM_RAW_MAX_SV_NUM];
+}S_UBLOX_RAW_PARA;
+
+typedef struct
+{
+    uint32  i_tow;
+    uint8   gps_fix;
+    uint8   flags;
+    uint8   fix_stat;
+    uint8   flags2;
+    uint32  ttff;
+    uint32  msss;
+}S_UBLOX_NAV_STATUS_PARA;
+
+typedef struct
+{
+    S_UBLOX_ANT_PARA   ant_para;
+    S_UBLOX_TP5_PARA   tp5_para;
+    S_UBLOX_TMODE_PARA mode_para;
+    S_UBLOX_HW_PARA    hw_para;
+    S_UBLOX_CFG_PARA   cfg_para;
+    S_UBLOX_RST_PARA   rst_para;
+#if UBLOX_RXM_RAW_READ_INTERVAL!=0
+    S_UBLOX_RAW_PARA   raw_para;
+#endif
+}S_UBLOX_PARA,*pS_UBLOX_PARA;
+
+
+typedef enum
+{
+    UBLOX_MSG_ACK = 0X05,
+    UBLOX_MSG_CFG = 0X06,
+    UBLOX_MSG_MON = 0x0A,
+    UBLOX_MSG_RXM = 0X02,
+    UBLOX_MSG_NAV = 0X01,
+}E_UBLOX_MSG_TYPE;
+
+typedef enum
+{
+    UBX_CFG_RST   = 0x04,
+    UBX_CFG_ANT   = 0x13,
+    UBX_CFG_CFG   = 0x09,  //保存参数
+    UBX_CFG_MSG   = 0x01,
+    UBX_CFG_NAV5  = 0x24,
+    UBX_CFG_NAVX5 = 0x23,
+    UBX_CFG_TP5   = 0x31,
+    UBX_CFG_MODE  = 0x1d,
+}E_UBLOX_CFG_INDEX;
+
+typedef enum
+{
+    UBX_MON_HW   = 0x09,
+    UBX_MON_HW2  = 0x0B,
+}E_UBLOX_MON_INDEX;
+
+typedef enum
+{
+    UBX_RXM_RAW   = 0x10,
+}E_UBLOX_RXM_INDEX;
+
+typedef enum
+{
+    UBX_NAV_STATUS = 0x03,
+}E_UBLOX_NAV_INDEX;
+
+
+typedef enum
+{
+    UBX_ACK_NAK   = 0x00,
+    UBX_ACK_ACK   = 0x01,
+}E_UBLOX_ACK_INDEX;
+
+
+typedef enum
+{
+    UBX_CFG_READ,
+    UBX_CFG_WRITE1,
+    UBX_CFG_WRITE2,
+}E_UBLOX_CFG_TYPE;
+
+typedef enum
+{
+    UBX_NAV_GPS_NO_FIX = 0,
+    UBX_NAV_GPS_DEAD_RECKONING_ONLY,
+    UBX_NAV_GPS_2D_FIX,
+    UBX_NAV_GPS_3D_FIX,
+    UBX_NAV_GPS_DEAD_RECKONING_COMBINED,
+    UBX_NAV_GPS_TIME_ONLY_FIX,
+}E_UBLOX_NAV_STATE_GPS_FIX_STATE;
+
+/*CFG-ANT*/
+//Antenna Flag Mask
+#define ENABLE_ANTENNA_VOLTAGE_SIGNAL  (1<<0)
+#define ENABLE_SHORT_CIRCUIT_DETECTION (1<<1)
+#define ENABLE_OPEN_CIRCUIT_DETECTION  (1<<2)
+#define ENABLE_POWER_DOWN_AUTO         (1<<3)
+#define ENALBE_AUTOMATIC_RECOVERY      (1<<4)
+
+//Antenna Pin Configuration
+#define ANT_PIN_SWITCH              (1<<4)
+#define ANT_PIN_SCD                 (1<<9)
+#define ANT_PIN_OCD                 (1<<14)
+#define ANT_RECONFIG                (1<<15)
+
+
+/*CFG-CFG*/
+//Clear Mask Save Mask Load Mask
+#define MASK_IO_PORT                (1<<0)
+#define MASK_MSG_CONF               (1<<1)
+#define MASK_INF_MSG                (1<<2)
+#define MASK_NAV_CONF               (1<<3)
+#define MASK_RXM_CONF               (1<<4)
+#define MASK_RINV_CONF              (1<<9)
+#define MASK_ANT_CONF               (1<<10)
+
+//device Mask
+#define MASK_DEV_BBR                (1<<0)
+#define MASK_DEV_FLASH              (1<<1)
+#define MASK_DEV_EEPROM             (1<<2)
+#define MASK_DEV_SPI_FLASH          (1<<4)
+
+
+/*CFG-NAV5*/
+#define MASK_DYN_SET               (1<<0)
+#define MASK_MIN_EL_SET            (1<<1)
+#define MASK_FIX_MODE_SET          (1<<2)
+#define MASK_DR_LIM_SET            (1<<3)
+#define MASK_POS_SET               (1<<4)
+#define MASK_TIME_SET              (1<<5)
+#define MASK_STATIC_HOLD_SET       (1<<6)
+#define MASK_DGPS_SET              (1<<7)
+
+/*CFG-TP5*/
+#define MASK_TP5_ACTIVE            (1<<0)
+#define MASK_TP5_LOCK_GPS_FREQ     (1<<1)
+#define MASK_TP5_LOCKED_OTHER_SET  (1<<2)
+#define MASK_TP5_IS_FREQ           (1<<3)
+#define MASK_TP5_IS_LENGTH         (1<<4)
+#define MASK_TP5_ALIGN_TO_TOW      (1<<5)
+#define MASK_TP5_PLOARITY          (1<<6)
+#define MASK_TP5_GRID_UTC_GPS      (1<<7)
+
+
+#define DYN_MODEL_PORTABLE      0
+#define DYN_MODEL_STATIONARY    2
+
+#define FIX_MODE_2D             1
+#define FIX_MODE_3D             2
+#define FIX_MODE_AUTO           3
+
+enum
+{
+    UBLOX_RST_BBR_HOTSTART = 0,
+    UBLOX_RST_BBR_WARMSTART,
+    UBLOX_RST_BBR_COLDSTART=0XFFFF,
+};
+
+
+enum
+{
+    UBLOX_RST_HARDWARE = 0,
+    UBLOX_RST_SOFTWARE,
+    UBLOX_RST_GPS_ONLY,
+    UBLOX_RST_HARDWARE_AFTER_SHUTDOWN = 4,
+    UBLOX_RST_GPS_STOP  = 0X08,
+    UBLOX_RST_GPS_START = 0X09
+};
+
+#pragma pack(1)
+
+//UBX配置命令结构
+//__packed 
+typedef struct
+{
+    uint8 ck_a;
+    uint8 ck_b;
+}UBLOX_UBX_SUM,*pUBLOX_UBX_SUM;
+
+//__packed 
+typedef struct
+{
+    uint8 frame_class;
+    uint8 frame_id;
+}UBLOX_FRAME_CLASS_ID;
+
+//__packed 
+typedef struct
+{
+    uint8  sync_char1;  //0XB5
+    uint8  sync_char2;  //0X62  固定字节
+    uint8  cfg_class;
+    uint8  cfg_id;
+    uint16 length;
+    uint8 *pdata;
+    UBLOX_UBX_SUM  sum;
+}S_UBLOX_UBX_MSG,*pS_UBLOX_UBX_MSG;
+#pragma pack()
+
+extern S_UBLOX_HW_PARA *gps_ublox_get_hw_info(void);
+
+
+
+
+typedef enum
+{
+    GPS_ERROR_OK = 0,
+    GPS_ERROR_HEADER,
+    GPS_ERROR_FORMAT,
+    GPS_ERROR_NUM,
+    GPS_ERROR_SUM,
+    GPS_ERROR_INVALID,
+    GPS_ERROR_PTR_INVALID,
+}E_GPS_ERROR;
+#ifndef ERR
+#define ERR 1
+#endif
+
+#ifndef OK
+#define OK  0
+#endif
+
+#define MAX_GPS_UART_LENGTH  (1024) //最大长度
+#define MAX_REC_LENGTH       (MAX_GPS_UART_LENGTH-64) //最大接收长度
+#define LOCAL_AREA           8
+#define LOCAL_AREA_HOURE (LOCAL_AREA*10000)
+
+#define INT_TO_FLOAT_PTR(i)  (*((float *)&(i)))
+#define INT_TO_DOUBLE_PTR(i) (*((double *)&(i)))
+
+#define FLOAT_TO_INT_PTR(f)  (*((uint32 *)&(f)))
+#define DOUBLE_TO_INT_PTR(f) (*((uint64 *)&(f)))
+
+typedef enum
+{
+    MSG_UNKNOW,  //未知
+    MSG_START,
+    MSG_DA,      //日期时间
+    MSG_SA,      //卫星
+    MSG_POLYP,
+    MSG_UBX,
+}MSG_E;
+
+typedef struct
+{
+    MSG_E msgtype;
+    uint16 rxReclen;
+    uint16 procflag;
+    uint8 rxRec[MAX_GPS_UART_LENGTH];
+}PROC_BUFFER_S;
+
+
+typedef enum {AUTO,MANUAL} SMODE_E;
+typedef enum {NO_FIXED=1,FIXED2D,FIXED3D} FIX_STATUS_E;
+typedef struct
+{
+    SMODE_E      mode;
+    FIX_STATUS_E fix_status;  //Fix Status :1,2,3 与上边不一样1 No	fix 2:2D fixed  3:3D fixed
+    uint32    sv;  //需要根据返回报文解析,根据协议,该字段共返回12个,若未使用,返回为空
+    uint32    pdop;
+    uint32    hdop;
+    uint32    vdop;
+}GPGSA_T;
+
+typedef struct
+{
+   uint16 integer;        //纬度的整数部分  ddmm
+   uint32 ft;              //纬度的小数部分  mmmmmm  //十进制,最多6位
+   uint32 hemisphere;     //半球 N(0), S(1)
+}LATITUDE_T;
+typedef struct
+{
+   uint16 integer;   //经度的整数部分  dddmm
+   uint32 ft;     //经度的小数部分  mmmmmm  //十进制,最多6位
+   uint32 direction; //方向 E(0), W(1)
+}LONGITUDE_T;
+
+typedef struct
+{
+    BOOL valid;
+    LATITUDE_T   latitude;   //纬度信息
+    LONGITUDE_T  longitude;  //经度信息
+}POLYP_T;
+
+
+//时间均为UTC标准
+typedef struct
+{
+    uint8    valid;
+    uint8    sec;
+    uint8    min;
+    uint8    hour;
+    uint16   ms;
+    uint8    day;
+    uint8    month;
+    uint16   year;
+    uint32   zone_hour;
+    uint32   zone_min;
+    uint32   kph;
+    uint32   fix_kph;
+}GPZDA_T;
+typedef enum{NORTH,SOUTH}HEM_E;
+typedef struct
+{
+    uint64  lat;
+    HEM_E   hem;
+}LAT_S;   //纬度
+typedef enum{EAST,WEST}DIRECT_E;
+typedef struct
+{
+    uint64 lot;
+    DIRECT_E  direct;
+}LOT_S;   //经度
+
+
+typedef struct
+{
+    uint16  sec;
+    uint16  min;
+    uint16  hour;
+    uint16  day;
+    uint16  month;
+    uint16  year;
+    uint32  valid;  //结构体前半部分要与S_SYS_TIME变量内容保持一致
+    uint16  ms;
+    LATITUDE_T   latitude;   //纬度信息
+    LONGITUDE_T  longitude;  //经度信息
+    uint32   speed;  //浮点类型
+    uint32   cmg;    //浮点类型
+    uint32   mv;
+    uint32   mvd;
+    uint32   mode;
+}GPRMC_T;
+
+extern void ublox_proc_state(void);
+extern void UARTCharPut(unsigned long ulBase, unsigned char ucData);
+
+extern E_GPS_ERROR gps_proc_POLYP(uint8 *pbuf);
+extern E_GPS_ERROR gps_proc_GPRMC(uint8 *pbuf);
+extern E_GPS_ERROR gps_proc_GPGSA(uint8 *pbuf);
+extern uint32 check_delay_over(uint32 *ptick,uint32 cycle);
+extern uint32 str_to_int(uint8 *pbuf,uint8 len,uint32 *result);
+extern uint32 str_to_hex(uint8 *pbuf,uint8 len,uint32 *result);
+extern uint32 str_to_float(uint8 *pbuf,uint8 len,uint32 *result);
+extern uint32 str_to_double(uint8 *pbuf,uint8 len,uint64 *result);
+extern uint32 gps_check_sum(uint8 *pbuf);
+extern uint8  gps_get_sum(uint8 *pbuf,uint32 len);
+extern void  utc_to_localtime(GPRMC_T *ptime);
+extern void  inc_day(GPRMC_T *ptime);
+extern uint32 gps_set_date(uint8 *pbuf);
+extern uint32 gps_set_time(uint8 *pbuf);
+extern void inc_hour(GPRMC_T *p,uint8 num);
+extern void dec_hour(GPRMC_T *ptime,uint8 num);
+extern S_SYS_TIME *gps_get_time(void);
+extern GPGSA_T *gps_get_sa(void);
+extern POLYP_T *gps_get_polyp(void);
+extern void gps_lcd_show(void);
+extern uint32 gps_set_area(uint8 *pbuf);
+extern uint32 get_init_flag(void);
+extern pS_RUN_TIME sys_get_run_time(void);
+extern void gps_hw_reset(void);
+
+//void gps_task(void * pvParameters);
+extern void gps_ublox_init(void);
+
+#endif
+
+

atsc_app/inc/http_get.h

@@ -0,0 +1,201 @@
+
+#ifndef  __HTTP_GET_H__
+#define  __HTTP_GET_H__
+
+#include "type.h"
+//////////state info
+
+
+typedef enum
+{
+	L_CTL_RST = 0,
+	L_CTL_STATE_INFO,
+	L_CTL_SYS_SET,
+	L_CTL_RF_CTL,
+	L_CTL_NET_SET,
+	L_CTL_LOGIC_SET,
+	L_CTL_TIMESLOT_SET
+}L_CTL_EM;
+
+typedef enum
+{
+   L_ASI1=0,
+   L_ASI2,
+   L_ASI_NONE
+}ASI_INPUT_EM;
+
+
+typedef enum
+{
+   PPS_ERR=0,
+   PPS_OK,
+}PPS_EM;
+
+typedef enum
+{
+   GPS_UNLOCK=0,
+   GPS_LOCK,
+   GPS_NOT_CONNECT,
+}GPS_EM;
+
+typedef enum
+{
+   TOD_GPS_ERR=0,
+   TOD_MUX_ERR,
+   TOD_OK,
+}TOD_EM;
+
+//temp
+
+//////////////////////
+
+//sys_set/////////////
+typedef enum
+{
+   LASI1=0,
+   LASI2,
+   LASI_AUTO
+}LASI_EM;
+
+typedef enum
+{
+   LSFN=0,
+   LMFN,
+}LNET_EM;
+
+
+typedef enum
+{
+   LCLK_INT=0,
+   LCLK_AUTO,
+   LCLK_GPS,
+   LCLK_ASI,
+}LCLK_EM;
+
+typedef enum
+{
+   LADP_OPEN=0,
+   LADP_CLOSE,
+}LADP_EM;
+////////////////////////
+
+
+//频率调整
+typedef enum
+{
+   LHZ0_P=0,
+   LHZ0_N,
+
+}LHZ0_EM;
+//功率调整
+typedef enum
+{
+   LPW0_P=0,
+   LPW0_N,
+
+}LPW0_EM;
+
+//agc
+typedef enum
+{
+   LAGC_CLOSE=0,
+   LAGC_OPEN,
+
+}LAGC_EM;
+
+typedef enum
+{
+   LCWY_CLOSE=0,
+   LCWY_OPEN,
+}LCWY_EM;
+
+typedef enum
+{
+   LRFY_CLOSE=0,
+   LRFY_OPEN,
+}LRFY_EM;
+
+////////////////////////
+
+//net set///////////////
+
+//延时设置
+
+typedef enum
+{
+   LTXI_CLOSE=0,
+   LTXI_OPEN,
+}LTXI_EM;
+
+//地区标识
+//发射机标识
+
+////////////////////////
+
+//logic channels ///////
+typedef enum
+{
+   LSET_AUTO=0,
+   LSET_MANUAL,
+
+}LSET_EM;
+
+//信道
+
+////////////////////////
+
+//time slot/////////////
+//时隙
+typedef enum
+{
+   LENA_CLOSE=0,
+   LENA_OPEN,
+
+}LENA_EM;
+//所属信道
+//调制方式
+typedef enum
+{
+   LMDL_BPSK=0,
+   LMDL_QPSK,
+   LMDL_QAM
+
+}LMDL_EM;
+//RS编码
+//外交织
+typedef enum
+{
+   LOIN_MODE1=0,
+   LOIN_MODE2,
+   LOIN_MODE3
+
+}LOIN_EM;
+//LDPC
+//扰码
+
+
+#define XD_NUM 40
+#define ANYWAVE_COM_MAC_HEAD (0xac)
+void load_net_para(S_ETH_ADDRES *peth);
+void check_status(void);
+void load_data_to_http(void);
+void http_save_change_para(void *);
+void MCU_write_curXD_info(void);
+uint32 get_menu_index(void);
+extern BOOL proc_key_update(void * parg, uint8 key);
+extern void fpga_save_agc_vol(void);
+
+extern void enter_menu(uint32 index);
+extern void save_new_cor(uint32 cor);
+//extern void lwIPNetworkConfigChange(uint32 ip,uint32 mask,uint32 gate);
+extern void usr_lwIPNetworkConfigChange(uint32 ip,uint32 mask,uint32 gate);
+
+extern int sntp_enable(uint8 en, uint8 *pAddr);
+extern void http_load_freq(S_CGI_FREQ_PARA *ppara);
+extern int usr_http_write_freq(uint8 freq);
+extern void remote_set_dpd_clr(void);
+extern void http_write_rf(S_CGI_RF *ppara);
+extern u8 usr_remote_adpc(uint8 adpc);
+extern void save_dpd_test_para(uint16 tst);
+extern void usr_set_exc_pwr(int16 exc_pwr);
+#endif

atsc_app/inc/httpd.h

@@ -0,0 +1,265 @@
+/*
+ * Copyright (c) 2001-2003 Swedish Institute of Computer Science.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
+ * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
+ * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
+ * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
+ * OF SUCH DAMAGE.
+ *
+ * This file is part of the lwIP TCP/IP stack.
+ *
+ * Author: Adam Dunkels <adam@sics.se>
+ *
+ * This version of the file has been modified by Texas Instruments to offer
+ * simple server-side-include (SSI) and Common Gateway Interface (CGI)
+ * capability.
+ */
+
+#ifndef __HTTPD_H__
+#define __HTTPD_H__
+
+#include "lwip/opt.h"
+#include "lwip/err.h"
+#include "lwip/pbuf.h"
+
+
+/** Set this to 1 to support CGI */
+#ifndef LWIP_HTTPD_CGI
+#define LWIP_HTTPD_CGI            1
+#endif
+
+/** Set this to 1 to support SSI (Server-Side-Includes) */
+#ifndef LWIP_HTTPD_SSI
+#define LWIP_HTTPD_SSI            1
+#endif
+
+#ifndef LWIP_HTTPD_AJX
+#define LWIP_HTTPD_AJX            1
+#endif
+
+/** Set this to 1 to support HTTP POST */
+#ifndef LWIP_HTTPD_SUPPORT_POST
+#define LWIP_HTTPD_SUPPORT_POST   0
+#endif
+
+
+#if LWIP_HTTPD_CGI
+
+/*
+ * Function pointer for a CGI script handler.
+ *
+ * This function is called each time the HTTPD server is asked for a file
+ * whose name was previously registered as a CGI function using a call to
+ * http_set_cgi_handler. The iIndex parameter provides the index of the
+ * CGI within the ppcURLs array passed to http_set_cgi_handler. Parameters
+ * pcParam and pcValue provide access to the parameters provided along with
+ * the URI. iNumParams provides a count of the entries in the pcParam and
+ * pcValue arrays. Each entry in the pcParam array contains the name of a
+ * parameter with the corresponding entry in the pcValue array containing the
+ * value for that parameter. Note that pcParam may contain multiple elements
+ * with the same name if, for example, a multi-selection list control is used
+ * in the form generating the data.
+ *
+ * The function should return a pointer to a character string which is the
+ * path and filename of the response that is to be sent to the connected
+ * browser, for example "/thanks.htm" or "/response/error.ssi".
+ *
+ * The maximum number of parameters that will be passed to this function via
+ * iNumParams is defined by LWIP_HTTPD_MAX_CGI_PARAMETERS. Any parameters in the incoming
+ * HTTP request above this number will be discarded.
+ *
+ * Requests intended for use by this CGI mechanism must be sent using the GET
+ * method (which encodes all parameters within the URI rather than in a block
+ * later in the request). Attempts to use the POST method will result in the
+ * request being ignored.
+ *
+ */
+typedef char *(*tCGIHandler)(int iIndex, int iNumParams, char *pcParam[],
+                             char *pcValue[]);
+
+/*
+ * Structure defining the base filename (URL) of a CGI and the associated
+ * function which is to be called when that URL is requested.
+ */
+typedef struct
+{
+    char const *pcCGIName;
+    tCGIHandler pfnCGIHandler;
+} tCGI;
+
+void http_set_cgi_handlers(const tCGI *pCGIs, int iNumHandlers);
+
+
+/* The maximum number of parameters that the CGI handler can be sent. */
+#ifndef LWIP_HTTPD_MAX_CGI_PARAMETERS
+#define LWIP_HTTPD_MAX_CGI_PARAMETERS 32
+#endif
+
+#endif /* LWIP_HTTPD_CGI */
+
+#if LWIP_HTTPD_SSI
+
+/** LWIP_HTTPD_SSI_MULTIPART==1: SSI handler function is called with 2 more
+ * arguments indicating a counter for insert string that are too long to be
+ * inserted at once: the SSI handler function must then set 'next_tag_part'
+ * which will be passed back to it in the next call. */
+#ifndef LWIP_HTTPD_SSI_MULTIPART
+#define LWIP_HTTPD_SSI_MULTIPART    0
+#endif
+
+/*
+ * Function pointer for the SSI tag handler callback.
+ *
+ * This function will be called each time the HTTPD server detects a tag of the
+ * form <!--#name--> in a .shtml, .ssi or .shtm file where "name" appears as
+ * one of the tags supplied to http_set_ssi_handler in the ppcTags array.  The
+ * returned insert string, which will be appended after the the string
+ * "<!--#name-->" in file sent back to the client,should be written to pointer
+ * pcInsert.  iInsertLen contains the size of the buffer pointed to by
+ * pcInsert.  The iIndex parameter provides the zero-based index of the tag as
+ * found in the ppcTags array and identifies the tag that is to be processed.
+ *
+ * The handler returns the number of characters written to pcInsert excluding
+ * any terminating NULL or a negative number to indicate a failure (tag not
+ * recognized, for example).
+ *
+ * Note that the behavior of this SSI mechanism is somewhat different from the
+ * "normal" SSI processing as found in, for example, the Apache web server.  In
+ * this case, the inserted text is appended following the SSI tag rather than
+ * replacing the tag entirely.  This allows for an implementation that does not
+ * require significant additional buffering of output data yet which will still
+ * offer usable SSI functionality.  One downside to this approach is when
+ * attempting to use SSI within JavaScript.  The SSI tag is structured to
+ * resemble an HTML comment but this syntax does not constitute a comment
+ * within JavaScript and, hence, leaving the tag in place will result in
+ * problems in these cases.  To work around this, any SSI tag which needs to
+ * output JavaScript code must do so in an encapsulated way, sending the whole
+ * HTML <script>...</script> section as a single include.
+ */
+typedef u16_t (*tSSIHandler)(int iIndex, char *pcInsert, int iInsertLen
+#if LWIP_HTTPD_SSI_MULTIPART
+                             , u16_t current_tag_part, u16_t *next_tag_part
+#endif /* LWIP_HTTPD_SSI_MULTIPART */
+#if LWIP_HTTPD_FILE_STATE
+                             , void *connection_state
+#endif /* LWIP_HTTPD_FILE_STATE */
+                             );
+
+void http_set_ssi_handler(tSSIHandler pfnSSIHandler,
+                          const char **ppcTags, int iNumTags);
+
+/* The maximum length of the string comprising the tag name */
+#ifndef LWIP_HTTPD_MAX_TAG_NAME_LEN
+#define LWIP_HTTPD_MAX_TAG_NAME_LEN 24
+#endif
+
+/* The maximum length of string that can be returned to replace any given tag */
+#ifndef LWIP_HTTPD_MAX_TAG_INSERT_LEN
+#define LWIP_HTTPD_MAX_TAG_INSERT_LEN 1024
+#endif
+
+#endif /* LWIP_HTTPD_SSI */
+
+#if LWIP_HTTPD_SUPPORT_POST
+
+/* These functions must be implemented by the application */
+
+/** Called when a POST request has been received. The application can decide
+ * whether to accept it or not.
+ *
+ * @param connection Unique connection identifier, valid until httpd_post_end
+ *        is called.
+ * @param uri The HTTP header URI receiving the POST request.
+ * @param http_request The raw HTTP request (the first packet, normally).
+ * @param http_request_len Size of 'http_request'.
+ * @param content_len Content-Length from HTTP header.
+ * @param response_uri Filename of response file, to be filled when denying the
+ *        request
+ * @param response_uri_len Size of the 'response_uri' buffer.
+ * @param post_auto_wnd Set this to 0 to let the callback code handle window
+ *        updates by calling 'httpd_post_data_recved' (to throttle rx speed)
+ *        default is 1 (httpd handles window updates automatically)
+ * @return ERR_OK: Accept the POST request, data may be passed in
+ *         another err_t: Deny the POST request, send back 'bad request'.
+ */
+err_t httpd_post_begin(void *connection, const char *uri, const char *http_request,
+                       u16_t http_request_len, int content_len, char *response_uri,
+                       u16_t response_uri_len, u8_t *post_auto_wnd);
+
+/** Called for each pbuf of data that has been received for a POST.
+ * ATTENTION: The application is responsible for freeing the pbufs passed in!
+ *
+ * @param connection Unique connection identifier.
+ * @param p Received data.
+ * @return ERR_OK: Data accepted.
+ *         another err_t: Data denied, http_post_get_response_uri will be called.
+ */
+err_t httpd_post_receive_data(void *connection, struct pbuf *p);
+
+/** Called when all data is received or when the connection is closed.
+ * The application must return the filename/URI of a file to send in response
+ * to this POST request. If the response_uri buffer is untouched, a 404
+ * response is returned.
+ *
+ * @param connection Unique connection identifier.
+ * @param response_uri Filename of response file, to be filled when denying the request
+ * @param response_uri_len Size of the 'response_uri' buffer.
+ */
+void httpd_post_finished(void *connection, char *response_uri, u16_t response_uri_len);
+
+#ifndef LWIP_HTTPD_POST_MANUAL_WND
+#define LWIP_HTTPD_POST_MANUAL_WND  0
+#endif
+
+#if LWIP_HTTPD_POST_MANUAL_WND
+void httpd_post_data_recved(void *connection, u16_t recved_len);
+#endif /* LWIP_HTTPD_POST_MANUAL_WND */
+
+#endif /* LWIP_HTTPD_SUPPORT_POST */
+
+#if LWIP_HTTPD_AJX
+
+typedef int (*tAJXHandler)(int iIndex, char *pcInsert,int *iInsertLen);
+
+typedef struct
+{
+    const char *pcAJXName;
+    tAJXHandler pfnAJXHandler;
+}tAJX;
+
+void http_set_ajx_handlers(const tAJX *pAJXs, int iNumHandlers);
+
+
+#ifndef HTTPD_MAX_AJX_FORMS_NUM
+#define HTTPD_MAX_AJX_FORMS_NUM   1
+#endif
+
+#ifndef HTTPD_MAX_AJX_INSERT_LEN
+#define HTTPD_MAX_AJX_INSERT_LEN  256
+#endif
+
+#endif
+
+
+
+void httpd_init(void);
+
+#endif /* __HTTPD_H__ */

atsc_app/inc/httpd_structs.h

@@ -0,0 +1,115 @@
+#ifndef __HTTPD_STRUCTS_H__
+#define __HTTPD_STRUCTS_H__
+
+#include "httpd.h"
+
+/** This string is passed in the HTTP header as "Server: " */
+#ifndef HTTPD_SERVER_AGENT
+#define HTTPD_SERVER_AGENT "lwIP/1.3.1 (http://savannah.nongnu.org/projects/lwip)"
+#endif
+
+/** Set this to 1 if you want to include code that creates HTTP headers
+ * at runtime. Default is off: HTTP headers are then created statically
+ * by the makefsdata tool. Static headers mean smaller code size, but
+ * the (readonly) fsdata will grow a bit as every file includes the HTTP
+ * header. */
+#ifndef LWIP_HTTPD_DYNAMIC_HEADERS
+#define LWIP_HTTPD_DYNAMIC_HEADERS 0
+#endif
+
+
+#if LWIP_HTTPD_DYNAMIC_HEADERS
+/** This struct is used for a list of HTTP header strings for various
+ * filename extensions. */
+typedef struct
+{
+  const char *extension;
+  int headerIndex;
+} tHTTPHeader;
+
+/** A list of strings used in HTTP headers */
+static const char *g_psHTTPHeaderStrings[] =
+{
+ "Content-type: text/html\r\n\r\n",
+ "Content-type: text/html\r\nExpires: Fri, 10 Apr 2008 14:00:00 GMT\r\nPragma: no-cache\r\n\r\n",
+ "Content-type: image/gif\r\n\r\n",
+ "Content-type: image/png\r\n\r\n",
+ "Content-type: image/jpeg\r\n\r\n",
+ "Content-type: image/bmp\r\n\r\n",
+ "Content-type: image/x-icon\r\n\r\n",
+ "Content-type: application/octet-stream\r\n\r\n",
+ "Content-type: application/x-javascript\r\n\r\n",
+ "Content-type: application/x-javascript\r\n\r\n",
+ "Content-type: text/css\r\n\r\n",
+ "Content-type: application/x-shockwave-flash\r\n\r\n",
+ "Content-type: text/xml\r\n\r\n",
+ "Content-type: text/plain\r\n\r\n",
+ "HTTP/1.0 200 OK\r\n",
+ "HTTP/1.0 404 File not found\r\n",
+ "HTTP/1.0 400 Bad Request\r\n",
+ "HTTP/1.0 501 Not Implemented\r\n",
+ "HTTP/1.1 200 OK\r\n",
+ "HTTP/1.1 404 File not found\r\n",
+ "HTTP/1.1 400 Bad Request\r\n",
+ "HTTP/1.1 501 Not Implemented\r\n",
+ "Content-Length: ",
+ "Connection: Close\r\n",
+ "Server: "HTTPD_SERVER_AGENT"\r\n",
+ "\r\n<html><body><h2>404: The requested file cannot be found.</h2></body></html>\r\n"
+};
+
+/* Indexes into the g_psHTTPHeaderStrings array */
+#define HTTP_HDR_HTML           0  /* text/html */
+#define HTTP_HDR_SSI            1  /* text/html Expires... */
+#define HTTP_HDR_GIF            2  /* image/gif */
+#define HTTP_HDR_PNG            3  /* image/png */
+#define HTTP_HDR_JPG            4  /* image/jpeg */
+#define HTTP_HDR_BMP            5  /* image/bmp */
+#define HTTP_HDR_ICO            6  /* image/x-icon */
+#define HTTP_HDR_APP            7  /* application/octet-stream */
+#define HTTP_HDR_JS             8  /* application/x-javascript */
+#define HTTP_HDR_RA             9  /* application/x-javascript */
+#define HTTP_HDR_CSS            10 /* text/css */
+#define HTTP_HDR_SWF            11 /* application/x-shockwave-flash */
+#define HTTP_HDR_XML            12 /* text/xml */
+#define HTTP_HDR_DEFAULT_TYPE   13 /* text/plain */
+#define HTTP_HDR_OK             14 /* 200 OK */
+#define HTTP_HDR_NOT_FOUND      15 /* 404 File not found */
+#define HTTP_HDR_BAD_REQUEST    16 /* 400 Bad request */
+#define HTTP_HDR_NOT_IMPL       17 /* 501 Not Implemented */
+#define HTTP_HDR_OK_11          18 /* 200 OK */
+#define HTTP_HDR_NOT_FOUND_11   19 /* 404 File not found */
+#define HTTP_HDR_BAD_REQUEST_11 20 /* 400 Bad request */
+#define HTTP_HDR_NOT_IMPL_11    21 /* 501 Not Implemented */
+#define HTTP_HDR_CONTENT_LENGTH 22 /* Content-Length: (HTTP 1.1)*/
+#define HTTP_HDR_CONN_CLOSE     23 /* Connection: Close (HTTP 1.1) */
+#define HTTP_HDR_SERVER         24 /* Server: HTTPD_SERVER_AGENT */
+#define DEFAULT_404_HTML        25 /* default 404 body */
+
+/** A list of extension-to-HTTP header strings */
+static tHTTPHeader g_psHTTPHeaders[] =
+{
+ { "html", HTTP_HDR_HTML},
+ { "htm",  HTTP_HDR_HTML},
+ { "shtml",HTTP_HDR_SSI},
+ { "shtm", HTTP_HDR_SSI},
+ { "ssi",  HTTP_HDR_SSI},
+ { "gif",  HTTP_HDR_GIF},
+ { "png",  HTTP_HDR_PNG},
+ { "jpg",  HTTP_HDR_JPG},
+ { "bmp",  HTTP_HDR_BMP},
+ { "ico",  HTTP_HDR_ICO},
+ { "class",HTTP_HDR_APP},
+ { "cls",  HTTP_HDR_APP},
+ { "js",   HTTP_HDR_JS},
+ { "ram",  HTTP_HDR_RA},
+ { "css",  HTTP_HDR_CSS},
+ { "swf",  HTTP_HDR_SWF},
+ { "xml",  HTTP_HDR_XML}
+};
+
+#define NUM_HTTP_HEADERS (sizeof(g_psHTTPHeaders) / sizeof(tHTTPHeader))
+
+#endif /* LWIP_HTTPD_DYNAMIC_HEADERS */
+
+#endif /* __HTTPD_STRUCTS_H__ */

atsc_app/inc/i2c_drv.h

@@ -0,0 +1,139 @@
+#ifndef _I2C_DRV_H
+#define _I2C_DRV_H
+#include "type.h"
+#include "config.h"
+
+
+
+
+#if 1//ADD
+
+#define FPGA_I2C_NUM            1
+#define FPGA_DEV_ADDRESS       (0X5A<<1)
+#define DRYLOOP_DEV_ADDRESS    (0x42<<1)
+
+#define EXT_I2C_NUM             0
+#define TS2IP_DEV_ADDRESS      (0x5D<<1) // (0x70<<1)
+#define TS2IP2_DEV_ADDRESS     (0x5E<<1) // (0x90<<1)
+
+#define TUNER_I2C_NUM          0
+//#define TS2IP_DEV_ADDRESS      (0x5D<<1) // (0x70<<1)
+//#define TS2IP2_DEV_ADDRESS     (0x5E<<1) // (0x90<<1)
+
+
+
+#endif
+
+
+
+
+
+
+
+
+#define	TS_NET_I2C_READ		0
+#define	TS_NET_I2C_WRITE	1
+
+#if USE_TUNER_18273
+#define TUNER18273_ADDRESS     (0xC6)
+#else
+#define TUNER18273_ADDRESS     (0xC0)
+#endif
+
+void e2_byte_write(uint16 addr,uint8 data,uint32 chip);
+uint8 e2_byte_read(uint16 addr,uint32 chip);
+uint8 e2_byte_read_v2(uint16 addr, uint8 default_value,uint32 chip);
+
+
+uint32 atmel_write_e2rom_buf(uint8* pbuf,uint16 offset,uint16 num,uint8 chip);
+uint32 atmel_read_e2rom_buf(uint8* pbuf,uint16 offset,uint16 num,uint8 chip);
+
+
+
+
+void i2c_hw_init(void);
+
+#define E2_PROM_PAGE_SIZE     (64)              //E2的页大小
+#define E2_PROM_TOTLE_SIZE    (32*1024)         //E2的总大小
+#define E2_PROM_OFFSET_SIZE   (2)               //E2的参数地址字节数
+
+#define I2C_READ_OK             0
+#define I2C_WRITE_OK            0
+#define I2C_WAIT_TIME_OUT       1
+#define I2C_PARA_INVALID        2
+
+#define E2_TOTAL_NUM  3
+
+#define E2_CHIP_1     0   //三个E2
+#define E2_CHIP_2     1
+#define E2_CHIP_3     2
+
+
+#define c256_byteread_default(a,b)      e2_byte_read_v2(a,b,E2_CHIP_1) // add a new param need this function
+
+#define c256_byteread(a)      e2_byte_read(a,E2_CHIP_1)
+#define c256_bytewrite(a,b)   e2_byte_write(a,b,E2_CHIP_1)
+
+#define c256_byteread2(a)     e2_byte_read(a,E2_CHIP_2)
+#define c256_bytewrite2(a,b)  e2_byte_write(a,b,E2_CHIP_2)
+
+#define c256_byteread3(a)     e2_byte_read(a,E2_CHIP_3)
+#define c256_bytewrite3(a,b)  e2_byte_write(a,b,E2_CHIP_3)   //方便后续激励器移植
+
+#define atmel_write_e1(pbuf,offset,num)  atmel_write_e2rom_buf(pbuf,offset,num,E2_CHIP_1)
+#define atmel_read_e1(pbuf,offset,num)   atmel_read_e2rom_buf(pbuf,offset,num,E2_CHIP_1)
+
+#define atmel_write_e2(pbuf,offset,num)    atmel_write_e2rom_buf(pbuf,offset,num,E2_CHIP_2)
+#define atmel_read_e2(pbuf,offset,num)     atmel_read_e2rom_buf(pbuf,offset,num,E2_CHIP_2)
+
+#define atmel_write_e3(pbuf,offset,num)    atmel_write_e2rom_buf(pbuf,offset,num,E2_CHIP_3)
+#define atmel_read_e3(pbuf,offset,num)     atmel_read_e2rom_buf(pbuf,offset,num,E2_CHIP_3)
+
+
+
+void fpga_byte_write(uint8 segment,uint32 addr,uint8 data);
+uint8 fpga_byte_read(uint8 segment,uint32 addr);
+
+void fpga_reset_save_segment(void);
+
+uint8  dryloop_read(uint32 addr);
+uint32 dryloop_write(uint32 addr,uint8 data);
+uint32 tuner_byte_write(uint32 addr,uint8 data);
+uint8  tuner_byte_read(uint32 addr);
+
+void ip2ts_i2c_rw(uint8 *pucData, uint8 addr,uint16 cnt, uint32 rw);
+
+
+#if 1
+extern void tsoip_byte_write(int tsoip_index, uint32 addr, uint8 data);
+extern uint8 tsoip_byte_read(int tsoip_index,uint32 addr);
+extern void fpga_i2c_sim_spi_read(uint16 addr, uint32 *p_data);
+
+extern void fpga_i2c_sim_spi_write(uint16 addr, uint32 data);
+extern void e_map_init(void);
+extern void ii2c_hw_init(void);
+extern uint8 fpga_byte_reads(uint8 segment,uint32 addr,uint8 *pdata,uint8 rlen);
+extern int fpga_byte_writes(uint8 segment,uint32 addr,uint8 *pdata,uint8 wlen);
+
+
+
+uint32 tuner_i2c_write(uint8 slave_addr,uint8 *pdata,uint8 length);
+uint32 tuner_i2c_read(uint8 slave_addr,uint8 *pdata,uint8 length);
+uint32 tuner_i2c_read_offset8(uint8 slave_addr,uint8 offset,uint8 *pdata,uint8 length);
+uint32 tuner_i2c_read_offset16(uint8 slave_addr,uint8 offset[8],uint8 *pdata,uint8 length);
+int tuner_nbytes_write(uint32 dev_addr, uint32 offset, uint8 *pdata, uint32 wlen);
+/*
+void fpga_write_axi0(u32 addr, u32 data, u32 count);
+int fpga_read_axi0(u32 addr, u32 *pdata, u32 count);
+
+int fpga_read_axi0_test(uint32 addr, uint32 *pdata, uint32 count);
+void fpga_write_axi0_test(uint32 addr, uint32 data, uint32 count);
+*/
+void fpga_write_axi0_test(uint32 addr, uint32 data, uint32 count);
+void fpga_write_axi0(uint32 addr, uint32 data, uint32 count);
+int  fpga_read_axi0(uint32 addr, uint32 *pdata, uint32 count);
+
+#endif
+
+
+#endif

atsc_app/inc/igpio.h

@@ -0,0 +1,68 @@
+
+#ifndef _IGPIO_H_
+#define _IGPIO_H_
+
+#define   SHELL_CTRL_GPIO           0
+
+#define   GPIO_NUM_1_5              ((1-1)*32+5)
+
+//key gpio
+//GPIO4_IO22 = (4-1)*32+22=118
+#define KEY1_GP_NUM     15 //G1-15 = (1-1)*32+15
+#define KEY2_GP_NUM     11 //G1-11 = (1-1)*32+11
+#define KEY3_GP_NUM     12 //G1-12 = (1-1)*32+12
+#define KEY4_GP_NUM     13 //G1-13 = (1-1)*32+13
+#define KEY5_GP_NUM     10 //G1-10 = (1-1)*32+10
+#define KEY6_GP_NUM     14 //G1-14 = (1-1)*32+14
+
+//lcd gpio
+#define LCD_EN_GP_NUM   79 //gpio3_15 ((3-1)*32+15)
+#define LCD_CTL_GP_NUM  81 //((3-1)*32+17)
+#define LCD_RS_GP_NUM   82
+#define LCD_E_GP_NUM    83
+#define LCD_RW_GP_NUM   84
+#define LCD_D1_GP_NUM   85
+#define LCD_D0_GP_NUM   86
+#define LCD_D3_GP_NUM   87
+#define LCD_D2_GP_NUM   88
+#define LCD_D5_GP_NUM   89
+#define LCD_D4_GP_NUM   90
+#define LCD_D7_GP_NUM   91
+#define LCD_D6_GP_NUM   92
+
+#define FPGA_RST_GP_NUM     117 //G4-21 = (4-1)*32+21
+
+//tuner reset gpio
+#define TUNER_RST_GP_NUM   	3 //gpio1_3 =(1-1)*32+3
+
+//i2c gpio
+//GPIO4_IO22 = (4-1)*32+22=118
+#define I2C2_SDA_GP_NUM     31 //G1-31
+#define I2C2_SCL_GP_NUM     30 //G1-30
+
+#define I2C1_SDA_GP_NUM     29 //G1-29
+#define I2C1_SCL_GP_NUM     28 //G1-28
+
+
+typedef enum{E_IO_L=0,E_IO_H=1}E_IO_VAL;
+typedef enum{E_IO_OUT=0,E_IO_IN=1}E_IO;
+
+
+int set_gpio_export(uint16_t gp_num);
+int set_gpio_unexport(uint16_t gp_num);
+int set_gpio_io_direct(uint16_t gp_num,E_IO io_dir);
+int set_gpio_value(uint16_t gp_num, E_IO_VAL val);
+int get_gpio_value(uint16_t gp_num, uint8 *pval);
+extern int set_gpio_value_by_shell(uint16_t gp_num, E_IO_VAL val);
+extern int get_goio_value_by_shell(uint16_t gp_num, uint8 *pval);
+
+
+void gpio_mutex_init(void);
+void key_gpio_init(void);
+void lcd_gpio_init(void);
+void i2c_gpio_init(void);
+
+void fpga_reset_gpio_init(void);
+
+#endif//_IGPIO_H_
+

atsc_app/inc/ihttp_get.h

@@ -0,0 +1,13 @@
+#ifndef __HTTP_GET_H__
+#define __HTTP_GET_H__
+
+/*
+@add
+*/
+
+
+
+extern uint32 Net_write_RF(uint8 param);
+
+#endif
+

atsc_app/inc/ii2c.h

@@ -0,0 +1,12 @@
+#ifndef __II2C_H__
+#define __II2C_H__
+
+#include "type.h"
+
+
+extern uint8 i2c_write(int fd, uint8 reg, uint8 val);
+extern uint8 i2c_read(int fd, uint8 reg, uint8 *pval);
+extern int ii2c_com_init(const char*i2c_node_name,uint8 i2c_addr, int *pfd);
+
+#endif//__II2C_H__
+

atsc_app/inc/ipara_cfg.h

@@ -0,0 +1,52 @@
+#ifndef __IPARA_CFG_H__
+#define __IPARA_CFG_H__
+
+#include <fcntl.h>  //define O_WRONLY and O_RDONLY
+#include <pthread.h>
+#include "type.h"
+
+
+#define F_EXC_CFG_PARA_FILE         "/aw/anywave/cfg/exc_cfg.conf"
+#define F_EXC_CFG_PARA_BKP1_FILE    "/aw/anywave/cfg/bkp/exc_cfg_bkp1.conf"
+#define F_EXC_CFG_PARA_BKP2_FILE    "/aw/anywave/cfg/bkp/exc_cfg_bkp2.conf"
+
+#define F_EXC_CFG_PARA_BKP_FILE     "/aw/anywave/cfg/bkp/exc_cfg_bkp.conf"
+
+#define STR_HW_SYS_PARA_TYPE        "HW_SYS_PARA"
+#define STR_BLK_SYS_PARA_TYPE       "BLK_SYS_PARA"
+#define STR_LCD_SYS_PARA_TYPE       "LCD_SYS_PARA"
+
+#define DEF_REG_PARA                0xff    //默认参数一律按照0xff
+
+
+typedef enum
+{
+    E_HW_SYS_PARA_TYPE=0,
+    E_LCD_SYS_PARA_TYPE,
+}E_WR_PARA_TYPE;
+
+typedef enum
+{
+E_NORMAL_FILE_TYPE=0,
+E_BKP1_FILE_TYPE,
+E_BKP2_FILE_TYPE,
+E_NULL_FILE_TYPE
+}E_WR_FILE_TYPE;
+
+
+typedef struct{
+    uint16          para_id;
+    E_WR_PARA_TYPE  para_type;
+    char            para_name[20];
+    uint16          para_def;//实际为8bit
+    E_WR_FILE_TYPE  file_type;
+}S_PARA_IO_ELEMENT;
+
+
+
+extern int set_para_to_e_map(uint16 para_id, uint8 para_val, uint8 chip);
+extern uint8 get_para_from_e_map(uint16 para_id, uint8 chip);
+extern uint8 get_para_from_e_map_v2(uint16 para_id, uint8 default_val, uint8 chip);
+
+#endif//__IPARA_CFG_H__
+

atsc_app/inc/iq_rx.h

@@ -0,0 +1,56 @@
+#ifndef __IQ_RX_H__
+#define __IQ_RX_H__
+
+/* ORx IQ receive/analysis thread (task/iq_rx.c). */
+void *iq_rx_thr(void *arg);
+
+/* Runtime spectrum/IQ processing switch. Defaults to disabled after boot. */
+int iq_spec_get_enable(void);
+void iq_spec_set_enable(int enable);
+
+/*
+ * Newest UIMD/LIMD measured on the imx6's own 10 MSPS ORx window.
+ *
+ * Same taps as the FPGA's imd_imd_fft_meas -- centre bin at +24.414 kHz and the two
+ * shoulder bins at +-3.1494 MHz -- but averaged over 11 bins (+-12.2 kHz) each and
+ * Welch-averaged over the whole 26.2 ms window. LIMD is always the shoulder on the
+ * pilot's side of the carrier; which one that is follows the measured pilot, so a
+ * spectral inversion cannot silently swap the two.
+ *
+ * The FPGA's own registers cannot be used any more: its 20-bit |DFT|^2 output
+ * quantises the shoulder bins to 0 once the shoulder is better than ~45 dB, and
+ * lcd_task.c's `if (imd_l == 0) imd_l = 1` then reports a constant.
+ *
+ * limd_db/uimd_db are 10*log10(P_centre / P_shoulder), i.e. positive dB, no +11 dB
+ * display offset applied.
+ *
+ * Returns 1 and fills both pointers when a window newer than IQ_IMD_MAX_AGE seconds
+ * is available, 0 otherwise (caller should keep whatever it had).
+ */
+#define IQ_IMD_MAX_AGE 10
+
+/* The 8VSB demod runs on a nice'd thread on a core that is already ~40% busy in
+ * softirq, so a fresh window lands every ~10 s rather than every second. */
+#define IQ_SNR_MAX_AGE 30
+
+int iq_get_imd(float *limd_db, float *uimd_db);
+
+/*
+ * 8VSB demodulation of one complete window (task/iq_vsb.c): matched filter, symbol
+ * recovery, SNR and the eye-diagram density map, published as /tmp/iq_eye.json.
+ * `win` is the raw window buffer (262144 big-endian int16 I/Q pairs).
+ */
+void iq_vsb_analyse(const unsigned char *win, int wid);
+
+/*
+ * Newest 8VSB SNR (== MER, I-path definition) measured on that window. Returns 1 and
+ * fills snr_db when a window newer than IQ_IMD_MAX_AGE seconds has been demodulated
+ * with segment sync locked, 0 otherwise.
+ *
+ * This replaces the value lcd_task.c used to fabricate: its "limit snr display" block
+ * overwrote the FPGA's SNR with a two-valued function of the (bottomed-out) IMD.
+ */
+int iq_get_snr(float *snr_db);
+void iq_vsb_clear_results(void);
+
+#endif /* __IQ_RX_H__ */

atsc_app/inc/ispi.h

@@ -0,0 +1,34 @@
+#ifndef __ISPI_H_
+#define __ISPI_H_
+
+#include "../inc/type.h"
+
+
+
+//----------------------
+#define SPI_DELAY      0
+#define SPEED          6000000//9000000  /* note: 9M check err, do not over 6M*/
+
+#define ARRAY_SIZE(a)  (sizeof(a) / sizeof((a)[0]))
+
+#define HALF_DUPLEX     1
+#define FULL_DUPLEX     2
+
+#define SPI_BUFF_MAX 4096
+
+//----------------------
+extern int init_spi_dev(char *pspi_node_name, int *pfd, uint8 mode, uint8 bits, uint8 speed);
+extern uint8_t iSPI_I2S_Send4Byte(int spi_fd, uint8* pdata);
+
+extern int spi_w(int fd, u8 addr, uint16_t u16_data);
+extern int spi_r(int fd, u8 addr, u16 *pdata);
+extern int spi_transfer_big_block(int spi_fd, uint8 *pdata, int bytelen);
+extern int spi_receiver_big_block(int spi_fd, uint8 *pdata, int bytelen);
+//----------------------
+
+int spi_w_addr16_data8(int fd, u16 addr, uint8_t u8_data);
+int spi_r_addr16_data8(int fd, u16 addr, u8 *pdata);
+
+
+#endif//__ISPI_H_
+

atsc_app/inc/isys_com.h

@@ -0,0 +1,104 @@
+#ifndef _ISYS_COM_H__
+#define _ISYS_COM_H__
+
+#include <sys/time.h>
+#include <stdio.h>
+#include <stdarg.h>
+#include "type.h"
+#include <time.h>
+#include "type.h"
+#include "lcd_task.h"
+
+
+
+
+/*
+当前日志级别配置
+*/
+#ifndef LOGGER_CFG_LEVEL
+#define LOGGER_CFG_LEVEL			LOG_DEBUG
+#endif
+
+/*
+日志级别定义，数值越小，级别越高
+*/
+typedef enum
+{
+    LOG_OFF = 0,
+    LOG_ERR,
+    LOG_WARN,
+    LOG_INFO,
+    LOG_DEBUG,
+    LOG_ALL
+}E_LOG_LEVEL;
+
+/*
+log类型定义
+*/
+
+typedef enum
+{
+    I_USER_CFG = 0, // 用户手动配置
+    I_SYS_STATUS, // 系统状态信息
+    I_NOUSED,
+    I_RUN_STATUS
+}E_LOG_TYPE;
+
+
+
+
+/*
+根据配置的日志级别输出日志
+*/
+#define log_printf(level, info_type, fmt, arg...) \
+    do {\
+        if (level <= LOGGER_CFG_LEVEL) {\
+            if (level == LOG_ERR) {\
+                printf("[%s:%d ERR] "fmt, __func__, __LINE__, ##arg);\
+            }\
+            if (level == LOG_WARN) {\
+                printf("[%s:%d WARN] "fmt, __func__, __LINE__, ##arg);\
+            }\
+            if (level == LOG_INFO) {\
+                if(info_type==I_USER_CFG){\
+                    printf("[%s:%d INFO USER-CFG] "fmt,__func__, __LINE__, ##arg);\
+                }\
+                if(info_type==I_SYS_STATUS){\
+                    printf("[%s:%d INFO SYS-STATUS] "fmt, __func__, __LINE__, ##arg);\
+                }\
+                if(info_type==I_NOUSED){\
+                    printf("[%s:%d INFO] "fmt, __func__, __LINE__, ##arg);\
+                }\
+                if(info_type==I_RUN_STATUS){\
+                    printf("[%s:%d INFO RUN] "fmt, __func__, __LINE__, ##arg);\
+                }\
+            }\
+            if (level == LOG_DEBUG) {\
+                printf("[%s:%d DBG] "fmt, __func__, __LINE__, ##arg);\
+            }\
+            if (level == LOG_ALL) {\
+                printf("[%s:%d ALL] "fmt,  __func__, __LINE__, ##arg);\
+            }\
+        }\
+    } while(0)
+
+
+unsigned long  get_sys_tick(void);
+void thread_setnamev(const char* pname);
+void usr_print_current_time(void);
+uint32 usr_get_cur_time_ms(void);
+
+extern int get_sys_time(S_SYS_TIME *ptime);
+extern void utc2localtime(time_t tUtcTime,struct tm *ptNow,int iZoneOffset);
+extern void set_sys_time(S_SYS_TIME *p);
+extern int read_file_data(char *file_name,char *buff, int len);
+extern int check_file_exist(char *filename);
+extern void get_beijing_time(struct tm *ptmBJ);
+extern int usr_set_sys_rtc_time(S_SYS_TIME *psys_time);
+extern void usr_get_sys_rtc_time(S_SYS_TIME *psys_time,S_ADVANCE_DT_PARA *pdt_time);
+extern void usr_sec_printf(const char* format, ...);
+extern int pox_system(const char *cmd_line);
+extern void syslog_thr(void * pvParameters);
+extern void check_and_load_bkppara_to_cfgfile();
+#endif
+

atsc_app/inc/isys_config.h

@@ -0,0 +1,157 @@
+锘�#ifndef _ISYS_CONFIG_H_
+#define _ISYS_CONFIG_H_
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <unistd.h>
+#include <fcntl.h>  //define O_WRONLY and O_RDONLY
+#include "../inc/type.h"
+#include "../inc/igpio.h"
+
+#define EMV6_3_TSOIP_NUM        2
+#define EMV7_0_TSOIP_NUM        1
+#define RELEASE_VERSION_NAME    "/aw/release_version.ini"
+#define FILE_CA_PROC		    "/etc/rc_proc"
+
+#define EMV63                   0 // 此乃7.0
+// emv 6.3
+#if EMV63
+#define TSOIP_1_ETH             "eth1"
+#define TSOIP_2_ETH             "eth0"
+#define ADMIN_ETH               "eth2"
+#else // EMV70
+#define TSOIP_1_ETH             "eth1"
+#define ADMIN_ETH               "eth0"
+#define TSOIP_2_ETH             "----"
+#endif
+
+typedef enum{
+    TYPE_ASI1 = 0,
+    TYPE_ASI2 = 1,
+    TYPE_AUTO_A2 = 2, // asi or ip 自动
+    TYPE_IP1 = 3,
+
+#if EMV63
+    TYPE_IP2 = 4,
+    TYPE_AUTO_IP = 5,
+#endif
+
+}E_TS_INPUT_TYPE;
+
+typedef enum {
+    TSOIP_1_ETH_INDEX = 0,
+    TSOIP_2_ETH_INDEX,
+    ADMIN_ETH_INDEX
+}ETH_INDEX;
+
+#define IS_MULTI_ADDRESS(address)    (((address&0xf0000000)==0xe0000000)?1:0)
+typedef struct
+{
+    int    socket;
+    uint16 used;
+    uint16 port;
+    uint32 ip;    //记录加入组播组的组播地址
+}S_PER_IGMP_INFO;
+
+//-----------------------------------
+#define ___spi_dev__   1
+#if ___spi_dev__
+
+/*
+#define SPI1_CLK_GP_NUM        121 //((4-1)*32+25)
+#define SPI1_CS_GP_NUM         122
+#define SPI1_MOSI_GP_NUM       123
+#define SPI1_MISO_GP_NUM       124
+*/
+
+//#define FPGA_C_JESD_ASI_RST    (0x1<<0)
+//#define FPGA_C_JEAD_PHY_RST    (0x1<<1)
+
+//spi gpio
+#define SPI1_MISO_GP_NUM       124 // 4_28
+
+#define AD9528_RESET_GPIO_NUM   ((4-1)*32+19)    //GPIO4_19
+
+#define JESD_SEG_ADDR                               1
+
+#define JESD204B_AXI_WR_RD_CTRL_OFFSET_ADDR         (0xB1)
+#define JESD204B_AXI_ADDRESS_L_OFFSET_ADDR          (0xB2)
+#define JESD204B_AXI_ADDRESS_H_OFFSET_ADDR          (0xB3)
+
+#define JESD204B_AXI_WR_RD_1_OFFSET_ADDR               (0xB4)
+#define JESD204B_AXI_WR_RD_2_OFFSET_ADDR               (0xB5)
+#define JESD204B_AXI_WR_RD_3_OFFSET_ADDR               (0xB6)
+#define JESD204B_AXI_WR_RD_4_OFFSET_ADDR               (0xB7)
+
+#define JESD204B_RESET_STATUS_OFFSET_ADDR           (0xB8)
+#define JESD204b_WR                                 (0x20)
+#define JESD204b_RD                                 (0x10)
+
+extern void spi_fpga_init(void);
+extern void ispi_fpga_send_buf_4Byte(uint8 *puc);
+extern uint8 GET_FPGA_SPI_MISO(void);
+extern void cfg_jesd204b(void);
+extern void TXEN_SET(int en);
+extern void jesd_reset_by_fpga(void);
+extern void sys_net_init(void);
+#endif//___spi_gpio__
+
+
+typedef enum
+{
+    PHY_TYPE_100M = 0,
+    PHY_TYPE_1000M,
+    PHY_TYPE_AUTO,
+    PHY_TYPE_END,
+}E_PHY_TYPE;
+
+
+
+//-----------------------------------
+#define ___key_gpio__   1
+#if ___key_gpio__
+
+
+#endif//___spi_gpio__
+
+
+//-----------------------------------
+#define ___lcd_gpio__   1
+#if ___lcd_gpio__
+
+
+#endif//___lcd_gpio__
+
+#include "lcd_task.h"
+
+
+typedef struct
+{
+    uint16 type;
+    uint16 need_free;      //若为申请消息,此位不要用,默认已填充释放标记
+    uint16 wPara;
+    uint16 rPara;
+    uint32 lPara;
+}MSG,*pMSG;
+
+extern void tuner_config_power_on(void);
+extern void tuner_config_power_reset(void);
+
+extern void local_ip_change_admin(S_CONFIG_PARA *ppara);
+extern void spect_spi_read(uint32 len,void *pdata,uint32 restart);
+
+extern void hw_per_init(void);
+extern void fpga_para_init(void);
+extern void sys_net_init(void);
+extern void udp_imgp_init(const uint32 p_tsoip_ins);
+
+extern void local_ip_change_tsoip(S_TSOIP_CONFIG_PARA *ppara,ETH_INDEX ethindex);
+extern int getMacByName(char * ifname, uint8 *macaddr);
+extern uint8_t get_temp_unit(void);
+extern void ispi_tx_big_block(uint8 *pdata, int bytelen);
+extern void ispi_rx_big_block(uint8 *pdata, int bytelen);
+void check_fpga_i2c();
+
+#endif//_ISYS_CONFIG_H_
+

atsc_app/inc/iuart_user.h

@@ -0,0 +1,113 @@
+#ifndef __UART_USER_H__
+#define __UART_USER_H__
+
+#include "type.h"
+#include "config.h"
+#include "igpio.h"
+
+
+//---------------------------------------------
+
+#define UART_ONESHU_CLOSED      0
+#define NO_USE                  0
+#define __LINUX_SYS_TIME__      1
+#define RS485_GPIO_NUM_DE       GPIO_NUM_1_5
+
+
+//---------------------------------------------
+
+#define UART_USER_232_COM    1
+#define UART_USER_485_COM    2
+
+
+#define RS232_NUM      8
+#define RS232_HEAD     0x47
+#define RS232_WEEPROM  0X82
+#define RS232_WSPECIAL 0X84
+#define RS232_TAILH    0x0d
+#define RS232_TAILL    0x0a
+typedef enum
+{
+   OUT_HEAD    ,
+   OUT_COMMAND ,
+   OUT_ADDRH   ,
+   OUT_ADDRL   ,
+   OUT_DATA    ,
+   OUT_CHECKSUM,
+   OUT_TAILH   ,
+   OUT_TAILL
+}OUT_ENUM;
+
+enum
+{
+    UART_PARA_SET_ERR_OK = 0,
+    UART_PARA_SET_ERR_LOCAL,
+    UART_PARA_SET_ERR_INVALID,
+    UART_PARA_SET_ERR_SUM,
+    UART_PARA_SET_ERR_DRYLOOP,
+    UART_PARA_SET_ERR_AGC_ON,
+    UART_PARA_SET_ERR_UNKNOW_CMD,
+};
+
+typedef enum    //CMMB与EXCITER共用
+{
+    CMMB_CONFIG_STEP_9V_VOL=0xa0,
+    CMMB_CONFIG_STEP_50V_VOL,
+    CMMB_CONFIG_STEP_50V_CUR,
+    CMMB_CONFIG_STEP_881_GV,
+    CMMB_CONFIG_STEP_FWD,
+    CMMB_CONFIG_STEP_REF,
+    CMMB_CONFIG_STEP_VSWR,
+    CMMB_CONFIG_STEP_TEMP,
+    CMMB_CONFIG_STEP_REF_ALARM,
+    CMMB_CONFIG_STEP_FWD_ALARM,
+    CMMB_CONFIG_STEP_TEMP_ALARM,
+
+    CMMB_CONFIG_STEP_50V_CUR2,
+    CMMB_CONFIG_STEP_POWER_DEGREE,
+    CMMB_CONFIG_STEP_FWD_HEX,
+    CMMB_CONFIG_STEP_IP_ADDR,
+    CMMB_CONFIG_STEP_MASK_ADDR,   //0xaf
+    CMMB_CONFIG_STEP_GATEWAY_ADDR,
+
+    CMMB_CONFIG_STEP_50V_CUR3,
+    CMMB_CONFIG_STEP_50V_CUR4,
+    CMMB_CONFIG_STEP_IN,
+    CMMB_CONFIG_STEP_12V_VOL,
+
+    CMMB_CONFIG_STEP_SLOW_FLAG,   //向ATSC激励器发送缓开机标识
+    CMMB_CONFIG_STEP_FINE_POWER,
+    CMMB_CONFIG_STEP_ALARM,
+
+    CMMB_CONFIG_EXC_RESET,//远程复位atsc激励器
+    
+    CMMB_CONFIG_STEP_OVER,
+}EXCITER_SET_CMD;
+
+extern uint32 uart_init_set_result_frame(uint8 *pin,uint8 *pout,uint32 err);
+extern void e2rom_save_power(S_RF_PARA *ppara);
+extern uint32 get_menu_index(void);
+extern BOOL proc_key_update(void * parg, uint8 key);
+extern uint32 get_menu_index(void);
+extern uint32 protocol_read(uint8 *pbufin,uint8 *pbufout);
+extern uint32 protocol_write(uint8 *pbufin,uint8 *pbufout);
+
+extern void pa_conn_chk(void);
+uint32 pa_conn_sta(void);
+
+void uart_task(void * pvParameters);
+extern int creat_uart_thread(void);
+
+
+extern void dev_pa_link_sec_check(void);
+extern int creat_uart_thread(void);
+extern int rs485_send_string(const uint8 *pbuf,uint32 len);
+extern int gps_uart_hw_init(void);
+extern int gps_rs232_read_string(uint8 *pbuf,uint32 len);
+extern int gps_rs232_send_string(const uint8 *pbuf,uint32 len);
+
+extern int rs232_send_string(const uint8 *pbuf,uint32 len);
+extern int rs232_read_string(uint8 *pbuf,uint32 len);
+
+#endif
+

atsc_app/inc/iweb_task.h

@@ -0,0 +1,339 @@
+#ifndef _IWEB_TASK_H_
+#define _IWEB_TASK_H_
+#include "type.h"
+#include "config.h"
+#include "web_server.h"
+
+#define NEW_EMV7_ONESHU                 1
+#define SHU_TEST                        0
+#define _DEBUG_DISPLAY_SOCKET_WEB_      0
+#define _LOAD_RAM_PARA_                 1
+#define _LOAD_FILE_PARA_                1
+#define _STORE_FILE_PARA_               1
+#define _TOTAL_STATUS_                  0
+#define _TOTAL_SET_                     1
+
+
+#define OUTPUT_LOG_FILE_SHELL   		"sh /aw/anywave/web/sh/output_log_file.sh"
+
+
+//获取最开始的5条日志信息
+#define LOG_WEB_PER_FRAME_NUM           5
+
+#define CGI_PRINT                       1
+
+
+#define configTICK_RATE_HZ              100
+#define OS_TICKS_PER_SEC                (configTICK_RATE_HZ)
+
+#define TCP_SOCKET_SERVER_PORT          30002     //7777
+//#define CHECK_UPGRADE_PACKAGE           "sh /aw/anywave/web/sh/upgrade_shell/check_package.sh"
+//#define DO_UPGRADE_RUN                  "sh /aw/anywave/web/sh/upgrade_shell/extract_run_package.sh"
+
+
+#define CGI_CTTB_WEB_SYSPARA            1
+#define CGI_CTTB_WEB_RFPARA             2
+#define CGI_CTTB_WEB_MODE_MFN           3
+#define CGI_CTTB_WEB_MODE_SFN           4
+
+
+/*#define CGI_CTTB_WEB_TS2IP_1            5
+#define CGI_CTTB_WEB_TS2IP_2            6
+#define CGI_CTTB_SYS_ADMIN_IPCFG        7*/
+
+
+#define CGI_ATSC_WEB_SYSPARA            1
+#define CGI_ATSC_WEB_RFPARA             2
+#define CGI_ATSC_WEB_MODE_MFN           3
+#define CGI_ATSC_WEB_MODE_SFN           4
+
+
+/*
+typedef enum
+{
+    WEB_LOGIN = 0,
+    WEB_STATUS,
+    WEB_SET,
+    WEB_RF,
+    WEB_MODE,
+    WEB_TS,
+    WEB_LATCH,
+    WEB_NET,
+    WEB_LOG,
+    WEB_PSIP,
+
+    WEB_STATUS_1,
+    WEB_SET_1,
+    WEB_RF_1,
+    WEB_MODE_1,
+    WEB_TS_1,
+    WEB_LATCH_1,
+    WEB_NET_1,
+    WEB_INDEX_END,
+    WEB_SET_FREQ
+} WEB_FLAG_INDEX;
+*/
+
+typedef struct
+{
+    uint32  ip_out;
+    uint32  ip_out_rate_kbps;
+    uint32  asi_out;
+    uint32  asi_out_rate_kbps;
+}S_CGI_STATE_PARA_TSOIP;
+
+
+//---------------------------------------------------
+#define __usr_confirm_webh__		1
+
+#if __usr_confirm_webh__
+
+
+
+typedef enum {
+    GET_METHOD=0,
+    SET_METHOD,
+    UPDATE_METHOD
+}en_MSG_TYPE;
+
+//key
+enum {
+
+	COM_STATUS_FORMS0_KEY,
+    WEB_UPGRADE,
+
+
+    /* sysstatus */
+    CGIKEY_SYS_STATUS,
+    CGIKEY_STATUS_TUNER,
+    CGIKEY_STATUS_PAC,
+    CGIKEY_STATUS_GPS,
+    CGIKEY_SYS_VER,
+    CGIKEY_STATUS_MAC_SN,
+
+    /* sys cfg */
+    CGIKEY_SYS_CFG,
+    CGIKEY_SYS_NET,
+    CGIKEY_SYS_DPD_STATE,
+    CGIKEY_SYS_RST,
+    CGIKEY_SYS_TIME, //  time
+
+    /* RF cfg */
+    CGIKEY_RF_CFG,
+
+	/* RF cfg */
+    CGIKEY_TSID_PSIP,
+    CGIKEY_TSID_PSIP_CFG,
+
+
+    CGIKEY_TSOIP_NUM,
+
+    /* tsoip_info */
+    CGIKEY_TSOIP_INFO,
+
+    /* tsoip */
+    CGIKEY_TSOIP_SYSTS1,
+    CGIKEY_TSOIP_SYSTS2,
+
+    CGIKEY_TSOIP_NET1,
+    CGIKEY_TSOIP_NET2,
+
+    /* log */
+    LOG_FILE_OUTPUT,
+    
+	CGIKEY_WEB_TITLE,
+
+	CGIKEY_ATSC1_LICENCES,
+	CGIKEY_ATSC1_SYSTEM_KEY,
+	CGIKEY_SYS_NTP,
+	CGIKEY_SYS_TIMEZONE,
+	CGIKEY_CFG_USR_PASSWD,
+#if 0
+    /* Mode cfg */
+    CGIKEY_MODE_MFN_CFG,
+    CGIKEY_MODE_SFN_CFG,
+
+
+#endif
+
+    /* 10 MHz reference output enable (PR07). Appended at the very end so no
+     * existing key value is renumbered — the CGI<->app socket keyType must
+     * stay byte-aligned with every cgi_socket.h copy. */
+    CGIKEY_M10_CFG,
+
+    /* IQ spectrum/8VSB analysis enable; keep appended to preserve old values. */
+    CGIKEY_SPEC_CFG,
+
+    END_KEY
+};
+
+
+struct cgi_key_list {
+	char *key;
+	char *value;
+	struct cgi_key_list *next;
+};
+
+
+typedef int (*get_func_t)(char *buf,short maxlen);
+typedef int (*set_func_t)(char *value,short maxlen);
+typedef int (*read_func_t)(char *value,short maxlen);
+typedef int (*save_func_t)(char *value,short maxlen);
+
+
+typedef struct cgi_func_list {
+	uint16      keyNum;
+	get_func_t  get_func;
+	set_func_t  set_func;
+    read_func_t read_func;
+    save_func_t save_func;
+}cgi_func_list;
+
+typedef struct cgi_process_elem {
+	int method;
+	int keyType;
+	char data[1024];
+}cgi_process_elem_t,st_CGI_SOCK_PKG;
+
+
+
+typedef enum {
+    TYPE_U8=0,
+    TYPE_I8,
+    TYPE_U16,
+    TYPE_I16,
+    TYPE_U32,
+    TYPE_I32,
+    TYPE_FLOAT,
+    TYPE_DOUBLE,
+    TYPE_STRING,
+}en_PARA_TYPE;
+
+typedef enum
+{
+    FACTOR_1=0,
+    FACTOR_100,
+    FACTOR_OTHER
+}en_FACTOR;
+
+typedef struct
+{
+    void*        paraVal;
+    en_PARA_TYPE paraType;
+    en_FACTOR    paraFactor;
+}st_CGI_PARA;
+
+
+#endif//__usr_confirm_webh__
+
+//---------------------------------------------------
+
+
+typedef struct
+{
+    unsigned char addr4;
+    unsigned char addr3;
+    unsigned char addr2;
+    unsigned char addr1;
+}st_NET_PART_BYTE;
+
+typedef enum
+{
+    NET_INFO_IP=1,
+    NET_INFO_MASK,
+    NET_INFO_GATEWAY
+}en_NET_PARA_TYPE;
+
+
+
+/*
+typedef union
+{
+    struct
+    {
+        unsigned char addr4;
+        unsigned char addr3;
+        unsigned char addr2;
+        unsigned char addr1;
+    }PART;
+    unsigned int addr;
+}IPV4,*PIPV4;*/
+
+typedef struct
+{
+    IPV4 ip;
+    IPV4 mask;
+    IPV4 gateway;
+}st_CAB_NET_PARA;
+
+
+
+#define  MSG_DATA_LEN       256
+typedef  struct  _msg_cgi_sock_
+{
+    unsigned char msgtype;   // 0:get  1:set  2:update
+    char key[10];            //
+    char data[MSG_DATA_LEN];
+
+}msg_t, *msg_t_p;
+
+typedef enum
+{
+    SET_SYS_BOOT,
+    SET_SYS_SHUTDOWN,
+    SET_SYS_WAIT
+}en_BOOT_SHUTDOWN;
+
+
+
+/*
+typedef struct {
+    uint8  asi_input;  // 码流选择
+    u8_sw  asi_status;
+    u8_sw  rate_status;
+    uint8  gps_status;
+    u8_sw  sip_status;
+    u8_sw  pps_status;
+    uint8  tsnr;// 7
+    uint8  l_imd;
+    uint8  r_imd;
+    uint8  sfn_status;  //单频网状态 0:正常 1:失效
+    uint8  rf_cry;      //射频本振   0:正常 1:失效
+    uint32  temp;
+
+    uint32 max_dly;
+    uint32 net_dly;
+    uint32 lcl_dly;
+
+    uint32 ts1_pure_rate;
+    uint32 ts2_pure_rate;
+}S_CGI_STATE_PARA_T;
+
+
+typedef struct
+{
+    uint8  ldpc_qam;
+    uint8  pn;
+    uint8  zbpilot;
+    uint8  int_int;
+}S_CGI_MODE_MFN_PARA_T;
+
+
+typedef struct
+{
+    uint32 delay;
+    uint16 txid;
+    u8_sw  cf;
+    u8_sw  sipdel;
+    uint8  zp;
+}S_CGI_MODE_SFN_PARA_T;
+*/
+
+extern void *web_thr(void *ppara);
+extern void http_save_change_para(void *p);
+extern void http_load_default_para(uint32 type, void *p);
+void ntp_manual_sync(void);
+void check_ntp_sync_state(void);
+int set_ntp_server_ip_to_system(u8 *pip, u8 ntp_switch, u8 only_manual_sync);
+
+#endif//_IWEB_TASK_H_

atsc_app/inc/key_gpio.h

@@ -0,0 +1,15 @@
+
+
+#ifndef __KEY_GPIO_H__
+#define __KEY_GPIO_H__
+
+#include "type.h"
+
+uint8 get_key_value(void);
+extern uint8 pr_key(uint8 keyvalue);
+extern uint8 check_long_press(uint8 key);
+extern uint8 printf_key_longpress(uint8 tmpval);
+extern uint8 get_long_press(void);
+#endif
+
+

atsc_app/inc/lcd.h

@@ -0,0 +1,30 @@
+
+
+#ifndef __LCD_H__
+#define __LCD_H__
+#include "type.h"
+#include "igpio.h"
+
+typedef enum
+{
+    ARROW_LEFT,
+    ARROW_RIGHT,
+}ARROW_DIRECTON;
+typedef enum{LINE_1=0,LINE_2}POS_LINE;
+
+#define LINE_CHAR_NUM 20
+#define ARROW_CHAR_NUM 1  //只能为1 或者2
+
+
+
+extern volatile uint32 sys_ready;
+void lcd_write_string(uint8 X,uint8 Y,void *s);
+void lcd_init(void);
+void lcd_write_temp_c(uint8 x,uint8 y);
+void lcd_write_temp_f(uint8 x,uint8 y);
+void lcd_write_cache(void);
+void set_gpio_fpga_reset(uint8 set_val);
+
+
+#endif
+

atsc_app/inc/log_task.h

@@ -0,0 +1,68 @@
+#ifndef __LOG_TASK_H
+#define __LOG_TASK_H
+
+#define LOG_TYPE_INVALID                0
+#define LOG_TYPE_POWER_ON               1
+#define LOG_TYPE_POWER_OFF              2
+#define LOG_TYPE_SYS_PARA_CHANGE        3
+#define LOG_TYPE_TIME_CHANGE            4
+#define LOG_TYPE_GPS_UNLOCK             5
+#define LOG_TYPE_GPS_LOCK               6
+#define LOG_TYPE_TS_ERR                 7
+#define LOG_TYPE_TS_OK                  8
+#define LOG_TYPE_OVER_TEMPERATURE       9
+#define LOG_TYPE_NORMAL_TEMPERATURE     10
+#define LOG_TYPE_OVER_FLOW              11
+#define LOG_TYPE_UNDER_FLOW             12
+//..其他告警类型
+#define LOG_TYPE_END                    13   //结束标志
+
+
+
+#define LOG_ERR_NO_ERR                  0
+#define LOG_ERR_PARA_INVALID            1
+#define LOG_ERR_ALLOC_MSG_FAILED        2
+#define LOG_ERR_ALLOC_MEM_FAILED        3
+
+
+//日志最大多少条合适?
+#define LOG_MAX_RECORD_NUM              100
+
+//一整条告警,64字节,  200*64   共12.5K字节
+#define LOG_PER_RECORD_SIZE            32
+typedef struct
+{
+    uint8 valid;
+    uint8 type;
+    uint8 year;
+    uint8 month;
+    uint8 date;
+    uint8 hour;
+    uint8 min;
+    uint8 sec;    //发生时间  8字节
+
+
+    uint8 content[LOG_PER_RECORD_SIZE-8];  //日志的具体内容,根据需要使用
+}S_LOG_STRUCT;
+
+typedef struct
+{
+    uint16 ram_flag;        //内存中数据是否有效标志
+    uint8  lastest_index;   //当前的下一条log指向的位置 0~(LOG_MAX_RECORD_NUM-1)  是即将保存的位置,
+    uint8  total_num;       //当前有效log数目
+    S_LOG_STRUCT log[LOG_MAX_RECORD_NUM];
+}S_OS_LOG;  //当前使用模式下,不能大于3.9K
+
+
+extern void log_task(void * pvParameters);
+
+extern uint32 log_read_record_by_index(uint32 index,void *pdata);
+extern uint32 log_system_event_generate(S_SYS_TIME* ptime,uint32 type,uint8 *pcontent,uint32 ctlen);
+uint32 log_get_total_record_num(void);
+void log_record_reset(void);
+void log_record_printf(void);
+
+extern int sntp_enable(uint8 en, uint8 *pAddr);
+
+#endif
+

atsc_app/inc/lwip.h

@@ -0,0 +1,77 @@
+/**
+  ******************************************************************************
+  * File Name          : LWIP.h
+  * Description        : This file provides code for the configuration
+  *                      of the LWIP.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  *************************************************************************  
+
+  */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __mx_lwip_H
+#define __mx_lwip_H
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "lwip/opt.h"
+#include "lwip/mem.h"
+#include "lwip/memp.h"
+#include "netif/etharp.h"
+#include "lwip/dhcp.h"
+#include "lwip/netif.h"
+#include "lwip/timeouts.h"
+#include "ethernetif.h"
+
+/* Includes for RTOS ---------------------------------------------------------*/
+#if WITH_RTOS
+#include "lwip/tcpip.h"
+#endif /* WITH_RTOS */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+/* Global Variables ----------------------------------------------------------*/
+extern ETH_HandleTypeDef heth;
+
+/* LWIP init function */	
+void MX_LWIP_Init(void);
+
+#if !WITH_RTOS
+/* USER CODE BEGIN 1 */
+/* Function defined in lwip.c to:
+ *   - Read a received packet from the Ethernet buffers 
+ *   - Send it to the lwIP stack for handling
+ *   - Handle timeouts if NO_SYS_NO_TIMERS not set
+ */ 
+void MX_LWIP_Process(void);
+
+/* USER CODE END 1 */
+#endif /* WITH_RTOS */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__ mx_lwip_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

atsc_app/inc/lwipopts.h

@@ -0,0 +1,159 @@
+
+/**
+  ******************************************************************************
+  * File Name          : lwipopts.h
+  * Description        : This file overrides LwIP stack default configuration
+  *                      done in opt.h file.
+  ******************************************************************************
+  * @attention
+  *
+  * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
+  * All rights reserved.</center></h2>
+  *
+  * This software component is licensed by ST under Ultimate Liberty license
+  * SLA0044, the "License"; You may not use this file except in compliance with
+  * the License. You may obtain a copy of the License at:
+  *                             www.st.com/SLA0044
+  *
+  ******************************************************************************
+  */
+ 
+/* Define to prevent recursive inclusion --------------------------------------*/
+#ifndef __LWIPOPTS__H__
+#define __LWIPOPTS__H__
+
+#include "main.h"
+
+/*-----------------------------------------------------------------------------*/
+/* Current version of LwIP supported by CubeMx: 2.0.3 -*/
+/*-----------------------------------------------------------------------------*/
+
+/* Within 'USER CODE' section, code will be kept by default at each generation */
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* STM32CubeMX Specific Parameters (not defined in opt.h) ---------------------*/
+/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
+/*----- WITH_RTOS enabled (Since FREERTOS is set) -----*/
+#define WITH_RTOS 1
+/*----- CHECKSUM_BY_HARDWARE disabled -----*/
+#define CHECKSUM_BY_HARDWARE 1 //_USE_RVL_ 启用硬件校验
+/*-----------------------------------------------------------------------------*/
+
+/* LwIP Stack Parameters (modified compared to initialization value in opt.h) -*/
+/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
+/*----- Value in opt.h for MEM_ALIGNMENT: 1 -----*/
+#define MEM_ALIGNMENT 4
+/*----- Value in opt.h for LWIP_ETHERNET: LWIP_ARP || PPPOE_SUPPORT -*/
+#define LWIP_ETHERNET 1
+/*----- Value in opt.h for LWIP_DNS_SECURE: (LWIP_DNS_SECURE_RAND_XID | LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING | LWIP_DNS_SECURE_RAND_SRC_PORT) -*/
+#define LWIP_DNS_SECURE 7
+/*----- Value in opt.h for TCP_SND_QUEUELEN: (4*TCP_SND_BUF + (TCP_MSS - 1))/TCP_MSS -----*/
+#define TCP_SND_QUEUELEN 9//MEMP_NUM_TCP_SEG 9 --- 5
+/*----- Value in opt.h for TCP_SNDLOWAT: LWIP_MIN(LWIP_MAX(((TCP_SND_BUF)/2), (2 * TCP_MSS) + 1), (TCP_SND_BUF) - 1) -*/
+#define TCP_SNDLOWAT 1071
+/*----- Value in opt.h for TCP_SNDQUEUELOWAT: LWIP_MAX(TCP_SND_QUEUELEN)/2, 5) -*/
+#define TCP_SNDQUEUELOWAT 5
+/*----- Value in opt.h for TCP_WND_UPDATE_THRESHOLD: LWIP_MIN(TCP_WND/4, TCP_MSS*4) -----*/
+#define TCP_WND_UPDATE_THRESHOLD 536
+/*----- Value in opt.h for TCPIP_THREAD_STACKSIZE: 0 -----*/
+#define TCPIP_THREAD_STACKSIZE 1024
+/*----- Value in opt.h for TCPIP_THREAD_PRIO: 1 -----*/
+#define TCPIP_THREAD_PRIO 3
+/*----- Value in opt.h for TCPIP_MBOX_SIZE: 0 -----*/
+#define TCPIP_MBOX_SIZE 6
+/*----- Value in opt.h for SLIPIF_THREAD_STACKSIZE: 0 -----*/
+#define SLIPIF_THREAD_STACKSIZE 1024
+/*----- Value in opt.h for SLIPIF_THREAD_PRIO: 1 -----*/
+#define SLIPIF_THREAD_PRIO 3
+/*----- Value in opt.h for DEFAULT_THREAD_STACKSIZE: 0 -----*/
+#define DEFAULT_THREAD_STACKSIZE 1024
+/*----- Value in opt.h for DEFAULT_THREAD_PRIO: 1 -----*/
+#define DEFAULT_THREAD_PRIO 3
+/*----- Value in opt.h for DEFAULT_UDP_RECVMBOX_SIZE: 0 -----*/
+#define DEFAULT_UDP_RECVMBOX_SIZE 6
+/*----- Value in opt.h for DEFAULT_TCP_RECVMBOX_SIZE: 0 -----*/
+#define DEFAULT_TCP_RECVMBOX_SIZE 6
+/*----- Value in opt.h for DEFAULT_ACCEPTMBOX_SIZE: 0 -----*/
+#define DEFAULT_ACCEPTMBOX_SIZE 6
+/*----- Value in opt.h for RECV_BUFSIZE_DEFAULT: INT_MAX -----*/
+#define RECV_BUFSIZE_DEFAULT 2000000000
+/*----- Value in opt.h for LWIP_STATS: 1 -----*/
+#define LWIP_STATS 1
+/*----- Value in opt.h for CHECKSUM_GEN_IP: 1 -----*/
+#define CHECKSUM_GEN_IP 1
+/*----- Value in opt.h for CHECKSUM_GEN_UDP: 1 -----*/
+#define CHECKSUM_GEN_UDP 1
+/*----- Value in opt.h for CHECKSUM_GEN_TCP: 1 -----*/
+#define CHECKSUM_GEN_TCP 1
+/*----- Value in opt.h for CHECKSUM_GEN_ICMP: 1 -----*/
+#define CHECKSUM_GEN_ICMP 0
+/*----- Value in opt.h for CHECKSUM_GEN_ICMP6: 1 -----*/
+#define CHECKSUM_GEN_ICMP6 0
+/*----- Value in opt.h for CHECKSUM_CHECK_IP: 1 -----*/
+#define CHECKSUM_CHECK_IP 1
+/*----- Value in opt.h for CHECKSUM_CHECK_UDP: 1 -----*/
+#define CHECKSUM_CHECK_UDP 1
+/*----- Value in opt.h for CHECKSUM_CHECK_TCP: 1 -----*/
+#define CHECKSUM_CHECK_TCP 1
+/*----- Value in opt.h for CHECKSUM_CHECK_ICMP: 1 -----*/
+#define CHECKSUM_CHECK_ICMP 0
+/*----- Value in opt.h for CHECKSUM_CHECK_ICMP6: 1 -----*/
+#define CHECKSUM_CHECK_ICMP6 0
+/*-----------------------------------------------------------------------------*/
+/* USER CODE BEGIN 1 */
+
+/* TCP Maximum segment size. */
+#define TCP_MSS                 (1500 - 40)	  /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
+
+/* MEM_SIZE: the size of the heap memory. If the application will send
+a lot of data that needs to be copied, this should be set high. */
+#define MEM_SIZE                (5*1024)
+
+/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
+   sends a lot of data out of ROM (or other static memory), this
+   should be set high. */
+#define MEMP_NUM_PBUF           100
+
+/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
+   per active UDP "connection". */
+#define MEMP_NUM_UDP_PCB        6
+
+/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
+   connections. */
+#define MEMP_NUM_TCP_PCB        50
+
+#define MEMP_NUM_TCP_PCB_LISTEN 50
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
+   segments. */
+
+/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
+   segments. */
+   
+#define MEMP_NUM_TCP_SEG        20 //MEMP_NUM_TCP_SEG 20 测试现改为10
+
+/* ---------- DHCP options ---------- */
+/* Define LWIP_DHCP to 1 if you want DHCP configuration of
+   interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
+   turning this on does currently not work. */
+#define LWIP_DHCP               1
+
+/* ---------- Statistics options ---------- */
+#define LWIP_SNMP               1
+#define SNMP_PRIVATE_MIB        1
+
+
+
+/* USER CODE END 1 */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*__LWIPOPTS__H__ */
+
+/************************* (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

atsc_app/inc/main.h

@@ -0,0 +1,26 @@
+#ifndef _MAIN_H_
+#define _MAIN_H_
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+
+
+
+
+
+
+
+
+#endif /* __MAIN_H */
+
+/************************ (C) COPYRIGHT *****END OF FILE****/

atsc_app/inc/minGlue.h

@@ -0,0 +1,31 @@
+/*  Glue functions for the minIni library, based on the C/C++ stdio library
+ *
+ *  Or better said: this file contains macros that maps the function interface
+ *  used by minIni to the standard C/C++ file I/O functions.
+ *
+ *  By CompuPhase, 2008-2014
+ *  This "glue file" is in the public domain. It is distributed without
+ *  warranties or conditions of any kind, either express or implied.
+ */
+
+/* map required file I/O types and functions to the standard C library */
+#include <stdio.h>
+
+#define INI_FILETYPE                    FILE*
+#define ini_openread(filename,file)     ((*(file) = fopen((filename),"rb")) != NULL)
+#define ini_openwrite(filename,file)    ((*(file) = fopen((filename),"wb")) != NULL)
+#define ini_openrewrite(filename,file)  ((*(file) = fopen((filename),"r+b")) != NULL)
+#define ini_close(file)                 (fclose(*(file)) == 0)
+#define ini_read(buffer,size,file)      (fgets((buffer),(size),*(file)) != NULL)
+#define ini_write(buffer,file)          (fputs((buffer),*(file)) >= 0)
+#define ini_rename(source,dest)         (rename((source), (dest)) == 0)
+#define ini_remove(filename)            (remove(filename) == 0)
+
+#define INI_FILEPOS                     long int
+#define ini_tell(file,pos)              (*(pos) = ftell(*(file)))
+#define ini_seek(file,pos)              (fseek(*(file), *(pos), SEEK_SET) == 0)
+
+/* for floating-point support, define additional types and functions */
+#define INI_REAL                        float
+#define ini_ftoa(string,value)          sprintf((string),"%f",(value))
+#define ini_atof(string)                (INI_REAL)strtod((string),NULL)

atsc_app/inc/minIni.h

@@ -0,0 +1,152 @@
+/*  minIni - Multi-Platform INI file parser, suitable for embedded systems
+ *
+ *  Copyright (c) CompuPhase, 2008-2017
+ *
+ *  Licensed under the Apache License, Version 2.0 (the "License"); you may not
+ *  use this file except in compliance with the License. You may obtain a copy
+ *  of the License at
+ *
+ *      http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *  Unless required by applicable law or agreed to in writing, software
+ *  distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ *  WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ *  License for the specific language governing permissions and limitations
+ *  under the License.
+ *
+ *  Version: $Id: minIni.h 53 2015-01-18 13:35:11Z thiadmer.riemersma@gmail.com $
+ */
+#ifndef MININI_H
+#define MININI_H
+
+#include "minGlue.h"
+
+#if (defined _UNICODE || defined __UNICODE__ || defined UNICODE) && !defined INI_ANSIONLY
+  #include <tchar.h>
+  #define mTCHAR TCHAR
+#else
+  /* force TCHAR to be "char", but only for minIni */
+  #define mTCHAR char
+#endif
+
+#if !defined INI_BUFFERSIZE
+  #define INI_BUFFERSIZE  512
+#endif
+
+#if defined __cplusplus
+  extern "C" {
+#endif
+
+int   ini_getbool(const mTCHAR *Section, const mTCHAR *Key, int DefValue, const mTCHAR *Filename);
+long  ini_getl(const mTCHAR *Section, const mTCHAR *Key, long DefValue, const mTCHAR *Filename);
+int   ini_gets(const mTCHAR *Section, const mTCHAR *Key, const mTCHAR *DefValue, mTCHAR *Buffer, int BufferSize, const mTCHAR *Filename);
+int   ini_getsection(int idx, mTCHAR *Buffer, int BufferSize, const mTCHAR *Filename);
+int   ini_getkey(const mTCHAR *Section, int idx, mTCHAR *Buffer, int BufferSize, const mTCHAR *Filename);
+
+#if defined INI_REAL
+INI_REAL ini_getf(const mTCHAR *Section, const mTCHAR *Key, INI_REAL DefValue, const mTCHAR *Filename);
+#endif
+
+#if !defined INI_READONLY
+int   ini_putl(const mTCHAR *Section, const mTCHAR *Key, long Value, const mTCHAR *Filename);
+int   ini_puts(const mTCHAR *Section, const mTCHAR *Key, const mTCHAR *Value, const mTCHAR *Filename);
+#if defined INI_REAL
+int   ini_putf(const mTCHAR *Section, const mTCHAR *Key, INI_REAL Value, const mTCHAR *Filename);
+#endif
+#endif /* INI_READONLY */
+
+#if !defined INI_NOBROWSE
+typedef int (*INI_CALLBACK)(const mTCHAR *Section, const mTCHAR *Key, const mTCHAR *Value, void *UserData);
+int  ini_browse(INI_CALLBACK Callback, void *UserData, const mTCHAR *Filename);
+#endif /* INI_NOBROWSE */
+
+#if defined __cplusplus
+  }
+#endif
+
+
+#if defined __cplusplus
+
+#if defined __WXWINDOWS__
+	#include "wxMinIni.h"
+#else
+  #include <string>
+
+  /* The C++ class in minIni.h was contributed by Steven Van Ingelgem. */
+  class minIni
+  {
+  public:
+    minIni(const std::string& filename) : iniFilename(filename)
+      { }
+
+    bool getbool(const std::string& Section, const std::string& Key, bool DefValue=false) const
+      { return ini_getbool(Section.c_str(), Key.c_str(), int(DefValue), iniFilename.c_str()) != 0; }
+
+    long getl(const std::string& Section, const std::string& Key, long DefValue=0) const
+      { return ini_getl(Section.c_str(), Key.c_str(), DefValue, iniFilename.c_str()); }
+
+    int geti(const std::string& Section, const std::string& Key, int DefValue=0) const
+      { return static_cast<int>(this->getl(Section, Key, long(DefValue))); }
+
+    std::string gets(const std::string& Section, const std::string& Key, const std::string& DefValue="") const
+      {
+        char buffer[INI_BUFFERSIZE];
+        ini_gets(Section.c_str(), Key.c_str(), DefValue.c_str(), buffer, INI_BUFFERSIZE, iniFilename.c_str());
+        return buffer;
+      }
+
+    std::string getsection(int idx) const
+      {
+        char buffer[INI_BUFFERSIZE];
+        ini_getsection(idx, buffer, INI_BUFFERSIZE, iniFilename.c_str());
+        return buffer;
+      }
+
+    std::string getkey(const std::string& Section, int idx) const
+      {
+        char buffer[INI_BUFFERSIZE];
+        ini_getkey(Section.c_str(), idx, buffer, INI_BUFFERSIZE, iniFilename.c_str());
+        return buffer;
+      }
+
+#if defined INI_REAL
+    INI_REAL getf(const std::string& Section, const std::string& Key, INI_REAL DefValue=0) const
+      { return ini_getf(Section.c_str(), Key.c_str(), DefValue, iniFilename.c_str()); }
+#endif
+
+#if ! defined INI_READONLY
+    bool put(const std::string& Section, const std::string& Key, long Value) const
+      { return ini_putl(Section.c_str(), Key.c_str(), Value, iniFilename.c_str()) != 0; }
+
+    bool put(const std::string& Section, const std::string& Key, int Value) const
+      { return ini_putl(Section.c_str(), Key.c_str(), (long)Value, iniFilename.c_str()) != 0; }
+
+    bool put(const std::string& Section, const std::string& Key, bool Value) const
+      { return ini_putl(Section.c_str(), Key.c_str(), (long)Value, iniFilename.c_str()) != 0; }
+
+    bool put(const std::string& Section, const std::string& Key, const std::string& Value) const
+      { return ini_puts(Section.c_str(), Key.c_str(), Value.c_str(), iniFilename.c_str()) != 0; }
+
+    bool put(const std::string& Section, const std::string& Key, const char* Value) const
+      { return ini_puts(Section.c_str(), Key.c_str(), Value, iniFilename.c_str()) != 0; }
+
+#if defined INI_REAL
+    bool put(const std::string& Section, const std::string& Key, INI_REAL Value) const
+      { return ini_putf(Section.c_str(), Key.c_str(), Value, iniFilename.c_str()) != 0; }
+#endif
+
+    bool del(const std::string& Section, const std::string& Key) const
+      { return ini_puts(Section.c_str(), Key.c_str(), 0, iniFilename.c_str()) != 0; }
+
+    bool del(const std::string& Section) const
+      { return ini_puts(Section.c_str(), 0, 0, iniFilename.c_str()) != 0; }
+#endif
+
+  private:
+    std::string iniFilename;
+  };
+
+#endif /* __WXWINDOWS__ */
+#endif /* __cplusplus */
+
+#endif /* MININI_H */

atsc_app/inc/mq.h

@@ -0,0 +1,27 @@
+#ifndef _QUE_H_
+#define _QUE_H_
+
+#include <sys/types.h> //for key_t
+#include <stddef.h>    //for size_t
+#include <sys/types.h> //for ssize_t
+
+
+/**
+ * @param[in] qid
+ * @param[in] pdata
+ * @param[in] len
+ * @param[in] timeout ms
+ * @return len if successful, -1 error
+*/
+ssize_t send_que_timedwait(key_t qid,void* pdata,size_t len,int timeout);
+
+/**
+ * @param[in] qid
+ * @param[in] pdata
+ * @param[in] len
+ * @param[in] timeout ms
+ * @return >0 if successful, -1 error
+*/
+ssize_t read_que_timedwait(key_t qid,void* pdata,size_t len,int timeout);
+
+#endif

atsc_app/inc/msg.h

@@ -0,0 +1,98 @@
+#ifndef __MSG_H__
+#define __MSG_H__
+
+#include <sys/types.h>
+#include <sys/ipc.h>
+#include <sys/msg.h>
+#include "../inc/type.h"
+#include "../inc/isys_config.h"
+
+
+#define MAX_TEXT 512
+
+#define CTTB_MSG  2222
+//#define MSG_NEED_FREE 0x55
+
+
+// MSG结构体里
+typedef enum {
+    MSG_WEB_DATA = 1,
+
+
+    MSG_DATA_MAX_END
+}ENUM_MSG_TYPE;
+
+
+//typedef struct {
+//    uint16 type;
+//    uint16 need_free;      //若为申请消息,此位不要用,默认已填充释放标记
+//    uint16 rPara;
+//    uint32 lPara;
+//}MSG,*pMSG;
+
+struct msg_st {
+	long mtype;
+    MSG msg; // 内含 旧msg 结构体
+};
+
+
+
+//---------------------------------------------
+
+#if 1 //@CFIRMED
+
+enum __MSG_KEY_ID_{
+    WEB_MSG_KEY_ID = 1235,
+    LCD_MSG_KEY_ID,
+    UART_MSG_KEY_ID,
+    TSOIP_MSG_KEY_ID,
+    LOG_MSG_KEY_ID,
+    //
+    GPS_UART_MSG_KEY_ID,
+
+    KEY_ID_END
+};
+
+typedef enum {
+    MSGQ_TYPE_ALL = 0,// must 0
+    //
+    MSGQ_TYPE_WEB,
+    MSGQ_TYPE_LCD,
+    MSGQ_TYPE_UART,
+    MSGQ_TYPE_TSOIP,
+    MSGQ_TYPE_LOG,
+    //
+    MSGQ_TYPE_GPS_UART,
+
+    MSGQ_MAX_END
+}MSGQ_TYPE;
+
+
+#define msg_send_to_web(p_msg)          (sys_msg_send(p_msg, (key_t)WEB_MSG_KEY_ID))
+#define msg_send_to_lcd(p_msg)     		(sys_msg_send(p_msg, (key_t)LCD_MSG_KEY_ID))
+#define msg_send_to_uart(p_msg)    	    (sys_msg_send(p_msg, (key_t)UART_MSG_KEY_ID))
+#define msg_send_to_gps_uart(p_msg)    	(sys_msg_send(p_msg, (key_t)GPS_UART_MSG_KEY_ID))
+#define msg_send_to_tsoip(p_msg)   		(sys_msg_send(p_msg, (key_t)TSOIP_MSG_KEY_ID))
+
+#endif//@CONFIRMED
+//---------------------------------------------
+
+//#define cttb_msg_send_to_web(p_msg)     (cttb_msg_send(p_msg, (key_t)WEB_MSG_KEY_ID))
+//#define cttb_msg_send_to_lcd(p_msg)     (cttb_msg_send(p_msg, (key_t)LCD_MSG_KEY_ID))
+//#define cttb_msg_send_to_uart(p_msg)    (cttb_msg_send(p_msg, (key_t)UART_MSG_KEY_ID))
+//#define cttb_msg_send_to_tsoip(p_msg)   (cttb_msg_send(p_msg, (key_t)TSOIP_MSG_KEY_ID))
+//#define cttb_msg_send_to_log(p_msg)     (cttb_msg_send(p_msg, (key_t)LOG_MSG_KEY_ID))
+
+
+
+extern int sys_msg_send(MSG *p_msg, key_t keyid);
+
+extern int creat_web_msg_thread(void);
+extern int creat_lcd_msg_thread(void);
+extern int creat_uart_msg_thread(void);
+extern int creat_tsoip_msg_thread(void);
+extern int creat_log_msg_thread(void);
+extern int creat_gps_uart_msg_thread(void);
+extern void sec_msg_to_gps_uart_thr(void);
+#endif
+

atsc_app/inc/netconf.h

@@ -0,0 +1,46 @@
+/**
+  ******************************************************************************
+  * @file    netconf.h
+  * @author  MCD Application Team
+  * @version V1.0.0
+  * @date    31-October-2011 
+  * @brief   This file contains all the functions prototypes for the netconf.c 
+  *          file.
+  ******************************************************************************
+  * @attention
+  *
+  * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
+  * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
+  * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
+  * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
+  * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
+  * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
+  *
+  * <h2><center>&copy; COPYRIGHT 2011 STMicroelectronics</center></h2>
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __NETCONF_H
+#define __NETCONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+   
+/* Includes ------------------------------------------------------------------*/
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+/* Exported macro ------------------------------------------------------------*/
+/* Exported functions ------------------------------------------------------- */
+void LwIP_Init(void);
+void LwIP_DHCP_task(void * pvParameters);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __NETCONF_H */
+
+
+/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/

atsc_app/inc/os_task.h

@@ -0,0 +1,395 @@
+/**********************************************************************
+RTOS底层接口函数头文件
+
+**********************************************************************/
+
+#ifndef __OS_TASK_H
+#define __OS_TASK_H
+#include "type.h"
+//#include "FreeRTOS.h"
+//#include "queue.h"
+//#include "task.h"
+#include "config.h"
+#include "isys_config.h"
+
+#define WATCHDOG_ENABLE             (0)
+#define TASK_CHK_ENABLE             (1)
+
+
+
+#define USE_LCD_MOUDLE              (1)
+#define USE_WEB_MODULE              (1)
+
+//@TMP_NOT_USED
+//#define USE_LOG_MODULE              (1)
+
+
+#define OS_TICKS_PER_SEC           (configTICK_RATE_HZ)
+#define OS_WAIT_FOREVER            (portMAX_DELAY)
+#define OS_PER_TICK_MS             (portTICK_RATE_MS)
+
+#define OS_TASK_OK                 (0)
+#define OS_TASK_MAX_ABNORMAL_TIME  (30)  //异常最大允许时间
+
+#define OS_MSG_MAGIC_WORD          (0X5533)
+#define OS_MSG_ISR_TASK_ID         (0XFF)       //自定义的中断的任务ID
+
+#define USE_MSG_DEBUG              0            //是否启用消息debug模式
+#define USE_MEM_DEBUG              1
+
+
+#define MAX_TIMER_NUM              10
+
+
+#define ERR_NO_ERR                  0
+#define ERR_CREATE_TASK_FAILED      1
+#define ERR_INVALID_PARA            2
+#define ERR_INVALID_POINTER         3
+#define ERR_TASKID_TOO_LARGE        4
+#define ERR_NO_MEM                  5
+#define ERR_CREATE_QUEUE_FAILED     6
+#define ERR_SEND_MSG_FAILED         7
+#define ERR_SEM_PTR_INVALID         8
+#define ERR_POST_SEM_FAILED         9
+#define ERR_PEND_SEM_FAILED         10
+
+#define ERR_MUTEX_PTR_INVALID       11
+#define ERR_TAKE_MUTEX_FAILED       12
+#define ERR_GIVE_MUTEX_FAILED       13
+#define ERR_I2C_NUM_ERR             14
+#define ERR_SPI_NUM_ERR             15
+#define ERR_CREATE_SEM_FAILED       16
+#define ERR_CREATE_MUTEX_FAILED     17
+
+typedef void * SEM_HANDLE;
+typedef void * MUTEX_HANDLE;
+
+typedef uint32 HANDLE;
+
+
+#define USE_DEBUG_UART   0   //串口调试信息开关  提交版本库时,本值必须为0
+
+#if USE_DEBUG_UART          //串口信息调试,可直接调用printf打印输出
+#define DEBUG_UART       1
+#endif
+
+/*
+#if USE_DEBUG_UART
+extern int printf(const char *,...);
+#else
+#include "stdio.h"
+#define printf(p,...)                //若没开启调试模式,printf定义为空
+#endif
+*/
+
+/*
+typedef struct
+{
+    uint16 type;
+    uint16 need_free;      //若为申请消息,此位不要用,默认已填充释放标记
+    uint16 wPara;
+    uint16 rPara;
+    uint32 lPara;
+}MSG,*pMSG;*/
+
+typedef struct
+{
+    MSG    msg;
+    uint16 magci_word;
+    uint8  alloc_id;
+    uint8  rec_id;
+}MSG_DEBUG;
+
+typedef struct
+{
+    uint32 tick;
+    uint32 size;
+}MEM_DEBUG_HEADER;
+
+
+typedef struct
+{
+#if USE_MEM_DEBUG
+    MEM_DEBUG_HEADER header;
+#endif
+    uint8 mem[1];
+}MEM_PTR;
+
+
+#define MAX_TASK                     16        //当前用户层任务上限 不包含以太网以及系统任务
+
+
+//数组下标为task_id
+typedef struct
+{
+    uint32        	num;
+    uint8         	created[MAX_TASK];     //任务是否建立标识
+    uint8        	status[MAX_TASK];
+    uint8        	pause[MAX_TASK];       //暂停时间长度,单位 秒
+    uint8         	ignore_chk[MAX_TASK];    //忽略检查,特殊任务使用
+    xQueueHandle  	queue[MAX_TASK];
+}SYS_TASK,*pSYS_TASK;
+
+
+
+typedef struct
+{
+    uint32 isr_send_num;
+    uint32 task_send_num;
+    uint32 isr_alloc_num;
+    uint32 task_alloc_num;
+    uint32 free_num;
+}S_MSG_STATE;
+
+typedef struct
+{
+    uint32 used;
+    uint32 total;
+}S_MEM_STATE;
+
+typedef struct
+{
+    uint32 min_num;
+    uint32 min_msg_q[MAX_TASK];
+    uint32 sec_num;
+    uint32 sec_msg_q[MAX_TASK];   //依次存放配置的任务ID
+}TIME_MSG_Q;
+
+typedef struct
+{   //待扩展
+    uint32 reset_total_time;
+    S_SYS_TIME  close_time;
+
+#if USE_LCD_MOUDLE
+    uint8 os_log[1];
+#endif
+
+}S_BACKUP_MEM;
+
+
+//持续按键,等待间隔
+#define KEY_DELAY_TIME (300)
+#define TMR_IDLE 0
+#define TMR_RUN  1
+#define TMR_STOP 2
+#define TMR_TYPE_ONE   0
+#define TMR_TYPE_CYCLE 1
+
+#define MSG_NEED_FREE      (0x55)
+#define MSG_NO_NEED_FREE   (0xaa)
+
+#define MSG_NEED_TO_FREE(pmsg)     (pmsg->need_free==MSG_NEED_FREE)
+
+
+enum{RET_OK = 0,RET_ERR,RET_NO_MEM,RET_NOT_FIND,RET_RET_ERR,RET_WRITE_FAIL,RET_READ_FAIL};
+
+
+typedef struct __TIMER
+{
+    uint32 state;
+    uint32 ticks;
+    uint32 count;
+    uint32 type;
+    uint32 task_id;   //由创建该消息的接收
+    MSG  msg;
+}TIMER,*PTIMER;
+
+
+
+typedef enum
+{
+    MSG_RS232 = 0x10,
+    MSG_ETH,
+    MSG_SEC,
+    MSG_MINUTE,
+    MSG_WRITE_PARA,
+    MSG_READ_PARA,
+    MSG_KEY,
+    MSG_TIMER,
+    MSG_UPGRADE,
+    MSG_HTTP_UPDATE,  //http发送给液晶做update校正,
+    MSG_WEB_SAVE_PARA,
+    MSG_FPGA_UPGRADE,//MSG_FPGA_UPGRADE_OVER
+    MSG_UDP_ALRM,
+    MSG_UART_ALRM,
+    MSG_LOG,
+    MSG_LOG_RECORD_RESET,
+    MSG_UART_RE_INIT,
+    MSG_SHOW_WAIT,
+    MSG_PSTS_UPDATE,
+    MSG_MCU_REBOOT,
+
+	
+    MSG_IGMP_REINIT,
+}MSG_TYPE;
+
+enum{
+	DISPLAY_FPGA_UPGRADE_OVER=1,
+	DISPLAY_FPGA_UPGRADE_ERR,
+	DISPLAY_FPGA_UPGRADE_BUSY_TIMEOUT,
+
+	DISPALY_RFAGC_ERR_POWER_LOW,
+	DISPALY_RFAGC_ERR_POWER_HIGH
+};
+
+
+
+
+typedef enum
+{
+    E_RA = 0x10,
+    W_SYSTEM,
+    W_RF,
+    W_WA,
+    W_WB,
+    W_WC,
+    W_WD,
+    W_WE,
+    W_WF,
+    W_RF_DELAY,
+    W_ADPC,
+    W_CONFIGA,
+    W_CONFIGB,
+    W_CONFIGC,
+    W_CONFIGD,
+    W_HTTP_CGI1,
+    W_HTTP_CGI2,
+    W_UPDATE_STOP,
+    W_UPDATE,
+    W_OUTPUT,
+    W_FAC_C,
+    W_FAC_F,
+    W_FAC_H,
+    W_RF_ONLY,
+    W_SIM_TEST,
+    W_SIM_PW_ERR,
+    W_SIM_PARA,
+
+    R_LOG = 100,
+    R_RF_DELAY,
+    R_UPDATE,    //不可超过255 0xff
+    R_SIM_PARA,
+    R_LOG4,
+}PARA_TYPE;
+/*
+#define UART_RCV_BUF_LEN     (1024)
+#define UART_SEND_BUF_LEN    (256)
+#define UART_REC_BUF_BAK     (1<<2)   ////必须全bit都为1的值+1  串口接收缓冲区
+#define UART_PORT_NUM        (3)  //(4)
+
+typedef struct
+{
+    uint32 valid;
+    uint32 task_id;    //处理串口消息任务ID
+    MUTEX_HANDLE mutex;
+    MSG    msg[UART_REC_BUF_BAK];
+    uint16 index;
+    uint16 length;        //发送长度
+    uint32 buf_cnt;
+    uint8  buffer[UART_REC_BUF_BAK][UART_RCV_BUF_LEN];
+}S_UART_RX_CTRL;
+*/
+/**********************当前文件提供的对外API函数*************************************************/
+uint32 create_task(void (*fun)(void*),char* pcname,uint32 task_id,uint32 task_pro,uint32 stacksize,uint32 queuesize);
+uint32 task_set_ignore_chk(uint32 task_id);
+
+uint32 send_msg(uint32 task_id,pMSG pmsg);
+pMSG get_msg(uint32 wait_ticks);
+
+MSG* alloc_msg(void);
+void free_msg(pMSG p);
+
+void *alloc_mem(uint32 size);
+void free_mem(void* pmem);
+
+//信号量相关函数,pend函数(等待),只能在正常任务中使用,post任务体,中断均可使用
+//主要用来在中断中post,然后再一个任务中pend(阻塞型),减少中断处理时间并加快任务响应速度
+SEM_HANDLE create_sem(uint32 max_count,uint32 init_count);
+uint32 pend_sem(SEM_HANDLE sem_hd,uint32 wait_ticks);
+uint32 post_sem(SEM_HANDLE sem_hd);
+
+
+//互斥相关函数,只能在正常任务体中使用,不能用于中断 一般在多任务资源共享时使用 使用时take(若take不到,将会阻塞),用完后及时give
+//时间短的操作,可以关任务调度实现
+MUTEX_HANDLE create_mutex(void);
+uint32 take_mutex(MUTEX_HANDLE mtx_hd);
+uint32 give_mutex(MUTEX_HANDLE mtx_hd);
+
+
+void os_int_enter(void);
+void os_int_exit(void);
+
+uint32 os_get_free_heap_size(void);
+
+S_SYS_TIME *os_get_sys_time_ptr(void);
+uint32 get_cpu_useage(void);
+void send_clk_msg(void);
+void calc_cpu_usage(void);
+//void get_sys_time(S_SYS_TIME* pt);
+void update_sys_time_by_rtc(void);
+uint32 config_time_msg(uint32 type);
+void sys_para_init(void);
+//#define get_sys_tick   xTaskGetTickCount
+void get_msg_state(S_MSG_STATE *pstate);
+void get_mem_state(S_MEM_STATE *pstate);    //仅在内存调试打开时有效
+uint32 get_current_task_id(uint32 *pid);
+uint32 get_task_id(uint32 *pid,void *ptcb);
+void task_is_ok(void);
+uint32 task_chk_status(void);
+void os_dead_task_abnormal(uint32 task_id);
+void os_dead_wwdg(void);
+void task_stop_sec_msg(void);
+void task_resume_sec_msg(void);
+/******************************************END*****************************************************/
+
+/* Exported functions ------------------------------------------------------- */
+extern uint32 get_sys_clk(void);
+
+#if configUSE_CALC_CPU_USAGE
+extern uint32 get_idle_run_time(void);
+extern void set_idle_run_time(uint32);
+#endif
+
+
+#define OS_DEFAULT_STACK_SIZE       (configMINIMAL_STACK_SIZE*2)    //默认1k字节
+#define OS_DEFAULT_QUEUE_SIZE       (100*sizeof(void*))
+
+
+
+/*--------------- Tasks ID -------------*/
+
+//同一优先级任务可创建多个,
+typedef enum
+{
+  PRIORITY_VERY_HIGH = (tskIDLE_PRIORITY+4),        //最高优先级任务,
+  PRIORITY_HIGH      = (tskIDLE_PRIORITY+3),        //特殊任务,如主任务等
+  PRIORITY_NORMAL    = (tskIDLE_PRIORITY+2),        //默认优先级
+  PRIORITY_LOW       = (tskIDLE_PRIORITY+1),        //低优先级任务
+
+}E_TASK_RPIPRITY;
+
+enum E_TASK_ID
+{
+    MAIN_TASK_ID = 0,
+    LCD_TASK_ID,
+    UART_TASK_ID,
+    GPS_TASK_ID,
+    WEB_TASK_ID,
+    
+    LOG_TASK_ID,// 5
+    TCP_REMOTE_TASK_ID,
+    FPGA_UPGRADE_TASK_ID,
+    SWAP_TASK_ID,
+    SPECT_TASK_ID,
+    
+    UDP_REMOTE_TASK_ID,// 10
+    SNTP_TASK_ID,
+    TEST_TASK_ID,
+    AUTO_UDP_TASK_ID,
+    IDLE_TASK_ID,// 14
+};  //任务序号,必须全局唯一,否则会出现异常
+
+
+#endif
+
+

atsc_app/inc/rbtree.h

@@ -0,0 +1,33 @@
+#ifndef _RBTREE_H_
+#define _RBTREE_H_
+
+#include <stdint.h>
+#include <stddef.h>
+
+typedef struct rbtree_node_s rbtree_node_t;
+struct rbtree_node_s{
+    uint64_t key;
+    struct rbtree_node_s *left;
+    struct rbtree_node_s *right;
+    struct rbtree_node_s *parent;
+    uint8_t color;
+};
+
+typedef struct rbtree_s rbtree_t;
+struct rbtree_s{
+    rbtree_node_t *root;
+    rbtree_node_t sentinel;
+};
+
+void rbtree_init(rbtree_t *tree);
+void rbtree_destory(rbtree_t *tree);
+void rbtree_insert(rbtree_t *tree,rbtree_node_t* node);
+void rbtree_delete(rbtree_t *tree,rbtree_node_t* node);
+rbtree_node_t* rbtree_search(rbtree_t *tree,uint64_t key);
+rbtree_node_t* rbtree_min(rbtree_t *tree,rbtree_node_t* node);
+rbtree_node_t* rbtree_next(rbtree_t *tree,rbtree_node_t* node);
+
+#define rbtree_data(node, type, link) \
+    (type *) ((u_char *) node - offsetof(type, link))
+
+#endif

atsc_app/inc/rtc.h

@@ -0,0 +1,23 @@
+#ifndef _RTC_H_
+#define _RTC_H_
+#include "type.h"
+#include "stm32f4xx_rtc.h"
+
+//备份区内存,地址范围从0x40024000~0x40024fff,共4Kbyte.
+#define BACK_MEM_START_ADDRESS  BKPSRAM_BASE
+#define BACK_MEM_SIZE           0XFFF
+
+uint32 rtc_init(void);
+uint32 rtc_back_mem_para_init(void);
+void rtc_get_date_time(RTC_DateTypeDef *pd,RTC_TimeTypeDef *pt);
+void rtc_set_date_time(RTC_DateTypeDef *pd,RTC_TimeTypeDef *pt);
+void rtc_set_date(RTC_DateTypeDef *pd);
+void rtc_set_time(RTC_TimeTypeDef *pt);
+void rtc_get_time(RTC_TimeTypeDef *pt);
+void rtc_get_date(RTC_DateTypeDef *pd);
+void rtc_set_time(RTC_TimeTypeDef *pt);
+void rtc_update_close_time(void);
+void* rtc_get_log_mem_address(void);
+void rtc_get_last_close_time(S_SYS_TIME *ptime);
+
+#endif