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新增：V1.1 硬件功率校准

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This commit is contained in:
efox
2026-08-28 13:28:25 +08:00
committed by rfeng
parent eebdd22256
commit 936a850c6b
9 changed files with 193 additions and 32 deletions
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src/atsc_app/bsp/fpga.c
+29 -3
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@@ -80,11 +80,26 @@ void uart_debug(uint8 *pbuf,uint32 len)
#define HMC472_STEP_MDB 500
#define HMC472_STEPS_MAX 63
#define ADRV9009_ATT_BASE 8000
#define ADRV9009_ATT_MAX 40000
/*
* The post-reset measurements were made in V1.0 software mode and established
* that LCD -11 dB produces 0 dBm at the 563 MHz reference point. Therefore
* V1.1 needs 11 dB additional attenuation for LCD 0 dB to map to the same
* physical 0 dBm output.
*/
#define V1_1_OUTPUT_GAIN_MDB 11000
static int32 g_last_total_mdb = -1;
static uint16 g_last_adrv9009_att = 0xFFFF;
static volatile uint8 g_adrv9009_ready = 0;
static int32 hardware_output_gain_mdb(void)
{
return atsc_para.system_para.hardware_version == HARDWARE_VERSION_V1_1
? V1_1_OUTPUT_GAIN_MDB : 0;
}
/*
* Validate a stored power command only after the current channel's WE power
* has been loaded. A raw attenuation of zero is a valid physical maximum;
@@ -98,6 +113,7 @@ static uint8 normalize_new_power_rf_db(S_WE_PARA *pwe, S_RF_PARA *prf)
raw_total_mdb = (int32)RAW_MAX_OUTPUT_MDB
- ((int32)prf->db + (int32)pwe->power - (int32)REF_POWER_UNITS)
* (int32)PWR_UNIT_TO_MDB;
raw_total_mdb += hardware_output_gain_mdb();
if(raw_total_mdb >= 0)
return 0;
@@ -1057,6 +1073,7 @@ uint16 fpga_limit_power_target(S_WE_PARA *pwe, S_RF_PARA *prf, uint16 target_pow
total_mdb = (int32)RAW_MAX_OUTPUT_MDB
- ((int32)prf->db + (int32)pwe->power - (int32)REF_POWER_UNITS)
* (int32)PWR_UNIT_TO_MDB;
total_mdb += hardware_output_gain_mdb();
if(total_mdb <= 0)
return prf->power;
@@ -1087,12 +1104,13 @@ void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf)
total_mdb = (int32)RAW_MAX_OUTPUT_MDB
- ((int32)prf->db + (int32)pwe->power - (int32)REF_POWER_UNITS)
* (int32)PWR_UNIT_TO_MDB;
total_mdb += hardware_output_gain_mdb();
if(total_mdb < 0)
total_mdb = 0;
if(total_mdb > (int32)(ADRV9009_ATT_BASE + HMC472_STEPS_MAX * HMC472_STEP_MDB))
total_mdb = ADRV9009_ATT_BASE + HMC472_STEPS_MAX * HMC472_STEP_MDB;
if(total_mdb > (int32)(ADRV9009_ATT_MAX + HMC472_STEPS_MAX * HMC472_STEP_MDB))
total_mdb = ADRV9009_ATT_MAX + HMC472_STEPS_MAX * HMC472_STEP_MDB;
if(total_mdb >= (int32)ADRV9009_ATT_BASE)
{
@@ -1100,7 +1118,13 @@ void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf)
agc_att_val = (uint8)(hmc_extra / HMC472_STEP_MDB);
if(agc_att_val > HMC472_STEPS_MAX)
agc_att_val = HMC472_STEPS_MAX;
adrv9009_att_val = (uint16)(ADRV9009_ATT_BASE + (hmc_extra % HMC472_STEP_MDB));
/*
* Keep ADRV9009 near its 8000 mdB optimum while HMC472 has range.
* Once HMC472 reaches 63, use the remaining ADRV9009 range up to
* 40000 mdB instead of clipping the combined attenuation at 39500.
*/
adrv9009_att_val = (uint16)(total_mdb - agc_att_val * HMC472_STEP_MDB);
}
else
{
@@ -1141,6 +1165,8 @@ void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf)
}
g_last_total_mdb = total_mdb;
printf("[power] hardware=V1.%d offset_mdb=%d\n",
atsc_para.system_para.hardware_version, hardware_output_gain_mdb());
printf("[power] we=%3d db=%3d total_mdb=%5d | agc_att=%d adrv_att=%d\n",
pwe->power, prf->db, total_mdb, agc_att_val, adrv9009_att_val);