提交SMOD ATSC IMX APP版本 V122
This commit is contained in:
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/* USER CODE BEGIN Header */
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/*
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* FreeRTOS Kernel V10.0.1
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
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* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
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||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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||||
*
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||||
* http://www.FreeRTOS.org
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||||
* http://aws.amazon.com/freertos
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||||
*
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* 1 tab == 4 spaces!
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*/
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/* USER CODE END Header */
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#ifndef FREERTOS_CONFIG_H
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#define FREERTOS_CONFIG_H
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/*-----------------------------------------------------------
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* Application specific definitions.
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*
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* These definitions should be adjusted for your particular hardware and
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* application requirements.
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*
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* These parameters and more are described within the 'configuration' section of the
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* FreeRTOS API documentation available on the FreeRTOS.org web site.
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*
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* See http://www.freertos.org/a00110.html
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*----------------------------------------------------------*/
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/* USER CODE BEGIN Includes */
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/* Section where include file can be added */
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/* USER CODE END Includes */
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/* Ensure definitions are only used by the compiler, and not by the assembler. */
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#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
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#include <stdint.h>
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extern uint32_t SystemCoreClock;
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#endif
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#define configUSE_PREEMPTION 1
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#define configSUPPORT_STATIC_ALLOCATION 1
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#define configSUPPORT_DYNAMIC_ALLOCATION 1
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#define configUSE_IDLE_HOOK 0
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#define configUSE_TICK_HOOK 1//_USE_RVL_
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#define configCPU_CLOCK_HZ ( SystemCoreClock )
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#define configTICK_RATE_HZ ((TickType_t)100)
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#define configMAX_PRIORITIES (8)
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#define configMINIMAL_STACK_SIZE ((uint16_t)128)
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#define configTOTAL_HEAP_SIZE ((size_t)60*1024)//75360
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#define configMAX_TASK_NAME_LEN ( 16 )
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#define configUSE_16_BIT_TICKS 0
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#define configUSE_MUTEXES 1
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#define configQUEUE_REGISTRY_SIZE 8
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#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
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#define configUSE_COUNTING_SEMAPHORES 1
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/*当前正在使用的配置文件*/
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/* Co-routine definitions. */
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#define configUSE_CO_ROUTINES 0
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#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
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/* Set the following definitions to 1 to include the API function, or zero
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to exclude the API function. */
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#define INCLUDE_vTaskPrioritySet 1
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#define INCLUDE_uxTaskPriorityGet 1
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#define INCLUDE_vTaskDelete 1
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#define INCLUDE_vTaskCleanUpResources 0
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#define INCLUDE_vTaskSuspend 1
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#define INCLUDE_vTaskDelayUntil 0
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#define INCLUDE_vTaskDelay 1
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#define INCLUDE_xTaskGetSchedulerState 1
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/* Cortex-M specific definitions. */
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#ifdef __NVIC_PRIO_BITS
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/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
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#define configPRIO_BITS __NVIC_PRIO_BITS
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#else
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#define configPRIO_BITS 4
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#endif
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/* The lowest interrupt priority that can be used in a call to a "set priority"
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function. */
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#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
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/* The highest interrupt priority that can be used by any interrupt service
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routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
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INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
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PRIORITY THAN THIS! (higher priorities are lower numeric values. */
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#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
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/* Interrupt priorities used by the kernel port layer itself. These are generic
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to all Cortex-M ports, and do not rely on any particular library functions. */
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#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
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See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
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#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
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/* Normal assert() semantics without relying on the provision of an assert.h
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header file. */
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/* USER CODE BEGIN 1 */
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#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
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/* USER CODE END 1 */
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/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
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standard names. */
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#define vPortSVCHandler SVC_Handler
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#define xPortPendSVHandler PendSV_Handler
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/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
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to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
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#define xPortSysTickHandler SysTick_Handler
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/* USER CODE BEGIN Defines */
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/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
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/* USER CODE END Defines */
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#endif /* FREERTOS_CONFIG_H */
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Executable
+13
@@ -0,0 +1,13 @@
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#ifndef _ADRV9009_EXT_H_
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#define _ADRV9009_EXT_H_
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void cfg_adrv_att(uint16 set_att);
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void cfg_adrv_orx_manu_gain(uint8 orx_manu_gain_index);
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void chang_freq(uint8 radio_ctl, int freq_changed);
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void cfg_fpga_agc_att(uint8 agc_att);
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void get_adrv9009_c0_orx_range(uint8 *pmin ,uint8 *pmax);
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void cfg_adrv9009_spi_ctrl_source(uint8 ctrl_src);
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int adrv9009_set_tx_path_enable(uint8 enable);
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#endif
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@@ -0,0 +1,34 @@
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#ifndef __CGIFUNCS_H__
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#define __CGIFUNCS_H__
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//*****************************************************************************
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//
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// Prototypes of functions exported by this module.
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//
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//*****************************************************************************
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int FindCGIParameter(const char *pcToFind, char *pcParam[], int iNumParams);
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tBoolean IsValidHexDigit(const char cDigit);
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unsigned char HexDigit(const char cDigit);
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tBoolean DecodeHexEscape(const char *pcEncoded, char *pcDecoded);
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unsigned long EncodeFormString(const char *pcDecoded, char *pcEncoded,
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unsigned long ulLen);
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unsigned long DecodeFormString(const char *pcEncoded, char *pcDecoded,
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||||
unsigned long ulLen);
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tBoolean CheckDecimalParam(const char *pcValue, long *plValue);
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long GetCGIParam(const char *pcName, char *pcParams[], char *pcValue[],
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int iNumParams, tBoolean *pbError);
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long GetCGIStringParam(const char *pcName, char *pcParams[], char *pcValue[],
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int iNumParams,char *pbuf,int buflen,int ign_quotation);
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long GetCGIHexParam(const char *pcName, char *pcParams[], char *pcValue[],
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int iNumParams, tBoolean *pbError);
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void CheckStringParam(const char *pcValue, char *pbuf);
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tBoolean
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CheckHexParam(const char *pcValue, long *plValue);
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long
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GetCGIHexParam(const char *pcName, char *pcParams[], char *pcValue[],
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int iNumParams, tBoolean *pbError);
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#endif // __CGIFUNCS_H__
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Executable
+322
@@ -0,0 +1,322 @@
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#ifndef __CONFIG_H__
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#define __CONFIG_H__
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#define AW_ATSC_5X 1
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//判断是否定义美国或者全波版本(5K+)
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#if USA_ATSC_5X
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#define USA_ATSC_5X 1
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#else
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#define USA_ATSC_5X 0
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#endif
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#if AW_ATSC_5X
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#define AW_ATSC_5X 1
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#else
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#define AW_ATSC_5X 0
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#endif
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#if USA_ATSC_5X && AW_ATSC_5X
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#error "Only could define one exciter type!!!"
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#endif
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#if (USA_ATSC_5X==0) && (AW_ATSC_5X==0)
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#error "Must define The exciter type!!!"
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#endif
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#define xQueueHandle int*
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#define tskIDLE_PRIORITY 1
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#ifndef USE_HW_REPT
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#define USE_HW_REPT 0
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#endif
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#if 1
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#define USE_DRY_LOOP 0 //@NOT_USED
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#endif
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//------------------usr-define------------------------
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//测试用-发布时需要开放
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#define USE_DBG_PASS_TUNER_INIT 0 //跳过tuner init
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#define USE_UART_DEV_LINK 1
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/*
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* Prefer the local key/LCD path when the single-core CPU is busy with IQ
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* analysis. Set to 0 to restore the original thread priorities.
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*/
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#define USE_UI_RESPONSE_PRIORITY 1
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/*
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* Keep the physical RF output muted while FPGA/ADRV9009/JESD/DPD are being
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* initialized. The saved/user-requested RF state is restored only after the
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* whole RF chain is ready, avoiding boot transients at the output.
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*/
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#define USE_DELAYED_RF_ENABLE 1
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#define RF_BOOT_STABLE_DELAY_MS 2000
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//---------------------------------------------------
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//if use korea -- need check ca //V173
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//else use us -- ca default bypass
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#define USE_KOREA_VERSION (0)
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//#define SPL_CURV_LOAD_STORE 0
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#if USA_ATSC_5X
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#if USE_HW_REPT
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#define SW_VERSION "V6.1A_150107T"
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#else
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#define SW_VERSION "V6.1A_150107"
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#endif
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#define ERR_TO_LCM 1
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#define USE_DRYLOOP_I2C 0 //美国5K+,暂时使用串口模式
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#define USE_TUNER_88436 1 //TUNER88436 外部解码 tuner18273 需要fpga解码,18273只是个高频头
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#define USE_TUNER_18273 0 //两个只能同时使用1个
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#define USE_PSTS 0
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#define USE_NEW_DIO_MODE 0 //是否使用美国新的dio模式 在原先的dio基础上对部分按键做了重定义
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#elif AW_ATSC_5X
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#if USE_HW_REPT
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#undef USE_DBG_PASS_TUNER_INIT
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#define USE_DBG_PASS_TUNER_INIT (1)
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#define SW_VERSION "V5.2AW_210902T" //"V5.2AW_210822T"
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#else
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#define SW_VERSION "V5.2AW_220331R" //"V5.2AW_211217"
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#endif
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#define ERR_TO_LCM 1
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#define USE_DRYLOOP_I2C 0
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#define USE_TUNER_88436 0
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#define USE_TUNER_18273 0 //三个只能同时使用1个,或者不用
|
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#define USE_PSTS 1
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#define USE_NEW_DIO_MODE 1 //是否使用美国新的dio模式 在原先的dio基础上对部分按键做了重定义
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#endif
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#define USE_STD_USART_SEND_RECV 1
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/*开启该功能时，需要调整网页ADPC的选项*/
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#define USE_UPDATA5 0//禁用
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#define USE_RESET_TCP (1)//重置tcp
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#define USE_UART_CMD_PRINT_LWIP (1)//串口命令可以打印:80 46 06 70 3C 96
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//调试使用
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#define DBG_ADPC_NO_FEEDBACK_ERR 0
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//------------------<<<<<<<<<<------------------------
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#define ATSC_TITLE_LEN 16
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#define ATSC_WEB_TITLE "Digital Exciter"
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#define SNTP_TIME_STRING_LEN 8
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#define SNTP_DATE_STRING_LEN 10
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|
||||
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||||
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||||
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#define I2C_MAX_NUM 5
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#define DEBUG_AUTO_ADPC 0
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#define ATSC_USA_AMP 1
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|
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//@TO_DISABLE
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#define I2C_SOFT_GPIO 0 //只能为1
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#define USE_SONYCXD6801GL 1
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#if ((USE_TUNER_18273==1)&&(USE_TUNER_88436==1)) || ((USE_TUNER_18273==1)&&(USE_SONYCXD6801GL==1)) || ((USE_TUNER_88436==1)&&(USE_SONYCXD6801GL==1))
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||||
#error "must choose only one tuner type!"
|
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#endif
|
||||
|
||||
#if (USE_TUNER_18273==1)||(USE_TUNER_88436==1)||(USE_SONYCXD6801GL==1)
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#define USE_TUNER 1 //1
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#else
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#define USE_TUNER 0
|
||||
#endif
|
||||
|
||||
|
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//++++++++++++++++++++++++++++++++++++++++++
|
||||
#if 1//usr_def
|
||||
#define TMP_DISABLE_BOOT_SNR_UPDATE (0)
|
||||
|
||||
|
||||
#define DBG_DISABLE_I2C (0)
|
||||
#define DBG_DISABLE_TUNER (0)
|
||||
#if DBG_DISABLE_TUNER
|
||||
#ifdef USE_TUNER
|
||||
#undef USE_TUNER
|
||||
#define USE_TUNER (0)
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#define DBG_I2C_ERR_DELAY 1
|
||||
|
||||
//#define USE_TUNER 1
|
||||
|
||||
//暂时先关闭
|
||||
#define THR_GPS 0
|
||||
|
||||
#define THR_LCD 1
|
||||
|
||||
//+++++++++++++++++++++++++++++++++++++++++++
|
||||
|
||||
|
||||
#define NO_USE 0 //@NOT_USED
|
||||
|
||||
#define ETH_UPGRADE 0
|
||||
/*#ifndef ETH_UPGRADE //默认打开升级模式
|
||||
#define ETH_UPGRADE 1
|
||||
#else
|
||||
#define ETH_UPGRADE 0
|
||||
#endif*/
|
||||
|
||||
#define TMP_UNUSE_LCD 1
|
||||
|
||||
//@NOT_USED
|
||||
//#define USE_GPS 1
|
||||
#define USE_GPS 1
|
||||
|
||||
//@TMP_UNUSED_FOR_MAKE
|
||||
#define TMP_UNUSE_GPS_TIME 0
|
||||
|
||||
//@TMP_UNUSED_FOR_MAKE
|
||||
#define NEED_TO_EN 0
|
||||
|
||||
//NEED_TO_EN
|
||||
#define FPGA_UP_MSG 1
|
||||
#define NEED_SEND_ALM 0
|
||||
|
||||
//对于5段地址冲突的部分需要禁用
|
||||
#define ADDR_CONFLICT_DISABLED 1
|
||||
|
||||
#endif//usr_def
|
||||
//+++++++++++++++++++++++++++++++++++++++
|
||||
|
||||
|
||||
#define SYSTICKHZ (configTICK_RATE_HZ)
|
||||
#define SYSTICKMS (1000 / configTICK_RATE_HZ)
|
||||
|
||||
#define E2_ROM_SIZE (32*1024) // e2rom 32Kbyte
|
||||
#define E2_ROM_PAGE (64) // e2rom 页
|
||||
|
||||
|
||||
#define USE_SWAP_DATA 1
|
||||
#define USE_SPI_FLASH 1 //flash开关
|
||||
#define SHOW_DEBUG_INFO 0
|
||||
#define TEST_E2_ROM 0
|
||||
#define SCAN_NEED_CHANGE_MODE 0
|
||||
#define USE_CTRL_MODE 1
|
||||
#define USE_HTTP_LOGIN 1
|
||||
#define USE_TCP_COMM 1 //网络通讯
|
||||
|
||||
#define USE_NEW_FPGA 1
|
||||
|
||||
|
||||
#define USE_LCD_CACHE 1
|
||||
#define USE_BIG_LCD 1
|
||||
#define USE_HTTP 1
|
||||
#define FPGA_UPGRADE 1
|
||||
|
||||
#define USE_SNR_ADJ 1
|
||||
|
||||
#define UPGRADE_LISTEN_PORT 1234
|
||||
#define TCP_COMM_PORT 4003
|
||||
#define TCP_COMM_DATA_PORT 4017
|
||||
|
||||
|
||||
#define SYSTICK_INT_PRIORITY 0x80
|
||||
#define ETHERNET_INT_PRIORITY 0xC0
|
||||
|
||||
#define ALARM_USE_UDP 1 //那个版本以后,待定
|
||||
|
||||
|
||||
///////////////////////////////////////////////////////////////////////////
|
||||
|
||||
//#define USE_NLOGO_VER 0 //对于正式发布的atsc5x+需要配0
|
||||
|
||||
/*#if USE_NLOGO_VER
|
||||
#define TEMPREATURE_DEGREE 1 //温度
|
||||
#else
|
||||
#define TEMPREATURE_DEGREE 0 //温度
|
||||
#endif**/
|
||||
|
||||
//系统组件配置
|
||||
|
||||
|
||||
#define USE_SPECT_DATA_TASK 1 // 是否需要通过tcp向上位机传送数据 8000型有此功能
|
||||
#define USE_ADPC_LONG 1 // 预校正加长代码
|
||||
#define USE_NEW_AGC 0
|
||||
#define USE_TS_CHECK 1
|
||||
#define USE_GPS_UBLOX6 1
|
||||
#define USE_GPS_CHECK 1
|
||||
#define USE_TS2IP 1
|
||||
#define USE_SNTP_SNYC_TIME 1
|
||||
#define USE_TEMPERATURE_CHECK 1
|
||||
#define USE_OVERFLOW_CHECK 1
|
||||
|
||||
#define USE_NETWORK_DNS 0 // 是否配置dns
|
||||
#define USE_NEW_POWER_CFG 1 // HMC472 + ADRV9009 power allocation
|
||||
#define USE_FREQ_CHANGE_RESET_PWR 1 // 切换频点后是否先将输出功率降到-25dB
|
||||
|
||||
|
||||
#if USE_BIG_LCD
|
||||
#define LCD_CHAR_NUM 40
|
||||
#else
|
||||
#define LCD_CHAR_NUM 20
|
||||
#endif
|
||||
|
||||
|
||||
#define TEST_GPS_MOUDLE 1
|
||||
|
||||
// RF 相关注释
|
||||
#define setbit(x,y) (x)= (1<<(y)) //将X的第Y位置1,清其他位,
|
||||
#define setbits(x,y) (x)|=(1<<(y)) //将X的第Y位置1,保留其他位,
|
||||
#define clrbit(x,y) (x)&=~(1<<(y)) //将X的第Y位清0,
|
||||
#define clrbits(x,y,z) (x)&=~((z)<<(y)) //从Y位开始,以Z为整体对X某些位清0,
|
||||
#define _STATUS_RF 0 //Bit0=1无输出 为0正常 串口返回时 单独 "或1" 处理,
|
||||
#define _KEY_RF 1 //Bit 1
|
||||
#define _KEY_WH 2 //Bit 2
|
||||
#define _KEY_TX 2 //Bit 2
|
||||
#define _LOCAL_REMOET 2 //Bit 2
|
||||
#define _PIN_DRYLOOP 3
|
||||
#define _MISS_OTHER 4
|
||||
#define _MISS_TS 5
|
||||
#define _MISS_10M 6
|
||||
#define _MISS_1PPS 7
|
||||
|
||||
#define MAC_DEFAULT (0x13<<16) | (0x05<<8) | (0x03)
|
||||
|
||||
#define BAK_PARA_CHECK 1
|
||||
#define DEBUG_ERR_CHECK 0 // WC屏参数激励器不试用，可用来调试
|
||||
//Bit 0 为0时正常，为1时不正常
|
||||
#define BAK_ERR_OK 0
|
||||
#define BAK_ERR_ERR 1
|
||||
#define BAK_ERR_TXFREQ 1<<1
|
||||
#define BAK_ERR_RXFREQ 1<<2
|
||||
#define BAK_ERR_POWER 1<<3
|
||||
#define BAK_ERR_DB 1<<4
|
||||
#define BAK_ERR_WE_LEAK 1<<5
|
||||
#define BAK_ERR_DEBUG 1<<7
|
||||
|
||||
#define LEN_ADPC_DATE_BUF 4096
|
||||
|
||||
|
||||
|
||||
//#define ADPC_DEBUG 1
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/************************************END********************************/
|
||||
Executable
+6
@@ -0,0 +1,6 @@
|
||||
#ifndef __CONSOLE_CTRL_H__
|
||||
#define __CONSOLE_CTRL_H__
|
||||
|
||||
int creat_console_ctrl_thread(void);
|
||||
|
||||
#endif
|
||||
Executable
+124
@@ -0,0 +1,124 @@
|
||||
#ifndef __DAC38J82_H__
|
||||
#define __DAC38J82_H__
|
||||
|
||||
#include "type.h"
|
||||
|
||||
|
||||
#define DAC38J82_SPI_NODE "/dev/spidev32766.1"
|
||||
|
||||
#define WIDTH_32BIT 4
|
||||
#define WIDTH_24BIT 3
|
||||
#define WIDTH_16BIT 2
|
||||
#define WIDTH_8BIT 1
|
||||
|
||||
typedef enum _do_cfg_38j82_step{
|
||||
DAC38J82_CFG_STEP_ONE= 0,
|
||||
DAC38J82_CFG_STEP_TWO= 1,
|
||||
DAC38J82_CFG_STEP_DONE
|
||||
}DAC38J82_CFG_STEP;
|
||||
|
||||
|
||||
#define CLR_BIT(x,bitops) (x &= ~(1<<bitops))
|
||||
#define SET_BIT(x,bitops) (x |= (1<<bitops))
|
||||
|
||||
#define REGMAP_ADDR_CONFIG0 0
|
||||
#define REGMAP_ADDR_CONFIG1 1
|
||||
#define REGMAP_ADDR_CONFIG2 2
|
||||
#define REGMAP_ADDR_CONFIG3 3
|
||||
#define REGMAP_ADDR_CONFIG4 4
|
||||
#define REGMAP_ADDR_CONFIG5 5
|
||||
#define REGMAP_ADDR_CONFIG6 6
|
||||
#define REGMAP_ADDR_CONFIG7 7
|
||||
#define REGMAP_ADDR_CONFIG8 8
|
||||
#define REGMAP_ADDR_CONFIG9 9
|
||||
#define REGMAP_ADDR_CONFIG10 10
|
||||
#define REGMAP_ADDR_CONFIG11 11
|
||||
#define REGMAP_ADDR_CONFIG12 12
|
||||
#define REGMAP_ADDR_CONFIG13 13
|
||||
#define REGMAP_ADDR_CONFIG14 14
|
||||
#define REGMAP_ADDR_CONFIG15 15
|
||||
#define REGMAP_ADDR_CONFIG16 16
|
||||
#define REGMAP_ADDR_CONFIG17 17
|
||||
#define REGMAP_ADDR_CONFIG18 18
|
||||
#define REGMAP_ADDR_CONFIG19 19
|
||||
#define REGMAP_ADDR_CONFIG20 20
|
||||
#define REGMAP_ADDR_CONFIG21 21
|
||||
#define REGMAP_ADDR_CONFIG22 22
|
||||
|
||||
#define REGMAP_ADDR_CONFIG26 26
|
||||
#define REGMAP_ADDR_CONFIG27 27
|
||||
|
||||
#define REGMAP_ADDR_CONFIG30 30
|
||||
#define REGMAP_ADDR_CONFIG31 31
|
||||
#define REGMAP_ADDR_CONFIG32 32
|
||||
#define REGMAP_ADDR_CONFIG34 34
|
||||
|
||||
#define REGMAP_ADDR_CONFIG36 36
|
||||
#define REGMAP_ADDR_CONFIG37 37
|
||||
#define REGMAP_ADDR_CONFIG38 38
|
||||
|
||||
#define REGMAP_ADDR_CONFIG47 47
|
||||
|
||||
#define REGMAP_ADDR_CONFIG49 49
|
||||
#define REGMAP_ADDR_CONFIG50 50
|
||||
#define REGMAP_ADDR_CONFIG51 51
|
||||
|
||||
#define REGMAP_ADDR_CONFIG59 59
|
||||
|
||||
#define REGMAP_ADDR_CONFIG60 60
|
||||
|
||||
#define REGMAP_ADDR_CONFIG61 61
|
||||
#define REGMAP_ADDR_CONFIG62 62
|
||||
|
||||
#define REGMAP_ADDR_CONFIG63 63
|
||||
#define REGMAP_ADDR_CONFIG70 70
|
||||
#define REGMAP_ADDR_CONFIG71 71
|
||||
#define REGMAP_ADDR_CONFIG72 72
|
||||
|
||||
#define REGMAP_ADDR_CONFIG73 73
|
||||
#define REGMAP_ADDR_CONFIG74 74
|
||||
#define REGMAP_ADDR_CONFIG75 75
|
||||
#define REGMAP_ADDR_CONFIG76 76
|
||||
#define REGMAP_ADDR_CONFIG77 77
|
||||
#define REGMAP_ADDR_CONFIG78 78
|
||||
#define REGMAP_ADDR_CONFIG79 79
|
||||
|
||||
#define REGMAP_ADDR_CONFIG80 80
|
||||
#define REGMAP_ADDR_CONFIG81 81
|
||||
#define REGMAP_ADDR_CONFIG82 82
|
||||
#define REGMAP_ADDR_CONFIG83 83
|
||||
#define REGMAP_ADDR_CONFIG84 84
|
||||
#define REGMAP_ADDR_CONFIG85 85
|
||||
|
||||
#define REGMAP_ADDR_CONFIG92 92
|
||||
|
||||
#define REGMAP_ADDR_CONFIG94 94
|
||||
#define REGMAP_ADDR_CONFIG95 (95)
|
||||
#define REGMAP_ADDR_CONFIG96 (96)
|
||||
#define REGMAP_ADDR_CONFIG97 (97)
|
||||
|
||||
#define REGMAP_ADDR_CONFIG100 (100)
|
||||
#define REGMAP_ADDR_CONFIG101 (101)
|
||||
#define REGMAP_ADDR_CONFIG102 (102)
|
||||
#define REGMAP_ADDR_CONFIG103 (103)
|
||||
#define REGMAP_ADDR_CONFIG104 (104)
|
||||
#define REGMAP_ADDR_CONFIG105 (105)
|
||||
#define REGMAP_ADDR_CONFIG106 (106)
|
||||
#define REGMAP_ADDR_CONFIG107 (107)
|
||||
#define REGMAP_ADDR_CONFIG108 (108)
|
||||
|
||||
#define REGMAP_ADDR_CONFIG112 (112)
|
||||
#define REGMAP_ADDR_CONFIG116 (116)
|
||||
#define REGMAP_ADDR_CONFIG117 (117)
|
||||
|
||||
#define REGMAP_ADDR_CONFIG126 (0x7E)
|
||||
#define REGMAP_ADDR_CONFIG127 (0x7F)
|
||||
|
||||
|
||||
extern int cfg_dac38j82(uint8 txfreq, int cw);
|
||||
extern void chang_freq(uint8 radio_ctl, int freq_changed);
|
||||
extern void chang_cw(int cw_changed);
|
||||
|
||||
#endif // __DAC38J82_H__
|
||||
|
||||
|
||||
@@ -0,0 +1,19 @@
|
||||
#ifndef __DELAY_H
|
||||
#define __DELAY_H
|
||||
#include "type.h"
|
||||
|
||||
//任务延时函数,单位ms
|
||||
|
||||
void task_delay(uint32 nms);
|
||||
|
||||
void delay_us(uint32 nus);
|
||||
void delay_ms(uint32 nms);
|
||||
//uint32 check_delay_over(uint32 *ptick,uint32 cycle);
|
||||
void delay_ticks(uint32 ticks);
|
||||
|
||||
//#define delay_sec(sec) delay_ticks((sec)*SYSTICKHZ)
|
||||
|
||||
void idelay_us(uint32 nus);
|
||||
extern uint32 check_delay_over(uint32 *ptick,uint32 cycle);
|
||||
#endif
|
||||
|
||||
Executable
+239
@@ -0,0 +1,239 @@
|
||||
#ifndef _DPD_PROC_H_
|
||||
#define _DPD_PROC_H_
|
||||
|
||||
#include "type.h"
|
||||
|
||||
#define DPD_LOG_ENABLE 1
|
||||
#define DPD_LOG_FILE "/aw/anywave/dpd_log/log"
|
||||
|
||||
#define FPGA_ADDR_DPD_LOG_TRIG 0x15
|
||||
//----Write Only--------------
|
||||
//ok
|
||||
#define FPGA_ADDR_DPD_CTRL1 0x20
|
||||
#define FPGA_ADDR_DPD_CTRL2 0x21
|
||||
#define FPGA_ADDR_DPD_CTRL3 0x22
|
||||
//ok
|
||||
#define FPGA_ADDR_DPD_IQB_UPD 0x23
|
||||
#define FPGA_ADDR_DPD_CFG_STEP 0x24
|
||||
|
||||
|
||||
//wpp
|
||||
#define FPGA_ADDR_WPP_EN_CLR 0x0d
|
||||
#define FPGA_ADDR_WPP_TH_L 0x0e
|
||||
#define FPGA_ADDR_WPP_TH_H 0x0f
|
||||
|
||||
#define MASK_WPP_ENABLE (1)
|
||||
#define MASK_WPP_CLR (1<<1)
|
||||
|
||||
|
||||
//#define FPGA_ADDR_DPD_SYNCOFFSET ??
|
||||
|
||||
#define FPGA_ADDR_DPD_TEST_L 0x02
|
||||
#define FPGA_ADDR_DPD_TEST_H 0x03
|
||||
|
||||
//----Read Only--------------
|
||||
#define FPGA_ADDR_DPD_STATUS1 0x01
|
||||
|
||||
//---------------------------
|
||||
#define MASK_RFAGC_DOWN_LIMIT (1<<1)
|
||||
#define MASK_RFAGC_UP_LIMIT (1<<2)
|
||||
|
||||
#define SPI_BLK_LEN 35//Byte
|
||||
|
||||
enum{
|
||||
E_RFAGC_NORMAL=0,
|
||||
E_RFAGC_DOWN_LIMIT,
|
||||
E_RFAGC_UP_LIMIT,
|
||||
}E_AGC_ERR_CODE;
|
||||
/*
|
||||
E_RFAGC_POWER_LOW,
|
||||
E_RFAGC_POWER_HIGH,
|
||||
*/
|
||||
|
||||
//ok
|
||||
#define MASK_DPD_ERR (0x0001)
|
||||
#define MASK_DPD_PWRHIGH (0x0001<<1)
|
||||
#define MASK_DPD_PWRLOW (0x0001<<2)
|
||||
#define MASK_DPD_DAGC_TOOHIGH (0x0001<<3)
|
||||
#define MASK_DPD_DAGC_TOOLOW (0x0001<<4)
|
||||
#define MASK_DPD_ERR_ABORT (0x0001<<5)
|
||||
#define MASK_DPD_TRX_SYNC_OK (0x0001<<6)
|
||||
#define MASK_DPD_SAT_FLG (0x0001<<7)
|
||||
|
||||
//ok
|
||||
#define DPD_CTRL1_DPD_START (0x0001)
|
||||
#define DPD_CTRL1_DPD_ALLCLR (0x0001<<1)
|
||||
#define DPD_CTRL1_ALL_BYPS (0x0001<<2)
|
||||
|
||||
#define DPD_CTRL2_LIN_UPDATE (0x0001)
|
||||
#define DPD_CTRL2_NONLIN_UPDATE (0x0001<<1)
|
||||
#define DPD_CTRL2_SET_NONLIN_UDP_MOD(x) (((x)&0x03)<<2) /*01 : POLY; 10: CRST*/
|
||||
#define DPD_CTRL2_AMP_CHK (0x0001<<4)
|
||||
#define DPD_CTRL2_PRL_UPDATE (0x0001<<5)
|
||||
#define DPD_CTRL2_RXEQ_UPDATE (0x0001<<6)
|
||||
|
||||
#define DPD_CTRL2_POLYESTI_UPDATE (0x0001<<7)
|
||||
|
||||
//ok
|
||||
#define INTER_DISTORTION_SW_MAX (7)
|
||||
|
||||
|
||||
//ok
|
||||
#define DPD_CTRL3_FAGC_UPDATE (0x0001)
|
||||
#define DPD_CTRL3_FAGC_SLOWDN (0x0001<<1)
|
||||
#define DPD_CTRL3_DAGC_UPDATE (0x0001<<2)
|
||||
#define DPD_CTRL3_DAGC_SLOWDN (0x0001<<3)
|
||||
#define DPD_CTRL3_DCRM_UPDATE (0x0001<<4)
|
||||
#define DPD_CTRL3_ROT_UPDATE (0x0001<<5)
|
||||
#define DPD_CTRL3_SYNC_UPDATE (0x0001<<6)
|
||||
#define DPD_CTRL3_SYNC_RESTART (0x0001<<7)
|
||||
//ok
|
||||
#define DPD_IQB_UPDATE (0x0001)
|
||||
#define DPD_IQB_BP_MASK (0x0001<<1)
|
||||
//#define DPD_IQB_SYNC_MASK (0x0001<<2)
|
||||
#define DPD_SYNC_MODE_MASK (0x0001<<2)
|
||||
|
||||
#define DPD_RF_SEL_BEFORE (0x0001<<3)
|
||||
|
||||
#define DPD_SET_100M (0x00)
|
||||
#define DPD_SET_25M (0x01)
|
||||
|
||||
#define SET_DPDFAGC_REFPWR(x) ((x))
|
||||
#define DPD_SET_CRST_ADDR_STRUCT_2 ((0x01)<<17)
|
||||
#define DPD_SET_ERR_TH(x) (((x)&0xffff))
|
||||
#define DPD_SET_ERR_CNT_TH(x) (((x)&0xff)<<16)
|
||||
#define DPD_SET_DGAIN(x) (((x)&0xffff)<<2)
|
||||
#define DPD_SET_FIX_DLY(x) (0x8000 & ((x)&0x7ff))
|
||||
#define DPD_SET_CRST_REFAD(x) ((x)[0] | ((x)[1]<<4) | ((x)[2]<<8) | ((x)[3]<<12) | ((x)[4]<<16) | ((x)[5]<<20))
|
||||
|
||||
#define DPD_MAX_TX_AMP_SAT 65535
|
||||
//#define TX_FREQ_IN_HZ 2550000000
|
||||
|
||||
|
||||
#define DPD_SEG 5
|
||||
|
||||
#define MASK_DPD_DATA_AREA0_MODE ((1)&0xff)
|
||||
#define MASK_DPD_DATA_AREA1_MODE ((1<<1)&0xff)
|
||||
#define MASK_DPD_DATA_AREA2_MODE ((1<<2)&0xff)
|
||||
#define MASK_DPD_DATA_AREA3_MODE ((1<<3)&0xff)
|
||||
|
||||
//#define MASK_TO_FPGA_WRITE_ENABLE ((1))
|
||||
#define MASK_TO_SPI_WR_RD_ENABLE (1)
|
||||
#define MASK_TO_FPGA_REFRESH_DATA (1<<1)
|
||||
#define MASK_TO_FPGA_CHECK_CLEAR (1<<2)
|
||||
|
||||
enum{E_CHECK_FOR_RAED=0, E_CHECK_FOR_WIRTE=1};
|
||||
|
||||
typedef struct{
|
||||
u32 area_fpga_w_check;
|
||||
u32 area_fpga_r_check;
|
||||
u32 area_imx_w_check;
|
||||
u32 area_imx_r_check;
|
||||
}S_CHECK_SUM;
|
||||
|
||||
//--------------------------------------------
|
||||
|
||||
/*Add Bit Ctrl*/
|
||||
typedef struct{
|
||||
uint8 iqb_upd:1;
|
||||
uint8 iqb_bp:1;
|
||||
uint8 sync_mode:1; /* !! sync_mode 与 re_sel 相反 */
|
||||
uint8 rf_sel:1; /* !! sync_mode 与 re_sel 相反 */
|
||||
}S_DPD_REG23;
|
||||
|
||||
typedef union
|
||||
{
|
||||
S_DPD_REG23 dpd_bt;
|
||||
uint8 u8val;
|
||||
}U_DPDCTL_REG23;
|
||||
#define TSNR_FIX 3.5*100
|
||||
|
||||
enum{E_READ=0,E_WRITE=1};
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DPD_STATE_OK=0,
|
||||
DPD_STATE_ERR=0x10,
|
||||
DPD_STATE_POWER_HIGH,
|
||||
DPD_STATE_POWER_LOW,
|
||||
DPD_STATE_POWER_TOO_HIGH,
|
||||
DPD_STATE_POWER_TOO_LOW,
|
||||
DPD_STATE_ERR_OVER_RANGE,
|
||||
DPD_STATE_SYNC_OK,
|
||||
|
||||
DPD_READ_CKECK_ERR,
|
||||
DPD_WRITE_CHECK_ERR,
|
||||
|
||||
DPD_SYNC_TIMEOUT,
|
||||
DPD_CHECK_WPP_ERR_EXIT_HOLD,
|
||||
|
||||
//...
|
||||
|
||||
DPD_IDLE_ERR=0x30,
|
||||
|
||||
|
||||
DPD_PROC_EXIT = 0x99,
|
||||
DPD_UPDATING,
|
||||
DPD_SAVE_DATA = 0xAA,
|
||||
DPD_LOAD_DATA = 0xBB,
|
||||
DPD_STATUS_UPDATING = 0xff
|
||||
}E_DPD_STATE;
|
||||
|
||||
typedef enum{
|
||||
E_DPD_NSAVE_NFLITER=0x00,//0x00
|
||||
E_DPD_NSAVE_FLITER =0x01,//0x01
|
||||
E_DPD_SAVE_NFLITER =0x10,//0x10
|
||||
E_DPD_SAVE_FLITER =0x11,//0x11
|
||||
}E_CTL_DPD;//cttb_para.wh_para.ctl_dpd
|
||||
|
||||
|
||||
//
|
||||
typedef enum
|
||||
{
|
||||
E_LOAD_TO_MCU,
|
||||
E_LOAD_TO_FPGA,
|
||||
}E_DPD_CURVE_PROC;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
E_DPD_AREA0=0,
|
||||
E_DPD_AREA1,
|
||||
E_DPD_AREA2,
|
||||
E_DPD_AREA3,
|
||||
E_DPD_AREA_FIRST_4K,
|
||||
}E_DPD_CURVE_AREA;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 tx_data_iq_i;
|
||||
uint32 rx_data_iq_i;
|
||||
uint16 ob_wpp_max_i;
|
||||
uint16 txaveamp_i;
|
||||
uint16 txpow_cur_i;
|
||||
uint16 rx_dgain_i;
|
||||
uint16 rx_fgain_cw_i;
|
||||
}S_DPD_LOG_TYPE;
|
||||
|
||||
void refresh_update_dpd(void *parg,void *parv);
|
||||
int dpd_curve_proc(uint8 proc_mode);
|
||||
|
||||
void dpd_exit(void);
|
||||
void dpd_set_clr(void);
|
||||
uint8 get_fpga_dpd_check(void);
|
||||
void dpd_boot_run_init(void);
|
||||
extern void set_dpd_unit_area_auto_inc(uint8 inc_flg);
|
||||
extern void set_tsnr_update_flg(uint8 up_flg);
|
||||
extern int update_tsnr_uimd_limd(uint8 rst_flg,uint8* p_phase);
|
||||
extern uint8 get_tsnr_update_flg(void);
|
||||
extern void remote_set_dpd_clr(void);
|
||||
extern uint8 conv_adpc_err_output(uint8 raw_dpd_err);
|
||||
|
||||
extern void clear_dpd_data_file(void);
|
||||
extern void set_ab_switch(E_AB_SEL ab_val);
|
||||
extern u32 read_fpga_area_u32_check_sum(u8 check_type);
|
||||
extern void clear_check_sum(S_CHECK_SUM *parea_check);
|
||||
extern void calc_area_u32_check_sum(u32 *pcheck, u8 *pbuf, u32 len);
|
||||
extern void calc_area_check_sum(u8 *pcheck, u8 *pbuf, u32 len);
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,134 @@
|
||||
|
||||
/********************************************************************
|
||||
**dryloop通讯模块头文件
|
||||
|
||||
********************************************************************/
|
||||
#ifndef DRYLOOP_H
|
||||
#define DRYLOOP_H
|
||||
|
||||
|
||||
#define DRYLOOP_UART_DEBUG 0
|
||||
#if DRYLOOP_UART_DEBUG
|
||||
#define dryloop_printf printf
|
||||
#else
|
||||
#define dryloop_printf(p,...) do{;}while(0) //若没开启调试模式,printf定义为空
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#define MODE_SYNC 0 //异步模式 不可阻塞型
|
||||
#define MODE_ASYN 1 //同步模式 阻塞型 必须等应答后才能发下一条命令
|
||||
|
||||
#define DRYLOOP_UART_NUM (3)
|
||||
#define DRYLOOP_UART_BPS (115200)
|
||||
|
||||
#define DRYLOOP_UART_SEND_MODE MODE_ASYN //异步发送,还是同步发送
|
||||
#define DRYLOOP_UART_BUF_MAX_LEN 128
|
||||
#define DRYLOOP_UART_TIMEOUT (300/SYSTICKMS) //超时时间300ms
|
||||
|
||||
typedef enum
|
||||
{
|
||||
DRYLOOP_I2C_RF_KEY = 0X00,
|
||||
DRYLOOP_I2C_PWRDW_KEY = 0X01,
|
||||
DRYLOOP_I2C_PWRUP_KEY = 0X02,
|
||||
DRYLOOP_I2C_VER = 0X03,
|
||||
DRYLOOP_I2C_VERYY = 0X04,
|
||||
DRYLOOP_I2C_VERMM = 0X05,
|
||||
DRYLOOP_I2C_VERDD = 0X06,
|
||||
DRYLOOP_I2C_AMP_KEY = 0X07, //读取寄存器
|
||||
|
||||
//配置寄存器
|
||||
DRYLOOP_I2C_TS_LED = 0X10,
|
||||
DRYLOOP_I2C_RF_LED = 0X11,
|
||||
DRYLOOP_I2C_SYSERR_LED = 0X12,
|
||||
DRYLOOP_I2C_FWD_ADDR = 0X13
|
||||
}E_DRYLOOP_I2C_ADDRESS;
|
||||
|
||||
#define DRYLOOP_UART_COMM_HEAD (0XFA)
|
||||
typedef struct
|
||||
{
|
||||
uint8 rec[DRYLOOP_UART_BUF_MAX_LEN];
|
||||
uint8 send[DRYLOOP_UART_BUF_MAX_LEN];
|
||||
uint32 rec_index;
|
||||
BOOL rec_proc_flag;
|
||||
uint32 un_resp_flag; //未应答标志 为0时才能发新命令,发送命令置位,超时或收到应答后清零
|
||||
uint32 send_tick;
|
||||
}S_DRYLOOP_UART_BUF,*pS_DRYLOOP_UART_BUF;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
BOOL rf;
|
||||
BOOL rf_need_send;
|
||||
uint32 rf_send_tick;
|
||||
BOOL ts;
|
||||
BOOL ts_need_send;
|
||||
uint32 ts_send_tick;
|
||||
BOOL sys_err;
|
||||
BOOL sys_need_send;
|
||||
uint32 sys_send_tick;
|
||||
}S_DRYLOOP_LED_STATUS,*pS_DRYLOOP_LED_STATUS;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
BOOL rf_need_get;
|
||||
uint32 rf_get_tick;
|
||||
|
||||
BOOL power_need_get;
|
||||
uint32 power_get_tick;
|
||||
|
||||
BOOL amp_need_get;
|
||||
uint32 amp_get_tick;
|
||||
}S_DRYLOOP_GET_STATUS,*pS_DRYLOOP_GET_STATUS;
|
||||
|
||||
//__packed
|
||||
#pragma pack(1)
|
||||
typedef struct
|
||||
{
|
||||
uint8 header;
|
||||
uint8 data_len;
|
||||
uint8 cmd;
|
||||
uint8 other[100];
|
||||
}S_DRYLOOP_UART_PROTOCOL,*pS_DRYLOOP_UART_PROTOCOL;
|
||||
#pragma pack()
|
||||
|
||||
|
||||
#define DRYLOOP_UART_PROTOCOL_ANS_CMD (0X3F)
|
||||
#define DRYLOOP_UART_PROTOCOL_ANS_OK (1<<7)
|
||||
#define DRYLOOP_UART_PROTOCOL_ANS_ERR (1<<6)
|
||||
|
||||
#define DRYLOOP_UART_PROTOCOL_ERR_SUM (1)
|
||||
#define DRYLOOP_UART_PROTOCOL_ERR_UNKNOW_CMD (2)
|
||||
#define DRYLOOP_UART_PROTOCOL_ERR_RESERVE1 (3)
|
||||
#define DRYLOOP_UART_PROTOCOL_ERR_RESERVE2 (4)
|
||||
|
||||
#define DRYLOOP_TIMER_CYCLE 5
|
||||
#define DRYLOOO_CHECK_VERSION 10
|
||||
#define DRYLOOO_CHECK_CYCLE 15 // 单位tick 1tick 10ms
|
||||
#define DRYLOOP_SEND_CYCLE 9*10
|
||||
|
||||
#define DRYLOOP_SEND_CHECK_CYCLE 500 //单位tick 5s 周期性的发送状态周期
|
||||
#define DRYLOOP_GET_CHECK_CYCLE 50 //单位tick 500ms 周期性的获取状态周期
|
||||
|
||||
//由数据区长度获取整个报文的长度
|
||||
#define GET_UART_LEN_BY_DATA_LEN(data_len,frame_len) \
|
||||
do{\
|
||||
(frame_len) = (data_len)+5;\
|
||||
}while(0)
|
||||
|
||||
|
||||
extern S_DRYLOOP dryloop_status;
|
||||
|
||||
extern void dryloop_init(void);
|
||||
extern void dryloop_check(void);
|
||||
extern void dryloop_send(void);
|
||||
extern void dryloop_reset(void);
|
||||
extern void dryloop_process(void);
|
||||
extern void dryloop_amp_on(BOOL flag);
|
||||
extern void dryloop_uart_buf_check(uint8* pbuf,uint32 len);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/***************************END*************************************/
|
||||
|
||||
Executable
+559
@@ -0,0 +1,559 @@
|
||||
#ifndef __EEPROM_H_
|
||||
#define __EEPROM_H_
|
||||
#include "log_task.h"
|
||||
|
||||
|
||||
#define E2PROM_MAGIC_WORD 0XA6 //ldl a6->a8
|
||||
#define E2PROM_MAGIC_WORD_BAK 0X55
|
||||
|
||||
#define PSIP_PER_E2_SIZE 16
|
||||
|
||||
typedef enum
|
||||
{
|
||||
EEPROM_DEFAULT_PARAM_ADDR=0,
|
||||
EEPROM_STANDARD_ADDR,
|
||||
EERPOM_RESET_TIME_ADDR,
|
||||
EERPOM_RESET_TIME_ADDR_XXX = EERPOM_RESET_TIME_ADDR+2,
|
||||
|
||||
EEPROM_OCXO_ADDR = 0x30, //SYStem para
|
||||
EEPROM_ASI_ADDR,
|
||||
EEPROM_SYS_INPUT,
|
||||
EEPROM_DPD_ADDR,
|
||||
EEPROM_NET_ADDR,
|
||||
EEPROM_GPS_ADDR,
|
||||
EEPROM_RFOUT_DATA_ADDR,
|
||||
EEPROM_TEST_SIG_ADDR,
|
||||
EEPROM_CTRL_ADDR,
|
||||
EEPROM_GPR1_ADDR,
|
||||
EEPROM_GPR2_ADDR,
|
||||
EEPROM_MON_ADDR,
|
||||
EEPROM_MODE_ADDR,
|
||||
EEPROM_SNTP_ENABLE, // sntp enable
|
||||
EEPROM_SNTP_SIP1, // sntp server ip
|
||||
EEPROM_SNTP_SIP2,
|
||||
EEPROM_SNTP_SIP3,
|
||||
EEPROM_SNTP_SIP4,
|
||||
EEPROM_AGC_ATT,
|
||||
EEPROM_ADRV9009_ATT_H,//2
|
||||
EEPROM_ADRV9009_ATT_L,
|
||||
EEPROM_ADRV9009_ORX_MANU_GAIN,
|
||||
EEPROM_SPEC_ENABLE,
|
||||
|
||||
|
||||
EEPROM_CHANNEL_ADDR = 0x50, //RF 相关
|
||||
EEPROM_RXCHANNEL_ADDR,
|
||||
EEPROM_HZ_UIH_ADDR,
|
||||
EEPROM_HZ_UIM_ADDR,
|
||||
EEPROM_HZ_UIL_ADDR,
|
||||
EEPROM_POWER_UIH_ADDR,
|
||||
EEPROM_POWER_UIL_ADDR,
|
||||
EEPROM_POWER_ADDRH, //未用
|
||||
EEPROM_POWER_ADDRL, //未用
|
||||
EEPROM_0DBFLAGH_ADDR,
|
||||
EEPROM_0DBFLAGL_ADDR,
|
||||
EEPROM_PARA_CW_ADDR,
|
||||
EEPROM_RF_ADDR,
|
||||
EEPROM_AGC_ADDR,
|
||||
EEPROM_AGC_standard_addrH, //未用
|
||||
EEPROM_AGC_standard_addrL, //未用
|
||||
EEPROM_PWRVREF_O_HADDR, //功率参考电平地址，高1字节
|
||||
EEPROM_PWRVREF_O_LADDR, //低1字节
|
||||
EEPROM_PWRVREF_VLDO_ADDR, //参考电平有效指示
|
||||
EEPROM_REF_AGC_ADDR, //未用
|
||||
EEPROM_REF_AGC_WEB_ADDR, //未用
|
||||
EEPROM_RF_TX,
|
||||
EEPROM_TEST_PVD,
|
||||
|
||||
//DPD
|
||||
EEPROM_DPD_GAIN_LIMIT_L=0x6E,
|
||||
EEPROM_DPD_GAIN_LIMIT_H=0x6F,
|
||||
EEPROM_DPD_DISTORTION_SW=0x70,
|
||||
EEPROM_DPD_AGC_PWR_L,
|
||||
EEPROM_DPD_AGC_PWR_H,
|
||||
EEPROM_DPD_ERR_TH_L,
|
||||
EEPROM_DPD_ERR_TH_H,
|
||||
EEPROM_DPD_ERR_CNT_TH,
|
||||
EEPROM_DPD_AMP_SAT_TH_L,
|
||||
EEPROM_DPD_AMP_SAT_TH_H,
|
||||
EEPROM_DPD_TEST_L,
|
||||
EEPROM_DPD_TEST_H,
|
||||
EEPROM_DPD_STEP,//0x7A
|
||||
EEPROM_DPD_FLASH_VALID,
|
||||
EEPROM_DPD_PHASE6_MINUTE,
|
||||
EEPROM_DPD_WPP_TH_L,
|
||||
EEPROM_DPD_WPP_TH_H,//0x7e
|
||||
EEPROM_NOTICE_PART_END,//0x7f
|
||||
|
||||
|
||||
EEPROM_BPS_ADDR = 0x80,
|
||||
EEPROM_ID_ADDR,
|
||||
EEPROM_PA_LINK_CTRL_RF_ADDR,
|
||||
EEPROM_DPD_CTL_TST,
|
||||
|
||||
EEPROM_NET_DELAY_ADDR = 0x90,
|
||||
EEPROM_NET_TXID_ADDR = EEPROM_NET_DELAY_ADDR+3,
|
||||
EEPROM_NET_NETID_ADDR,
|
||||
EEPROM_NET_BRATIO_ADDR,
|
||||
|
||||
|
||||
EEPROM_MODE_SYNC,
|
||||
EEPROM_MODE_TCP_C,
|
||||
EEPROM_MODE_ZP1F,
|
||||
|
||||
|
||||
EEPROM_PCR_ADDR = 0xb0, //ad1
|
||||
EEPROM_PCR2_ADDR,
|
||||
EEPROM_SLOW_UP_ADDR,
|
||||
EEPROM_SLOW_DOWN_ADDR,
|
||||
EEPROM_CUST_POWER_MAX_ADDR_H,
|
||||
EEPROM_CUST_POWER_MAX_ADDR_L,
|
||||
EEPROM_ASIOUT_ADDR,
|
||||
|
||||
|
||||
EEPROM_M_TS_ADDR =0xc0,
|
||||
EEPROM_M_10M_ADDR,
|
||||
EEPROM_M_1PPS_ADDR,
|
||||
EEPROM_M_DLY_ADDR,
|
||||
EEPROM_M_DLY_ADDR_MM,
|
||||
EEPROM_M_DLY_ADDR_SS,
|
||||
|
||||
|
||||
EEPROM_ADVANCED_RATEA_ADDR = 0xd0,
|
||||
EEPROM_ADVANCED_MAPA_ADDR,
|
||||
EEPROM_ADVANCED_TIA_ADDR,
|
||||
EEPROM_ADVANCED_RATEB_ADDR,
|
||||
EEPROM_ADVANCED_MAPB_ADDR,
|
||||
EEPROM_ADVANCED_TIB_ADDR,
|
||||
EEPROM_ADVANCED_RATEC_ADDR,
|
||||
EEPROM_ADVANCED_MAPC_ADDR,
|
||||
EEPROM_ADVANCED_TIC_ADDR,
|
||||
|
||||
EEPROM_AD3_RC_CMD = 0xE0,
|
||||
EEPROM_AD3_FWD_CAL,
|
||||
EEPROM_AD3_POWER_REF_H,
|
||||
EEPROM_AD3_POWER_REF_L,
|
||||
EEPROM_AD3_TYPE,
|
||||
EEPROM_AD3_MPTV,
|
||||
EEPROM_AD3_MAX_PWR_H,
|
||||
EEPROM_AD3_MAX_PWR_L,
|
||||
|
||||
EEPROM_AD5_RSNR_ADDR = 0XF0,
|
||||
EEPROM_AD5_RIMD_ADDR,
|
||||
EEPROM_AD5_TIME_ADDR,
|
||||
EEPROM_AD5_TSNR_ADDR,
|
||||
EEPROM_AD5_IMD_ADDR,
|
||||
EEPROM_AD4_ATSNR_ADDR,
|
||||
EEPROM_AD4_AIMD_ADDR,
|
||||
EEPROM_AD5_DPD_ADDR,
|
||||
|
||||
|
||||
EEPROM_RESVER1=0X100,
|
||||
EEPROM_SN_H2,
|
||||
EEPROM_SN_H1,
|
||||
EEPROM_SN_L4,
|
||||
EEPROM_SN_L3,
|
||||
EEPROM_SN_L2,
|
||||
EEPROM_SN_L1,
|
||||
EEPROM_KEY_H2, //GUI_KEY
|
||||
EEPROM_KEY_H1,
|
||||
EEPROM_KEY_L2,
|
||||
EEPROM_KEY_L1,
|
||||
|
||||
EEPROM_EAS_KEY1,
|
||||
EEPROM_EAS_KEY2,
|
||||
EEPROM_EAS_KEY3,
|
||||
EEPROM_EAS_KEY4,
|
||||
|
||||
EEPROM_RESVER2=EEPROM_EAS_KEY4+0X8,
|
||||
|
||||
EEPROM_PA_IP4_ADDR,
|
||||
EEPROM_PA_GATEWAY_ADDR = EEPROM_PA_IP4_ADDR+4,
|
||||
EEPROM_PA_NETMASK_ADDR = EEPROM_PA_GATEWAY_ADDR+4,
|
||||
EEPROM_EAS_KEY_MAGIC = EEPROM_PA_NETMASK_ADDR+4,
|
||||
|
||||
|
||||
//工厂菜单,每屏预留32字节
|
||||
EEPROM_WB_ADDR = 0x130,
|
||||
EEPROM_WC_ADDR = EEPROM_WB_ADDR+0X20,
|
||||
EEPROM_WD_ADDR = EEPROM_WC_ADDR+0X20,
|
||||
EEPROM_WE_ADDR = EEPROM_WD_ADDR+0X20,
|
||||
EEPROM_WF_ADDR = EEPROM_WE_ADDR+0X20,
|
||||
EEPROM_WH_ADDR = EEPROM_WF_ADDR+0X20,
|
||||
EEPROM_RI_ADDR = EEPROM_WH_ADDR+0X20,
|
||||
EEPROM_WJ_ADDR = EEPROM_RI_ADDR+0X20,
|
||||
EEPROM_WK_ADDR = EEPROM_WJ_ADDR+0X20,
|
||||
EEPROM_WL_ADDR = EEPROM_WK_ADDR+0x20,
|
||||
|
||||
|
||||
//工厂菜单当前WK为0x220, 工厂菜单power定义到0x300,中间预留部分空间
|
||||
EEPROM_CH1_POWER_ADDR = 0x300, //约60多字节
|
||||
EEPROM_CH2_POWER_ADDR = 0X400, //1.42(3X+)功率控制字
|
||||
|
||||
EEPROM_PSTS_TS_EDIT = 0x600, //开关
|
||||
EEPROM_PSTS_TSIDH, //tsid
|
||||
EEPROM_PSTS_TSIDL,
|
||||
EEPROM_PSTS_CHANEL, //channel total
|
||||
EEPROM_PSTS_UP_FLAG,
|
||||
EEPROM_PSTS_CH_START,
|
||||
EEPROM_PSTS_CH_END=EEPROM_PSTS_CH_START+PSIP_PER_E2_SIZE*24, //实际每个需要16字节,一共有13个
|
||||
EEPROM_PSIP_KEY_H2,
|
||||
EEPROM_PSIP_KEY_H1,
|
||||
EEPROM_PSIP_KEY_L2,
|
||||
EEPROM_PSIP_KEY_L1,
|
||||
EEPROM_PSIP_KEY_MAGIC,
|
||||
EEPROM_WD_SPE_ADDR,
|
||||
EEPROM_WEB_TITLE_ADDR, //共16字节
|
||||
EEPROM_NTP_SWITCH=EEPROM_WEB_TITLE_ADDR+16,
|
||||
EEPROM_NTP_SERVER_IP,// 4
|
||||
|
||||
EEPROM_USER_INFO_MAGIC = 0X1000, //用户名是否配置 用户名,用户密码 各预留32字节
|
||||
EEPROM_USER_INFO,
|
||||
EEPROM_USER_INFO_NM,
|
||||
EEPROM_USER_INFO_PW = EEPROM_USER_INFO_NM+0X20,
|
||||
|
||||
|
||||
EEPROM_ADPC_BEGIN1_ADDR = 0X7000,
|
||||
EEPROM_ADPC_END1_ADDR = 0X75FF, //apdc 线性区地址,预留1K
|
||||
|
||||
|
||||
/*备份参数标记段*/
|
||||
EEPROM_FQPW_CHECK_FLAG=0x7ED0,// 频点，功率标记位
|
||||
EEPROM_DNS_ADDR, //
|
||||
|
||||
EEPROM_IP4_ADDR = 0x7f00, //网络通讯地址相关的统一放在此处,顺序也需一样,所有平台均是,否则远程升级代码不好统一.
|
||||
EEPROM_GATEWAY_ADDR =EEPROM_IP4_ADDR+4,
|
||||
EEPROM_NETMASK_ADDR =EEPROM_GATEWAY_ADDR+4,
|
||||
EEPROM_NET_MAC_H = EEPROM_NETMASK_ADDR+4,
|
||||
EEPROM_NET_MAC_M,
|
||||
EEPROM_NET_MAC_L,
|
||||
|
||||
/* TSOIP 1 */
|
||||
EEPROM_IP_DIRECT_ADDR = EEPROM_NET_MAC_L+1, //ip方向
|
||||
EEPROM_MULTI_ADDR = EEPROM_IP_DIRECT_ADDR+1,
|
||||
EEPROM_PORT_ADDR = EEPROM_MULTI_ADDR+4,
|
||||
EEPROM_UDP_RTP_ADDR = EEPROM_PORT_ADDR+2,
|
||||
EEPROM_PAK_LEN_ADDR = EEPROM_UDP_RTP_ADDR+1,
|
||||
EEPROM_RECE_TYPE_ADDR=EEPROM_PAK_LEN_ADDR+1,
|
||||
EEPROM_FEC_ADDR = EEPROM_RECE_TYPE_ADDR+1,
|
||||
EEPROM_ROW_ADDR = EEPROM_FEC_ADDR+2,
|
||||
EEPROM_COL_ADDR = EEPROM_ROW_ADDR+2,
|
||||
EEPROM_FEC_DLY_ADDR = EEPROM_COL_ADDR+2,
|
||||
EEPROM_DEST_IP_ADDR = EEPROM_FEC_DLY_ADDR+2,
|
||||
EEPROM_DEST_PORT_ADDR = EEPROM_DEST_IP_ADDR+4,
|
||||
EEPROM_IP2TS_SELECT_TO_FPGA = EEPROM_DEST_PORT_ADDR+2,//h20190221
|
||||
EEPROM_SFN_MFN_SEL = EEPROM_IP2TS_SELECT_TO_FPGA+1, //h20211201
|
||||
EEPROM_PHY_TYPE = EEPROM_SFN_MFN_SEL+1, //配置的PHY类型 0:百兆 1:千兆
|
||||
EEPROM_TSOIP_1_IP4_ADDR = EEPROM_PHY_TYPE+1,
|
||||
EEPROM_TSOIP_1_MASK_ADDR = EEPROM_TSOIP_1_IP4_ADDR+4,
|
||||
EEPROM_TSOIP_1_GATEWAY_ADDR = EEPROM_TSOIP_1_MASK_ADDR+4,
|
||||
|
||||
/* TSOIP 2 */
|
||||
EEPROM_TSOIP_2_IP4_ADDR = EEPROM_TSOIP_1_GATEWAY_ADDR+4,
|
||||
EEPROM_TSOIP_2_MASK_ADDR = EEPROM_TSOIP_2_IP4_ADDR+4,
|
||||
EEPROM_TSOIP_2_GATEWAY_ADDR = EEPROM_TSOIP_2_MASK_ADDR+4,
|
||||
EEPROM_IP_DIRECT_2_ADDR = EEPROM_TSOIP_2_GATEWAY_ADDR+4, //ip方向
|
||||
EEPROM_MULTI_2_ADDR = EEPROM_IP_DIRECT_2_ADDR+1,
|
||||
EEPROM_PORT_2_ADDR = EEPROM_MULTI_2_ADDR+4,
|
||||
EEPROM_UDP_RTP_2_ADDR = EEPROM_PORT_2_ADDR+2,
|
||||
EEPROM_PAK_LEN_2_ADDR = EEPROM_UDP_RTP_2_ADDR+1,
|
||||
EEPROM_RECE_TYPE_2_ADDR=EEPROM_PAK_LEN_2_ADDR+1,
|
||||
EEPROM_FEC_2_ADDR = EEPROM_RECE_TYPE_2_ADDR+1,
|
||||
EEPROM_ROW_2_ADDR = EEPROM_FEC_2_ADDR+2,
|
||||
EEPROM_COL_2_ADDR = EEPROM_ROW_2_ADDR+2,
|
||||
EEPROM_FEC_DLY_2_ADDR = EEPROM_COL_2_ADDR+2,
|
||||
EEPROM_DEST_IP_2_ADDR = EEPROM_FEC_DLY_2_ADDR+2,
|
||||
EEPROM_DEST_PORT_2_ADDR = EEPROM_DEST_IP_2_ADDR+4,
|
||||
EEPROM_IP2TS_SELECT_TO_FPGA_2 = EEPROM_DEST_PORT_2_ADDR+2,//h20190221
|
||||
EEPROM_SFN_MFN_SEL_2 = EEPROM_IP2TS_SELECT_TO_FPGA_2+1, //h20211201
|
||||
EEPROM_PHY_TYPE_2 = EEPROM_SFN_MFN_SEL_2+1, //配置的PHY类型 0:百兆 1:千兆
|
||||
|
||||
EEPROM_TSOIP1_MAC_H = EEPROM_PHY_TYPE_2+1, // tsoip1 的mac
|
||||
EEPROM_TSOIP1_MAC_M = EEPROM_TSOIP1_MAC_H+1,
|
||||
EEPROM_TSOIP1_MAC_L = EEPROM_TSOIP1_MAC_M+1,
|
||||
EEPROM_TSOIP2_MAC_H = EEPROM_TSOIP1_MAC_L+1, // tsoip2 的mac
|
||||
EEPROM_TSOIP2_MAC_M = EEPROM_TSOIP2_MAC_H+1,
|
||||
EEPROM_TSOIP2_MAC_L = EEPROM_TSOIP2_MAC_M+1,
|
||||
|
||||
|
||||
|
||||
|
||||
EEPROM_END_ADDRESS = 0X7FFF,
|
||||
}EEPROM_ADDR;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
E2_DEFAULT_PARAM_ADDR=0,
|
||||
E2_AD3_POWER_REF_H,
|
||||
E2_AD3_POWER_REF_L,
|
||||
E2_PWRVREF_O_HADDR, //功率参考电平地址
|
||||
E2_PWRVREF_O_LADDR,
|
||||
E2_PWRVREF_VLDO_ADDR, //参考电平有效指示
|
||||
E2_AGC_ADDR,
|
||||
E2_POWER_UIH_ADDR, //rf power
|
||||
E2_POWER_UIL_ADDR,
|
||||
E2_0DBFLAGH_ADDR, //rf db
|
||||
E2_0DBFLAGL_ADDR,
|
||||
|
||||
/*以上为普通数据增加E2地址段*/
|
||||
|
||||
E2_AD3_POWER_REF_H_ATV=0X20,
|
||||
E2_AD3_POWER_REF_L_ATV,
|
||||
E2_PWRVREF_O_HADDR_ATV, //功率参考电平地址
|
||||
E2_PWRVREF_O_LADDR_ATV,
|
||||
E2_PWRVREF_VLDO_ADDR_ATV, //参考电平有效指示
|
||||
E2_AGC_ADDR_ATV,
|
||||
E2_POWER_UIH_ADDR_ATV, //rf power
|
||||
E2_POWER_UIL_ADDR_ATV,
|
||||
E2_0DBFLAGH_ADDR_ATV, //rf db
|
||||
E2_0DBFLAGL_ADDR_ATV,
|
||||
|
||||
E2_ADPC_BEGIN1_ADDR =0x1000,
|
||||
E2_ADPC_END1_ADDR =0X15FF, //adpc1 当前大约有近400字节 空间保留2K
|
||||
E2_ADPC_BEGIN1_ADDR_ATV =0X1600,
|
||||
E2_ADPC_END1_ADDR_ATV =0x1BFF,
|
||||
/*以上为普通数据增加E2地址段*/
|
||||
|
||||
|
||||
E2_SYSTEM_LOG_VALID_ADDRESS = 5*1024-3,
|
||||
E2_SYSTEM_LOG_CURRENT_INDEX_ADDRESS,
|
||||
E2_SYSTEM_LOG_CURRENT_NUM_ADDRESS,
|
||||
E2_SYSTEM_LOG_START_ADDRESS, //此处必须64字节对齐
|
||||
E2_SYSTEM_LOG_END_ADDRESS = E2_SYSTEM_LOG_START_ADDRESS+LOG_MAX_RECORD_NUM*LOG_PER_RECORD_SIZE-1,
|
||||
|
||||
E2_SYSTEM_LOG_VALID_ADDRESS_ATV = E2_SYSTEM_LOG_END_ADDRESS+1,
|
||||
E2_SYSTEM_LOG_CURRENT_INDEX_ADDRESS_ATV,
|
||||
E2_SYSTEM_LOG_CURRENT_NUM_ADDRESS_ATV,
|
||||
E2_SYSTEM_LOG_START_ADDRESS_ATV, //此处必须64字节对齐
|
||||
E2_SYSTEM_LOG_END_ADDRESS_ATV = E2_SYSTEM_LOG_START_ADDRESS_ATV+LOG_MAX_RECORD_NUM*LOG_PER_RECORD_SIZE-1,
|
||||
|
||||
|
||||
|
||||
|
||||
//备份暂定起始地址
|
||||
BAK_E2_DEFAULT_PARAM_ADDR=0x6700, //除载漏外参数,可用256字节
|
||||
BAK_EEPROM_POWER_UIH_ADDR,
|
||||
BAK_EEPROM_POWER_UIL_ADDR,
|
||||
BAK_EEPROM_0DBFLAGH_ADDR,
|
||||
BAK_EEPROM_0DBFLAGL_ADDR,
|
||||
BAK_E2_POWER_UIH_ADDR, //rf power
|
||||
BAK_E2_POWER_UIL_ADDR,
|
||||
BAK_E2_0DBFLAGH_ADDR, //rf db
|
||||
BAK_E2_0DBFLAGL_ADDR,
|
||||
BAK_EEPROM_CHANNEL_ADDR,
|
||||
BAK_EEPROM_RXCHANNEL_ADDR,
|
||||
|
||||
END_BAK_EEPROM_ADDR, //不要删掉
|
||||
|
||||
BAK_E2_DEFAULT_PARAM_ADDR_ATV=0x6800,
|
||||
BAK_EEPROM_POWER_UIH_ADDR_ATV,
|
||||
BAK_EEPROM_POWER_UIL_ADDR_ATV,
|
||||
BAK_EEPROM_0DBFLAGH_ADDR_ATV,
|
||||
BAK_EEPROM_0DBFLAGL_ADDR_ATV,
|
||||
BAK_E2_POWER_UIH_ADDR_ATV, //rf power
|
||||
BAK_E2_POWER_UIL_ADDR_ATV,
|
||||
BAK_E2_0DBFLAGH_ADDR_ATV, //rf db
|
||||
BAK_E2_0DBFLAGL_ADDR_ATV,
|
||||
BAK_EEPROM_CHANNEL_ADDR_ATV,
|
||||
BAK_EEPROM_RXCHANNEL_ADDR_ATV,
|
||||
|
||||
END_BAK_EEPROM_ADDR_ATV, //不要删掉
|
||||
|
||||
|
||||
BAK_EEPROM_PARA_END=0x7FFF,
|
||||
}EEPROM2_ADDR;
|
||||
|
||||
|
||||
#define E3_BACKUP_PER_SCREEN_SIZE 64 //每屏参数预留64字节,刚好1页
|
||||
typedef enum
|
||||
{
|
||||
//出厂参数保存地址
|
||||
E3_BACKUP_PARA_PREF_VALID = 0,
|
||||
E3_BACKUP_PARA_CUST_VALID,
|
||||
E3_BACKUP_PARA_PREF_VALID_ATV,
|
||||
E3_BACKUP_PARA_CUST_VALID_ATV,
|
||||
|
||||
E3_BACKUP_PARA_PREF_SYSTEM = 64, //页对齐
|
||||
E3_BACKUP_PARA_PREF_RF = E3_BACKUP_PARA_PREF_SYSTEM+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_NET = E3_BACKUP_PARA_PREF_RF+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_MODE = E3_BACKUP_PARA_PREF_NET+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_CONFIG = E3_BACKUP_PARA_PREF_MODE+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_1 = E3_BACKUP_PARA_PREF_CONFIG+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_2 = E3_BACKUP_PARA_1+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_3 = E3_BACKUP_PARA_2+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_PREF_AD1 = E3_BACKUP_PARA_3+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD2 = E3_BACKUP_PARA_PREF_AD1+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD3 = E3_BACKUP_PARA_PREF_AD2+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD4 = E3_BACKUP_PARA_PREF_AD3+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD5 = E3_BACKUP_PARA_PREF_AD4+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD6 = E3_BACKUP_PARA_PREF_AD5+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD7 = E3_BACKUP_PARA_PREF_AD6+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD8 = E3_BACKUP_PARA_PREF_AD7+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD9 = E3_BACKUP_PARA_PREF_AD8+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD10 = E3_BACKUP_PARA_PREF_AD9+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_PREF_WB = E3_BACKUP_PARA_PREF_AD10+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WC = E3_BACKUP_PARA_PREF_WB+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WD = E3_BACKUP_PARA_PREF_WC+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WE = E3_BACKUP_PARA_PREF_WD+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WF = E3_BACKUP_PARA_PREF_WE+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_RG = E3_BACKUP_PARA_PREF_WF+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WH = E3_BACKUP_PARA_PREF_RG+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WI = E3_BACKUP_PARA_PREF_WH+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WJ = E3_BACKUP_PARA_PREF_WI+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WK = E3_BACKUP_PARA_PREF_WJ+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WL = E3_BACKUP_PARA_PREF_WK+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WM = E3_BACKUP_PARA_PREF_WL+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
|
||||
E3_RESERVED1_START = E3_BACKUP_PARA_PREF_WM+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_RESERVED1_END =E3_RESERVED1_START+512-1, //暂时中间预留512空间,方便后续扩充
|
||||
|
||||
E3_BACKUP_PARA_POWER_PREF_START,
|
||||
E3_BACKUP_PARA_POWER_PREF_END = E3_BACKUP_PARA_POWER_PREF_START+1024-1, //功率预留1024 可能有不同带宽类型的参数
|
||||
|
||||
E3_RESERVED2_START,
|
||||
E3_RESERVED2_END =E3_RESERVED2_START+1024-1, //暂时中间预留1K空间
|
||||
|
||||
//两者定义类型保持一致
|
||||
//客户手动保存参数地址
|
||||
|
||||
E3_BACKUP_PARA_CUST_SYSTEM,
|
||||
E3_BACKUP_PARA_CUST_RF = E3_BACKUP_PARA_CUST_SYSTEM+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_NET = E3_BACKUP_PARA_CUST_RF+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_MODE = E3_BACKUP_PARA_CUST_NET+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_CONFIG = E3_BACKUP_PARA_CUST_MODE+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST1 = E3_BACKUP_PARA_CUST_CONFIG+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST2 = E3_BACKUP_PARA_CUST1+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST3 = E3_BACKUP_PARA_CUST2+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_CUST_AD1 = E3_BACKUP_PARA_CUST_CONFIG+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD2 = E3_BACKUP_PARA_CUST_AD1+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD3 = E3_BACKUP_PARA_CUST_AD2+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD4 = E3_BACKUP_PARA_CUST_AD3+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD5 = E3_BACKUP_PARA_CUST_AD4+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD6 = E3_BACKUP_PARA_CUST_AD5+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD7 = E3_BACKUP_PARA_CUST_AD6+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD8 = E3_BACKUP_PARA_CUST_AD7+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD9 = E3_BACKUP_PARA_CUST_AD8+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD10 = E3_BACKUP_PARA_CUST_AD9+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_CUST_WB = E3_BACKUP_PARA_CUST_AD5+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WC = E3_BACKUP_PARA_CUST_WB+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WD = E3_BACKUP_PARA_CUST_WC+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WE = E3_BACKUP_PARA_CUST_WD+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WF = E3_BACKUP_PARA_CUST_WE+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_RG = E3_BACKUP_PARA_CUST_WF+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WH = E3_BACKUP_PARA_CUST_RG+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WI = E3_BACKUP_PARA_CUST_WH+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WJ = E3_BACKUP_PARA_CUST_WI+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WK = E3_BACKUP_PARA_CUST_WJ+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WL = E3_BACKUP_PARA_CUST_WK+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WM = E3_BACKUP_PARA_CUST_WL+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_RESERVED3_START = E3_BACKUP_PARA_CUST_WM+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_RESERVED3_END =E3_RESERVED3_START+512-1, //暂时中间预留512空间
|
||||
|
||||
E3_BACKUP_PARA_POWER_CUST_START,
|
||||
E3_BACKUP_PARA_POWER_CUST_END = E3_BACKUP_PARA_POWER_CUST_START+1024-1, //功率预留1024 可能有不同带宽类型的参数
|
||||
|
||||
|
||||
E3_BACKUP_PARA_PREF_SYSTEM_ATV = E3_BACKUP_PARA_POWER_CUST_END+1, //页对齐
|
||||
E3_BACKUP_PARA_PREF_RF_ATV = E3_BACKUP_PARA_PREF_SYSTEM_ATV+E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_NET_ATV = E3_BACKUP_PARA_PREF_RF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_MODE_ATV = E3_BACKUP_PARA_PREF_NET_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_CONFIG_ATV = E3_BACKUP_PARA_PREF_MODE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_1_ATV = E3_BACKUP_PARA_PREF_CONFIG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_2_ATV = E3_BACKUP_PARA_1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_3_ATV = E3_BACKUP_PARA_2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_PREF_AD1_ATV = E3_BACKUP_PARA_3_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD2_ATV = E3_BACKUP_PARA_PREF_AD1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD3_ATV = E3_BACKUP_PARA_PREF_AD2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD4_ATV = E3_BACKUP_PARA_PREF_AD3_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD5_ATV = E3_BACKUP_PARA_PREF_AD4_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD6_ATV = E3_BACKUP_PARA_PREF_AD5_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD7_ATV = E3_BACKUP_PARA_PREF_AD6_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD8_ATV = E3_BACKUP_PARA_PREF_AD7_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD9_ATV = E3_BACKUP_PARA_PREF_AD8_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_AD10_ATV = E3_BACKUP_PARA_PREF_AD9_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_PREF_WB_ATV = E3_BACKUP_PARA_PREF_AD10_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WC_ATV = E3_BACKUP_PARA_PREF_WB_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WD_ATV = E3_BACKUP_PARA_PREF_WC_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WE_ATV = E3_BACKUP_PARA_PREF_WD_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WF_ATV = E3_BACKUP_PARA_PREF_WE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_RG_ATV = E3_BACKUP_PARA_PREF_WF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WH_ATV = E3_BACKUP_PARA_PREF_RG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WI_ATV = E3_BACKUP_PARA_PREF_WH_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WJ_ATV = E3_BACKUP_PARA_PREF_WI_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WK_ATV = E3_BACKUP_PARA_PREF_WJ_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WL_ATV = E3_BACKUP_PARA_PREF_WK_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_PREF_WM_ATV = E3_BACKUP_PARA_PREF_WL_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
|
||||
E3_RESERVED1_START_ATV = E3_BACKUP_PARA_PREF_WM_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_RESERVED1_END_ATV =E3_RESERVED1_START_ATV +512-1, //暂时中间预留512空间,方便后续扩充
|
||||
|
||||
E3_BACKUP_PARA_POWER_PREF_START_ATV ,
|
||||
E3_BACKUP_PARA_POWER_PREF_END_ATV = E3_BACKUP_PARA_POWER_PREF_START_ATV +1024-1, //功率预留1024 可能有不同带宽类型的参数
|
||||
|
||||
E3_RESERVED2_START_ATV ,
|
||||
E3_RESERVED2_END_ATV =E3_RESERVED2_START_ATV +1024-1, //暂时中间预留1K空间
|
||||
|
||||
//两者定义类型保持一致
|
||||
//客户手动保存参数地址
|
||||
|
||||
E3_BACKUP_PARA_CUST_SYSTEM_ATV ,
|
||||
E3_BACKUP_PARA_CUST_RF_ATV = E3_BACKUP_PARA_CUST_SYSTEM_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_NET_ATV = E3_BACKUP_PARA_CUST_RF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_MODE_ATV = E3_BACKUP_PARA_CUST_NET_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_CONFIG_ATV = E3_BACKUP_PARA_CUST_MODE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST1_ATV = E3_BACKUP_PARA_CUST_CONFIG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST2_ATV = E3_BACKUP_PARA_CUST1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST3_ATV = E3_BACKUP_PARA_CUST2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_CUST_AD1_ATV = E3_BACKUP_PARA_CUST_CONFIG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD2_ATV = E3_BACKUP_PARA_CUST_AD1_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD3_ATV = E3_BACKUP_PARA_CUST_AD2_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD4_ATV = E3_BACKUP_PARA_CUST_AD3_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD5_ATV = E3_BACKUP_PARA_CUST_AD4_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD6_ATV = E3_BACKUP_PARA_CUST_AD5_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD7_ATV = E3_BACKUP_PARA_CUST_AD6_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD8_ATV = E3_BACKUP_PARA_CUST_AD7_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD9_ATV = E3_BACKUP_PARA_CUST_AD8_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_AD10_ATV = E3_BACKUP_PARA_CUST_AD9_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_BACKUP_PARA_CUST_WB_ATV = E3_BACKUP_PARA_CUST_AD5_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WC_ATV = E3_BACKUP_PARA_CUST_WB_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WD_ATV = E3_BACKUP_PARA_CUST_WC_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WE_ATV = E3_BACKUP_PARA_CUST_WD_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WF_ATV = E3_BACKUP_PARA_CUST_WE_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_RG_ATV = E3_BACKUP_PARA_CUST_WF_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WH_ATV = E3_BACKUP_PARA_CUST_RG_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WI_ATV = E3_BACKUP_PARA_CUST_WH_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WJ_ATV = E3_BACKUP_PARA_CUST_WI_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WK_ATV = E3_BACKUP_PARA_CUST_WJ_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WL_ATV = E3_BACKUP_PARA_CUST_WK_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_BACKUP_PARA_CUST_WM_ATV = E3_BACKUP_PARA_CUST_WL_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
|
||||
E3_RESERVED3_START_ATV = E3_BACKUP_PARA_CUST_WM_ATV +E3_BACKUP_PER_SCREEN_SIZE,
|
||||
E3_RESERVED3_END_ATV =E3_RESERVED3_START_ATV +512-1, //暂时中间预留512空间
|
||||
|
||||
E3_BACKUP_PARA_POWER_CUST_START_ATV ,
|
||||
E3_BACKUP_PARA_POWER_CUST_END_ATV = E3_BACKUP_PARA_POWER_CUST_START_ATV +1024-1, //功率预留1024 可能有不同带宽类型的参数
|
||||
|
||||
|
||||
EEPROM3_END_ADDRESS = 0X7FFF,
|
||||
}EEPROM3_ADDR;
|
||||
uint32 eeprom_backup_all_para_atsc(uint32 type);
|
||||
uint32 eeprom_reload_all_para_atsc(uint32 type);
|
||||
|
||||
#include "lcd_task.h"
|
||||
void e2rom_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *p_tsoip_para);
|
||||
void ts_load_default_para(int tsoip_index, S_TSOIP_CONFIG_PARA *p_tsoip_config_param);
|
||||
|
||||
|
||||
void e2rom_read_all_para(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,56 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* File Name : ethernetif.h
|
||||
* Description : This file provides initialization code for LWIP
|
||||
* middleWare.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under Ultimate Liberty license
|
||||
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at:
|
||||
* www.st.com/SLA0044
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
|
||||
#ifndef __ETHERNETIF_H__
|
||||
#define __ETHERNETIF_H__
|
||||
|
||||
#include "lwip/err.h"
|
||||
#include "lwip/netif.h"
|
||||
#include "cmsis_os.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Structure that include link thread parameters */
|
||||
struct link_str {
|
||||
struct netif *netif;
|
||||
osSemaphoreId semaphore;
|
||||
};
|
||||
|
||||
/* Within 'USER CODE' section, code will be kept by default at each generation */
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
err_t ethernetif_init(struct netif *netif);
|
||||
|
||||
void ethernetif_input(void const * argument);
|
||||
void ethernetif_set_link(void const *argument);
|
||||
void ethernetif_update_config(struct netif *netif);
|
||||
void ethernetif_notify_conn_changed(struct netif *netif);
|
||||
|
||||
u32_t sys_jiffies(void);
|
||||
u32_t sys_now(void);
|
||||
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* USER CODE END 1 */
|
||||
#endif
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,13 @@
|
||||
#ifndef __FLASH_H_
|
||||
#define __FLASH_H_
|
||||
|
||||
#if USE_SPI_FLASH
|
||||
|
||||
void flash_write_byte(uint8 byte,uint32 addr);
|
||||
void flash_write_buf(uint8 *buf,uint32 num,uint32 addr);
|
||||
void flash_read_buf(uint8 *buf,uint32 len,uint32 addr);
|
||||
void flash_erase_sector(uint32 start_address,uint32 num);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+145
@@ -0,0 +1,145 @@
|
||||
#ifndef __FPGA_H_
|
||||
#define __FPGA_H_
|
||||
#include "type.h"
|
||||
#include "lcd_task.h"
|
||||
|
||||
#define I2C_REG_ADDRES (0xE0)
|
||||
|
||||
#define FPGA_UPGRADE_I2C_REG_ADDRES (0xE0)
|
||||
|
||||
#define RW_ADPC_SAVE 0 //保存ADPC数据 读FPGA,写E2/FLASH
|
||||
#define RW_ADPC_LOAD 1 //加载ADPC数据 读E
|
||||
|
||||
|
||||
//新平台ADPC曲线配置 线性区还是只有一条,非线性区有多条
|
||||
#define FPGA_ADPC_DATA_NUM 7
|
||||
|
||||
//每条曲线非线性大概16k,线性400多字节
|
||||
#define FPGA_ADPC_CURRENT_NONLINER_SIZE 16 //当前实际的非线性区大小(KB)
|
||||
|
||||
|
||||
#define FPGA_ADPC_NONLINER_DATA_ADDRESS (0)
|
||||
#define FPGA_ADPC_NONLINER_DATA_SIZE (16*1024)
|
||||
#define E2_FPGA_ADPC_NONLINER_DATA_ADDRESS (FPGA_ADPC_NONLINER_DATA_SIZE*7)
|
||||
|
||||
#if 1//@MK_MTB_TSOIP
|
||||
typedef enum{IP2TS_SEL_IP1=1,IP2TS_SEL_IP2=2,IP2TS_SEL_IP_AUTO}en_IP2TS_SEL;
|
||||
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned char port :1;//0:asi 1:ip
|
||||
unsigned char ret :1;
|
||||
unsigned char asi_sel:2;//00:asi1 01:asi2 other:auto
|
||||
}bitFiled;
|
||||
unsigned char asi_s;
|
||||
}UN_ASI_SEL;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
FPGA_IP_ADDR1 = 0X01,
|
||||
FPGA_IP_ADDR2 = 0X02,
|
||||
FPGA_IP_ADDR3 = 0X03,
|
||||
FPGA_IP_ADDR4 = 0X04, //单播与组播IP地址复用 收端
|
||||
|
||||
FPGA_REC_PORT_HIGH = 0X05,
|
||||
FPGA_REC_PORT_LOW = 0X06,
|
||||
|
||||
FPGA_BROAD_TYPE = 0X07, //单/组播
|
||||
FPGA_TS_PACKET_LEN = 0X08, //对外播放时的TS包长
|
||||
FPGA_TS_PACKET_TYPE = 0X09, //PACK_UDP 0 PACK_RTP 1
|
||||
|
||||
FPGA_HW_VER = 0X0A, //VER
|
||||
|
||||
FPGA_TS_FEC = 0X0b, //收端只读
|
||||
FPGA_TS_ROW = 0X0c,
|
||||
FPGA_TS_COL = 0X0d,
|
||||
FPGA_DELAY_H = 0X0E,
|
||||
FPGA_DELAY_L = 0X0F,
|
||||
|
||||
FPGA_LED_STATUS = 0X10, //bit0: ts err bit1:ts out bit2:ip in bit3: MCU的MAC未响应FPGA发来的包(1,错误)
|
||||
//bit4: ip err(网线没连,收不到网络包)
|
||||
|
||||
FPGA_VER_YY = 0X11,
|
||||
FPGA_VER_MM = 0X12,
|
||||
FPGA_VER_DD = 0X13,
|
||||
|
||||
FPGA_IP_PK_NUM_H = 0X14,
|
||||
FPGA_IP_PK_NUM_L = 0X15,
|
||||
|
||||
FPGA_IP_CTIME_H = 0X16,
|
||||
FPGA_IP_CTIME_M = 0X17,
|
||||
FPGA_IP_CTIME_L = 0X18, //用于计算IP输入码率
|
||||
//rate = (pk_num*188*8)/(ctime*12.5*1e-9)bit/s
|
||||
|
||||
// FPGA_ASI_RATE_HH = 0X19,
|
||||
// FPGA_ASI_RATE_HL = 0X1A,
|
||||
// FPGA_ASI_RATE_LH = 0X1B,
|
||||
// FPGA_ASI_RATE_LL = 0X1C,//asi输入码率 bps
|
||||
|
||||
FPGA_TSIO_STATE = 0X19,//获取到ip12的选择和锁定状态 //h20190221
|
||||
|
||||
FPGA_PHY_RST = 0X1F,
|
||||
|
||||
FPGA_IP_DEST1 = 0X20,
|
||||
FPGA_IP_DEST2 = 0X21,
|
||||
FPGA_IP_DEST3 = 0X22,
|
||||
FPGA_IP_DEST4 = 0X23, //ip流目标地址
|
||||
|
||||
FPGA_MAC_SOURCE1 = 0X24,
|
||||
FPGA_MAC_SOURCE2 = 0X25,
|
||||
FPGA_MAC_SOURCE3 = 0X26,
|
||||
FPGA_MAC_SOURCE4 = 0X27,
|
||||
FPGA_MAC_SOURCE5 = 0X28,
|
||||
FPGA_MAC_SOURCE6 = 0X29,
|
||||
|
||||
FPGA_MAC_DEST1 = 0X2A,
|
||||
FPGA_MAC_DEST2 = 0X2B,
|
||||
FPGA_MAC_DEST3 = 0X2C,
|
||||
FPGA_MAC_DEST4 = 0X2D,
|
||||
FPGA_MAC_DEST5 = 0X2E,
|
||||
FPGA_MAC_DEST6 = 0X2F,
|
||||
|
||||
FPGA_PHY_TYPE = 0X30, //0:100M 1:GB 2:AUTO
|
||||
|
||||
FPGA_DEST_PORT_HIGH = 0X31,
|
||||
FPGA_DEST_PORT_LOW = 0X32,
|
||||
|
||||
FPGA_RTP_UDP = 0X33, //还未用
|
||||
|
||||
FPGA_DEST_LCL_ADDR1 = 0X34,
|
||||
FPGA_DEST_LCL_ADDR2 = 0X35,
|
||||
FPGA_DEST_LCL_ADDR3 = 0X36,
|
||||
FPGA_DEST_LCL_ADDR4 = 0X37, //固定向FPGA配置本地IP地址,作为发端时,FPGA必须要用该值
|
||||
|
||||
FPGA_IP12_SELECT = 0X38, //选择IP1或IP2作为输入(该参数由激励器端接收到，并向IP端的FPGA设置) //h20190221
|
||||
FPGA_SFN_MFN_SELECT = 0x39,
|
||||
}E_FPGA_IP2TS_PARA_ADDRESS;
|
||||
|
||||
extern uint8 send_ip12sel_tsoip(uint8 ip_sel);
|
||||
extern void fpga_save_dpd_para(S_DPD_PARA *ppara);
|
||||
extern void fpga_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *ppara);
|
||||
extern void fpga_save_dest_mac(void);
|
||||
extern uint32 internal_set_base_delay(uint32 delay);
|
||||
#endif//@MK_MTB_TSOIP
|
||||
|
||||
void fpga_save_power(S_WE_PARA *pwe,S_RF_PARA *prf);
|
||||
void fpga_set_rf_output(uint8 rf);
|
||||
void fpga_boot_rf_hold_begin(void);
|
||||
void fpga_boot_rf_hold_release(void);
|
||||
void erase_adpc_data(void);
|
||||
void config_fpga_para(void);
|
||||
|
||||
|
||||
#if 1//@ALD_UP
|
||||
void fpga_save_wl(S_WL_PARA *ppara);
|
||||
|
||||
void fpga_save_dest_mac(void);
|
||||
void fpga_save_config_tsoip(int tsoip_index,S_TSOIP_CONFIG_PARA *ppara);
|
||||
void boot_reset_for_test(void);
|
||||
void boot_cfg_fagc_update();
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,100 @@
|
||||
/**
|
||||
* Copyright (c) 2001-2003 Swedish Institute of Computer Science.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
||||
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
|
||||
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the lwIP TCP/IP stack.
|
||||
*
|
||||
* Author: Adam Dunkels <adam@sics.se>
|
||||
*
|
||||
**/
|
||||
#ifndef __FS_H__
|
||||
#define __FS_H__
|
||||
|
||||
#include "lwip/opt.h"
|
||||
|
||||
/** Set this to 1 and provide the functions:
|
||||
* - "int fs_open_custom(struct fs_file *file, const char *name)"
|
||||
* Called first for every opened file to allow opening files
|
||||
* that are not included in fsdata(_custom).c
|
||||
* - "void fs_close_custom(struct fs_file *file)"
|
||||
* Called to free resources allocated by fs_open_custom().
|
||||
*/
|
||||
#ifndef LWIP_HTTPD_CUSTOM_FILES
|
||||
#define LWIP_HTTPD_CUSTOM_FILES 0
|
||||
#endif
|
||||
|
||||
/** Set this to 1 to include an application state argument per file
|
||||
* that is opened. This allows to keep a state per connection/file.
|
||||
*/
|
||||
#ifndef LWIP_HTTPD_FILE_STATE
|
||||
#define LWIP_HTTPD_FILE_STATE 0
|
||||
#endif
|
||||
|
||||
/** HTTPD_PRECALCULATED_CHECKSUM==1: include precompiled checksums for
|
||||
* predefined (MSS-sized) chunks of the files to prevent having to calculate
|
||||
* the checksums at runtime. */
|
||||
#ifndef HTTPD_PRECALCULATED_CHECKSUM
|
||||
#define HTTPD_PRECALCULATED_CHECKSUM 0
|
||||
#endif
|
||||
|
||||
#if HTTPD_PRECALCULATED_CHECKSUM
|
||||
struct fsdata_chksum {
|
||||
u32_t offset;
|
||||
u16_t chksum;
|
||||
u16_t len;
|
||||
};
|
||||
#endif /* HTTPD_PRECALCULATED_CHECKSUM */
|
||||
|
||||
struct fs_file {
|
||||
const char *data;
|
||||
int len;
|
||||
int index;
|
||||
void *pextension;
|
||||
#if HTTPD_PRECALCULATED_CHECKSUM
|
||||
const struct fsdata_chksum *chksum;
|
||||
u16_t chksum_count;
|
||||
#endif /* HTTPD_PRECALCULATED_CHECKSUM */
|
||||
u8_t http_header_included;
|
||||
#if LWIP_HTTPD_CUSTOM_FILES
|
||||
u8_t is_custom_file;
|
||||
#endif /* LWIP_HTTPD_CUSTOM_FILES */
|
||||
#if LWIP_HTTPD_FILE_STATE
|
||||
void *state;
|
||||
#endif /* LWIP_HTTPD_FILE_STATE */
|
||||
};
|
||||
|
||||
struct fs_file *fs_open(const char *name);
|
||||
void fs_close(struct fs_file *file);
|
||||
int fs_read(struct fs_file *file, char *buffer, int count);
|
||||
int fs_bytes_left(struct fs_file *file);
|
||||
|
||||
#if LWIP_HTTPD_FILE_STATE
|
||||
/** This user-defined function is called when a file is opened. */
|
||||
void *fs_state_init(struct fs_file *file, const char *name);
|
||||
/** This user-defined function is called when a file is closed. */
|
||||
void fs_state_free(struct fs_file *file, void *state);
|
||||
#endif /* #if LWIP_HTTPD_FILE_STATE */
|
||||
|
||||
#endif /* __FS_H__ */
|
||||
@@ -0,0 +1,50 @@
|
||||
/**
|
||||
* Copyright (c) 2001-2003 Swedish Institute of Computer Science.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
||||
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
|
||||
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the lwIP TCP/IP stack.
|
||||
*
|
||||
* Author: Adam Dunkels <adam@sics.se>
|
||||
*
|
||||
**/
|
||||
#ifndef __FSDATA_H__
|
||||
#define __FSDATA_H__
|
||||
|
||||
#include "lwip/opt.h"
|
||||
#include "fs.h"
|
||||
|
||||
struct fsdata_file {
|
||||
const struct fsdata_file *next;
|
||||
const unsigned char *name;
|
||||
const unsigned char *data;
|
||||
int len;
|
||||
u8_t http_header_included;
|
||||
#if HTTPD_PRECALCULATED_CHECKSUM
|
||||
u16_t chksum_count;
|
||||
const struct fsdata_chksum *chksum;
|
||||
#endif /* HTTPD_PRECALCULATED_CHECKSUM */
|
||||
};
|
||||
|
||||
#endif /* __FSDATA_H__ */
|
||||
@@ -0,0 +1,34 @@
|
||||
#ifndef __GENERAL_API_H_
|
||||
#define __GENERAL_API_H_
|
||||
#include "type.h"
|
||||
|
||||
uint8 get_check_sum(void *p,uint32 len);
|
||||
|
||||
/*
|
||||
__inline __asm uint32 asm_rev_l(uint32 data);
|
||||
__inline __asm uint32 asm_rev_s(uint32 data);
|
||||
__inline __asm uint32 asm_rbit_l(uint32 data);
|
||||
*/
|
||||
|
||||
uint16 cal_crc_zb(const uint8 *ptr, uint32 len);
|
||||
uint8 bcd2byte(uint8 bcd);
|
||||
uint8 byte2bcd(uint8 value);
|
||||
|
||||
/*
|
||||
//将long类型的变量按半字进行字节反转 0x12345678->0x78563412
|
||||
#define rev_l(data) asm_rev_l(data)
|
||||
|
||||
//将short类型的变量按字节进行反转 0x1234 ->0x3412
|
||||
#define rev_s(data) asm_rev_s(data)
|
||||
|
||||
//按位反转
|
||||
#define rbit_l(data) asm_rbit_l(data)
|
||||
|
||||
|
||||
*/
|
||||
|
||||
void str_trunc_space(char *pstr);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,544 @@
|
||||
#ifndef GPS_H
|
||||
#define GPS_H
|
||||
#include "type.h"
|
||||
#include "config.h"
|
||||
|
||||
#define GPS_COMM_NUM 0
|
||||
|
||||
#define GPS_COMM_BAUD (9600)
|
||||
|
||||
#ifndef SYSTICKHZ
|
||||
#define SYSTICKHZ OS_TICKS_PER_SEC
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#define GPS_FRAME_DEBUG 0
|
||||
#define GPS_INFO_DEBUG 0
|
||||
|
||||
|
||||
#define GPS_TEST_DEBUG 0 //调试使用,正式版本关闭
|
||||
|
||||
#if GPS_FRAME_DEBUG
|
||||
#define gps_frame_printf printf
|
||||
#else
|
||||
#define gps_frame_printf(p,...) do{;}while(0)
|
||||
#endif
|
||||
|
||||
|
||||
#if GPS_INFO_DEBUG
|
||||
#define gps_info_printf printf
|
||||
#else
|
||||
#define gps_info_printf(p,...) do{;}while(0)
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
#define UBLOX_SYNC_CHAR1 (0XB5)
|
||||
#define UBLOX_SYNC_CHAR2 (0X62)
|
||||
|
||||
#define UBLOX_MAX_DATE_SND_BUF_LEN 100 //发送缓冲区大小
|
||||
#define UBLOX_MAX_DATE_REC_BUF_LEN 400 //接收缓冲区大小
|
||||
|
||||
#define UBLOX_CFG_MSG_MAX (10)
|
||||
|
||||
#define UBLOX_MON_HW_READ_CYCLE 10 //单位s
|
||||
|
||||
|
||||
#define UBLOX_TP5_FREQ_PULSE_RATIO (50)
|
||||
#define UBLOX_TP5_FREQ_PERIOD (0) //默认配置为8M
|
||||
#define UBLOX_TP5_FREQ_PULSE_LEN_RATIO(per) ((uint32)(0xFFFFFFFFUL/(100/per)+1))
|
||||
|
||||
|
||||
#define UBLOX_TIME_MODE_DISABLE 0
|
||||
#define UBLOX_TIME_MODE_SURVEY_IN 1
|
||||
#define UBLOX_TIME_MODE_FIXED_MODE 2
|
||||
|
||||
#define UBLOX_FIND_SAT_TIME 180 //配置为survey in模式时,配置的等待时间
|
||||
#define UBLOX_FIND_SAT_ACCURACY 5 //配置为survey in模式时,配置的精度值
|
||||
|
||||
#define UBLOX_NO_SAT_TIMEOUT (UBLOX_FIND_SAT_TIME+100) //在配置时间基础上增加一定余量
|
||||
#define UBLOX_LOCK_TO_UNLOCK_TIMEWAIT (3*60*SYSTICKHZ) //锁定变为失锁等待时间
|
||||
|
||||
#define UBLOX_RXM_RAW_READ_INTERVAL 0 //60 //读取卫星原始数据信息周期,单位秒,0,关闭
|
||||
#define UBLOX_RXM_RAW_MAX_SV_NUM 12 //最多解析的卫星个数
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBLOX_STATE_ANT_CFG_READ = 0,
|
||||
UBLOX_STATE_ANT_CFG,
|
||||
UBLOX_STATE_TP5_CFG_READ, //先读取,在配置
|
||||
UBLOX_STATE_TP5_CFG,
|
||||
UBLOX_STATE_TP5_CFG2, //需两条命令,此命令仅配置pulse 模式
|
||||
UBLOX_STATE_MODE_READ,
|
||||
UBLOX_STATE_MODE_CFG,
|
||||
UBLOX_STATE_MSG_CFG, //仅需额外配置一个消息,若由多个,需重复配置
|
||||
UBLOX_STATE_SAVE_CFG,
|
||||
UBLOX_STATE_INIT_OVER
|
||||
}E_UBLOX_STATE;
|
||||
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint16 flag;
|
||||
uint16 pins;
|
||||
}S_UBLOX_ANT_PARA;
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint8 tp_index;
|
||||
uint8 reserved0;
|
||||
uint16 reserved1;
|
||||
int16 ant_cable_delay;
|
||||
int16 rf_group_delay;
|
||||
uint32 freq_period;
|
||||
uint32 freq_period_lock;
|
||||
uint32 pulse_len_ratio;
|
||||
uint32 pulse_len_ratio_lock;
|
||||
int32 user_config_delay;
|
||||
uint32 flags;
|
||||
}S_UBLOX_TP5_PARA;
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint32 time_mode;
|
||||
int32 fixed_posx;
|
||||
int32 fixed_posy;
|
||||
int32 fixed_posz;
|
||||
uint32 fixed_pos_var;
|
||||
uint32 svin_mindur;
|
||||
uint32 svin_varlinmit;
|
||||
}S_UBLOX_TMODE_PARA;
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint32 pin_sel;
|
||||
uint32 pin_bank;
|
||||
uint32 pin_dir;
|
||||
uint32 pin_var;
|
||||
uint16 noise_perms;
|
||||
uint16 agc_cnt;
|
||||
uint8 a_status;
|
||||
uint8 a_power;
|
||||
uint8 flags;
|
||||
uint8 reserved1;
|
||||
int32 used_mask;
|
||||
uint8 vp[25];
|
||||
uint8 jam_ind;
|
||||
uint16 reserved2;
|
||||
int32 pin_irq;
|
||||
int32 pull_h;
|
||||
int32 pull_l;
|
||||
}S_UBLOX_HW_PARA;
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint32 clear_mask;
|
||||
uint32 save_mask;
|
||||
uint32 load_mask;
|
||||
uint8 device_mask;
|
||||
}S_UBLOX_CFG_PARA;
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint16 nav_bbr_mask;
|
||||
uint8 reset_mode;
|
||||
uint8 reserved1;
|
||||
}S_UBLOX_RST_PARA;
|
||||
#pragma pack()
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
double cp_mes;
|
||||
double pr_mes;
|
||||
float do_mes;
|
||||
uint8 sv;
|
||||
int8 mes_qi;
|
||||
int8 cno;
|
||||
uint8 lli;
|
||||
}S_UBLOX_RAW_SV_PARA;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
int32 i_tow;
|
||||
int16 week;
|
||||
uint8 num_sv;
|
||||
uint8 reserved1;
|
||||
S_UBLOX_RAW_SV_PARA sv_raw[UBLOX_RXM_RAW_MAX_SV_NUM];
|
||||
}S_UBLOX_RAW_PARA;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 i_tow;
|
||||
uint8 gps_fix;
|
||||
uint8 flags;
|
||||
uint8 fix_stat;
|
||||
uint8 flags2;
|
||||
uint32 ttff;
|
||||
uint32 msss;
|
||||
}S_UBLOX_NAV_STATUS_PARA;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
S_UBLOX_ANT_PARA ant_para;
|
||||
S_UBLOX_TP5_PARA tp5_para;
|
||||
S_UBLOX_TMODE_PARA mode_para;
|
||||
S_UBLOX_HW_PARA hw_para;
|
||||
S_UBLOX_CFG_PARA cfg_para;
|
||||
S_UBLOX_RST_PARA rst_para;
|
||||
#if UBLOX_RXM_RAW_READ_INTERVAL!=0
|
||||
S_UBLOX_RAW_PARA raw_para;
|
||||
#endif
|
||||
}S_UBLOX_PARA,*pS_UBLOX_PARA;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBLOX_MSG_ACK = 0X05,
|
||||
UBLOX_MSG_CFG = 0X06,
|
||||
UBLOX_MSG_MON = 0x0A,
|
||||
UBLOX_MSG_RXM = 0X02,
|
||||
UBLOX_MSG_NAV = 0X01,
|
||||
}E_UBLOX_MSG_TYPE;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBX_CFG_RST = 0x04,
|
||||
UBX_CFG_ANT = 0x13,
|
||||
UBX_CFG_CFG = 0x09, //保存参数
|
||||
UBX_CFG_MSG = 0x01,
|
||||
UBX_CFG_NAV5 = 0x24,
|
||||
UBX_CFG_NAVX5 = 0x23,
|
||||
UBX_CFG_TP5 = 0x31,
|
||||
UBX_CFG_MODE = 0x1d,
|
||||
}E_UBLOX_CFG_INDEX;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBX_MON_HW = 0x09,
|
||||
UBX_MON_HW2 = 0x0B,
|
||||
}E_UBLOX_MON_INDEX;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBX_RXM_RAW = 0x10,
|
||||
}E_UBLOX_RXM_INDEX;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBX_NAV_STATUS = 0x03,
|
||||
}E_UBLOX_NAV_INDEX;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBX_ACK_NAK = 0x00,
|
||||
UBX_ACK_ACK = 0x01,
|
||||
}E_UBLOX_ACK_INDEX;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBX_CFG_READ,
|
||||
UBX_CFG_WRITE1,
|
||||
UBX_CFG_WRITE2,
|
||||
}E_UBLOX_CFG_TYPE;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
UBX_NAV_GPS_NO_FIX = 0,
|
||||
UBX_NAV_GPS_DEAD_RECKONING_ONLY,
|
||||
UBX_NAV_GPS_2D_FIX,
|
||||
UBX_NAV_GPS_3D_FIX,
|
||||
UBX_NAV_GPS_DEAD_RECKONING_COMBINED,
|
||||
UBX_NAV_GPS_TIME_ONLY_FIX,
|
||||
}E_UBLOX_NAV_STATE_GPS_FIX_STATE;
|
||||
|
||||
/*CFG-ANT*/
|
||||
//Antenna Flag Mask
|
||||
#define ENABLE_ANTENNA_VOLTAGE_SIGNAL (1<<0)
|
||||
#define ENABLE_SHORT_CIRCUIT_DETECTION (1<<1)
|
||||
#define ENABLE_OPEN_CIRCUIT_DETECTION (1<<2)
|
||||
#define ENABLE_POWER_DOWN_AUTO (1<<3)
|
||||
#define ENALBE_AUTOMATIC_RECOVERY (1<<4)
|
||||
|
||||
//Antenna Pin Configuration
|
||||
#define ANT_PIN_SWITCH (1<<4)
|
||||
#define ANT_PIN_SCD (1<<9)
|
||||
#define ANT_PIN_OCD (1<<14)
|
||||
#define ANT_RECONFIG (1<<15)
|
||||
|
||||
|
||||
/*CFG-CFG*/
|
||||
//Clear Mask Save Mask Load Mask
|
||||
#define MASK_IO_PORT (1<<0)
|
||||
#define MASK_MSG_CONF (1<<1)
|
||||
#define MASK_INF_MSG (1<<2)
|
||||
#define MASK_NAV_CONF (1<<3)
|
||||
#define MASK_RXM_CONF (1<<4)
|
||||
#define MASK_RINV_CONF (1<<9)
|
||||
#define MASK_ANT_CONF (1<<10)
|
||||
|
||||
//device Mask
|
||||
#define MASK_DEV_BBR (1<<0)
|
||||
#define MASK_DEV_FLASH (1<<1)
|
||||
#define MASK_DEV_EEPROM (1<<2)
|
||||
#define MASK_DEV_SPI_FLASH (1<<4)
|
||||
|
||||
|
||||
/*CFG-NAV5*/
|
||||
#define MASK_DYN_SET (1<<0)
|
||||
#define MASK_MIN_EL_SET (1<<1)
|
||||
#define MASK_FIX_MODE_SET (1<<2)
|
||||
#define MASK_DR_LIM_SET (1<<3)
|
||||
#define MASK_POS_SET (1<<4)
|
||||
#define MASK_TIME_SET (1<<5)
|
||||
#define MASK_STATIC_HOLD_SET (1<<6)
|
||||
#define MASK_DGPS_SET (1<<7)
|
||||
|
||||
/*CFG-TP5*/
|
||||
#define MASK_TP5_ACTIVE (1<<0)
|
||||
#define MASK_TP5_LOCK_GPS_FREQ (1<<1)
|
||||
#define MASK_TP5_LOCKED_OTHER_SET (1<<2)
|
||||
#define MASK_TP5_IS_FREQ (1<<3)
|
||||
#define MASK_TP5_IS_LENGTH (1<<4)
|
||||
#define MASK_TP5_ALIGN_TO_TOW (1<<5)
|
||||
#define MASK_TP5_PLOARITY (1<<6)
|
||||
#define MASK_TP5_GRID_UTC_GPS (1<<7)
|
||||
|
||||
|
||||
#define DYN_MODEL_PORTABLE 0
|
||||
#define DYN_MODEL_STATIONARY 2
|
||||
|
||||
#define FIX_MODE_2D 1
|
||||
#define FIX_MODE_3D 2
|
||||
#define FIX_MODE_AUTO 3
|
||||
|
||||
enum
|
||||
{
|
||||
UBLOX_RST_BBR_HOTSTART = 0,
|
||||
UBLOX_RST_BBR_WARMSTART,
|
||||
UBLOX_RST_BBR_COLDSTART=0XFFFF,
|
||||
};
|
||||
|
||||
|
||||
enum
|
||||
{
|
||||
UBLOX_RST_HARDWARE = 0,
|
||||
UBLOX_RST_SOFTWARE,
|
||||
UBLOX_RST_GPS_ONLY,
|
||||
UBLOX_RST_HARDWARE_AFTER_SHUTDOWN = 4,
|
||||
UBLOX_RST_GPS_STOP = 0X08,
|
||||
UBLOX_RST_GPS_START = 0X09
|
||||
};
|
||||
|
||||
#pragma pack(1)
|
||||
|
||||
//UBX配置命令结构
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint8 ck_a;
|
||||
uint8 ck_b;
|
||||
}UBLOX_UBX_SUM,*pUBLOX_UBX_SUM;
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint8 frame_class;
|
||||
uint8 frame_id;
|
||||
}UBLOX_FRAME_CLASS_ID;
|
||||
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint8 sync_char1; //0XB5
|
||||
uint8 sync_char2; //0X62 固定字节
|
||||
uint8 cfg_class;
|
||||
uint8 cfg_id;
|
||||
uint16 length;
|
||||
uint8 *pdata;
|
||||
UBLOX_UBX_SUM sum;
|
||||
}S_UBLOX_UBX_MSG,*pS_UBLOX_UBX_MSG;
|
||||
#pragma pack()
|
||||
|
||||
extern S_UBLOX_HW_PARA *gps_ublox_get_hw_info(void);
|
||||
|
||||
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
GPS_ERROR_OK = 0,
|
||||
GPS_ERROR_HEADER,
|
||||
GPS_ERROR_FORMAT,
|
||||
GPS_ERROR_NUM,
|
||||
GPS_ERROR_SUM,
|
||||
GPS_ERROR_INVALID,
|
||||
GPS_ERROR_PTR_INVALID,
|
||||
}E_GPS_ERROR;
|
||||
#ifndef ERR
|
||||
#define ERR 1
|
||||
#endif
|
||||
|
||||
#ifndef OK
|
||||
#define OK 0
|
||||
#endif
|
||||
|
||||
#define MAX_GPS_UART_LENGTH (1024) //最大长度
|
||||
#define MAX_REC_LENGTH (MAX_GPS_UART_LENGTH-64) //最大接收长度
|
||||
#define LOCAL_AREA 8
|
||||
#define LOCAL_AREA_HOURE (LOCAL_AREA*10000)
|
||||
|
||||
#define INT_TO_FLOAT_PTR(i) (*((float *)&(i)))
|
||||
#define INT_TO_DOUBLE_PTR(i) (*((double *)&(i)))
|
||||
|
||||
#define FLOAT_TO_INT_PTR(f) (*((uint32 *)&(f)))
|
||||
#define DOUBLE_TO_INT_PTR(f) (*((uint64 *)&(f)))
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MSG_UNKNOW, //未知
|
||||
MSG_START,
|
||||
MSG_DA, //日期时间
|
||||
MSG_SA, //卫星
|
||||
MSG_POLYP,
|
||||
MSG_UBX,
|
||||
}MSG_E;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
MSG_E msgtype;
|
||||
uint16 rxReclen;
|
||||
uint16 procflag;
|
||||
uint8 rxRec[MAX_GPS_UART_LENGTH];
|
||||
}PROC_BUFFER_S;
|
||||
|
||||
|
||||
typedef enum {AUTO,MANUAL} SMODE_E;
|
||||
typedef enum {NO_FIXED=1,FIXED2D,FIXED3D} FIX_STATUS_E;
|
||||
typedef struct
|
||||
{
|
||||
SMODE_E mode;
|
||||
FIX_STATUS_E fix_status; //Fix Status :1,2,3 与上边不一样1 No fix 2:2D fixed 3:3D fixed
|
||||
uint32 sv; //需要根据返回报文解析,根据协议,该字段共返回12个,若未使用,返回为空
|
||||
uint32 pdop;
|
||||
uint32 hdop;
|
||||
uint32 vdop;
|
||||
}GPGSA_T;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 integer; //纬度的整数部分 ddmm
|
||||
uint32 ft; //纬度的小数部分 mmmmmm //十进制,最多6位
|
||||
uint32 hemisphere; //半球 N(0), S(1)
|
||||
}LATITUDE_T;
|
||||
typedef struct
|
||||
{
|
||||
uint16 integer; //经度的整数部分 dddmm
|
||||
uint32 ft; //经度的小数部分 mmmmmm //十进制,最多6位
|
||||
uint32 direction; //方向 E(0), W(1)
|
||||
}LONGITUDE_T;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
BOOL valid;
|
||||
LATITUDE_T latitude; //纬度信息
|
||||
LONGITUDE_T longitude; //经度信息
|
||||
}POLYP_T;
|
||||
|
||||
|
||||
//时间均为UTC标准
|
||||
typedef struct
|
||||
{
|
||||
uint8 valid;
|
||||
uint8 sec;
|
||||
uint8 min;
|
||||
uint8 hour;
|
||||
uint16 ms;
|
||||
uint8 day;
|
||||
uint8 month;
|
||||
uint16 year;
|
||||
uint32 zone_hour;
|
||||
uint32 zone_min;
|
||||
uint32 kph;
|
||||
uint32 fix_kph;
|
||||
}GPZDA_T;
|
||||
typedef enum{NORTH,SOUTH}HEM_E;
|
||||
typedef struct
|
||||
{
|
||||
uint64 lat;
|
||||
HEM_E hem;
|
||||
}LAT_S; //纬度
|
||||
typedef enum{EAST,WEST}DIRECT_E;
|
||||
typedef struct
|
||||
{
|
||||
uint64 lot;
|
||||
DIRECT_E direct;
|
||||
}LOT_S; //经度
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 sec;
|
||||
uint16 min;
|
||||
uint16 hour;
|
||||
uint16 day;
|
||||
uint16 month;
|
||||
uint16 year;
|
||||
uint32 valid; //结构体前半部分要与S_SYS_TIME变量内容保持一致
|
||||
uint16 ms;
|
||||
LATITUDE_T latitude; //纬度信息
|
||||
LONGITUDE_T longitude; //经度信息
|
||||
uint32 speed; //浮点类型
|
||||
uint32 cmg; //浮点类型
|
||||
uint32 mv;
|
||||
uint32 mvd;
|
||||
uint32 mode;
|
||||
}GPRMC_T;
|
||||
|
||||
extern void ublox_proc_state(void);
|
||||
extern void UARTCharPut(unsigned long ulBase, unsigned char ucData);
|
||||
|
||||
extern E_GPS_ERROR gps_proc_POLYP(uint8 *pbuf);
|
||||
extern E_GPS_ERROR gps_proc_GPRMC(uint8 *pbuf);
|
||||
extern E_GPS_ERROR gps_proc_GPGSA(uint8 *pbuf);
|
||||
extern uint32 check_delay_over(uint32 *ptick,uint32 cycle);
|
||||
extern uint32 str_to_int(uint8 *pbuf,uint8 len,uint32 *result);
|
||||
extern uint32 str_to_hex(uint8 *pbuf,uint8 len,uint32 *result);
|
||||
extern uint32 str_to_float(uint8 *pbuf,uint8 len,uint32 *result);
|
||||
extern uint32 str_to_double(uint8 *pbuf,uint8 len,uint64 *result);
|
||||
extern uint32 gps_check_sum(uint8 *pbuf);
|
||||
extern uint8 gps_get_sum(uint8 *pbuf,uint32 len);
|
||||
extern void utc_to_localtime(GPRMC_T *ptime);
|
||||
extern void inc_day(GPRMC_T *ptime);
|
||||
extern uint32 gps_set_date(uint8 *pbuf);
|
||||
extern uint32 gps_set_time(uint8 *pbuf);
|
||||
extern void inc_hour(GPRMC_T *p,uint8 num);
|
||||
extern void dec_hour(GPRMC_T *ptime,uint8 num);
|
||||
extern S_SYS_TIME *gps_get_time(void);
|
||||
extern GPGSA_T *gps_get_sa(void);
|
||||
extern POLYP_T *gps_get_polyp(void);
|
||||
extern void gps_lcd_show(void);
|
||||
extern uint32 gps_set_area(uint8 *pbuf);
|
||||
extern uint32 get_init_flag(void);
|
||||
extern pS_RUN_TIME sys_get_run_time(void);
|
||||
extern void gps_hw_reset(void);
|
||||
|
||||
//void gps_task(void * pvParameters);
|
||||
extern void gps_ublox_init(void);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,201 @@
|
||||
|
||||
#ifndef __HTTP_GET_H__
|
||||
#define __HTTP_GET_H__
|
||||
|
||||
#include "type.h"
|
||||
//////////state info
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
L_CTL_RST = 0,
|
||||
L_CTL_STATE_INFO,
|
||||
L_CTL_SYS_SET,
|
||||
L_CTL_RF_CTL,
|
||||
L_CTL_NET_SET,
|
||||
L_CTL_LOGIC_SET,
|
||||
L_CTL_TIMESLOT_SET
|
||||
}L_CTL_EM;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
L_ASI1=0,
|
||||
L_ASI2,
|
||||
L_ASI_NONE
|
||||
}ASI_INPUT_EM;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
PPS_ERR=0,
|
||||
PPS_OK,
|
||||
}PPS_EM;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
GPS_UNLOCK=0,
|
||||
GPS_LOCK,
|
||||
GPS_NOT_CONNECT,
|
||||
}GPS_EM;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
TOD_GPS_ERR=0,
|
||||
TOD_MUX_ERR,
|
||||
TOD_OK,
|
||||
}TOD_EM;
|
||||
|
||||
//temp
|
||||
|
||||
//////////////////////
|
||||
|
||||
//sys_set/////////////
|
||||
typedef enum
|
||||
{
|
||||
LASI1=0,
|
||||
LASI2,
|
||||
LASI_AUTO
|
||||
}LASI_EM;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
LSFN=0,
|
||||
LMFN,
|
||||
}LNET_EM;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
LCLK_INT=0,
|
||||
LCLK_AUTO,
|
||||
LCLK_GPS,
|
||||
LCLK_ASI,
|
||||
}LCLK_EM;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
LADP_OPEN=0,
|
||||
LADP_CLOSE,
|
||||
}LADP_EM;
|
||||
////////////////////////
|
||||
|
||||
|
||||
//频率调整
|
||||
typedef enum
|
||||
{
|
||||
LHZ0_P=0,
|
||||
LHZ0_N,
|
||||
|
||||
}LHZ0_EM;
|
||||
//功率调整
|
||||
typedef enum
|
||||
{
|
||||
LPW0_P=0,
|
||||
LPW0_N,
|
||||
|
||||
}LPW0_EM;
|
||||
|
||||
//agc
|
||||
typedef enum
|
||||
{
|
||||
LAGC_CLOSE=0,
|
||||
LAGC_OPEN,
|
||||
|
||||
}LAGC_EM;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
LCWY_CLOSE=0,
|
||||
LCWY_OPEN,
|
||||
}LCWY_EM;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
LRFY_CLOSE=0,
|
||||
LRFY_OPEN,
|
||||
}LRFY_EM;
|
||||
|
||||
////////////////////////
|
||||
|
||||
//net set///////////////
|
||||
|
||||
//延时设置
|
||||
|
||||
typedef enum
|
||||
{
|
||||
LTXI_CLOSE=0,
|
||||
LTXI_OPEN,
|
||||
}LTXI_EM;
|
||||
|
||||
//地区标识
|
||||
//发射机标识
|
||||
|
||||
////////////////////////
|
||||
|
||||
//logic channels ///////
|
||||
typedef enum
|
||||
{
|
||||
LSET_AUTO=0,
|
||||
LSET_MANUAL,
|
||||
|
||||
}LSET_EM;
|
||||
|
||||
//信道
|
||||
|
||||
////////////////////////
|
||||
|
||||
//time slot/////////////
|
||||
//时隙
|
||||
typedef enum
|
||||
{
|
||||
LENA_CLOSE=0,
|
||||
LENA_OPEN,
|
||||
|
||||
}LENA_EM;
|
||||
//所属信道
|
||||
//调制方式
|
||||
typedef enum
|
||||
{
|
||||
LMDL_BPSK=0,
|
||||
LMDL_QPSK,
|
||||
LMDL_QAM
|
||||
|
||||
}LMDL_EM;
|
||||
//RS编码
|
||||
//外交织
|
||||
typedef enum
|
||||
{
|
||||
LOIN_MODE1=0,
|
||||
LOIN_MODE2,
|
||||
LOIN_MODE3
|
||||
|
||||
}LOIN_EM;
|
||||
//LDPC
|
||||
//扰码
|
||||
|
||||
|
||||
#define XD_NUM 40
|
||||
#define ANYWAVE_COM_MAC_HEAD (0xac)
|
||||
void load_net_para(S_ETH_ADDRES *peth);
|
||||
void check_status(void);
|
||||
void load_data_to_http(void);
|
||||
void http_save_change_para(void *);
|
||||
void MCU_write_curXD_info(void);
|
||||
uint32 get_menu_index(void);
|
||||
extern BOOL proc_key_update(void * parg, uint8 key);
|
||||
extern void fpga_save_agc_vol(void);
|
||||
|
||||
extern void enter_menu(uint32 index);
|
||||
extern void save_new_cor(uint32 cor);
|
||||
//extern void lwIPNetworkConfigChange(uint32 ip,uint32 mask,uint32 gate);
|
||||
extern void usr_lwIPNetworkConfigChange(uint32 ip,uint32 mask,uint32 gate);
|
||||
|
||||
extern int sntp_enable(uint8 en, uint8 *pAddr);
|
||||
extern void http_load_freq(S_CGI_FREQ_PARA *ppara);
|
||||
extern int usr_http_write_freq(uint8 freq);
|
||||
extern void remote_set_dpd_clr(void);
|
||||
extern void http_write_rf(S_CGI_RF *ppara);
|
||||
extern u8 usr_remote_adpc(uint8 adpc);
|
||||
extern void save_dpd_test_para(uint16 tst);
|
||||
extern void usr_set_exc_pwr(int16 exc_pwr);
|
||||
#endif
|
||||
@@ -0,0 +1,265 @@
|
||||
/*
|
||||
* Copyright (c) 2001-2003 Swedish Institute of Computer Science.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without modification,
|
||||
* are permitted provided that the following conditions are met:
|
||||
*
|
||||
* 1. Redistributions of source code must retain the above copyright notice,
|
||||
* this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright notice,
|
||||
* this list of conditions and the following disclaimer in the documentation
|
||||
* and/or other materials provided with the distribution.
|
||||
* 3. The name of the author may not be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
||||
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
|
||||
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||
* OF SUCH DAMAGE.
|
||||
*
|
||||
* This file is part of the lwIP TCP/IP stack.
|
||||
*
|
||||
* Author: Adam Dunkels <adam@sics.se>
|
||||
*
|
||||
* This version of the file has been modified by Texas Instruments to offer
|
||||
* simple server-side-include (SSI) and Common Gateway Interface (CGI)
|
||||
* capability.
|
||||
*/
|
||||
|
||||
#ifndef __HTTPD_H__
|
||||
#define __HTTPD_H__
|
||||
|
||||
#include "lwip/opt.h"
|
||||
#include "lwip/err.h"
|
||||
#include "lwip/pbuf.h"
|
||||
|
||||
|
||||
/** Set this to 1 to support CGI */
|
||||
#ifndef LWIP_HTTPD_CGI
|
||||
#define LWIP_HTTPD_CGI 1
|
||||
#endif
|
||||
|
||||
/** Set this to 1 to support SSI (Server-Side-Includes) */
|
||||
#ifndef LWIP_HTTPD_SSI
|
||||
#define LWIP_HTTPD_SSI 1
|
||||
#endif
|
||||
|
||||
#ifndef LWIP_HTTPD_AJX
|
||||
#define LWIP_HTTPD_AJX 1
|
||||
#endif
|
||||
|
||||
/** Set this to 1 to support HTTP POST */
|
||||
#ifndef LWIP_HTTPD_SUPPORT_POST
|
||||
#define LWIP_HTTPD_SUPPORT_POST 0
|
||||
#endif
|
||||
|
||||
|
||||
#if LWIP_HTTPD_CGI
|
||||
|
||||
/*
|
||||
* Function pointer for a CGI script handler.
|
||||
*
|
||||
* This function is called each time the HTTPD server is asked for a file
|
||||
* whose name was previously registered as a CGI function using a call to
|
||||
* http_set_cgi_handler. The iIndex parameter provides the index of the
|
||||
* CGI within the ppcURLs array passed to http_set_cgi_handler. Parameters
|
||||
* pcParam and pcValue provide access to the parameters provided along with
|
||||
* the URI. iNumParams provides a count of the entries in the pcParam and
|
||||
* pcValue arrays. Each entry in the pcParam array contains the name of a
|
||||
* parameter with the corresponding entry in the pcValue array containing the
|
||||
* value for that parameter. Note that pcParam may contain multiple elements
|
||||
* with the same name if, for example, a multi-selection list control is used
|
||||
* in the form generating the data.
|
||||
*
|
||||
* The function should return a pointer to a character string which is the
|
||||
* path and filename of the response that is to be sent to the connected
|
||||
* browser, for example "/thanks.htm" or "/response/error.ssi".
|
||||
*
|
||||
* The maximum number of parameters that will be passed to this function via
|
||||
* iNumParams is defined by LWIP_HTTPD_MAX_CGI_PARAMETERS. Any parameters in the incoming
|
||||
* HTTP request above this number will be discarded.
|
||||
*
|
||||
* Requests intended for use by this CGI mechanism must be sent using the GET
|
||||
* method (which encodes all parameters within the URI rather than in a block
|
||||
* later in the request). Attempts to use the POST method will result in the
|
||||
* request being ignored.
|
||||
*
|
||||
*/
|
||||
typedef char *(*tCGIHandler)(int iIndex, int iNumParams, char *pcParam[],
|
||||
char *pcValue[]);
|
||||
|
||||
/*
|
||||
* Structure defining the base filename (URL) of a CGI and the associated
|
||||
* function which is to be called when that URL is requested.
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
char const *pcCGIName;
|
||||
tCGIHandler pfnCGIHandler;
|
||||
} tCGI;
|
||||
|
||||
void http_set_cgi_handlers(const tCGI *pCGIs, int iNumHandlers);
|
||||
|
||||
|
||||
/* The maximum number of parameters that the CGI handler can be sent. */
|
||||
#ifndef LWIP_HTTPD_MAX_CGI_PARAMETERS
|
||||
#define LWIP_HTTPD_MAX_CGI_PARAMETERS 32
|
||||
#endif
|
||||
|
||||
#endif /* LWIP_HTTPD_CGI */
|
||||
|
||||
#if LWIP_HTTPD_SSI
|
||||
|
||||
/** LWIP_HTTPD_SSI_MULTIPART==1: SSI handler function is called with 2 more
|
||||
* arguments indicating a counter for insert string that are too long to be
|
||||
* inserted at once: the SSI handler function must then set 'next_tag_part'
|
||||
* which will be passed back to it in the next call. */
|
||||
#ifndef LWIP_HTTPD_SSI_MULTIPART
|
||||
#define LWIP_HTTPD_SSI_MULTIPART 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Function pointer for the SSI tag handler callback.
|
||||
*
|
||||
* This function will be called each time the HTTPD server detects a tag of the
|
||||
* form <!--#name--> in a .shtml, .ssi or .shtm file where "name" appears as
|
||||
* one of the tags supplied to http_set_ssi_handler in the ppcTags array. The
|
||||
* returned insert string, which will be appended after the the string
|
||||
* "<!--#name-->" in file sent back to the client,should be written to pointer
|
||||
* pcInsert. iInsertLen contains the size of the buffer pointed to by
|
||||
* pcInsert. The iIndex parameter provides the zero-based index of the tag as
|
||||
* found in the ppcTags array and identifies the tag that is to be processed.
|
||||
*
|
||||
* The handler returns the number of characters written to pcInsert excluding
|
||||
* any terminating NULL or a negative number to indicate a failure (tag not
|
||||
* recognized, for example).
|
||||
*
|
||||
* Note that the behavior of this SSI mechanism is somewhat different from the
|
||||
* "normal" SSI processing as found in, for example, the Apache web server. In
|
||||
* this case, the inserted text is appended following the SSI tag rather than
|
||||
* replacing the tag entirely. This allows for an implementation that does not
|
||||
* require significant additional buffering of output data yet which will still
|
||||
* offer usable SSI functionality. One downside to this approach is when
|
||||
* attempting to use SSI within JavaScript. The SSI tag is structured to
|
||||
* resemble an HTML comment but this syntax does not constitute a comment
|
||||
* within JavaScript and, hence, leaving the tag in place will result in
|
||||
* problems in these cases. To work around this, any SSI tag which needs to
|
||||
* output JavaScript code must do so in an encapsulated way, sending the whole
|
||||
* HTML <script>...</script> section as a single include.
|
||||
*/
|
||||
typedef u16_t (*tSSIHandler)(int iIndex, char *pcInsert, int iInsertLen
|
||||
#if LWIP_HTTPD_SSI_MULTIPART
|
||||
, u16_t current_tag_part, u16_t *next_tag_part
|
||||
#endif /* LWIP_HTTPD_SSI_MULTIPART */
|
||||
#if LWIP_HTTPD_FILE_STATE
|
||||
, void *connection_state
|
||||
#endif /* LWIP_HTTPD_FILE_STATE */
|
||||
);
|
||||
|
||||
void http_set_ssi_handler(tSSIHandler pfnSSIHandler,
|
||||
const char **ppcTags, int iNumTags);
|
||||
|
||||
/* The maximum length of the string comprising the tag name */
|
||||
#ifndef LWIP_HTTPD_MAX_TAG_NAME_LEN
|
||||
#define LWIP_HTTPD_MAX_TAG_NAME_LEN 24
|
||||
#endif
|
||||
|
||||
/* The maximum length of string that can be returned to replace any given tag */
|
||||
#ifndef LWIP_HTTPD_MAX_TAG_INSERT_LEN
|
||||
#define LWIP_HTTPD_MAX_TAG_INSERT_LEN 1024
|
||||
#endif
|
||||
|
||||
#endif /* LWIP_HTTPD_SSI */
|
||||
|
||||
#if LWIP_HTTPD_SUPPORT_POST
|
||||
|
||||
/* These functions must be implemented by the application */
|
||||
|
||||
/** Called when a POST request has been received. The application can decide
|
||||
* whether to accept it or not.
|
||||
*
|
||||
* @param connection Unique connection identifier, valid until httpd_post_end
|
||||
* is called.
|
||||
* @param uri The HTTP header URI receiving the POST request.
|
||||
* @param http_request The raw HTTP request (the first packet, normally).
|
||||
* @param http_request_len Size of 'http_request'.
|
||||
* @param content_len Content-Length from HTTP header.
|
||||
* @param response_uri Filename of response file, to be filled when denying the
|
||||
* request
|
||||
* @param response_uri_len Size of the 'response_uri' buffer.
|
||||
* @param post_auto_wnd Set this to 0 to let the callback code handle window
|
||||
* updates by calling 'httpd_post_data_recved' (to throttle rx speed)
|
||||
* default is 1 (httpd handles window updates automatically)
|
||||
* @return ERR_OK: Accept the POST request, data may be passed in
|
||||
* another err_t: Deny the POST request, send back 'bad request'.
|
||||
*/
|
||||
err_t httpd_post_begin(void *connection, const char *uri, const char *http_request,
|
||||
u16_t http_request_len, int content_len, char *response_uri,
|
||||
u16_t response_uri_len, u8_t *post_auto_wnd);
|
||||
|
||||
/** Called for each pbuf of data that has been received for a POST.
|
||||
* ATTENTION: The application is responsible for freeing the pbufs passed in!
|
||||
*
|
||||
* @param connection Unique connection identifier.
|
||||
* @param p Received data.
|
||||
* @return ERR_OK: Data accepted.
|
||||
* another err_t: Data denied, http_post_get_response_uri will be called.
|
||||
*/
|
||||
err_t httpd_post_receive_data(void *connection, struct pbuf *p);
|
||||
|
||||
/** Called when all data is received or when the connection is closed.
|
||||
* The application must return the filename/URI of a file to send in response
|
||||
* to this POST request. If the response_uri buffer is untouched, a 404
|
||||
* response is returned.
|
||||
*
|
||||
* @param connection Unique connection identifier.
|
||||
* @param response_uri Filename of response file, to be filled when denying the request
|
||||
* @param response_uri_len Size of the 'response_uri' buffer.
|
||||
*/
|
||||
void httpd_post_finished(void *connection, char *response_uri, u16_t response_uri_len);
|
||||
|
||||
#ifndef LWIP_HTTPD_POST_MANUAL_WND
|
||||
#define LWIP_HTTPD_POST_MANUAL_WND 0
|
||||
#endif
|
||||
|
||||
#if LWIP_HTTPD_POST_MANUAL_WND
|
||||
void httpd_post_data_recved(void *connection, u16_t recved_len);
|
||||
#endif /* LWIP_HTTPD_POST_MANUAL_WND */
|
||||
|
||||
#endif /* LWIP_HTTPD_SUPPORT_POST */
|
||||
|
||||
#if LWIP_HTTPD_AJX
|
||||
|
||||
typedef int (*tAJXHandler)(int iIndex, char *pcInsert,int *iInsertLen);
|
||||
|
||||
typedef struct
|
||||
{
|
||||
const char *pcAJXName;
|
||||
tAJXHandler pfnAJXHandler;
|
||||
}tAJX;
|
||||
|
||||
void http_set_ajx_handlers(const tAJX *pAJXs, int iNumHandlers);
|
||||
|
||||
|
||||
#ifndef HTTPD_MAX_AJX_FORMS_NUM
|
||||
#define HTTPD_MAX_AJX_FORMS_NUM 1
|
||||
#endif
|
||||
|
||||
#ifndef HTTPD_MAX_AJX_INSERT_LEN
|
||||
#define HTTPD_MAX_AJX_INSERT_LEN 256
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
void httpd_init(void);
|
||||
|
||||
#endif /* __HTTPD_H__ */
|
||||
@@ -0,0 +1,115 @@
|
||||
#ifndef __HTTPD_STRUCTS_H__
|
||||
#define __HTTPD_STRUCTS_H__
|
||||
|
||||
#include "httpd.h"
|
||||
|
||||
/** This string is passed in the HTTP header as "Server: " */
|
||||
#ifndef HTTPD_SERVER_AGENT
|
||||
#define HTTPD_SERVER_AGENT "lwIP/1.3.1 (http://savannah.nongnu.org/projects/lwip)"
|
||||
#endif
|
||||
|
||||
/** Set this to 1 if you want to include code that creates HTTP headers
|
||||
* at runtime. Default is off: HTTP headers are then created statically
|
||||
* by the makefsdata tool. Static headers mean smaller code size, but
|
||||
* the (readonly) fsdata will grow a bit as every file includes the HTTP
|
||||
* header. */
|
||||
#ifndef LWIP_HTTPD_DYNAMIC_HEADERS
|
||||
#define LWIP_HTTPD_DYNAMIC_HEADERS 0
|
||||
#endif
|
||||
|
||||
|
||||
#if LWIP_HTTPD_DYNAMIC_HEADERS
|
||||
/** This struct is used for a list of HTTP header strings for various
|
||||
* filename extensions. */
|
||||
typedef struct
|
||||
{
|
||||
const char *extension;
|
||||
int headerIndex;
|
||||
} tHTTPHeader;
|
||||
|
||||
/** A list of strings used in HTTP headers */
|
||||
static const char *g_psHTTPHeaderStrings[] =
|
||||
{
|
||||
"Content-type: text/html\r\n\r\n",
|
||||
"Content-type: text/html\r\nExpires: Fri, 10 Apr 2008 14:00:00 GMT\r\nPragma: no-cache\r\n\r\n",
|
||||
"Content-type: image/gif\r\n\r\n",
|
||||
"Content-type: image/png\r\n\r\n",
|
||||
"Content-type: image/jpeg\r\n\r\n",
|
||||
"Content-type: image/bmp\r\n\r\n",
|
||||
"Content-type: image/x-icon\r\n\r\n",
|
||||
"Content-type: application/octet-stream\r\n\r\n",
|
||||
"Content-type: application/x-javascript\r\n\r\n",
|
||||
"Content-type: application/x-javascript\r\n\r\n",
|
||||
"Content-type: text/css\r\n\r\n",
|
||||
"Content-type: application/x-shockwave-flash\r\n\r\n",
|
||||
"Content-type: text/xml\r\n\r\n",
|
||||
"Content-type: text/plain\r\n\r\n",
|
||||
"HTTP/1.0 200 OK\r\n",
|
||||
"HTTP/1.0 404 File not found\r\n",
|
||||
"HTTP/1.0 400 Bad Request\r\n",
|
||||
"HTTP/1.0 501 Not Implemented\r\n",
|
||||
"HTTP/1.1 200 OK\r\n",
|
||||
"HTTP/1.1 404 File not found\r\n",
|
||||
"HTTP/1.1 400 Bad Request\r\n",
|
||||
"HTTP/1.1 501 Not Implemented\r\n",
|
||||
"Content-Length: ",
|
||||
"Connection: Close\r\n",
|
||||
"Server: "HTTPD_SERVER_AGENT"\r\n",
|
||||
"\r\n<html><body><h2>404: The requested file cannot be found.</h2></body></html>\r\n"
|
||||
};
|
||||
|
||||
/* Indexes into the g_psHTTPHeaderStrings array */
|
||||
#define HTTP_HDR_HTML 0 /* text/html */
|
||||
#define HTTP_HDR_SSI 1 /* text/html Expires... */
|
||||
#define HTTP_HDR_GIF 2 /* image/gif */
|
||||
#define HTTP_HDR_PNG 3 /* image/png */
|
||||
#define HTTP_HDR_JPG 4 /* image/jpeg */
|
||||
#define HTTP_HDR_BMP 5 /* image/bmp */
|
||||
#define HTTP_HDR_ICO 6 /* image/x-icon */
|
||||
#define HTTP_HDR_APP 7 /* application/octet-stream */
|
||||
#define HTTP_HDR_JS 8 /* application/x-javascript */
|
||||
#define HTTP_HDR_RA 9 /* application/x-javascript */
|
||||
#define HTTP_HDR_CSS 10 /* text/css */
|
||||
#define HTTP_HDR_SWF 11 /* application/x-shockwave-flash */
|
||||
#define HTTP_HDR_XML 12 /* text/xml */
|
||||
#define HTTP_HDR_DEFAULT_TYPE 13 /* text/plain */
|
||||
#define HTTP_HDR_OK 14 /* 200 OK */
|
||||
#define HTTP_HDR_NOT_FOUND 15 /* 404 File not found */
|
||||
#define HTTP_HDR_BAD_REQUEST 16 /* 400 Bad request */
|
||||
#define HTTP_HDR_NOT_IMPL 17 /* 501 Not Implemented */
|
||||
#define HTTP_HDR_OK_11 18 /* 200 OK */
|
||||
#define HTTP_HDR_NOT_FOUND_11 19 /* 404 File not found */
|
||||
#define HTTP_HDR_BAD_REQUEST_11 20 /* 400 Bad request */
|
||||
#define HTTP_HDR_NOT_IMPL_11 21 /* 501 Not Implemented */
|
||||
#define HTTP_HDR_CONTENT_LENGTH 22 /* Content-Length: (HTTP 1.1)*/
|
||||
#define HTTP_HDR_CONN_CLOSE 23 /* Connection: Close (HTTP 1.1) */
|
||||
#define HTTP_HDR_SERVER 24 /* Server: HTTPD_SERVER_AGENT */
|
||||
#define DEFAULT_404_HTML 25 /* default 404 body */
|
||||
|
||||
/** A list of extension-to-HTTP header strings */
|
||||
static tHTTPHeader g_psHTTPHeaders[] =
|
||||
{
|
||||
{ "html", HTTP_HDR_HTML},
|
||||
{ "htm", HTTP_HDR_HTML},
|
||||
{ "shtml",HTTP_HDR_SSI},
|
||||
{ "shtm", HTTP_HDR_SSI},
|
||||
{ "ssi", HTTP_HDR_SSI},
|
||||
{ "gif", HTTP_HDR_GIF},
|
||||
{ "png", HTTP_HDR_PNG},
|
||||
{ "jpg", HTTP_HDR_JPG},
|
||||
{ "bmp", HTTP_HDR_BMP},
|
||||
{ "ico", HTTP_HDR_ICO},
|
||||
{ "class",HTTP_HDR_APP},
|
||||
{ "cls", HTTP_HDR_APP},
|
||||
{ "js", HTTP_HDR_JS},
|
||||
{ "ram", HTTP_HDR_RA},
|
||||
{ "css", HTTP_HDR_CSS},
|
||||
{ "swf", HTTP_HDR_SWF},
|
||||
{ "xml", HTTP_HDR_XML}
|
||||
};
|
||||
|
||||
#define NUM_HTTP_HEADERS (sizeof(g_psHTTPHeaders) / sizeof(tHTTPHeader))
|
||||
|
||||
#endif /* LWIP_HTTPD_DYNAMIC_HEADERS */
|
||||
|
||||
#endif /* __HTTPD_STRUCTS_H__ */
|
||||
Executable
+139
@@ -0,0 +1,139 @@
|
||||
#ifndef _I2C_DRV_H
|
||||
#define _I2C_DRV_H
|
||||
#include "type.h"
|
||||
#include "config.h"
|
||||
|
||||
|
||||
|
||||
|
||||
#if 1//ADD
|
||||
|
||||
#define FPGA_I2C_NUM 1
|
||||
#define FPGA_DEV_ADDRESS (0X5A<<1)
|
||||
#define DRYLOOP_DEV_ADDRESS (0x42<<1)
|
||||
|
||||
#define EXT_I2C_NUM 0
|
||||
#define TS2IP_DEV_ADDRESS (0x5D<<1) // (0x70<<1)
|
||||
#define TS2IP2_DEV_ADDRESS (0x5E<<1) // (0x90<<1)
|
||||
|
||||
#define TUNER_I2C_NUM 0
|
||||
//#define TS2IP_DEV_ADDRESS (0x5D<<1) // (0x70<<1)
|
||||
//#define TS2IP2_DEV_ADDRESS (0x5E<<1) // (0x90<<1)
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#define TS_NET_I2C_READ 0
|
||||
#define TS_NET_I2C_WRITE 1
|
||||
|
||||
#if USE_TUNER_18273
|
||||
#define TUNER18273_ADDRESS (0xC6)
|
||||
#else
|
||||
#define TUNER18273_ADDRESS (0xC0)
|
||||
#endif
|
||||
|
||||
void e2_byte_write(uint16 addr,uint8 data,uint32 chip);
|
||||
uint8 e2_byte_read(uint16 addr,uint32 chip);
|
||||
uint8 e2_byte_read_v2(uint16 addr, uint8 default_value,uint32 chip);
|
||||
|
||||
|
||||
uint32 atmel_write_e2rom_buf(uint8* pbuf,uint16 offset,uint16 num,uint8 chip);
|
||||
uint32 atmel_read_e2rom_buf(uint8* pbuf,uint16 offset,uint16 num,uint8 chip);
|
||||
|
||||
|
||||
|
||||
|
||||
void i2c_hw_init(void);
|
||||
|
||||
#define E2_PROM_PAGE_SIZE (64) //E2的页大小
|
||||
#define E2_PROM_TOTLE_SIZE (32*1024) //E2的总大小
|
||||
#define E2_PROM_OFFSET_SIZE (2) //E2的参数地址字节数
|
||||
|
||||
#define I2C_READ_OK 0
|
||||
#define I2C_WRITE_OK 0
|
||||
#define I2C_WAIT_TIME_OUT 1
|
||||
#define I2C_PARA_INVALID 2
|
||||
|
||||
#define E2_TOTAL_NUM 3
|
||||
|
||||
#define E2_CHIP_1 0 //三个E2
|
||||
#define E2_CHIP_2 1
|
||||
#define E2_CHIP_3 2
|
||||
|
||||
|
||||
#define c256_byteread_default(a,b) e2_byte_read_v2(a,b,E2_CHIP_1) // add a new param need this function
|
||||
|
||||
#define c256_byteread(a) e2_byte_read(a,E2_CHIP_1)
|
||||
#define c256_bytewrite(a,b) e2_byte_write(a,b,E2_CHIP_1)
|
||||
|
||||
#define c256_byteread2(a) e2_byte_read(a,E2_CHIP_2)
|
||||
#define c256_bytewrite2(a,b) e2_byte_write(a,b,E2_CHIP_2)
|
||||
|
||||
#define c256_byteread3(a) e2_byte_read(a,E2_CHIP_3)
|
||||
#define c256_bytewrite3(a,b) e2_byte_write(a,b,E2_CHIP_3) //方便后续激励器移植
|
||||
|
||||
#define atmel_write_e1(pbuf,offset,num) atmel_write_e2rom_buf(pbuf,offset,num,E2_CHIP_1)
|
||||
#define atmel_read_e1(pbuf,offset,num) atmel_read_e2rom_buf(pbuf,offset,num,E2_CHIP_1)
|
||||
|
||||
#define atmel_write_e2(pbuf,offset,num) atmel_write_e2rom_buf(pbuf,offset,num,E2_CHIP_2)
|
||||
#define atmel_read_e2(pbuf,offset,num) atmel_read_e2rom_buf(pbuf,offset,num,E2_CHIP_2)
|
||||
|
||||
#define atmel_write_e3(pbuf,offset,num) atmel_write_e2rom_buf(pbuf,offset,num,E2_CHIP_3)
|
||||
#define atmel_read_e3(pbuf,offset,num) atmel_read_e2rom_buf(pbuf,offset,num,E2_CHIP_3)
|
||||
|
||||
|
||||
|
||||
void fpga_byte_write(uint8 segment,uint32 addr,uint8 data);
|
||||
uint8 fpga_byte_read(uint8 segment,uint32 addr);
|
||||
|
||||
void fpga_reset_save_segment(void);
|
||||
|
||||
uint8 dryloop_read(uint32 addr);
|
||||
uint32 dryloop_write(uint32 addr,uint8 data);
|
||||
uint32 tuner_byte_write(uint32 addr,uint8 data);
|
||||
uint8 tuner_byte_read(uint32 addr);
|
||||
|
||||
void ip2ts_i2c_rw(uint8 *pucData, uint8 addr,uint16 cnt, uint32 rw);
|
||||
|
||||
|
||||
#if 1
|
||||
extern void tsoip_byte_write(int tsoip_index, uint32 addr, uint8 data);
|
||||
extern uint8 tsoip_byte_read(int tsoip_index,uint32 addr);
|
||||
extern void fpga_i2c_sim_spi_read(uint16 addr, uint32 *p_data);
|
||||
|
||||
extern void fpga_i2c_sim_spi_write(uint16 addr, uint32 data);
|
||||
extern void e_map_init(void);
|
||||
extern void ii2c_hw_init(void);
|
||||
extern uint8 fpga_byte_reads(uint8 segment,uint32 addr,uint8 *pdata,uint8 rlen);
|
||||
extern int fpga_byte_writes(uint8 segment,uint32 addr,uint8 *pdata,uint8 wlen);
|
||||
|
||||
|
||||
|
||||
uint32 tuner_i2c_write(uint8 slave_addr,uint8 *pdata,uint8 length);
|
||||
uint32 tuner_i2c_read(uint8 slave_addr,uint8 *pdata,uint8 length);
|
||||
uint32 tuner_i2c_read_offset8(uint8 slave_addr,uint8 offset,uint8 *pdata,uint8 length);
|
||||
uint32 tuner_i2c_read_offset16(uint8 slave_addr,uint8 offset[8],uint8 *pdata,uint8 length);
|
||||
int tuner_nbytes_write(uint32 dev_addr, uint32 offset, uint8 *pdata, uint32 wlen);
|
||||
/*
|
||||
void fpga_write_axi0(u32 addr, u32 data, u32 count);
|
||||
int fpga_read_axi0(u32 addr, u32 *pdata, u32 count);
|
||||
|
||||
int fpga_read_axi0_test(uint32 addr, uint32 *pdata, uint32 count);
|
||||
void fpga_write_axi0_test(uint32 addr, uint32 data, uint32 count);
|
||||
*/
|
||||
void fpga_write_axi0_test(uint32 addr, uint32 data, uint32 count);
|
||||
void fpga_write_axi0(uint32 addr, uint32 data, uint32 count);
|
||||
int fpga_read_axi0(uint32 addr, uint32 *pdata, uint32 count);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
Executable
+68
@@ -0,0 +1,68 @@
|
||||
|
||||
#ifndef _IGPIO_H_
|
||||
#define _IGPIO_H_
|
||||
|
||||
#define SHELL_CTRL_GPIO 0
|
||||
|
||||
#define GPIO_NUM_1_5 ((1-1)*32+5)
|
||||
|
||||
//key gpio
|
||||
//GPIO4_IO22 = (4-1)*32+22=118
|
||||
#define KEY1_GP_NUM 15 //G1-15 = (1-1)*32+15
|
||||
#define KEY2_GP_NUM 11 //G1-11 = (1-1)*32+11
|
||||
#define KEY3_GP_NUM 12 //G1-12 = (1-1)*32+12
|
||||
#define KEY4_GP_NUM 13 //G1-13 = (1-1)*32+13
|
||||
#define KEY5_GP_NUM 10 //G1-10 = (1-1)*32+10
|
||||
#define KEY6_GP_NUM 14 //G1-14 = (1-1)*32+14
|
||||
|
||||
//lcd gpio
|
||||
#define LCD_EN_GP_NUM 79 //gpio3_15 ((3-1)*32+15)
|
||||
#define LCD_CTL_GP_NUM 81 //((3-1)*32+17)
|
||||
#define LCD_RS_GP_NUM 82
|
||||
#define LCD_E_GP_NUM 83
|
||||
#define LCD_RW_GP_NUM 84
|
||||
#define LCD_D1_GP_NUM 85
|
||||
#define LCD_D0_GP_NUM 86
|
||||
#define LCD_D3_GP_NUM 87
|
||||
#define LCD_D2_GP_NUM 88
|
||||
#define LCD_D5_GP_NUM 89
|
||||
#define LCD_D4_GP_NUM 90
|
||||
#define LCD_D7_GP_NUM 91
|
||||
#define LCD_D6_GP_NUM 92
|
||||
|
||||
#define FPGA_RST_GP_NUM 117 //G4-21 = (4-1)*32+21
|
||||
|
||||
//tuner reset gpio
|
||||
#define TUNER_RST_GP_NUM 3 //gpio1_3 =(1-1)*32+3
|
||||
|
||||
//i2c gpio
|
||||
//GPIO4_IO22 = (4-1)*32+22=118
|
||||
#define I2C2_SDA_GP_NUM 31 //G1-31
|
||||
#define I2C2_SCL_GP_NUM 30 //G1-30
|
||||
|
||||
#define I2C1_SDA_GP_NUM 29 //G1-29
|
||||
#define I2C1_SCL_GP_NUM 28 //G1-28
|
||||
|
||||
|
||||
typedef enum{E_IO_L=0,E_IO_H=1}E_IO_VAL;
|
||||
typedef enum{E_IO_OUT=0,E_IO_IN=1}E_IO;
|
||||
|
||||
|
||||
int set_gpio_export(uint16_t gp_num);
|
||||
int set_gpio_unexport(uint16_t gp_num);
|
||||
int set_gpio_io_direct(uint16_t gp_num,E_IO io_dir);
|
||||
int set_gpio_value(uint16_t gp_num, E_IO_VAL val);
|
||||
int get_gpio_value(uint16_t gp_num, uint8 *pval);
|
||||
extern int set_gpio_value_by_shell(uint16_t gp_num, E_IO_VAL val);
|
||||
extern int get_goio_value_by_shell(uint16_t gp_num, uint8 *pval);
|
||||
|
||||
|
||||
void gpio_mutex_init(void);
|
||||
void key_gpio_init(void);
|
||||
void lcd_gpio_init(void);
|
||||
void i2c_gpio_init(void);
|
||||
|
||||
void fpga_reset_gpio_init(void);
|
||||
|
||||
#endif//_IGPIO_H_
|
||||
|
||||
@@ -0,0 +1,13 @@
|
||||
#ifndef __HTTP_GET_H__
|
||||
#define __HTTP_GET_H__
|
||||
|
||||
/*
|
||||
@add
|
||||
*/
|
||||
|
||||
|
||||
|
||||
extern uint32 Net_write_RF(uint8 param);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,12 @@
|
||||
#ifndef __II2C_H__
|
||||
#define __II2C_H__
|
||||
|
||||
#include "type.h"
|
||||
|
||||
|
||||
extern uint8 i2c_write(int fd, uint8 reg, uint8 val);
|
||||
extern uint8 i2c_read(int fd, uint8 reg, uint8 *pval);
|
||||
extern int ii2c_com_init(const char*i2c_node_name,uint8 i2c_addr, int *pfd);
|
||||
|
||||
#endif//__II2C_H__
|
||||
|
||||
@@ -0,0 +1,52 @@
|
||||
#ifndef __IPARA_CFG_H__
|
||||
#define __IPARA_CFG_H__
|
||||
|
||||
#include <fcntl.h> //define O_WRONLY and O_RDONLY
|
||||
#include <pthread.h>
|
||||
#include "type.h"
|
||||
|
||||
|
||||
#define F_EXC_CFG_PARA_FILE "/aw/anywave/cfg/exc_cfg.conf"
|
||||
#define F_EXC_CFG_PARA_BKP1_FILE "/aw/anywave/cfg/bkp/exc_cfg_bkp1.conf"
|
||||
#define F_EXC_CFG_PARA_BKP2_FILE "/aw/anywave/cfg/bkp/exc_cfg_bkp2.conf"
|
||||
|
||||
#define F_EXC_CFG_PARA_BKP_FILE "/aw/anywave/cfg/bkp/exc_cfg_bkp.conf"
|
||||
|
||||
#define STR_HW_SYS_PARA_TYPE "HW_SYS_PARA"
|
||||
#define STR_BLK_SYS_PARA_TYPE "BLK_SYS_PARA"
|
||||
#define STR_LCD_SYS_PARA_TYPE "LCD_SYS_PARA"
|
||||
|
||||
#define DEF_REG_PARA 0xff //默认参数一律按照0xff
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
E_HW_SYS_PARA_TYPE=0,
|
||||
E_LCD_SYS_PARA_TYPE,
|
||||
}E_WR_PARA_TYPE;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
E_NORMAL_FILE_TYPE=0,
|
||||
E_BKP1_FILE_TYPE,
|
||||
E_BKP2_FILE_TYPE,
|
||||
E_NULL_FILE_TYPE
|
||||
}E_WR_FILE_TYPE;
|
||||
|
||||
|
||||
typedef struct{
|
||||
uint16 para_id;
|
||||
E_WR_PARA_TYPE para_type;
|
||||
char para_name[20];
|
||||
uint16 para_def;//实际为8bit
|
||||
E_WR_FILE_TYPE file_type;
|
||||
}S_PARA_IO_ELEMENT;
|
||||
|
||||
|
||||
|
||||
extern int set_para_to_e_map(uint16 para_id, uint8 para_val, uint8 chip);
|
||||
extern uint8 get_para_from_e_map(uint16 para_id, uint8 chip);
|
||||
extern uint8 get_para_from_e_map_v2(uint16 para_id, uint8 default_val, uint8 chip);
|
||||
|
||||
#endif//__IPARA_CFG_H__
|
||||
|
||||
Executable
+56
@@ -0,0 +1,56 @@
|
||||
#ifndef __IQ_RX_H__
|
||||
#define __IQ_RX_H__
|
||||
|
||||
/* ORx IQ receive/analysis thread (task/iq_rx.c). */
|
||||
void *iq_rx_thr(void *arg);
|
||||
|
||||
/* Runtime spectrum/IQ processing switch. Defaults to disabled after boot. */
|
||||
int iq_spec_get_enable(void);
|
||||
void iq_spec_set_enable(int enable);
|
||||
|
||||
/*
|
||||
* Newest UIMD/LIMD measured on the imx6's own 10 MSPS ORx window.
|
||||
*
|
||||
* Same taps as the FPGA's imd_imd_fft_meas -- centre bin at +24.414 kHz and the two
|
||||
* shoulder bins at +-3.1494 MHz -- but averaged over 11 bins (+-12.2 kHz) each and
|
||||
* Welch-averaged over the whole 26.2 ms window. LIMD is always the shoulder on the
|
||||
* pilot's side of the carrier; which one that is follows the measured pilot, so a
|
||||
* spectral inversion cannot silently swap the two.
|
||||
*
|
||||
* The FPGA's own registers cannot be used any more: its 20-bit |DFT|^2 output
|
||||
* quantises the shoulder bins to 0 once the shoulder is better than ~45 dB, and
|
||||
* lcd_task.c's `if (imd_l == 0) imd_l = 1` then reports a constant.
|
||||
*
|
||||
* limd_db/uimd_db are 10*log10(P_centre / P_shoulder), i.e. positive dB, no +11 dB
|
||||
* display offset applied.
|
||||
*
|
||||
* Returns 1 and fills both pointers when a window newer than IQ_IMD_MAX_AGE seconds
|
||||
* is available, 0 otherwise (caller should keep whatever it had).
|
||||
*/
|
||||
#define IQ_IMD_MAX_AGE 10
|
||||
|
||||
/* The 8VSB demod runs on a nice'd thread on a core that is already ~40% busy in
|
||||
* softirq, so a fresh window lands every ~10 s rather than every second. */
|
||||
#define IQ_SNR_MAX_AGE 30
|
||||
|
||||
int iq_get_imd(float *limd_db, float *uimd_db);
|
||||
|
||||
/*
|
||||
* 8VSB demodulation of one complete window (task/iq_vsb.c): matched filter, symbol
|
||||
* recovery, SNR and the eye-diagram density map, published as /tmp/iq_eye.json.
|
||||
* `win` is the raw window buffer (262144 big-endian int16 I/Q pairs).
|
||||
*/
|
||||
void iq_vsb_analyse(const unsigned char *win, int wid);
|
||||
|
||||
/*
|
||||
* Newest 8VSB SNR (== MER, I-path definition) measured on that window. Returns 1 and
|
||||
* fills snr_db when a window newer than IQ_IMD_MAX_AGE seconds has been demodulated
|
||||
* with segment sync locked, 0 otherwise.
|
||||
*
|
||||
* This replaces the value lcd_task.c used to fabricate: its "limit snr display" block
|
||||
* overwrote the FPGA's SNR with a two-valued function of the (bottomed-out) IMD.
|
||||
*/
|
||||
int iq_get_snr(float *snr_db);
|
||||
void iq_vsb_clear_results(void);
|
||||
|
||||
#endif /* __IQ_RX_H__ */
|
||||
Executable
+34
@@ -0,0 +1,34 @@
|
||||
#ifndef __ISPI_H_
|
||||
#define __ISPI_H_
|
||||
|
||||
#include "../inc/type.h"
|
||||
|
||||
|
||||
|
||||
//----------------------
|
||||
#define SPI_DELAY 0
|
||||
#define SPEED 6000000//9000000 /* note: 9M check err, do not over 6M*/
|
||||
|
||||
#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
|
||||
|
||||
#define HALF_DUPLEX 1
|
||||
#define FULL_DUPLEX 2
|
||||
|
||||
#define SPI_BUFF_MAX 4096
|
||||
|
||||
//----------------------
|
||||
extern int init_spi_dev(char *pspi_node_name, int *pfd, uint8 mode, uint8 bits, uint8 speed);
|
||||
extern uint8_t iSPI_I2S_Send4Byte(int spi_fd, uint8* pdata);
|
||||
|
||||
extern int spi_w(int fd, u8 addr, uint16_t u16_data);
|
||||
extern int spi_r(int fd, u8 addr, u16 *pdata);
|
||||
extern int spi_transfer_big_block(int spi_fd, uint8 *pdata, int bytelen);
|
||||
extern int spi_receiver_big_block(int spi_fd, uint8 *pdata, int bytelen);
|
||||
//----------------------
|
||||
|
||||
int spi_w_addr16_data8(int fd, u16 addr, uint8_t u8_data);
|
||||
int spi_r_addr16_data8(int fd, u16 addr, u8 *pdata);
|
||||
|
||||
|
||||
#endif//__ISPI_H_
|
||||
|
||||
Executable
+104
@@ -0,0 +1,104 @@
|
||||
#ifndef _ISYS_COM_H__
|
||||
#define _ISYS_COM_H__
|
||||
|
||||
#include <sys/time.h>
|
||||
#include <stdio.h>
|
||||
#include <stdarg.h>
|
||||
#include "type.h"
|
||||
#include <time.h>
|
||||
#include "type.h"
|
||||
#include "lcd_task.h"
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
当前日志级别配置
|
||||
*/
|
||||
#ifndef LOGGER_CFG_LEVEL
|
||||
#define LOGGER_CFG_LEVEL LOG_DEBUG
|
||||
#endif
|
||||
|
||||
/*
|
||||
日志级别定义，数值越小，级别越高
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
LOG_OFF = 0,
|
||||
LOG_ERR,
|
||||
LOG_WARN,
|
||||
LOG_INFO,
|
||||
LOG_DEBUG,
|
||||
LOG_ALL
|
||||
}E_LOG_LEVEL;
|
||||
|
||||
/*
|
||||
log类型定义
|
||||
*/
|
||||
|
||||
typedef enum
|
||||
{
|
||||
I_USER_CFG = 0, // 用户手动配置
|
||||
I_SYS_STATUS, // 系统状态信息
|
||||
I_NOUSED,
|
||||
I_RUN_STATUS
|
||||
}E_LOG_TYPE;
|
||||
|
||||
|
||||
|
||||
|
||||
/*
|
||||
根据配置的日志级别输出日志
|
||||
*/
|
||||
#define log_printf(level, info_type, fmt, arg...) \
|
||||
do {\
|
||||
if (level <= LOGGER_CFG_LEVEL) {\
|
||||
if (level == LOG_ERR) {\
|
||||
printf("[%s:%d ERR] "fmt, __func__, __LINE__, ##arg);\
|
||||
}\
|
||||
if (level == LOG_WARN) {\
|
||||
printf("[%s:%d WARN] "fmt, __func__, __LINE__, ##arg);\
|
||||
}\
|
||||
if (level == LOG_INFO) {\
|
||||
if(info_type==I_USER_CFG){\
|
||||
printf("[%s:%d INFO USER-CFG] "fmt,__func__, __LINE__, ##arg);\
|
||||
}\
|
||||
if(info_type==I_SYS_STATUS){\
|
||||
printf("[%s:%d INFO SYS-STATUS] "fmt, __func__, __LINE__, ##arg);\
|
||||
}\
|
||||
if(info_type==I_NOUSED){\
|
||||
printf("[%s:%d INFO] "fmt, __func__, __LINE__, ##arg);\
|
||||
}\
|
||||
if(info_type==I_RUN_STATUS){\
|
||||
printf("[%s:%d INFO RUN] "fmt, __func__, __LINE__, ##arg);\
|
||||
}\
|
||||
}\
|
||||
if (level == LOG_DEBUG) {\
|
||||
printf("[%s:%d DBG] "fmt, __func__, __LINE__, ##arg);\
|
||||
}\
|
||||
if (level == LOG_ALL) {\
|
||||
printf("[%s:%d ALL] "fmt, __func__, __LINE__, ##arg);\
|
||||
}\
|
||||
}\
|
||||
} while(0)
|
||||
|
||||
|
||||
unsigned long get_sys_tick(void);
|
||||
void thread_setnamev(const char* pname);
|
||||
void usr_print_current_time(void);
|
||||
uint32 usr_get_cur_time_ms(void);
|
||||
|
||||
extern int get_sys_time(S_SYS_TIME *ptime);
|
||||
extern void utc2localtime(time_t tUtcTime,struct tm *ptNow,int iZoneOffset);
|
||||
extern void set_sys_time(S_SYS_TIME *p);
|
||||
extern int read_file_data(char *file_name,char *buff, int len);
|
||||
extern int check_file_exist(char *filename);
|
||||
extern void get_beijing_time(struct tm *ptmBJ);
|
||||
extern int usr_set_sys_rtc_time(S_SYS_TIME *psys_time);
|
||||
extern void usr_get_sys_rtc_time(S_SYS_TIME *psys_time,S_ADVANCE_DT_PARA *pdt_time);
|
||||
extern void usr_sec_printf(const char* format, ...);
|
||||
extern int pox_system(const char *cmd_line);
|
||||
extern void syslog_thr(void * pvParameters);
|
||||
extern void check_and_load_bkppara_to_cfgfile();
|
||||
#endif
|
||||
|
||||
Executable
+157
@@ -0,0 +1,157 @@
|
||||
锘�#ifndef _ISYS_CONFIG_H_
|
||||
#define _ISYS_CONFIG_H_
|
||||
|
||||
#include <stdlib.h>
|
||||
#include <stdio.h>
|
||||
#include <string.h>
|
||||
#include <unistd.h>
|
||||
#include <fcntl.h> //define O_WRONLY and O_RDONLY
|
||||
#include "../inc/type.h"
|
||||
#include "../inc/igpio.h"
|
||||
|
||||
#define EMV6_3_TSOIP_NUM 2
|
||||
#define EMV7_0_TSOIP_NUM 1
|
||||
#define RELEASE_VERSION_NAME "/aw/release_version.ini"
|
||||
#define FILE_CA_PROC "/etc/rc_proc"
|
||||
|
||||
#define EMV63 0 // 此乃7.0
|
||||
// emv 6.3
|
||||
#if EMV63
|
||||
#define TSOIP_1_ETH "eth1"
|
||||
#define TSOIP_2_ETH "eth0"
|
||||
#define ADMIN_ETH "eth2"
|
||||
#else // EMV70
|
||||
#define TSOIP_1_ETH "eth1"
|
||||
#define ADMIN_ETH "eth0"
|
||||
#define TSOIP_2_ETH "----"
|
||||
#endif
|
||||
|
||||
typedef enum{
|
||||
TYPE_ASI1 = 0,
|
||||
TYPE_ASI2 = 1,
|
||||
TYPE_AUTO_A2 = 2, // asi or ip 自动
|
||||
TYPE_IP1 = 3,
|
||||
|
||||
#if EMV63
|
||||
TYPE_IP2 = 4,
|
||||
TYPE_AUTO_IP = 5,
|
||||
#endif
|
||||
|
||||
}E_TS_INPUT_TYPE;
|
||||
|
||||
typedef enum {
|
||||
TSOIP_1_ETH_INDEX = 0,
|
||||
TSOIP_2_ETH_INDEX,
|
||||
ADMIN_ETH_INDEX
|
||||
}ETH_INDEX;
|
||||
|
||||
#define IS_MULTI_ADDRESS(address) (((address&0xf0000000)==0xe0000000)?1:0)
|
||||
typedef struct
|
||||
{
|
||||
int socket;
|
||||
uint16 used;
|
||||
uint16 port;
|
||||
uint32 ip; //记录加入组播组的组播地址
|
||||
}S_PER_IGMP_INFO;
|
||||
|
||||
//-----------------------------------
|
||||
#define ___spi_dev__ 1
|
||||
#if ___spi_dev__
|
||||
|
||||
/*
|
||||
#define SPI1_CLK_GP_NUM 121 //((4-1)*32+25)
|
||||
#define SPI1_CS_GP_NUM 122
|
||||
#define SPI1_MOSI_GP_NUM 123
|
||||
#define SPI1_MISO_GP_NUM 124
|
||||
*/
|
||||
|
||||
//#define FPGA_C_JESD_ASI_RST (0x1<<0)
|
||||
//#define FPGA_C_JEAD_PHY_RST (0x1<<1)
|
||||
|
||||
//spi gpio
|
||||
#define SPI1_MISO_GP_NUM 124 // 4_28
|
||||
|
||||
#define AD9528_RESET_GPIO_NUM ((4-1)*32+19) //GPIO4_19
|
||||
|
||||
#define JESD_SEG_ADDR 1
|
||||
|
||||
#define JESD204B_AXI_WR_RD_CTRL_OFFSET_ADDR (0xB1)
|
||||
#define JESD204B_AXI_ADDRESS_L_OFFSET_ADDR (0xB2)
|
||||
#define JESD204B_AXI_ADDRESS_H_OFFSET_ADDR (0xB3)
|
||||
|
||||
#define JESD204B_AXI_WR_RD_1_OFFSET_ADDR (0xB4)
|
||||
#define JESD204B_AXI_WR_RD_2_OFFSET_ADDR (0xB5)
|
||||
#define JESD204B_AXI_WR_RD_3_OFFSET_ADDR (0xB6)
|
||||
#define JESD204B_AXI_WR_RD_4_OFFSET_ADDR (0xB7)
|
||||
|
||||
#define JESD204B_RESET_STATUS_OFFSET_ADDR (0xB8)
|
||||
#define JESD204b_WR (0x20)
|
||||
#define JESD204b_RD (0x10)
|
||||
|
||||
extern void spi_fpga_init(void);
|
||||
extern void ispi_fpga_send_buf_4Byte(uint8 *puc);
|
||||
extern uint8 GET_FPGA_SPI_MISO(void);
|
||||
extern void cfg_jesd204b(void);
|
||||
extern void TXEN_SET(int en);
|
||||
extern void jesd_reset_by_fpga(void);
|
||||
extern void sys_net_init(void);
|
||||
#endif//___spi_gpio__
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
PHY_TYPE_100M = 0,
|
||||
PHY_TYPE_1000M,
|
||||
PHY_TYPE_AUTO,
|
||||
PHY_TYPE_END,
|
||||
}E_PHY_TYPE;
|
||||
|
||||
|
||||
|
||||
//-----------------------------------
|
||||
#define ___key_gpio__ 1
|
||||
#if ___key_gpio__
|
||||
|
||||
|
||||
#endif//___spi_gpio__
|
||||
|
||||
|
||||
//-----------------------------------
|
||||
#define ___lcd_gpio__ 1
|
||||
#if ___lcd_gpio__
|
||||
|
||||
|
||||
#endif//___lcd_gpio__
|
||||
|
||||
#include "lcd_task.h"
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 type;
|
||||
uint16 need_free; //若为申请消息,此位不要用,默认已填充释放标记
|
||||
uint16 wPara;
|
||||
uint16 rPara;
|
||||
uint32 lPara;
|
||||
}MSG,*pMSG;
|
||||
|
||||
extern void tuner_config_power_on(void);
|
||||
extern void tuner_config_power_reset(void);
|
||||
|
||||
extern void local_ip_change_admin(S_CONFIG_PARA *ppara);
|
||||
extern void spect_spi_read(uint32 len,void *pdata,uint32 restart);
|
||||
|
||||
extern void hw_per_init(void);
|
||||
extern void fpga_para_init(void);
|
||||
extern void sys_net_init(void);
|
||||
extern void udp_imgp_init(const uint32 p_tsoip_ins);
|
||||
|
||||
extern void local_ip_change_tsoip(S_TSOIP_CONFIG_PARA *ppara,ETH_INDEX ethindex);
|
||||
extern int getMacByName(char * ifname, uint8 *macaddr);
|
||||
extern uint8_t get_temp_unit(void);
|
||||
extern void ispi_tx_big_block(uint8 *pdata, int bytelen);
|
||||
extern void ispi_rx_big_block(uint8 *pdata, int bytelen);
|
||||
void check_fpga_i2c();
|
||||
|
||||
#endif//_ISYS_CONFIG_H_
|
||||
|
||||
@@ -0,0 +1,113 @@
|
||||
#ifndef __UART_USER_H__
|
||||
#define __UART_USER_H__
|
||||
|
||||
#include "type.h"
|
||||
#include "config.h"
|
||||
#include "igpio.h"
|
||||
|
||||
|
||||
//---------------------------------------------
|
||||
|
||||
#define UART_ONESHU_CLOSED 0
|
||||
#define NO_USE 0
|
||||
#define __LINUX_SYS_TIME__ 1
|
||||
#define RS485_GPIO_NUM_DE GPIO_NUM_1_5
|
||||
|
||||
|
||||
//---------------------------------------------
|
||||
|
||||
#define UART_USER_232_COM 1
|
||||
#define UART_USER_485_COM 2
|
||||
|
||||
|
||||
#define RS232_NUM 8
|
||||
#define RS232_HEAD 0x47
|
||||
#define RS232_WEEPROM 0X82
|
||||
#define RS232_WSPECIAL 0X84
|
||||
#define RS232_TAILH 0x0d
|
||||
#define RS232_TAILL 0x0a
|
||||
typedef enum
|
||||
{
|
||||
OUT_HEAD ,
|
||||
OUT_COMMAND ,
|
||||
OUT_ADDRH ,
|
||||
OUT_ADDRL ,
|
||||
OUT_DATA ,
|
||||
OUT_CHECKSUM,
|
||||
OUT_TAILH ,
|
||||
OUT_TAILL
|
||||
}OUT_ENUM;
|
||||
|
||||
enum
|
||||
{
|
||||
UART_PARA_SET_ERR_OK = 0,
|
||||
UART_PARA_SET_ERR_LOCAL,
|
||||
UART_PARA_SET_ERR_INVALID,
|
||||
UART_PARA_SET_ERR_SUM,
|
||||
UART_PARA_SET_ERR_DRYLOOP,
|
||||
UART_PARA_SET_ERR_AGC_ON,
|
||||
UART_PARA_SET_ERR_UNKNOW_CMD,
|
||||
};
|
||||
|
||||
typedef enum //CMMB与EXCITER共用
|
||||
{
|
||||
CMMB_CONFIG_STEP_9V_VOL=0xa0,
|
||||
CMMB_CONFIG_STEP_50V_VOL,
|
||||
CMMB_CONFIG_STEP_50V_CUR,
|
||||
CMMB_CONFIG_STEP_881_GV,
|
||||
CMMB_CONFIG_STEP_FWD,
|
||||
CMMB_CONFIG_STEP_REF,
|
||||
CMMB_CONFIG_STEP_VSWR,
|
||||
CMMB_CONFIG_STEP_TEMP,
|
||||
CMMB_CONFIG_STEP_REF_ALARM,
|
||||
CMMB_CONFIG_STEP_FWD_ALARM,
|
||||
CMMB_CONFIG_STEP_TEMP_ALARM,
|
||||
|
||||
CMMB_CONFIG_STEP_50V_CUR2,
|
||||
CMMB_CONFIG_STEP_POWER_DEGREE,
|
||||
CMMB_CONFIG_STEP_FWD_HEX,
|
||||
CMMB_CONFIG_STEP_IP_ADDR,
|
||||
CMMB_CONFIG_STEP_MASK_ADDR, //0xaf
|
||||
CMMB_CONFIG_STEP_GATEWAY_ADDR,
|
||||
|
||||
CMMB_CONFIG_STEP_50V_CUR3,
|
||||
CMMB_CONFIG_STEP_50V_CUR4,
|
||||
CMMB_CONFIG_STEP_IN,
|
||||
CMMB_CONFIG_STEP_12V_VOL,
|
||||
|
||||
CMMB_CONFIG_STEP_SLOW_FLAG, //向ATSC激励器发送缓开机标识
|
||||
CMMB_CONFIG_STEP_FINE_POWER,
|
||||
CMMB_CONFIG_STEP_ALARM,
|
||||
|
||||
CMMB_CONFIG_EXC_RESET,//远程复位atsc激励器
|
||||
|
||||
CMMB_CONFIG_STEP_OVER,
|
||||
}EXCITER_SET_CMD;
|
||||
|
||||
extern uint32 uart_init_set_result_frame(uint8 *pin,uint8 *pout,uint32 err);
|
||||
extern void e2rom_save_power(S_RF_PARA *ppara);
|
||||
extern uint32 get_menu_index(void);
|
||||
extern BOOL proc_key_update(void * parg, uint8 key);
|
||||
extern uint32 get_menu_index(void);
|
||||
extern uint32 protocol_read(uint8 *pbufin,uint8 *pbufout);
|
||||
extern uint32 protocol_write(uint8 *pbufin,uint8 *pbufout);
|
||||
|
||||
extern void pa_conn_chk(void);
|
||||
uint32 pa_conn_sta(void);
|
||||
|
||||
void uart_task(void * pvParameters);
|
||||
extern int creat_uart_thread(void);
|
||||
|
||||
|
||||
extern void dev_pa_link_sec_check(void);
|
||||
extern int creat_uart_thread(void);
|
||||
extern int rs485_send_string(const uint8 *pbuf,uint32 len);
|
||||
extern int gps_uart_hw_init(void);
|
||||
extern int gps_rs232_read_string(uint8 *pbuf,uint32 len);
|
||||
extern int gps_rs232_send_string(const uint8 *pbuf,uint32 len);
|
||||
|
||||
extern int rs232_send_string(const uint8 *pbuf,uint32 len);
|
||||
extern int rs232_read_string(uint8 *pbuf,uint32 len);
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+339
@@ -0,0 +1,339 @@
|
||||
#ifndef _IWEB_TASK_H_
|
||||
#define _IWEB_TASK_H_
|
||||
#include "type.h"
|
||||
#include "config.h"
|
||||
#include "web_server.h"
|
||||
|
||||
#define NEW_EMV7_ONESHU 1
|
||||
#define SHU_TEST 0
|
||||
#define _DEBUG_DISPLAY_SOCKET_WEB_ 0
|
||||
#define _LOAD_RAM_PARA_ 1
|
||||
#define _LOAD_FILE_PARA_ 1
|
||||
#define _STORE_FILE_PARA_ 1
|
||||
#define _TOTAL_STATUS_ 0
|
||||
#define _TOTAL_SET_ 1
|
||||
|
||||
|
||||
#define OUTPUT_LOG_FILE_SHELL "sh /aw/anywave/web/sh/output_log_file.sh"
|
||||
|
||||
|
||||
//获取最开始的5条日志信息
|
||||
#define LOG_WEB_PER_FRAME_NUM 5
|
||||
|
||||
#define CGI_PRINT 1
|
||||
|
||||
|
||||
#define configTICK_RATE_HZ 100
|
||||
#define OS_TICKS_PER_SEC (configTICK_RATE_HZ)
|
||||
|
||||
#define TCP_SOCKET_SERVER_PORT 30002 //7777
|
||||
//#define CHECK_UPGRADE_PACKAGE "sh /aw/anywave/web/sh/upgrade_shell/check_package.sh"
|
||||
//#define DO_UPGRADE_RUN "sh /aw/anywave/web/sh/upgrade_shell/extract_run_package.sh"
|
||||
|
||||
|
||||
#define CGI_CTTB_WEB_SYSPARA 1
|
||||
#define CGI_CTTB_WEB_RFPARA 2
|
||||
#define CGI_CTTB_WEB_MODE_MFN 3
|
||||
#define CGI_CTTB_WEB_MODE_SFN 4
|
||||
|
||||
|
||||
/*#define CGI_CTTB_WEB_TS2IP_1 5
|
||||
#define CGI_CTTB_WEB_TS2IP_2 6
|
||||
#define CGI_CTTB_SYS_ADMIN_IPCFG 7*/
|
||||
|
||||
|
||||
#define CGI_ATSC_WEB_SYSPARA 1
|
||||
#define CGI_ATSC_WEB_RFPARA 2
|
||||
#define CGI_ATSC_WEB_MODE_MFN 3
|
||||
#define CGI_ATSC_WEB_MODE_SFN 4
|
||||
|
||||
|
||||
/*
|
||||
typedef enum
|
||||
{
|
||||
WEB_LOGIN = 0,
|
||||
WEB_STATUS,
|
||||
WEB_SET,
|
||||
WEB_RF,
|
||||
WEB_MODE,
|
||||
WEB_TS,
|
||||
WEB_LATCH,
|
||||
WEB_NET,
|
||||
WEB_LOG,
|
||||
WEB_PSIP,
|
||||
|
||||
WEB_STATUS_1,
|
||||
WEB_SET_1,
|
||||
WEB_RF_1,
|
||||
WEB_MODE_1,
|
||||
WEB_TS_1,
|
||||
WEB_LATCH_1,
|
||||
WEB_NET_1,
|
||||
WEB_INDEX_END,
|
||||
WEB_SET_FREQ
|
||||
} WEB_FLAG_INDEX;
|
||||
*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 ip_out;
|
||||
uint32 ip_out_rate_kbps;
|
||||
uint32 asi_out;
|
||||
uint32 asi_out_rate_kbps;
|
||||
}S_CGI_STATE_PARA_TSOIP;
|
||||
|
||||
|
||||
//---------------------------------------------------
|
||||
#define __usr_confirm_webh__ 1
|
||||
|
||||
#if __usr_confirm_webh__
|
||||
|
||||
|
||||
|
||||
typedef enum {
|
||||
GET_METHOD=0,
|
||||
SET_METHOD,
|
||||
UPDATE_METHOD
|
||||
}en_MSG_TYPE;
|
||||
|
||||
//key
|
||||
enum {
|
||||
|
||||
COM_STATUS_FORMS0_KEY,
|
||||
WEB_UPGRADE,
|
||||
|
||||
|
||||
/* sysstatus */
|
||||
CGIKEY_SYS_STATUS,
|
||||
CGIKEY_STATUS_TUNER,
|
||||
CGIKEY_STATUS_PAC,
|
||||
CGIKEY_STATUS_GPS,
|
||||
CGIKEY_SYS_VER,
|
||||
CGIKEY_STATUS_MAC_SN,
|
||||
|
||||
/* sys cfg */
|
||||
CGIKEY_SYS_CFG,
|
||||
CGIKEY_SYS_NET,
|
||||
CGIKEY_SYS_DPD_STATE,
|
||||
CGIKEY_SYS_RST,
|
||||
CGIKEY_SYS_TIME, // time
|
||||
|
||||
/* RF cfg */
|
||||
CGIKEY_RF_CFG,
|
||||
|
||||
/* RF cfg */
|
||||
CGIKEY_TSID_PSIP,
|
||||
CGIKEY_TSID_PSIP_CFG,
|
||||
|
||||
|
||||
CGIKEY_TSOIP_NUM,
|
||||
|
||||
/* tsoip_info */
|
||||
CGIKEY_TSOIP_INFO,
|
||||
|
||||
/* tsoip */
|
||||
CGIKEY_TSOIP_SYSTS1,
|
||||
CGIKEY_TSOIP_SYSTS2,
|
||||
|
||||
CGIKEY_TSOIP_NET1,
|
||||
CGIKEY_TSOIP_NET2,
|
||||
|
||||
/* log */
|
||||
LOG_FILE_OUTPUT,
|
||||
|
||||
CGIKEY_WEB_TITLE,
|
||||
|
||||
CGIKEY_ATSC1_LICENCES,
|
||||
CGIKEY_ATSC1_SYSTEM_KEY,
|
||||
CGIKEY_SYS_NTP,
|
||||
CGIKEY_SYS_TIMEZONE,
|
||||
CGIKEY_CFG_USR_PASSWD,
|
||||
#if 0
|
||||
/* Mode cfg */
|
||||
CGIKEY_MODE_MFN_CFG,
|
||||
CGIKEY_MODE_SFN_CFG,
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/* 10 MHz reference output enable (PR07). Appended at the very end so no
|
||||
* existing key value is renumbered — the CGI<->app socket keyType must
|
||||
* stay byte-aligned with every cgi_socket.h copy. */
|
||||
CGIKEY_M10_CFG,
|
||||
|
||||
/* IQ spectrum/8VSB analysis enable; keep appended to preserve old values. */
|
||||
CGIKEY_SPEC_CFG,
|
||||
|
||||
END_KEY
|
||||
};
|
||||
|
||||
|
||||
struct cgi_key_list {
|
||||
char *key;
|
||||
char *value;
|
||||
struct cgi_key_list *next;
|
||||
};
|
||||
|
||||
|
||||
typedef int (*get_func_t)(char *buf,short maxlen);
|
||||
typedef int (*set_func_t)(char *value,short maxlen);
|
||||
typedef int (*read_func_t)(char *value,short maxlen);
|
||||
typedef int (*save_func_t)(char *value,short maxlen);
|
||||
|
||||
|
||||
typedef struct cgi_func_list {
|
||||
uint16 keyNum;
|
||||
get_func_t get_func;
|
||||
set_func_t set_func;
|
||||
read_func_t read_func;
|
||||
save_func_t save_func;
|
||||
}cgi_func_list;
|
||||
|
||||
typedef struct cgi_process_elem {
|
||||
int method;
|
||||
int keyType;
|
||||
char data[1024];
|
||||
}cgi_process_elem_t,st_CGI_SOCK_PKG;
|
||||
|
||||
|
||||
|
||||
typedef enum {
|
||||
TYPE_U8=0,
|
||||
TYPE_I8,
|
||||
TYPE_U16,
|
||||
TYPE_I16,
|
||||
TYPE_U32,
|
||||
TYPE_I32,
|
||||
TYPE_FLOAT,
|
||||
TYPE_DOUBLE,
|
||||
TYPE_STRING,
|
||||
}en_PARA_TYPE;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
FACTOR_1=0,
|
||||
FACTOR_100,
|
||||
FACTOR_OTHER
|
||||
}en_FACTOR;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
void* paraVal;
|
||||
en_PARA_TYPE paraType;
|
||||
en_FACTOR paraFactor;
|
||||
}st_CGI_PARA;
|
||||
|
||||
|
||||
#endif//__usr_confirm_webh__
|
||||
|
||||
//---------------------------------------------------
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
unsigned char addr4;
|
||||
unsigned char addr3;
|
||||
unsigned char addr2;
|
||||
unsigned char addr1;
|
||||
}st_NET_PART_BYTE;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
NET_INFO_IP=1,
|
||||
NET_INFO_MASK,
|
||||
NET_INFO_GATEWAY
|
||||
}en_NET_PARA_TYPE;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned char addr4;
|
||||
unsigned char addr3;
|
||||
unsigned char addr2;
|
||||
unsigned char addr1;
|
||||
}PART;
|
||||
unsigned int addr;
|
||||
}IPV4,*PIPV4;*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
IPV4 ip;
|
||||
IPV4 mask;
|
||||
IPV4 gateway;
|
||||
}st_CAB_NET_PARA;
|
||||
|
||||
|
||||
|
||||
#define MSG_DATA_LEN 256
|
||||
typedef struct _msg_cgi_sock_
|
||||
{
|
||||
unsigned char msgtype; // 0:get 1:set 2:update
|
||||
char key[10]; //
|
||||
char data[MSG_DATA_LEN];
|
||||
|
||||
}msg_t, *msg_t_p;
|
||||
|
||||
typedef enum
|
||||
{
|
||||
SET_SYS_BOOT,
|
||||
SET_SYS_SHUTDOWN,
|
||||
SET_SYS_WAIT
|
||||
}en_BOOT_SHUTDOWN;
|
||||
|
||||
|
||||
|
||||
/*
|
||||
typedef struct {
|
||||
uint8 asi_input; // 码流选择
|
||||
u8_sw asi_status;
|
||||
u8_sw rate_status;
|
||||
uint8 gps_status;
|
||||
u8_sw sip_status;
|
||||
u8_sw pps_status;
|
||||
uint8 tsnr;// 7
|
||||
uint8 l_imd;
|
||||
uint8 r_imd;
|
||||
uint8 sfn_status; //单频网状态 0:正常 1:失效
|
||||
uint8 rf_cry; //射频本振 0:正常 1:失效
|
||||
uint32 temp;
|
||||
|
||||
uint32 max_dly;
|
||||
uint32 net_dly;
|
||||
uint32 lcl_dly;
|
||||
|
||||
uint32 ts1_pure_rate;
|
||||
uint32 ts2_pure_rate;
|
||||
}S_CGI_STATE_PARA_T;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 ldpc_qam;
|
||||
uint8 pn;
|
||||
uint8 zbpilot;
|
||||
uint8 int_int;
|
||||
}S_CGI_MODE_MFN_PARA_T;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 delay;
|
||||
uint16 txid;
|
||||
u8_sw cf;
|
||||
u8_sw sipdel;
|
||||
uint8 zp;
|
||||
}S_CGI_MODE_SFN_PARA_T;
|
||||
*/
|
||||
|
||||
extern void *web_thr(void *ppara);
|
||||
extern void http_save_change_para(void *p);
|
||||
extern void http_load_default_para(uint32 type, void *p);
|
||||
void ntp_manual_sync(void);
|
||||
void check_ntp_sync_state(void);
|
||||
int set_ntp_server_ip_to_system(u8 *pip, u8 ntp_switch, u8 only_manual_sync);
|
||||
|
||||
#endif//_IWEB_TASK_H_
|
||||
Executable
+15
@@ -0,0 +1,15 @@
|
||||
|
||||
|
||||
#ifndef __KEY_GPIO_H__
|
||||
#define __KEY_GPIO_H__
|
||||
|
||||
#include "type.h"
|
||||
|
||||
uint8 get_key_value(void);
|
||||
extern uint8 pr_key(uint8 keyvalue);
|
||||
extern uint8 check_long_press(uint8 key);
|
||||
extern uint8 printf_key_longpress(uint8 tmpval);
|
||||
extern uint8 get_long_press(void);
|
||||
#endif
|
||||
|
||||
|
||||
Executable
+30
@@ -0,0 +1,30 @@
|
||||
|
||||
|
||||
#ifndef __LCD_H__
|
||||
#define __LCD_H__
|
||||
#include "type.h"
|
||||
#include "igpio.h"
|
||||
|
||||
typedef enum
|
||||
{
|
||||
ARROW_LEFT,
|
||||
ARROW_RIGHT,
|
||||
}ARROW_DIRECTON;
|
||||
typedef enum{LINE_1=0,LINE_2}POS_LINE;
|
||||
|
||||
#define LINE_CHAR_NUM 20
|
||||
#define ARROW_CHAR_NUM 1 //只能为1 或者2
|
||||
|
||||
|
||||
|
||||
extern volatile uint32 sys_ready;
|
||||
void lcd_write_string(uint8 X,uint8 Y,void *s);
|
||||
void lcd_init(void);
|
||||
void lcd_write_temp_c(uint8 x,uint8 y);
|
||||
void lcd_write_temp_f(uint8 x,uint8 y);
|
||||
void lcd_write_cache(void);
|
||||
void set_gpio_fpga_reset(uint8 set_val);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+1510
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,68 @@
|
||||
#ifndef __LOG_TASK_H
|
||||
#define __LOG_TASK_H
|
||||
|
||||
#define LOG_TYPE_INVALID 0
|
||||
#define LOG_TYPE_POWER_ON 1
|
||||
#define LOG_TYPE_POWER_OFF 2
|
||||
#define LOG_TYPE_SYS_PARA_CHANGE 3
|
||||
#define LOG_TYPE_TIME_CHANGE 4
|
||||
#define LOG_TYPE_GPS_UNLOCK 5
|
||||
#define LOG_TYPE_GPS_LOCK 6
|
||||
#define LOG_TYPE_TS_ERR 7
|
||||
#define LOG_TYPE_TS_OK 8
|
||||
#define LOG_TYPE_OVER_TEMPERATURE 9
|
||||
#define LOG_TYPE_NORMAL_TEMPERATURE 10
|
||||
#define LOG_TYPE_OVER_FLOW 11
|
||||
#define LOG_TYPE_UNDER_FLOW 12
|
||||
//..其他告警类型
|
||||
#define LOG_TYPE_END 13 //结束标志
|
||||
|
||||
|
||||
|
||||
#define LOG_ERR_NO_ERR 0
|
||||
#define LOG_ERR_PARA_INVALID 1
|
||||
#define LOG_ERR_ALLOC_MSG_FAILED 2
|
||||
#define LOG_ERR_ALLOC_MEM_FAILED 3
|
||||
|
||||
|
||||
//日志最大多少条合适?
|
||||
#define LOG_MAX_RECORD_NUM 100
|
||||
|
||||
//一整条告警,64字节, 200*64 共12.5K字节
|
||||
#define LOG_PER_RECORD_SIZE 32
|
||||
typedef struct
|
||||
{
|
||||
uint8 valid;
|
||||
uint8 type;
|
||||
uint8 year;
|
||||
uint8 month;
|
||||
uint8 date;
|
||||
uint8 hour;
|
||||
uint8 min;
|
||||
uint8 sec; //发生时间 8字节
|
||||
|
||||
|
||||
uint8 content[LOG_PER_RECORD_SIZE-8]; //日志的具体内容,根据需要使用
|
||||
}S_LOG_STRUCT;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 ram_flag; //内存中数据是否有效标志
|
||||
uint8 lastest_index; //当前的下一条log指向的位置 0~(LOG_MAX_RECORD_NUM-1) 是即将保存的位置,
|
||||
uint8 total_num; //当前有效log数目
|
||||
S_LOG_STRUCT log[LOG_MAX_RECORD_NUM];
|
||||
}S_OS_LOG; //当前使用模式下,不能大于3.9K
|
||||
|
||||
|
||||
extern void log_task(void * pvParameters);
|
||||
|
||||
extern uint32 log_read_record_by_index(uint32 index,void *pdata);
|
||||
extern uint32 log_system_event_generate(S_SYS_TIME* ptime,uint32 type,uint8 *pcontent,uint32 ctlen);
|
||||
uint32 log_get_total_record_num(void);
|
||||
void log_record_reset(void);
|
||||
void log_record_printf(void);
|
||||
|
||||
extern int sntp_enable(uint8 en, uint8 *pAddr);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,77 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* File Name : LWIP.h
|
||||
* Description : This file provides code for the configuration
|
||||
* of the LWIP.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under Ultimate Liberty license
|
||||
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at:
|
||||
* www.st.com/SLA0044
|
||||
*
|
||||
*************************************************************************
|
||||
|
||||
*/
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __mx_lwip_H
|
||||
#define __mx_lwip_H
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "lwip/opt.h"
|
||||
#include "lwip/mem.h"
|
||||
#include "lwip/memp.h"
|
||||
#include "netif/etharp.h"
|
||||
#include "lwip/dhcp.h"
|
||||
#include "lwip/netif.h"
|
||||
#include "lwip/timeouts.h"
|
||||
#include "ethernetif.h"
|
||||
|
||||
/* Includes for RTOS ---------------------------------------------------------*/
|
||||
#if WITH_RTOS
|
||||
#include "lwip/tcpip.h"
|
||||
#endif /* WITH_RTOS */
|
||||
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
/* Global Variables ----------------------------------------------------------*/
|
||||
extern ETH_HandleTypeDef heth;
|
||||
|
||||
/* LWIP init function */
|
||||
void MX_LWIP_Init(void);
|
||||
|
||||
#if !WITH_RTOS
|
||||
/* USER CODE BEGIN 1 */
|
||||
/* Function defined in lwip.c to:
|
||||
* - Read a received packet from the Ethernet buffers
|
||||
* - Send it to the lwIP stack for handling
|
||||
* - Handle timeouts if NO_SYS_NO_TIMERS not set
|
||||
*/
|
||||
void MX_LWIP_Process(void);
|
||||
|
||||
/* USER CODE END 1 */
|
||||
#endif /* WITH_RTOS */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /*__ mx_lwip_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,159 @@
|
||||
|
||||
/**
|
||||
******************************************************************************
|
||||
* File Name : lwipopts.h
|
||||
* Description : This file overrides LwIP stack default configuration
|
||||
* done in opt.h file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under Ultimate Liberty license
|
||||
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at:
|
||||
* www.st.com/SLA0044
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion --------------------------------------*/
|
||||
#ifndef __LWIPOPTS__H__
|
||||
#define __LWIPOPTS__H__
|
||||
|
||||
#include "main.h"
|
||||
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/* Current version of LwIP supported by CubeMx: 2.0.3 -*/
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
|
||||
/* Within 'USER CODE' section, code will be kept by default at each generation */
|
||||
/* USER CODE BEGIN 0 */
|
||||
|
||||
/* USER CODE END 0 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* STM32CubeMX Specific Parameters (not defined in opt.h) ---------------------*/
|
||||
/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
|
||||
/*----- WITH_RTOS enabled (Since FREERTOS is set) -----*/
|
||||
#define WITH_RTOS 1
|
||||
/*----- CHECKSUM_BY_HARDWARE disabled -----*/
|
||||
#define CHECKSUM_BY_HARDWARE 1 //_USE_RVL_ 启用硬件校验
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
|
||||
/* LwIP Stack Parameters (modified compared to initialization value in opt.h) -*/
|
||||
/* Parameters set in STM32CubeMX LwIP Configuration GUI -*/
|
||||
/*----- Value in opt.h for MEM_ALIGNMENT: 1 -----*/
|
||||
#define MEM_ALIGNMENT 4
|
||||
/*----- Value in opt.h for LWIP_ETHERNET: LWIP_ARP || PPPOE_SUPPORT -*/
|
||||
#define LWIP_ETHERNET 1
|
||||
/*----- Value in opt.h for LWIP_DNS_SECURE: (LWIP_DNS_SECURE_RAND_XID | LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING | LWIP_DNS_SECURE_RAND_SRC_PORT) -*/
|
||||
#define LWIP_DNS_SECURE 7
|
||||
/*----- Value in opt.h for TCP_SND_QUEUELEN: (4*TCP_SND_BUF + (TCP_MSS - 1))/TCP_MSS -----*/
|
||||
#define TCP_SND_QUEUELEN 9//MEMP_NUM_TCP_SEG 9 --- 5
|
||||
/*----- Value in opt.h for TCP_SNDLOWAT: LWIP_MIN(LWIP_MAX(((TCP_SND_BUF)/2), (2 * TCP_MSS) + 1), (TCP_SND_BUF) - 1) -*/
|
||||
#define TCP_SNDLOWAT 1071
|
||||
/*----- Value in opt.h for TCP_SNDQUEUELOWAT: LWIP_MAX(TCP_SND_QUEUELEN)/2, 5) -*/
|
||||
#define TCP_SNDQUEUELOWAT 5
|
||||
/*----- Value in opt.h for TCP_WND_UPDATE_THRESHOLD: LWIP_MIN(TCP_WND/4, TCP_MSS*4) -----*/
|
||||
#define TCP_WND_UPDATE_THRESHOLD 536
|
||||
/*----- Value in opt.h for TCPIP_THREAD_STACKSIZE: 0 -----*/
|
||||
#define TCPIP_THREAD_STACKSIZE 1024
|
||||
/*----- Value in opt.h for TCPIP_THREAD_PRIO: 1 -----*/
|
||||
#define TCPIP_THREAD_PRIO 3
|
||||
/*----- Value in opt.h for TCPIP_MBOX_SIZE: 0 -----*/
|
||||
#define TCPIP_MBOX_SIZE 6
|
||||
/*----- Value in opt.h for SLIPIF_THREAD_STACKSIZE: 0 -----*/
|
||||
#define SLIPIF_THREAD_STACKSIZE 1024
|
||||
/*----- Value in opt.h for SLIPIF_THREAD_PRIO: 1 -----*/
|
||||
#define SLIPIF_THREAD_PRIO 3
|
||||
/*----- Value in opt.h for DEFAULT_THREAD_STACKSIZE: 0 -----*/
|
||||
#define DEFAULT_THREAD_STACKSIZE 1024
|
||||
/*----- Value in opt.h for DEFAULT_THREAD_PRIO: 1 -----*/
|
||||
#define DEFAULT_THREAD_PRIO 3
|
||||
/*----- Value in opt.h for DEFAULT_UDP_RECVMBOX_SIZE: 0 -----*/
|
||||
#define DEFAULT_UDP_RECVMBOX_SIZE 6
|
||||
/*----- Value in opt.h for DEFAULT_TCP_RECVMBOX_SIZE: 0 -----*/
|
||||
#define DEFAULT_TCP_RECVMBOX_SIZE 6
|
||||
/*----- Value in opt.h for DEFAULT_ACCEPTMBOX_SIZE: 0 -----*/
|
||||
#define DEFAULT_ACCEPTMBOX_SIZE 6
|
||||
/*----- Value in opt.h for RECV_BUFSIZE_DEFAULT: INT_MAX -----*/
|
||||
#define RECV_BUFSIZE_DEFAULT 2000000000
|
||||
/*----- Value in opt.h for LWIP_STATS: 1 -----*/
|
||||
#define LWIP_STATS 1
|
||||
/*----- Value in opt.h for CHECKSUM_GEN_IP: 1 -----*/
|
||||
#define CHECKSUM_GEN_IP 1
|
||||
/*----- Value in opt.h for CHECKSUM_GEN_UDP: 1 -----*/
|
||||
#define CHECKSUM_GEN_UDP 1
|
||||
/*----- Value in opt.h for CHECKSUM_GEN_TCP: 1 -----*/
|
||||
#define CHECKSUM_GEN_TCP 1
|
||||
/*----- Value in opt.h for CHECKSUM_GEN_ICMP: 1 -----*/
|
||||
#define CHECKSUM_GEN_ICMP 0
|
||||
/*----- Value in opt.h for CHECKSUM_GEN_ICMP6: 1 -----*/
|
||||
#define CHECKSUM_GEN_ICMP6 0
|
||||
/*----- Value in opt.h for CHECKSUM_CHECK_IP: 1 -----*/
|
||||
#define CHECKSUM_CHECK_IP 1
|
||||
/*----- Value in opt.h for CHECKSUM_CHECK_UDP: 1 -----*/
|
||||
#define CHECKSUM_CHECK_UDP 1
|
||||
/*----- Value in opt.h for CHECKSUM_CHECK_TCP: 1 -----*/
|
||||
#define CHECKSUM_CHECK_TCP 1
|
||||
/*----- Value in opt.h for CHECKSUM_CHECK_ICMP: 1 -----*/
|
||||
#define CHECKSUM_CHECK_ICMP 0
|
||||
/*----- Value in opt.h for CHECKSUM_CHECK_ICMP6: 1 -----*/
|
||||
#define CHECKSUM_CHECK_ICMP6 0
|
||||
/*-----------------------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN 1 */
|
||||
|
||||
/* TCP Maximum segment size. */
|
||||
#define TCP_MSS (1500 - 40) /* TCP_MSS = (Ethernet MTU - IP header size - TCP header size) */
|
||||
|
||||
/* MEM_SIZE: the size of the heap memory. If the application will send
|
||||
a lot of data that needs to be copied, this should be set high. */
|
||||
#define MEM_SIZE (5*1024)
|
||||
|
||||
/* MEMP_NUM_PBUF: the number of memp struct pbufs. If the application
|
||||
sends a lot of data out of ROM (or other static memory), this
|
||||
should be set high. */
|
||||
#define MEMP_NUM_PBUF 100
|
||||
|
||||
/* MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One
|
||||
per active UDP "connection". */
|
||||
#define MEMP_NUM_UDP_PCB 6
|
||||
|
||||
/* MEMP_NUM_TCP_PCB: the number of simulatenously active TCP
|
||||
connections. */
|
||||
#define MEMP_NUM_TCP_PCB 50
|
||||
|
||||
#define MEMP_NUM_TCP_PCB_LISTEN 50
|
||||
/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
|
||||
segments. */
|
||||
|
||||
/* MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP
|
||||
segments. */
|
||||
|
||||
#define MEMP_NUM_TCP_SEG 20 //MEMP_NUM_TCP_SEG 20 测试现改为10
|
||||
|
||||
/* ---------- DHCP options ---------- */
|
||||
/* Define LWIP_DHCP to 1 if you want DHCP configuration of
|
||||
interfaces. DHCP is not implemented in lwIP 0.5.1, however, so
|
||||
turning this on does currently not work. */
|
||||
#define LWIP_DHCP 1
|
||||
|
||||
/* ---------- Statistics options ---------- */
|
||||
#define LWIP_SNMP 1
|
||||
#define SNMP_PRIVATE_MIB 1
|
||||
|
||||
|
||||
|
||||
/* USER CODE END 1 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
#endif /*__LWIPOPTS__H__ */
|
||||
|
||||
/************************* (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,26 @@
|
||||
#ifndef _MAIN_H_
|
||||
#define _MAIN_H_
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file : main.h
|
||||
* @brief : Header for main.c file.
|
||||
* This file contains the common defines of the application.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* __MAIN_H */
|
||||
|
||||
/************************ (C) COPYRIGHT *****END OF FILE****/
|
||||
@@ -0,0 +1,31 @@
|
||||
/* Glue functions for the minIni library, based on the C/C++ stdio library
|
||||
*
|
||||
* Or better said: this file contains macros that maps the function interface
|
||||
* used by minIni to the standard C/C++ file I/O functions.
|
||||
*
|
||||
* By CompuPhase, 2008-2014
|
||||
* This "glue file" is in the public domain. It is distributed without
|
||||
* warranties or conditions of any kind, either express or implied.
|
||||
*/
|
||||
|
||||
/* map required file I/O types and functions to the standard C library */
|
||||
#include <stdio.h>
|
||||
|
||||
#define INI_FILETYPE FILE*
|
||||
#define ini_openread(filename,file) ((*(file) = fopen((filename),"rb")) != NULL)
|
||||
#define ini_openwrite(filename,file) ((*(file) = fopen((filename),"wb")) != NULL)
|
||||
#define ini_openrewrite(filename,file) ((*(file) = fopen((filename),"r+b")) != NULL)
|
||||
#define ini_close(file) (fclose(*(file)) == 0)
|
||||
#define ini_read(buffer,size,file) (fgets((buffer),(size),*(file)) != NULL)
|
||||
#define ini_write(buffer,file) (fputs((buffer),*(file)) >= 0)
|
||||
#define ini_rename(source,dest) (rename((source), (dest)) == 0)
|
||||
#define ini_remove(filename) (remove(filename) == 0)
|
||||
|
||||
#define INI_FILEPOS long int
|
||||
#define ini_tell(file,pos) (*(pos) = ftell(*(file)))
|
||||
#define ini_seek(file,pos) (fseek(*(file), *(pos), SEEK_SET) == 0)
|
||||
|
||||
/* for floating-point support, define additional types and functions */
|
||||
#define INI_REAL float
|
||||
#define ini_ftoa(string,value) sprintf((string),"%f",(value))
|
||||
#define ini_atof(string) (INI_REAL)strtod((string),NULL)
|
||||
@@ -0,0 +1,152 @@
|
||||
/* minIni - Multi-Platform INI file parser, suitable for embedded systems
|
||||
*
|
||||
* Copyright (c) CompuPhase, 2008-2017
|
||||
*
|
||||
* Licensed under the Apache License, Version 2.0 (the "License"); you may not
|
||||
* use this file except in compliance with the License. You may obtain a copy
|
||||
* of the License at
|
||||
*
|
||||
* http://www.apache.org/licenses/LICENSE-2.0
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
|
||||
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
|
||||
* License for the specific language governing permissions and limitations
|
||||
* under the License.
|
||||
*
|
||||
* Version: $Id: minIni.h 53 2015-01-18 13:35:11Z thiadmer.riemersma@gmail.com $
|
||||
*/
|
||||
#ifndef MININI_H
|
||||
#define MININI_H
|
||||
|
||||
#include "minGlue.h"
|
||||
|
||||
#if (defined _UNICODE || defined __UNICODE__ || defined UNICODE) && !defined INI_ANSIONLY
|
||||
#include <tchar.h>
|
||||
#define mTCHAR TCHAR
|
||||
#else
|
||||
/* force TCHAR to be "char", but only for minIni */
|
||||
#define mTCHAR char
|
||||
#endif
|
||||
|
||||
#if !defined INI_BUFFERSIZE
|
||||
#define INI_BUFFERSIZE 512
|
||||
#endif
|
||||
|
||||
#if defined __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
int ini_getbool(const mTCHAR *Section, const mTCHAR *Key, int DefValue, const mTCHAR *Filename);
|
||||
long ini_getl(const mTCHAR *Section, const mTCHAR *Key, long DefValue, const mTCHAR *Filename);
|
||||
int ini_gets(const mTCHAR *Section, const mTCHAR *Key, const mTCHAR *DefValue, mTCHAR *Buffer, int BufferSize, const mTCHAR *Filename);
|
||||
int ini_getsection(int idx, mTCHAR *Buffer, int BufferSize, const mTCHAR *Filename);
|
||||
int ini_getkey(const mTCHAR *Section, int idx, mTCHAR *Buffer, int BufferSize, const mTCHAR *Filename);
|
||||
|
||||
#if defined INI_REAL
|
||||
INI_REAL ini_getf(const mTCHAR *Section, const mTCHAR *Key, INI_REAL DefValue, const mTCHAR *Filename);
|
||||
#endif
|
||||
|
||||
#if !defined INI_READONLY
|
||||
int ini_putl(const mTCHAR *Section, const mTCHAR *Key, long Value, const mTCHAR *Filename);
|
||||
int ini_puts(const mTCHAR *Section, const mTCHAR *Key, const mTCHAR *Value, const mTCHAR *Filename);
|
||||
#if defined INI_REAL
|
||||
int ini_putf(const mTCHAR *Section, const mTCHAR *Key, INI_REAL Value, const mTCHAR *Filename);
|
||||
#endif
|
||||
#endif /* INI_READONLY */
|
||||
|
||||
#if !defined INI_NOBROWSE
|
||||
typedef int (*INI_CALLBACK)(const mTCHAR *Section, const mTCHAR *Key, const mTCHAR *Value, void *UserData);
|
||||
int ini_browse(INI_CALLBACK Callback, void *UserData, const mTCHAR *Filename);
|
||||
#endif /* INI_NOBROWSE */
|
||||
|
||||
#if defined __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
|
||||
#if defined __cplusplus
|
||||
|
||||
#if defined __WXWINDOWS__
|
||||
#include "wxMinIni.h"
|
||||
#else
|
||||
#include <string>
|
||||
|
||||
/* The C++ class in minIni.h was contributed by Steven Van Ingelgem. */
|
||||
class minIni
|
||||
{
|
||||
public:
|
||||
minIni(const std::string& filename) : iniFilename(filename)
|
||||
{ }
|
||||
|
||||
bool getbool(const std::string& Section, const std::string& Key, bool DefValue=false) const
|
||||
{ return ini_getbool(Section.c_str(), Key.c_str(), int(DefValue), iniFilename.c_str()) != 0; }
|
||||
|
||||
long getl(const std::string& Section, const std::string& Key, long DefValue=0) const
|
||||
{ return ini_getl(Section.c_str(), Key.c_str(), DefValue, iniFilename.c_str()); }
|
||||
|
||||
int geti(const std::string& Section, const std::string& Key, int DefValue=0) const
|
||||
{ return static_cast<int>(this->getl(Section, Key, long(DefValue))); }
|
||||
|
||||
std::string gets(const std::string& Section, const std::string& Key, const std::string& DefValue="") const
|
||||
{
|
||||
char buffer[INI_BUFFERSIZE];
|
||||
ini_gets(Section.c_str(), Key.c_str(), DefValue.c_str(), buffer, INI_BUFFERSIZE, iniFilename.c_str());
|
||||
return buffer;
|
||||
}
|
||||
|
||||
std::string getsection(int idx) const
|
||||
{
|
||||
char buffer[INI_BUFFERSIZE];
|
||||
ini_getsection(idx, buffer, INI_BUFFERSIZE, iniFilename.c_str());
|
||||
return buffer;
|
||||
}
|
||||
|
||||
std::string getkey(const std::string& Section, int idx) const
|
||||
{
|
||||
char buffer[INI_BUFFERSIZE];
|
||||
ini_getkey(Section.c_str(), idx, buffer, INI_BUFFERSIZE, iniFilename.c_str());
|
||||
return buffer;
|
||||
}
|
||||
|
||||
#if defined INI_REAL
|
||||
INI_REAL getf(const std::string& Section, const std::string& Key, INI_REAL DefValue=0) const
|
||||
{ return ini_getf(Section.c_str(), Key.c_str(), DefValue, iniFilename.c_str()); }
|
||||
#endif
|
||||
|
||||
#if ! defined INI_READONLY
|
||||
bool put(const std::string& Section, const std::string& Key, long Value) const
|
||||
{ return ini_putl(Section.c_str(), Key.c_str(), Value, iniFilename.c_str()) != 0; }
|
||||
|
||||
bool put(const std::string& Section, const std::string& Key, int Value) const
|
||||
{ return ini_putl(Section.c_str(), Key.c_str(), (long)Value, iniFilename.c_str()) != 0; }
|
||||
|
||||
bool put(const std::string& Section, const std::string& Key, bool Value) const
|
||||
{ return ini_putl(Section.c_str(), Key.c_str(), (long)Value, iniFilename.c_str()) != 0; }
|
||||
|
||||
bool put(const std::string& Section, const std::string& Key, const std::string& Value) const
|
||||
{ return ini_puts(Section.c_str(), Key.c_str(), Value.c_str(), iniFilename.c_str()) != 0; }
|
||||
|
||||
bool put(const std::string& Section, const std::string& Key, const char* Value) const
|
||||
{ return ini_puts(Section.c_str(), Key.c_str(), Value, iniFilename.c_str()) != 0; }
|
||||
|
||||
#if defined INI_REAL
|
||||
bool put(const std::string& Section, const std::string& Key, INI_REAL Value) const
|
||||
{ return ini_putf(Section.c_str(), Key.c_str(), Value, iniFilename.c_str()) != 0; }
|
||||
#endif
|
||||
|
||||
bool del(const std::string& Section, const std::string& Key) const
|
||||
{ return ini_puts(Section.c_str(), Key.c_str(), 0, iniFilename.c_str()) != 0; }
|
||||
|
||||
bool del(const std::string& Section) const
|
||||
{ return ini_puts(Section.c_str(), 0, 0, iniFilename.c_str()) != 0; }
|
||||
#endif
|
||||
|
||||
private:
|
||||
std::string iniFilename;
|
||||
};
|
||||
|
||||
#endif /* __WXWINDOWS__ */
|
||||
#endif /* __cplusplus */
|
||||
|
||||
#endif /* MININI_H */
|
||||
@@ -0,0 +1,27 @@
|
||||
#ifndef _QUE_H_
|
||||
#define _QUE_H_
|
||||
|
||||
#include <sys/types.h> //for key_t
|
||||
#include <stddef.h> //for size_t
|
||||
#include <sys/types.h> //for ssize_t
|
||||
|
||||
|
||||
/**
|
||||
* @param[in] qid
|
||||
* @param[in] pdata
|
||||
* @param[in] len
|
||||
* @param[in] timeout ms
|
||||
* @return len if successful, -1 error
|
||||
*/
|
||||
ssize_t send_que_timedwait(key_t qid,void* pdata,size_t len,int timeout);
|
||||
|
||||
/**
|
||||
* @param[in] qid
|
||||
* @param[in] pdata
|
||||
* @param[in] len
|
||||
* @param[in] timeout ms
|
||||
* @return >0 if successful, -1 error
|
||||
*/
|
||||
ssize_t read_que_timedwait(key_t qid,void* pdata,size_t len,int timeout);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,98 @@
|
||||
#ifndef __MSG_H__
|
||||
#define __MSG_H__
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <sys/ipc.h>
|
||||
#include <sys/msg.h>
|
||||
#include "../inc/type.h"
|
||||
#include "../inc/isys_config.h"
|
||||
|
||||
|
||||
#define MAX_TEXT 512
|
||||
|
||||
#define CTTB_MSG 2222
|
||||
//#define MSG_NEED_FREE 0x55
|
||||
|
||||
|
||||
// MSG结构体里
|
||||
typedef enum {
|
||||
MSG_WEB_DATA = 1,
|
||||
|
||||
|
||||
MSG_DATA_MAX_END
|
||||
}ENUM_MSG_TYPE;
|
||||
|
||||
|
||||
//typedef struct {
|
||||
// uint16 type;
|
||||
// uint16 need_free; //若为申请消息,此位不要用,默认已填充释放标记
|
||||
// uint16 rPara;
|
||||
// uint32 lPara;
|
||||
//}MSG,*pMSG;
|
||||
|
||||
struct msg_st {
|
||||
long mtype;
|
||||
MSG msg; // 内含 旧msg 结构体
|
||||
};
|
||||
|
||||
|
||||
|
||||
//---------------------------------------------
|
||||
|
||||
#if 1 //@CFIRMED
|
||||
|
||||
enum __MSG_KEY_ID_{
|
||||
WEB_MSG_KEY_ID = 1235,
|
||||
LCD_MSG_KEY_ID,
|
||||
UART_MSG_KEY_ID,
|
||||
TSOIP_MSG_KEY_ID,
|
||||
LOG_MSG_KEY_ID,
|
||||
//
|
||||
GPS_UART_MSG_KEY_ID,
|
||||
|
||||
KEY_ID_END
|
||||
};
|
||||
|
||||
typedef enum {
|
||||
MSGQ_TYPE_ALL = 0,// must 0
|
||||
//
|
||||
MSGQ_TYPE_WEB,
|
||||
MSGQ_TYPE_LCD,
|
||||
MSGQ_TYPE_UART,
|
||||
MSGQ_TYPE_TSOIP,
|
||||
MSGQ_TYPE_LOG,
|
||||
//
|
||||
MSGQ_TYPE_GPS_UART,
|
||||
|
||||
MSGQ_MAX_END
|
||||
}MSGQ_TYPE;
|
||||
|
||||
|
||||
#define msg_send_to_web(p_msg) (sys_msg_send(p_msg, (key_t)WEB_MSG_KEY_ID))
|
||||
#define msg_send_to_lcd(p_msg) (sys_msg_send(p_msg, (key_t)LCD_MSG_KEY_ID))
|
||||
#define msg_send_to_uart(p_msg) (sys_msg_send(p_msg, (key_t)UART_MSG_KEY_ID))
|
||||
#define msg_send_to_gps_uart(p_msg) (sys_msg_send(p_msg, (key_t)GPS_UART_MSG_KEY_ID))
|
||||
#define msg_send_to_tsoip(p_msg) (sys_msg_send(p_msg, (key_t)TSOIP_MSG_KEY_ID))
|
||||
|
||||
#endif//@CONFIRMED
|
||||
//---------------------------------------------
|
||||
|
||||
//#define cttb_msg_send_to_web(p_msg) (cttb_msg_send(p_msg, (key_t)WEB_MSG_KEY_ID))
|
||||
//#define cttb_msg_send_to_lcd(p_msg) (cttb_msg_send(p_msg, (key_t)LCD_MSG_KEY_ID))
|
||||
//#define cttb_msg_send_to_uart(p_msg) (cttb_msg_send(p_msg, (key_t)UART_MSG_KEY_ID))
|
||||
//#define cttb_msg_send_to_tsoip(p_msg) (cttb_msg_send(p_msg, (key_t)TSOIP_MSG_KEY_ID))
|
||||
//#define cttb_msg_send_to_log(p_msg) (cttb_msg_send(p_msg, (key_t)LOG_MSG_KEY_ID))
|
||||
|
||||
|
||||
|
||||
extern int sys_msg_send(MSG *p_msg, key_t keyid);
|
||||
|
||||
extern int creat_web_msg_thread(void);
|
||||
extern int creat_lcd_msg_thread(void);
|
||||
extern int creat_uart_msg_thread(void);
|
||||
extern int creat_tsoip_msg_thread(void);
|
||||
extern int creat_log_msg_thread(void);
|
||||
extern int creat_gps_uart_msg_thread(void);
|
||||
extern void sec_msg_to_gps_uart_thr(void);
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,46 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file netconf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 31-October-2011
|
||||
* @brief This file contains all the functions prototypes for the netconf.c
|
||||
* file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __NETCONF_H
|
||||
#define __NETCONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void LwIP_Init(void);
|
||||
void LwIP_DHCP_task(void * pvParameters);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __NETCONF_H */
|
||||
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,395 @@
|
||||
/**********************************************************************
|
||||
RTOS底层接口函数头文件
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#ifndef __OS_TASK_H
|
||||
#define __OS_TASK_H
|
||||
#include "type.h"
|
||||
//#include "FreeRTOS.h"
|
||||
//#include "queue.h"
|
||||
//#include "task.h"
|
||||
#include "config.h"
|
||||
#include "isys_config.h"
|
||||
|
||||
#define WATCHDOG_ENABLE (0)
|
||||
#define TASK_CHK_ENABLE (1)
|
||||
|
||||
|
||||
|
||||
#define USE_LCD_MOUDLE (1)
|
||||
#define USE_WEB_MODULE (1)
|
||||
|
||||
//@TMP_NOT_USED
|
||||
//#define USE_LOG_MODULE (1)
|
||||
|
||||
|
||||
#define OS_TICKS_PER_SEC (configTICK_RATE_HZ)
|
||||
#define OS_WAIT_FOREVER (portMAX_DELAY)
|
||||
#define OS_PER_TICK_MS (portTICK_RATE_MS)
|
||||
|
||||
#define OS_TASK_OK (0)
|
||||
#define OS_TASK_MAX_ABNORMAL_TIME (30) //异常最大允许时间
|
||||
|
||||
#define OS_MSG_MAGIC_WORD (0X5533)
|
||||
#define OS_MSG_ISR_TASK_ID (0XFF) //自定义的中断的任务ID
|
||||
|
||||
#define USE_MSG_DEBUG 0 //是否启用消息debug模式
|
||||
#define USE_MEM_DEBUG 1
|
||||
|
||||
|
||||
#define MAX_TIMER_NUM 10
|
||||
|
||||
|
||||
#define ERR_NO_ERR 0
|
||||
#define ERR_CREATE_TASK_FAILED 1
|
||||
#define ERR_INVALID_PARA 2
|
||||
#define ERR_INVALID_POINTER 3
|
||||
#define ERR_TASKID_TOO_LARGE 4
|
||||
#define ERR_NO_MEM 5
|
||||
#define ERR_CREATE_QUEUE_FAILED 6
|
||||
#define ERR_SEND_MSG_FAILED 7
|
||||
#define ERR_SEM_PTR_INVALID 8
|
||||
#define ERR_POST_SEM_FAILED 9
|
||||
#define ERR_PEND_SEM_FAILED 10
|
||||
|
||||
#define ERR_MUTEX_PTR_INVALID 11
|
||||
#define ERR_TAKE_MUTEX_FAILED 12
|
||||
#define ERR_GIVE_MUTEX_FAILED 13
|
||||
#define ERR_I2C_NUM_ERR 14
|
||||
#define ERR_SPI_NUM_ERR 15
|
||||
#define ERR_CREATE_SEM_FAILED 16
|
||||
#define ERR_CREATE_MUTEX_FAILED 17
|
||||
|
||||
typedef void * SEM_HANDLE;
|
||||
typedef void * MUTEX_HANDLE;
|
||||
|
||||
typedef uint32 HANDLE;
|
||||
|
||||
|
||||
#define USE_DEBUG_UART 0 //串口调试信息开关 提交版本库时,本值必须为0
|
||||
|
||||
#if USE_DEBUG_UART //串口信息调试,可直接调用printf打印输出
|
||||
#define DEBUG_UART 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
#if USE_DEBUG_UART
|
||||
extern int printf(const char *,...);
|
||||
#else
|
||||
#include "stdio.h"
|
||||
#define printf(p,...) //若没开启调试模式,printf定义为空
|
||||
#endif
|
||||
*/
|
||||
|
||||
/*
|
||||
typedef struct
|
||||
{
|
||||
uint16 type;
|
||||
uint16 need_free; //若为申请消息,此位不要用,默认已填充释放标记
|
||||
uint16 wPara;
|
||||
uint16 rPara;
|
||||
uint32 lPara;
|
||||
}MSG,*pMSG;*/
|
||||
|
||||
typedef struct
|
||||
{
|
||||
MSG msg;
|
||||
uint16 magci_word;
|
||||
uint8 alloc_id;
|
||||
uint8 rec_id;
|
||||
}MSG_DEBUG;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 tick;
|
||||
uint32 size;
|
||||
}MEM_DEBUG_HEADER;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
#if USE_MEM_DEBUG
|
||||
MEM_DEBUG_HEADER header;
|
||||
#endif
|
||||
uint8 mem[1];
|
||||
}MEM_PTR;
|
||||
|
||||
|
||||
#define MAX_TASK 16 //当前用户层任务上限 不包含以太网以及系统任务
|
||||
|
||||
|
||||
//数组下标为task_id
|
||||
typedef struct
|
||||
{
|
||||
uint32 num;
|
||||
uint8 created[MAX_TASK]; //任务是否建立标识
|
||||
uint8 status[MAX_TASK];
|
||||
uint8 pause[MAX_TASK]; //暂停时间长度,单位 秒
|
||||
uint8 ignore_chk[MAX_TASK]; //忽略检查,特殊任务使用
|
||||
xQueueHandle queue[MAX_TASK];
|
||||
}SYS_TASK,*pSYS_TASK;
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 isr_send_num;
|
||||
uint32 task_send_num;
|
||||
uint32 isr_alloc_num;
|
||||
uint32 task_alloc_num;
|
||||
uint32 free_num;
|
||||
}S_MSG_STATE;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 used;
|
||||
uint32 total;
|
||||
}S_MEM_STATE;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 min_num;
|
||||
uint32 min_msg_q[MAX_TASK];
|
||||
uint32 sec_num;
|
||||
uint32 sec_msg_q[MAX_TASK]; //依次存放配置的任务ID
|
||||
}TIME_MSG_Q;
|
||||
|
||||
typedef struct
|
||||
{ //待扩展
|
||||
uint32 reset_total_time;
|
||||
S_SYS_TIME close_time;
|
||||
|
||||
#if USE_LCD_MOUDLE
|
||||
uint8 os_log[1];
|
||||
#endif
|
||||
|
||||
}S_BACKUP_MEM;
|
||||
|
||||
|
||||
//持续按键,等待间隔
|
||||
#define KEY_DELAY_TIME (300)
|
||||
#define TMR_IDLE 0
|
||||
#define TMR_RUN 1
|
||||
#define TMR_STOP 2
|
||||
#define TMR_TYPE_ONE 0
|
||||
#define TMR_TYPE_CYCLE 1
|
||||
|
||||
#define MSG_NEED_FREE (0x55)
|
||||
#define MSG_NO_NEED_FREE (0xaa)
|
||||
|
||||
#define MSG_NEED_TO_FREE(pmsg) (pmsg->need_free==MSG_NEED_FREE)
|
||||
|
||||
|
||||
enum{RET_OK = 0,RET_ERR,RET_NO_MEM,RET_NOT_FIND,RET_RET_ERR,RET_WRITE_FAIL,RET_READ_FAIL};
|
||||
|
||||
|
||||
typedef struct __TIMER
|
||||
{
|
||||
uint32 state;
|
||||
uint32 ticks;
|
||||
uint32 count;
|
||||
uint32 type;
|
||||
uint32 task_id; //由创建该消息的接收
|
||||
MSG msg;
|
||||
}TIMER,*PTIMER;
|
||||
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
MSG_RS232 = 0x10,
|
||||
MSG_ETH,
|
||||
MSG_SEC,
|
||||
MSG_MINUTE,
|
||||
MSG_WRITE_PARA,
|
||||
MSG_READ_PARA,
|
||||
MSG_KEY,
|
||||
MSG_TIMER,
|
||||
MSG_UPGRADE,
|
||||
MSG_HTTP_UPDATE, //http发送给液晶做update校正,
|
||||
MSG_WEB_SAVE_PARA,
|
||||
MSG_FPGA_UPGRADE,//MSG_FPGA_UPGRADE_OVER
|
||||
MSG_UDP_ALRM,
|
||||
MSG_UART_ALRM,
|
||||
MSG_LOG,
|
||||
MSG_LOG_RECORD_RESET,
|
||||
MSG_UART_RE_INIT,
|
||||
MSG_SHOW_WAIT,
|
||||
MSG_PSTS_UPDATE,
|
||||
MSG_MCU_REBOOT,
|
||||
|
||||
|
||||
MSG_IGMP_REINIT,
|
||||
}MSG_TYPE;
|
||||
|
||||
enum{
|
||||
DISPLAY_FPGA_UPGRADE_OVER=1,
|
||||
DISPLAY_FPGA_UPGRADE_ERR,
|
||||
DISPLAY_FPGA_UPGRADE_BUSY_TIMEOUT,
|
||||
|
||||
DISPALY_RFAGC_ERR_POWER_LOW,
|
||||
DISPALY_RFAGC_ERR_POWER_HIGH
|
||||
};
|
||||
|
||||
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
E_RA = 0x10,
|
||||
W_SYSTEM,
|
||||
W_RF,
|
||||
W_WA,
|
||||
W_WB,
|
||||
W_WC,
|
||||
W_WD,
|
||||
W_WE,
|
||||
W_WF,
|
||||
W_RF_DELAY,
|
||||
W_ADPC,
|
||||
W_CONFIGA,
|
||||
W_CONFIGB,
|
||||
W_CONFIGC,
|
||||
W_CONFIGD,
|
||||
W_HTTP_CGI1,
|
||||
W_HTTP_CGI2,
|
||||
W_UPDATE_STOP,
|
||||
W_UPDATE,
|
||||
W_OUTPUT,
|
||||
W_FAC_C,
|
||||
W_FAC_F,
|
||||
W_FAC_H,
|
||||
W_RF_ONLY,
|
||||
W_SIM_TEST,
|
||||
W_SIM_PW_ERR,
|
||||
W_SIM_PARA,
|
||||
|
||||
R_LOG = 100,
|
||||
R_RF_DELAY,
|
||||
R_UPDATE, //不可超过255 0xff
|
||||
R_SIM_PARA,
|
||||
R_LOG4,
|
||||
}PARA_TYPE;
|
||||
/*
|
||||
#define UART_RCV_BUF_LEN (1024)
|
||||
#define UART_SEND_BUF_LEN (256)
|
||||
#define UART_REC_BUF_BAK (1<<2) ////必须全bit都为1的值+1 串口接收缓冲区
|
||||
#define UART_PORT_NUM (3) //(4)
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 valid;
|
||||
uint32 task_id; //处理串口消息任务ID
|
||||
MUTEX_HANDLE mutex;
|
||||
MSG msg[UART_REC_BUF_BAK];
|
||||
uint16 index;
|
||||
uint16 length; //发送长度
|
||||
uint32 buf_cnt;
|
||||
uint8 buffer[UART_REC_BUF_BAK][UART_RCV_BUF_LEN];
|
||||
}S_UART_RX_CTRL;
|
||||
*/
|
||||
/**********************当前文件提供的对外API函数*************************************************/
|
||||
uint32 create_task(void (*fun)(void*),char* pcname,uint32 task_id,uint32 task_pro,uint32 stacksize,uint32 queuesize);
|
||||
uint32 task_set_ignore_chk(uint32 task_id);
|
||||
|
||||
uint32 send_msg(uint32 task_id,pMSG pmsg);
|
||||
pMSG get_msg(uint32 wait_ticks);
|
||||
|
||||
MSG* alloc_msg(void);
|
||||
void free_msg(pMSG p);
|
||||
|
||||
void *alloc_mem(uint32 size);
|
||||
void free_mem(void* pmem);
|
||||
|
||||
//信号量相关函数,pend函数(等待),只能在正常任务中使用,post任务体,中断均可使用
|
||||
//主要用来在中断中post,然后再一个任务中pend(阻塞型),减少中断处理时间并加快任务响应速度
|
||||
SEM_HANDLE create_sem(uint32 max_count,uint32 init_count);
|
||||
uint32 pend_sem(SEM_HANDLE sem_hd,uint32 wait_ticks);
|
||||
uint32 post_sem(SEM_HANDLE sem_hd);
|
||||
|
||||
|
||||
//互斥相关函数,只能在正常任务体中使用,不能用于中断 一般在多任务资源共享时使用 使用时take(若take不到,将会阻塞),用完后及时give
|
||||
//时间短的操作,可以关任务调度实现
|
||||
MUTEX_HANDLE create_mutex(void);
|
||||
uint32 take_mutex(MUTEX_HANDLE mtx_hd);
|
||||
uint32 give_mutex(MUTEX_HANDLE mtx_hd);
|
||||
|
||||
|
||||
void os_int_enter(void);
|
||||
void os_int_exit(void);
|
||||
|
||||
uint32 os_get_free_heap_size(void);
|
||||
|
||||
S_SYS_TIME *os_get_sys_time_ptr(void);
|
||||
uint32 get_cpu_useage(void);
|
||||
void send_clk_msg(void);
|
||||
void calc_cpu_usage(void);
|
||||
//void get_sys_time(S_SYS_TIME* pt);
|
||||
void update_sys_time_by_rtc(void);
|
||||
uint32 config_time_msg(uint32 type);
|
||||
void sys_para_init(void);
|
||||
//#define get_sys_tick xTaskGetTickCount
|
||||
void get_msg_state(S_MSG_STATE *pstate);
|
||||
void get_mem_state(S_MEM_STATE *pstate); //仅在内存调试打开时有效
|
||||
uint32 get_current_task_id(uint32 *pid);
|
||||
uint32 get_task_id(uint32 *pid,void *ptcb);
|
||||
void task_is_ok(void);
|
||||
uint32 task_chk_status(void);
|
||||
void os_dead_task_abnormal(uint32 task_id);
|
||||
void os_dead_wwdg(void);
|
||||
void task_stop_sec_msg(void);
|
||||
void task_resume_sec_msg(void);
|
||||
/******************************************END*****************************************************/
|
||||
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
extern uint32 get_sys_clk(void);
|
||||
|
||||
#if configUSE_CALC_CPU_USAGE
|
||||
extern uint32 get_idle_run_time(void);
|
||||
extern void set_idle_run_time(uint32);
|
||||
#endif
|
||||
|
||||
|
||||
#define OS_DEFAULT_STACK_SIZE (configMINIMAL_STACK_SIZE*2) //默认1k字节
|
||||
#define OS_DEFAULT_QUEUE_SIZE (100*sizeof(void*))
|
||||
|
||||
|
||||
|
||||
/*--------------- Tasks ID -------------*/
|
||||
|
||||
//同一优先级任务可创建多个,
|
||||
typedef enum
|
||||
{
|
||||
PRIORITY_VERY_HIGH = (tskIDLE_PRIORITY+4), //最高优先级任务,
|
||||
PRIORITY_HIGH = (tskIDLE_PRIORITY+3), //特殊任务,如主任务等
|
||||
PRIORITY_NORMAL = (tskIDLE_PRIORITY+2), //默认优先级
|
||||
PRIORITY_LOW = (tskIDLE_PRIORITY+1), //低优先级任务
|
||||
|
||||
}E_TASK_RPIPRITY;
|
||||
|
||||
enum E_TASK_ID
|
||||
{
|
||||
MAIN_TASK_ID = 0,
|
||||
LCD_TASK_ID,
|
||||
UART_TASK_ID,
|
||||
GPS_TASK_ID,
|
||||
WEB_TASK_ID,
|
||||
|
||||
LOG_TASK_ID,// 5
|
||||
TCP_REMOTE_TASK_ID,
|
||||
FPGA_UPGRADE_TASK_ID,
|
||||
SWAP_TASK_ID,
|
||||
SPECT_TASK_ID,
|
||||
|
||||
UDP_REMOTE_TASK_ID,// 10
|
||||
SNTP_TASK_ID,
|
||||
TEST_TASK_ID,
|
||||
AUTO_UDP_TASK_ID,
|
||||
IDLE_TASK_ID,// 14
|
||||
}; //任务序号,必须全局唯一,否则会出现异常
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,33 @@
|
||||
#ifndef _RBTREE_H_
|
||||
#define _RBTREE_H_
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stddef.h>
|
||||
|
||||
typedef struct rbtree_node_s rbtree_node_t;
|
||||
struct rbtree_node_s{
|
||||
uint64_t key;
|
||||
struct rbtree_node_s *left;
|
||||
struct rbtree_node_s *right;
|
||||
struct rbtree_node_s *parent;
|
||||
uint8_t color;
|
||||
};
|
||||
|
||||
typedef struct rbtree_s rbtree_t;
|
||||
struct rbtree_s{
|
||||
rbtree_node_t *root;
|
||||
rbtree_node_t sentinel;
|
||||
};
|
||||
|
||||
void rbtree_init(rbtree_t *tree);
|
||||
void rbtree_destory(rbtree_t *tree);
|
||||
void rbtree_insert(rbtree_t *tree,rbtree_node_t* node);
|
||||
void rbtree_delete(rbtree_t *tree,rbtree_node_t* node);
|
||||
rbtree_node_t* rbtree_search(rbtree_t *tree,uint64_t key);
|
||||
rbtree_node_t* rbtree_min(rbtree_t *tree,rbtree_node_t* node);
|
||||
rbtree_node_t* rbtree_next(rbtree_t *tree,rbtree_node_t* node);
|
||||
|
||||
#define rbtree_data(node, type, link) \
|
||||
(type *) ((u_char *) node - offsetof(type, link))
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,23 @@
|
||||
#ifndef _RTC_H_
|
||||
#define _RTC_H_
|
||||
#include "type.h"
|
||||
#include "stm32f4xx_rtc.h"
|
||||
|
||||
//备份区内存,地址范围从0x40024000~0x40024fff,共4Kbyte.
|
||||
#define BACK_MEM_START_ADDRESS BKPSRAM_BASE
|
||||
#define BACK_MEM_SIZE 0XFFF
|
||||
|
||||
uint32 rtc_init(void);
|
||||
uint32 rtc_back_mem_para_init(void);
|
||||
void rtc_get_date_time(RTC_DateTypeDef *pd,RTC_TimeTypeDef *pt);
|
||||
void rtc_set_date_time(RTC_DateTypeDef *pd,RTC_TimeTypeDef *pt);
|
||||
void rtc_set_date(RTC_DateTypeDef *pd);
|
||||
void rtc_set_time(RTC_TimeTypeDef *pt);
|
||||
void rtc_get_time(RTC_TimeTypeDef *pt);
|
||||
void rtc_get_date(RTC_DateTypeDef *pd);
|
||||
void rtc_set_time(RTC_TimeTypeDef *pt);
|
||||
void rtc_update_close_time(void);
|
||||
void* rtc_get_log_mem_address(void);
|
||||
void rtc_get_last_close_time(S_SYS_TIME *ptime);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,9 @@
|
||||
#ifndef __SNTP_TASK_H__
|
||||
#define __SNTP_TASK_H__
|
||||
|
||||
extern void sntpService(uint8 *pAddr);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,48 @@
|
||||
/******************************************spi_sh.h头文件**************************************/
|
||||
#ifndef __SPI_COMM_H
|
||||
#define __SPI_COMM_H
|
||||
#include "type.h"
|
||||
|
||||
#define SPI_MASTER 1 //本端为MASTER
|
||||
#define SPI_USE_INT 0 //spi是否使用中断模式
|
||||
#define SPI_COMM_WITH16 1 //通讯是否为16bit位宽模式 建议16位
|
||||
|
||||
#define SPIx SPI2
|
||||
#define SPIx_CLK RCC_APB1Periph_SPI2
|
||||
#define SPIx_CLK_INIT RCC_APB1PeriphClockCmd
|
||||
#define SPIx_IRQn SPI2_IRQn
|
||||
#define SPIx_IRQHANDLER SPI2_IRQHandler
|
||||
|
||||
#define SPIx_SCK_PIN GPIO_Pin_1
|
||||
#define SPIx_SCK_GPIO_PORT GPIOI
|
||||
#define SPIx_SCK_GPIO_CLK RCC_AHB1Periph_GPIOI
|
||||
#define SPIx_SCK_SOURCE GPIO_PinSource1
|
||||
#define SPIx_SCK_AF GPIO_AF_SPI2
|
||||
|
||||
#define SPIx_MISO_PIN GPIO_Pin_2
|
||||
#define SPIx_MISO_GPIO_PORT GPIOI
|
||||
#define SPIx_MISO_GPIO_CLK RCC_AHB1Periph_GPIOI
|
||||
#define SPIx_MISO_SOURCE GPIO_PinSource2
|
||||
#define SPIx_MISO_AF GPIO_AF_SPI2
|
||||
|
||||
#define SPIx_MOSI_PIN GPIO_Pin_3
|
||||
#define SPIx_MOSI_GPIO_PORT GPIOI
|
||||
#define SPIx_MOSI_GPIO_CLK RCC_AHB1Periph_GPIOI
|
||||
#define SPIx_MOSI_SOURCE GPIO_PinSource3
|
||||
#define SPIx_MOSI_AF GPIO_AF_SPI2
|
||||
|
||||
|
||||
|
||||
struct
|
||||
{
|
||||
uint16 header;
|
||||
uint16 length;
|
||||
|
||||
}SPI_COMM_FRAME,*pSPI_COMM_FRAME;
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
/********************************************END**********************************************/
|
||||
|
||||
|
||||
@@ -0,0 +1,69 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4x7_eth_bsp.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 31-October-2011
|
||||
* @brief Header for stm32f4x7_eth_bsp.c file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4x7_ETH_BSP_H
|
||||
#define __STM32F4x7_ETH_BSP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
//#include "stm324xg_eval.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
#define DP83848_PHY_ADDRESS 0x01 /* Relative to STM324xG-EVAL Board */
|
||||
|
||||
/* Specific defines for EXTI line, used to manage Ethernet link status */
|
||||
#define ETH_LINK_EXTI_LINE EXTI_Line10
|
||||
#define ETH_LINK_EXTI_PORT_SOURCE EXTI_PortSourceGPIOG
|
||||
#define ETH_LINK_EXTI_PIN_SOURCE EXTI_PinSource10
|
||||
#define ETH_LINK_EXTI_IRQn EXTI15_10_IRQn
|
||||
/* PB14 */
|
||||
#define ETH_LINK_PIN GPIO_Pin_10
|
||||
#define ETH_LINK_GPIO_PORT GPIOG
|
||||
#define ETH_LINK_GPIO_CLK RCC_AHB1Periph_GPIOG
|
||||
/* PHY registers */
|
||||
#define PHY_MICR 0x11 /* MII Interrupt Control Register */
|
||||
#define PHY_MICR_INT_EN ((uint16_t)0x0002) /* PHY Enable interrupts */
|
||||
#define PHY_MICR_INT_OE ((uint16_t)0x0001) /* PHY Enable output interrupt events */
|
||||
#define PHY_MISR 0x12 /* MII Interrupt Status and Misc. Control Register */
|
||||
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020) /* Enable Interrupt on change of link status */
|
||||
#define PHY_LINK_STATUS ((uint16_t)0x2000) /* PHY link status interrupt mask */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
void ETH_BSP_Config(void);
|
||||
uint32_t Eth_Link_PHYITConfig(uint16_t PHYAddress);
|
||||
void Eth_Link_EXTIConfig(void);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4x7_ETH_BSP_H */
|
||||
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,85 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4x7_eth_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 31-October-2011
|
||||
* @brief Configuration file for the STM32F4x7 Ethernet driver.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4x7_ETH_CONF_H
|
||||
#define __STM32F4x7_ETH_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
#include "stm32f4xx.h"
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* Uncomment the line below when using time stamping and/or IPv4 checksum offload */
|
||||
#define USE_ENHANCED_DMA_DESCRIPTORS
|
||||
|
||||
/* Uncomment the line below if you want to use user defined Delay function
|
||||
(for precise timing), otherwise default _eth_delay_ function defined within
|
||||
the Ethernet driver is used (less precise timing) */
|
||||
|
||||
#define _eth_delay_ ETH_Delay /* Default _eth_delay_ function with less precise timing */
|
||||
|
||||
|
||||
/* Uncomment the line below to allow custom configuration of the Ethernet driver buffers */
|
||||
//#define CUSTOM_DRIVER_BUFFERS_CONFIG
|
||||
|
||||
#ifdef CUSTOM_DRIVER_BUFFERS_CONFIG
|
||||
/* Redefinition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB 20 /* 20 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB 5 /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
#endif
|
||||
|
||||
|
||||
/* PHY configuration section **************************************************/
|
||||
/* PHY Reset delay */
|
||||
#define PHY_RESET_DELAY ((uint32_t)0x000FFFFF)
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY ((uint32_t)0x00FFFFFF)
|
||||
|
||||
/* The PHY status register value change from a PHY to another, so the user have
|
||||
to update this value depending on the used external PHY */
|
||||
#define PHY_SR ((uint16_t)16) /* Value for DP83848 PHY */
|
||||
|
||||
/* The Speed and Duplex mask values change from a PHY to another, so the user
|
||||
have to update this value depending on the used external PHY */
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0002) /* Value for DP83848 PHY */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0004) /* Value for DP83848 PHY */
|
||||
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4x7_ETH_CONF_H */
|
||||
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,88 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_conf.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.0
|
||||
* @date 31-October-2011
|
||||
* @brief Library configuration file.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
|
||||
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
|
||||
* TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
|
||||
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
|
||||
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_CONF_H
|
||||
#define __STM32F4xx_CONF_H
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/* Uncomment the line below to enable peripheral header file inclusion */
|
||||
#include "stm32f4xx_adc.h"
|
||||
#include "stm32f4xx_can.h"
|
||||
#include "stm32f4xx_crc.h"
|
||||
#include "stm32f4xx_cryp.h"
|
||||
#include "stm32f4xx_dac.h"
|
||||
#include "stm32f4xx_dbgmcu.h"
|
||||
#include "stm32f4xx_dcmi.h"
|
||||
#include "stm32f4xx_dma.h"
|
||||
#include "stm32f4xx_exti.h"
|
||||
#include "stm32f4xx_flash.h"
|
||||
#include "stm32f4xx_fsmc.h"
|
||||
#include "stm32f4xx_hash.h"
|
||||
#include "stm32f4xx_gpio.h"
|
||||
#include "stm32f4xx_i2c.h"
|
||||
#include "stm32f4xx_iwdg.h"
|
||||
#include "stm32f4xx_pwr.h"
|
||||
#include "stm32f4xx_rcc.h"
|
||||
#include "stm32f4xx_rng.h"
|
||||
#include "stm32f4xx_rtc.h"
|
||||
#include "stm32f4xx_sdio.h"
|
||||
#include "stm32f4xx_spi.h"
|
||||
#include "stm32f4xx_syscfg.h"
|
||||
#include "stm32f4xx_tim.h"
|
||||
#include "stm32f4xx_usart.h"
|
||||
#include "stm32f4xx_wwdg.h"
|
||||
#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* If an external clock source is used, then the value of the following define
|
||||
should be set to the value of the external clock source, else, if no external
|
||||
clock is used, keep this define commented */
|
||||
/*#define I2S_EXTERNAL_CLOCK_VAL 12288000 */ /* Value of the external clock in Hz */
|
||||
|
||||
|
||||
/* Uncomment the line below to expanse the "assert_param" macro in the
|
||||
Standard Peripheral Library drivers code */
|
||||
/* #define USE_FULL_ASSERT 1 */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#endif /* __STM32F4xx_CONF_H */
|
||||
|
||||
/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,453 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_hal_conf_template.h
|
||||
* @author MCD Application Team
|
||||
* @brief HAL configuration template file.
|
||||
* This file should be copied to the application folder and renamed
|
||||
* to stm32f4xx_hal_conf.h.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2017 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_HAL_CONF_H
|
||||
#define __STM32F4xx_HAL_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
|
||||
/* ########################## Module Selection ############################## */
|
||||
/**
|
||||
* @brief This is the list of modules to be used in the HAL driver
|
||||
*/
|
||||
#define HAL_MODULE_ENABLED
|
||||
|
||||
/* #define HAL_ADC_MODULE_ENABLED */
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
#define HAL_CAN_MODULE_ENABLED
|
||||
/* #define HAL_CRC_MODULE_ENABLED */
|
||||
/* #define HAL_CRYP_MODULE_ENABLED */
|
||||
/* #define HAL_DAC_MODULE_ENABLED */
|
||||
/* #define HAL_DCMI_MODULE_ENABLED */
|
||||
/* #define HAL_DMA2D_MODULE_ENABLED */
|
||||
#define HAL_ETH_MODULE_ENABLED
|
||||
/* #define HAL_NAND_MODULE_ENABLED */
|
||||
/* #define HAL_NOR_MODULE_ENABLED */
|
||||
/* #define HAL_PCCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SRAM_MODULE_ENABLED */
|
||||
/* #define HAL_SDRAM_MODULE_ENABLED */
|
||||
/* #define HAL_HASH_MODULE_ENABLED */
|
||||
#define HAL_I2C_MODULE_ENABLED
|
||||
/* #define HAL_I2S_MODULE_ENABLED */
|
||||
/* #define HAL_IWDG_MODULE_ENABLED */
|
||||
/* #define HAL_LTDC_MODULE_ENABLED */
|
||||
/* #define HAL_RNG_MODULE_ENABLED */
|
||||
#define HAL_RTC_MODULE_ENABLED
|
||||
/* #define HAL_SAI_MODULE_ENABLED */
|
||||
/* #define HAL_SD_MODULE_ENABLED */
|
||||
/* #define HAL_MMC_MODULE_ENABLED */
|
||||
#define HAL_SPI_MODULE_ENABLED
|
||||
#define HAL_TIM_MODULE_ENABLED
|
||||
#define HAL_UART_MODULE_ENABLED
|
||||
#define HAL_USART_MODULE_ENABLED
|
||||
/* #define HAL_IRDA_MODULE_ENABLED */
|
||||
/* #define HAL_SMARTCARD_MODULE_ENABLED */
|
||||
/* #define HAL_SMBUS_MODULE_ENABLED */
|
||||
#define HAL_WWDG_MODULE_ENABLED
|
||||
/* #define HAL_PCD_MODULE_ENABLED */
|
||||
/* #define HAL_HCD_MODULE_ENABLED */
|
||||
/* #define HAL_DSI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_QSPI_MODULE_ENABLED */
|
||||
/* #define HAL_CEC_MODULE_ENABLED */
|
||||
/* #define HAL_FMPI2C_MODULE_ENABLED */
|
||||
/* #define HAL_SPDIFRX_MODULE_ENABLED */
|
||||
/* #define HAL_DFSDM_MODULE_ENABLED */
|
||||
/* #define HAL_LPTIM_MODULE_ENABLED */
|
||||
#define HAL_GPIO_MODULE_ENABLED
|
||||
#define HAL_EXTI_MODULE_ENABLED
|
||||
#define HAL_DMA_MODULE_ENABLED
|
||||
#define HAL_RCC_MODULE_ENABLED
|
||||
#define HAL_FLASH_MODULE_ENABLED
|
||||
#define HAL_PWR_MODULE_ENABLED
|
||||
#define HAL_CORTEX_MODULE_ENABLED
|
||||
|
||||
/* ########################## HSE/HSI Values adaptation ##################### */
|
||||
/**
|
||||
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSE is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSE_VALUE)
|
||||
#define HSE_VALUE ((uint32_t)25000000U) /*!< Value of the External oscillator in Hz */
|
||||
#endif /* HSE_VALUE */
|
||||
|
||||
#if !defined (HSE_STARTUP_TIMEOUT)
|
||||
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */
|
||||
#endif /* HSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief Internal High Speed oscillator (HSI) value.
|
||||
* This value is used by the RCC HAL module to compute the system frequency
|
||||
* (when HSI is used as system clock source, directly or through the PLL).
|
||||
*/
|
||||
#if !defined (HSI_VALUE)
|
||||
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
|
||||
#endif /* HSI_VALUE */
|
||||
|
||||
/**
|
||||
* @brief Internal Low Speed oscillator (LSI) value.
|
||||
*/
|
||||
#if !defined (LSI_VALUE)
|
||||
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/
|
||||
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
|
||||
The real value may vary depending on the variations
|
||||
in voltage and temperature.*/
|
||||
/**
|
||||
* @brief External Low Speed oscillator (LSE) value.
|
||||
*/
|
||||
#if !defined (LSE_VALUE)
|
||||
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External Low Speed oscillator in Hz */
|
||||
#endif /* LSE_VALUE */
|
||||
|
||||
#if !defined (LSE_STARTUP_TIMEOUT)
|
||||
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */
|
||||
#endif /* LSE_STARTUP_TIMEOUT */
|
||||
|
||||
/**
|
||||
* @brief External clock source for I2S peripheral
|
||||
* This value is used by the I2S HAL module to compute the I2S clock source
|
||||
* frequency, this source is inserted directly through I2S_CKIN pad.
|
||||
*/
|
||||
#if !defined (EXTERNAL_CLOCK_VALUE)
|
||||
#define EXTERNAL_CLOCK_VALUE ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
|
||||
#endif /* EXTERNAL_CLOCK_VALUE */
|
||||
|
||||
/* Tip: To avoid modifying this file each time you need to use different HSE,
|
||||
=== you can define the HSE value in your toolchain compiler preprocessor. */
|
||||
|
||||
/* ########################### System Configuration ######################### */
|
||||
/**
|
||||
* @brief This is the HAL system configuration section
|
||||
*/
|
||||
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */
|
||||
#define TICK_INT_PRIORITY ((uint32_t)0U) /*!< tick interrupt priority */
|
||||
#define USE_RTOS 0U
|
||||
#define PREFETCH_ENABLE 1U
|
||||
#define INSTRUCTION_CACHE_ENABLE 1U
|
||||
#define DATA_CACHE_ENABLE 1U
|
||||
|
||||
/* ########################## Assert Selection ############################## */
|
||||
/**
|
||||
* @brief Uncomment the line below to expanse the "assert_param" macro in the
|
||||
* HAL drivers code
|
||||
*/
|
||||
/* #define USE_FULL_ASSERT 1U */
|
||||
|
||||
/* ################## Ethernet peripheral configuration ##################### */
|
||||
|
||||
/* Section 1 : Ethernet peripheral configuration */
|
||||
|
||||
/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
|
||||
#define MAC_ADDR0 2U
|
||||
#define MAC_ADDR1 0U
|
||||
#define MAC_ADDR2 0U
|
||||
#define MAC_ADDR3 0U
|
||||
#define MAC_ADDR4 0U
|
||||
#define MAC_ADDR5 0U
|
||||
|
||||
/* Definition of the Ethernet driver buffers size and count */
|
||||
#define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for receive */
|
||||
#define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE /* buffer size for transmit */
|
||||
#define ETH_RXBUFNB ((uint32_t)4U) /* 4 Rx buffers of size ETH_RX_BUF_SIZE */
|
||||
#define ETH_TXBUFNB ((uint32_t)4U) /* 4 Tx buffers of size ETH_TX_BUF_SIZE */
|
||||
|
||||
/* Section 2: PHY configuration section */
|
||||
|
||||
/* DP83848_PHY_ADDRESS Address*/
|
||||
#define DP83848_PHY_ADDRESS 0U
|
||||
/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
|
||||
#define PHY_RESET_DELAY ((uint32_t)0x000000FFU)
|
||||
/* PHY Configuration delay */
|
||||
#define PHY_CONFIG_DELAY ((uint32_t)0x00000FFFU)
|
||||
|
||||
#define PHY_READ_TO ((uint32_t)0x0000FFFFU)
|
||||
#define PHY_WRITE_TO ((uint32_t)0x0000FFFFU)
|
||||
|
||||
/* Section 3: Common PHY Registers */
|
||||
|
||||
#define PHY_BCR ((uint16_t)0x00U) /*!< Transceiver Basic Control Register */
|
||||
#define PHY_BSR ((uint16_t)0x01U) /*!< Transceiver Basic Status Register */
|
||||
|
||||
#define PHY_RESET ((uint16_t)0x8000U) /*!< PHY Reset */
|
||||
#define PHY_LOOPBACK ((uint16_t)0x4000U) /*!< Select loop-back mode */
|
||||
#define PHY_FULLDUPLEX_100M ((uint16_t)0x2100U) /*!< Set the full-duplex mode at 100 Mb/s */
|
||||
#define PHY_HALFDUPLEX_100M ((uint16_t)0x2000U) /*!< Set the half-duplex mode at 100 Mb/s */
|
||||
#define PHY_FULLDUPLEX_10M ((uint16_t)0x0100U) /*!< Set the full-duplex mode at 10 Mb/s */
|
||||
#define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */
|
||||
#define PHY_AUTONEGOTIATION ((uint16_t)0x1000U) /*!< Enable auto-negotiation function */
|
||||
#define PHY_RESTART_AUTONEGOTIATION ((uint16_t)0x0200U) /*!< Restart auto-negotiation function */
|
||||
#define PHY_POWERDOWN ((uint16_t)0x0800U) /*!< Select the power down mode */
|
||||
#define PHY_ISOLATE ((uint16_t)0x0400U) /*!< Isolate PHY from MII */
|
||||
|
||||
#define PHY_AUTONEGO_COMPLETE ((uint16_t)0x0020U) /*!< Auto-Negotiation process completed */
|
||||
#define PHY_LINKED_STATUS ((uint16_t)0x0004U) /*!< Valid link established */
|
||||
#define PHY_JABBER_DETECTION ((uint16_t)0x0002U) /*!< Jabber condition detected */
|
||||
|
||||
/* Section 4: Extended PHY Registers */
|
||||
#define PHY_SR ((uint16_t)0x1FU) /*!< PHY status register Offset */
|
||||
#define PHY_MICR ((uint16_t)0x11U) /*!< MII Interrupt Control Register */
|
||||
#define PHY_MISR ((uint16_t)0x12U) /*!< MII Interrupt Status and Misc. Control Register */
|
||||
|
||||
#define PHY_LINK_STATUS ((uint16_t)0x0001U) /*!< PHY Link mask */
|
||||
#define PHY_SPEED_STATUS ((uint16_t)0x0004U) /*!< PHY Speed mask */
|
||||
#define PHY_DUPLEX_STATUS ((uint16_t)0x0010U) /*!< PHY Duplex mask */
|
||||
|
||||
#define PHY_MICR_INT_EN ((uint16_t)0x0002U) /*!< PHY Enable interrupts */
|
||||
#define PHY_MICR_INT_OE ((uint16_t)0x0001U) /*!< PHY Enable output interrupt events */
|
||||
|
||||
#define PHY_MISR_LINK_INT_EN ((uint16_t)0x0020U) /*!< Enable Interrupt on change of link status */
|
||||
#define PHY_LINK_INTERRUPT ((uint16_t)0x2000U) /*!< PHY link status interrupt mask */
|
||||
|
||||
/* ################## SPI peripheral configuration ########################## */
|
||||
|
||||
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
|
||||
* Activated: CRC code is present inside driver
|
||||
* Deactivated: CRC code cleaned from driver
|
||||
*/
|
||||
|
||||
#define USE_SPI_CRC 0U
|
||||
|
||||
/* Includes ------------------------------------------------------------------*/
|
||||
/**
|
||||
* @brief Include module's header file
|
||||
*/
|
||||
|
||||
#ifdef HAL_RCC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rcc.h"
|
||||
#endif /* HAL_RCC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_EXTI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_exti.h"
|
||||
#endif /* HAL_EXTI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_GPIO_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_gpio.h"
|
||||
#endif /* HAL_GPIO_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma.h"
|
||||
#endif /* HAL_DMA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CORTEX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cortex.h"
|
||||
#endif /* HAL_CORTEX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ADC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_adc.h"
|
||||
#endif /* HAL_ADC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CAN_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_can.h"
|
||||
#endif /* HAL_CAN_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_crc.h"
|
||||
#endif /* HAL_CRC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CRYP_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cryp.h"
|
||||
#endif /* HAL_CRYP_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMBUS_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smbus.h"
|
||||
#endif /* HAL_SMBUS_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DMA2D_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dma2d.h"
|
||||
#endif /* HAL_DMA2D_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DAC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dac.h"
|
||||
#endif /* HAL_DAC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DCMI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dcmi.h"
|
||||
#endif /* HAL_DCMI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_ETH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_eth.h"
|
||||
#endif /* HAL_ETH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FLASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_flash.h"
|
||||
#endif /* HAL_FLASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sram.h"
|
||||
#endif /* HAL_SRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NOR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nor.h"
|
||||
#endif /* HAL_NOR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_NAND_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_nand.h"
|
||||
#endif /* HAL_NAND_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pccard.h"
|
||||
#endif /* HAL_PCCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SDRAM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sdram.h"
|
||||
#endif /* HAL_SDRAM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HASH_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hash.h"
|
||||
#endif /* HAL_HASH_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2c.h"
|
||||
#endif /* HAL_I2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_I2S_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_i2s.h"
|
||||
#endif /* HAL_I2S_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_iwdg.h"
|
||||
#endif /* HAL_IWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LTDC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_ltdc.h"
|
||||
#endif /* HAL_LTDC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PWR_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pwr.h"
|
||||
#endif /* HAL_PWR_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RNG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rng.h"
|
||||
#endif /* HAL_RNG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_RTC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_rtc.h"
|
||||
#include "stm32f4xx_hal_rtc_ex.h"
|
||||
#endif /* HAL_RTC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SAI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sai.h"
|
||||
#endif /* HAL_SAI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_sd.h"
|
||||
#endif /* HAL_SD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_MMC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_mmc.h"
|
||||
#endif /* HAL_MMC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spi.h"
|
||||
#endif /* HAL_SPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_TIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_tim.h"
|
||||
#endif /* HAL_TIM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_UART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_uart.h"
|
||||
#endif /* HAL_UART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_USART_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_usart.h"
|
||||
#endif /* HAL_USART_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_IRDA_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_irda.h"
|
||||
#endif /* HAL_IRDA_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SMARTCARD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_smartcard.h"
|
||||
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_WWDG_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_wwdg.h"
|
||||
#endif /* HAL_WWDG_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_PCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_pcd.h"
|
||||
#endif /* HAL_PCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_HCD_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_hcd.h"
|
||||
#endif /* HAL_HCD_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DSI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dsi.h"
|
||||
#endif /* HAL_DSI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_QSPI_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_qspi.h"
|
||||
#endif /* HAL_QSPI_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_CEC_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_cec.h"
|
||||
#endif /* HAL_CEC_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_FMPI2C_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_fmpi2c.h"
|
||||
#endif /* HAL_FMPI2C_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_SPDIFRX_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_spdifrx.h"
|
||||
#endif /* HAL_SPDIFRX_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_DFSDM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_dfsdm.h"
|
||||
#endif /* HAL_DFSDM_MODULE_ENABLED */
|
||||
|
||||
#ifdef HAL_LPTIM_MODULE_ENABLED
|
||||
#include "stm32f4xx_hal_lptim.h"
|
||||
#endif /* HAL_LPTIM_MODULE_ENABLED */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
#ifdef USE_FULL_ASSERT
|
||||
/**
|
||||
* @brief The assert_param macro is used for function's parameters check.
|
||||
* @param expr: If expr is false, it calls assert_failed function
|
||||
* which reports the name of the source file and the source
|
||||
* line number of the call that failed.
|
||||
* If expr is true, it returns no value.
|
||||
* @retval None
|
||||
*/
|
||||
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
|
||||
/* Exported functions ------------------------------------------------------- */
|
||||
void assert_failed(uint8_t* file, uint32_t line);
|
||||
#else
|
||||
#define assert_param(expr) ((void)0U)
|
||||
#endif /* USE_FULL_ASSERT */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_HAL_CONF_H */
|
||||
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,68 @@
|
||||
/* USER CODE BEGIN Header */
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file stm32f4xx_it.h
|
||||
* @brief This file contains the headers of the interrupt handlers.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© Copyright (c) 2019 STMicroelectronics.
|
||||
* All rights reserved.</center></h2>
|
||||
*
|
||||
* This software component is licensed by ST under Ultimate Liberty license
|
||||
* SLA0044, the "License"; You may not use this file except in compliance with
|
||||
* the License. You may obtain a copy of the License at:
|
||||
* www.st.com/SLA0044
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
/* USER CODE END Header */
|
||||
|
||||
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||
#ifndef __STM32F4xx_IT_H
|
||||
#define __STM32F4xx_IT_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/* Private includes ----------------------------------------------------------*/
|
||||
/* USER CODE BEGIN Includes */
|
||||
|
||||
/* USER CODE END Includes */
|
||||
|
||||
/* Exported types ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN ET */
|
||||
|
||||
/* USER CODE END ET */
|
||||
|
||||
/* Exported constants --------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EC */
|
||||
|
||||
/* USER CODE END EC */
|
||||
|
||||
/* Exported macro ------------------------------------------------------------*/
|
||||
/* USER CODE BEGIN EM */
|
||||
|
||||
/* USER CODE END EM */
|
||||
|
||||
/* Exported functions prototypes ---------------------------------------------*/
|
||||
void NMI_Handler(void);
|
||||
void HardFault_Handler(void);
|
||||
void MemManage_Handler(void);
|
||||
void BusFault_Handler(void);
|
||||
void UsageFault_Handler(void);
|
||||
void DebugMon_Handler(void);
|
||||
void TIM1_UP_TIM10_IRQHandler(void);
|
||||
void ETH_IRQHandler(void);
|
||||
/* USER CODE BEGIN EFP */
|
||||
|
||||
/* USER CODE END EFP */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __STM32F4xx_IT_H */
|
||||
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,61 @@
|
||||
#ifndef _SWAP_DATA_H
|
||||
#define _SWAP_DATA_H
|
||||
#include "type.h"
|
||||
|
||||
|
||||
#define SWAP_TASK_DEBUG 0
|
||||
|
||||
#if SWAP_TASK_DEBUG
|
||||
#define swap_printf printf
|
||||
#else
|
||||
#define swap_printf(p,...) do{;}while(0)
|
||||
#endif
|
||||
|
||||
|
||||
#define SWAP_TCP_PORT 19000
|
||||
|
||||
#define SWAP_REC_BUF_MAX (1024+128)
|
||||
#define SWAP_SEND_BUF_MAX (1024+128)
|
||||
|
||||
|
||||
#define SWAP_FRAME_EXPORT 0
|
||||
#define SWAP_FRAME_IMPORT 1
|
||||
|
||||
#define SWAP_FRAME_HEADER 0XFE
|
||||
#define SWAP_FRAME_TAIL 0X68
|
||||
|
||||
#define SWAP_FRAME_MIN_LEN 10
|
||||
|
||||
#define SWAP_CMD_REPONSE 0x80 //BIT7置1表示应答
|
||||
|
||||
|
||||
#define SWAP_FRAME_DATA_PARA 0X01
|
||||
#define SWAP_FRAME_DATA_DPD 0x02
|
||||
#define SWAP_FRAME_DATA_FAC 0X03
|
||||
|
||||
|
||||
//全局性的激励器类型定义
|
||||
#define EXCITER_CTTB 0X10
|
||||
#define EXCITER_CMMB 0X11
|
||||
#define EXCITER_ISDBT 0X12
|
||||
#define EXCITER_DVBT 0X13
|
||||
#define EXCITER_DVBT2 0X14
|
||||
#define EXCITER_ATSC 0X15
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 header; //帧头,固定
|
||||
uint8 im_ex; //导出导入类型
|
||||
uint8 std; //激励器类型
|
||||
uint8 cmd; //命令字
|
||||
uint8 index; //当前序号
|
||||
uint8 total; //总序号
|
||||
uint16 len; //数据区长度
|
||||
uint8 data[18];
|
||||
uint8 sum; //从帧头到校验和前的所有字节
|
||||
uint8 tail; //后两位访问要根据长度
|
||||
}S_SWAP_FRAME;
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,246 @@
|
||||
#ifndef __SYS_CONFIG_H
|
||||
#define __SYS_CONFIG_H
|
||||
#include "os_task.h"
|
||||
#include "type.h"
|
||||
#include "lcd_task.h"
|
||||
#include "config.h"
|
||||
|
||||
|
||||
#define USE_STD_LIB_DEFINE 1
|
||||
#if 0//USE_STD_LIB_DEFINE
|
||||
|
||||
#define HAL_STD_GPIO 1
|
||||
#if HAL_STD_GPIO
|
||||
|
||||
#define GPIO_Pin_0 GPIO_PIN_0
|
||||
#define GPIO_Pin_1 GPIO_PIN_1
|
||||
#define GPIO_Pin_2 GPIO_PIN_2
|
||||
#define GPIO_Pin_3 GPIO_PIN_3
|
||||
#define GPIO_Pin_4 GPIO_PIN_4
|
||||
#define GPIO_Pin_5 GPIO_PIN_5
|
||||
#define GPIO_Pin_6 GPIO_PIN_6
|
||||
#define GPIO_Pin_7 GPIO_PIN_7
|
||||
#define GPIO_Pin_8 GPIO_PIN_8
|
||||
#define GPIO_Pin_9 GPIO_PIN_9
|
||||
#define GPIO_Pin_10 GPIO_PIN_10
|
||||
#define GPIO_Pin_11 GPIO_PIN_11
|
||||
#define GPIO_Pin_12 GPIO_PIN_12
|
||||
#define GPIO_Pin_13 GPIO_PIN_13
|
||||
#define GPIO_Pin_14 GPIO_PIN_14
|
||||
#define GPIO_Pin_15 GPIO_PIN_15
|
||||
#define GPIO_Pin_All GPIO_PIN_All
|
||||
|
||||
#define GPIO_PinSource0 ((uint8_t)0x00)
|
||||
#define GPIO_PinSource1 ((uint8_t)0x01)
|
||||
#define GPIO_PinSource2 ((uint8_t)0x02)
|
||||
#define GPIO_PinSource3 ((uint8_t)0x03)
|
||||
#define GPIO_PinSource4 ((uint8_t)0x04)
|
||||
#define GPIO_PinSource5 ((uint8_t)0x05)
|
||||
#define GPIO_PinSource6 ((uint8_t)0x06)
|
||||
#define GPIO_PinSource7 ((uint8_t)0x07)
|
||||
#define GPIO_PinSource8 ((uint8_t)0x08)
|
||||
#define GPIO_PinSource9 ((uint8_t)0x09)
|
||||
#define GPIO_PinSource10 ((uint8_t)0x0A)
|
||||
#define GPIO_PinSource11 ((uint8_t)0x0B)
|
||||
#define GPIO_PinSource12 ((uint8_t)0x0C)
|
||||
#define GPIO_PinSource13 ((uint8_t)0x0D)
|
||||
#define GPIO_PinSource14 ((uint8_t)0x0E)
|
||||
#define GPIO_PinSource15 ((uint8_t)0x0F)
|
||||
|
||||
void GPIO_SetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
void GPIO_ResetBits(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
|
||||
uint16_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx);
|
||||
void PWR_PVDLevelConfig(uint32_t PWR_PVDLevel);
|
||||
|
||||
void RCC_AHB1PeriphClockCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
|
||||
void RCC_AHB2PeriphClockCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
|
||||
void RCC_AHB3PeriphClockCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphClockCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
|
||||
void RCC_AHB1PeriphResetCmd(uint32_t RCC_AHB1Periph, FunctionalState NewState);
|
||||
void RCC_AHB2PeriphResetCmd(uint32_t RCC_AHB2Periph, FunctionalState NewState);
|
||||
void RCC_AHB3PeriphResetCmd(uint32_t RCC_AHB3Periph, FunctionalState NewState);
|
||||
void RCC_APB1PeriphResetCmd(uint32_t RCC_APB1Periph, FunctionalState NewState);
|
||||
void RCC_APB2PeriphResetCmd(uint32_t RCC_APB2Periph, FunctionalState NewState);
|
||||
|
||||
void GPIO_PinAFConfig(GPIO_TypeDef* GPIOx, uint16_t GPIO_PinSource, uint8_t GPIO_AF);
|
||||
|
||||
void RTC_WriteBackupRegister(uint32_t RTC_BKP_DR, uint32_t Data);
|
||||
uint32_t RTC_ReadBackupRegister(uint32_t RTC_BKP_DR);
|
||||
|
||||
|
||||
void USART_SendData(USART_TypeDef* USARTx, uint16_t Data);
|
||||
uint16_t USART_ReceiveData(USART_TypeDef* USARTx);
|
||||
|
||||
uint16_t SPI_I2S_ReceiveData(SPI_TypeDef* SPIx);
|
||||
void SPI_I2S_SendData(SPI_TypeDef* SPIx, uint16_t Data);
|
||||
|
||||
|
||||
|
||||
|
||||
#define GPIO_Speed_2MHz GPIO_SPEED_FREQ_LOW
|
||||
#define GPIO_Speed_25MHz GPIO_SPEED_FREQ_MEDIUM
|
||||
#define GPIO_Speed_50MHz GPIO_SPEED_FREQ_HIGH
|
||||
#define GPIO_Speed_100MHz GPIO_SPEED_FREQ_VERY_HIGH
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define RCC_HAL_STD_DEFINE 1
|
||||
#if 0//RCC_HAL_STD_DEFINE
|
||||
/** @defgroup RCC_AHB1_Peripherals
|
||||
* @{
|
||||
*/
|
||||
#define RCC_AHB1Periph_GPIOA ((uint32_t)0x00000001)
|
||||
#define RCC_AHB1Periph_GPIOB ((uint32_t)0x00000002)
|
||||
#define RCC_AHB1Periph_GPIOC ((uint32_t)0x00000004)
|
||||
#define RCC_AHB1Periph_GPIOD ((uint32_t)0x00000008)
|
||||
#define RCC_AHB1Periph_GPIOE ((uint32_t)0x00000010)
|
||||
#define RCC_AHB1Periph_GPIOF ((uint32_t)0x00000020)
|
||||
#define RCC_AHB1Periph_GPIOG ((uint32_t)0x00000040)
|
||||
#define RCC_AHB1Periph_GPIOH ((uint32_t)0x00000080)
|
||||
#define RCC_AHB1Periph_GPIOI ((uint32_t)0x00000100)
|
||||
#define RCC_AHB1Periph_CRC ((uint32_t)0x00001000)
|
||||
#define RCC_AHB1Periph_FLITF ((uint32_t)0x00008000)
|
||||
#define RCC_AHB1Periph_SRAM1 ((uint32_t)0x00010000)
|
||||
#define RCC_AHB1Periph_SRAM2 ((uint32_t)0x00020000)
|
||||
#define RCC_AHB1Periph_BKPSRAM ((uint32_t)0x00040000)
|
||||
#define RCC_AHB1Periph_CCMDATARAMEN ((uint32_t)0x00100000)
|
||||
#define RCC_AHB1Periph_DMA1 ((uint32_t)0x00200000)
|
||||
#define RCC_AHB1Periph_DMA2 ((uint32_t)0x00400000)
|
||||
#define RCC_AHB1Periph_ETH_MAC ((uint32_t)0x02000000)
|
||||
#define RCC_AHB1Periph_ETH_MAC_Tx ((uint32_t)0x04000000)
|
||||
#define RCC_AHB1Periph_ETH_MAC_Rx ((uint32_t)0x08000000)
|
||||
#define RCC_AHB1Periph_ETH_MAC_PTP ((uint32_t)0x10000000)
|
||||
#define RCC_AHB1Periph_OTG_HS ((uint32_t)0x20000000)
|
||||
#define RCC_AHB1Periph_OTG_HS_ULPI ((uint32_t)0x40000000)
|
||||
#define IS_RCC_AHB1_CLOCK_PERIPH(PERIPH) ((((PERIPH) & 0x818BEE00) == 0x00) && ((PERIPH) != 0x00))
|
||||
#define IS_RCC_AHB1_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xDD9FEE00) == 0x00) && ((PERIPH) != 0x00))
|
||||
#define IS_RCC_AHB1_LPMODE_PERIPH(PERIPH) ((((PERIPH) & 0x81986E00) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
/** @defgroup RCC_APB2_Peripherals
|
||||
* @{
|
||||
*/
|
||||
#define RCC_APB2Periph_TIM1 ((uint32_t)0x00000001)
|
||||
#define RCC_APB2Periph_TIM8 ((uint32_t)0x00000002)
|
||||
#define RCC_APB2Periph_USART1 ((uint32_t)0x00000010)
|
||||
#define RCC_APB2Periph_USART6 ((uint32_t)0x00000020)
|
||||
#define RCC_APB2Periph_ADC ((uint32_t)0x00000100)
|
||||
#define RCC_APB2Periph_ADC1 ((uint32_t)0x00000100)
|
||||
#define RCC_APB2Periph_ADC2 ((uint32_t)0x00000200)
|
||||
#define RCC_APB2Periph_ADC3 ((uint32_t)0x00000400)
|
||||
#define RCC_APB2Periph_SDIO ((uint32_t)0x00000800)
|
||||
#define RCC_APB2Periph_SPI1 ((uint32_t)0x00001000)
|
||||
#define RCC_APB2Periph_SYSCFG ((uint32_t)0x00004000)
|
||||
#define RCC_APB2Periph_TIM9 ((uint32_t)0x00010000)
|
||||
#define RCC_APB2Periph_TIM10 ((uint32_t)0x00020000)
|
||||
#define RCC_APB2Periph_TIM11 ((uint32_t)0x00040000)
|
||||
#define IS_RCC_APB2_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A0CC) == 0x00) && ((PERIPH) != 0x00))
|
||||
#define IS_RCC_APB2_RESET_PERIPH(PERIPH) ((((PERIPH) & 0xFFF8A6CC) == 0x00) && ((PERIPH) != 0x00))
|
||||
|
||||
|
||||
/** @defgroup RCC_APB1_Peripherals
|
||||
* @{
|
||||
*/
|
||||
#define RCC_APB1Periph_TIM2 ((uint32_t)0x00000001)
|
||||
#define RCC_APB1Periph_TIM3 ((uint32_t)0x00000002)
|
||||
#define RCC_APB1Periph_TIM4 ((uint32_t)0x00000004)
|
||||
#define RCC_APB1Periph_TIM5 ((uint32_t)0x00000008)
|
||||
#define RCC_APB1Periph_TIM6 ((uint32_t)0x00000010)
|
||||
#define RCC_APB1Periph_TIM7 ((uint32_t)0x00000020)
|
||||
#define RCC_APB1Periph_TIM12 ((uint32_t)0x00000040)
|
||||
#define RCC_APB1Periph_TIM13 ((uint32_t)0x00000080)
|
||||
#define RCC_APB1Periph_TIM14 ((uint32_t)0x00000100)
|
||||
#define RCC_APB1Periph_WWDG ((uint32_t)0x00000800)
|
||||
#define RCC_APB1Periph_SPI2 ((uint32_t)0x00004000)
|
||||
#define RCC_APB1Periph_SPI3 ((uint32_t)0x00008000)
|
||||
#define RCC_APB1Periph_USART2 ((uint32_t)0x00020000)
|
||||
#define RCC_APB1Periph_USART3 ((uint32_t)0x00040000)
|
||||
#define RCC_APB1Periph_UART4 ((uint32_t)0x00080000)
|
||||
#define RCC_APB1Periph_UART5 ((uint32_t)0x00100000)
|
||||
#define RCC_APB1Periph_I2C1 ((uint32_t)0x00200000)
|
||||
#define RCC_APB1Periph_I2C2 ((uint32_t)0x00400000)
|
||||
#define RCC_APB1Periph_I2C3 ((uint32_t)0x00800000)
|
||||
#define RCC_APB1Periph_CAN1 ((uint32_t)0x02000000)
|
||||
#define RCC_APB1Periph_CAN2 ((uint32_t)0x04000000)
|
||||
#define RCC_APB1Periph_PWR ((uint32_t)0x10000000)
|
||||
#define RCC_APB1Periph_DAC ((uint32_t)0x20000000)
|
||||
#define IS_RCC_APB1_PERIPH(PERIPH) ((((PERIPH) & 0xC9013600) == 0x00) && ((PERIPH) != 0x00))
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#define FLASH_SPI SPI1
|
||||
#define FPGA_SPI SPI2
|
||||
|
||||
|
||||
void timer_init(void);
|
||||
|
||||
uint32 uart_com_init(uint32 com_num,uint32 baud,UART_PARITY verify,uint32 int_sw);
|
||||
uint32 uart_com_init_task_id(uint32 com_num,uint32 baud,UART_PARITY verify,uint32 int_sw,uint32 task_id);
|
||||
|
||||
void uart_send_string(uint32 port,const uint8 *pbuf,uint32 len);
|
||||
|
||||
#define I2C_NORMAL_SPEED (100000)
|
||||
#define I2C_HIGH_SPEED (400000)
|
||||
|
||||
|
||||
#if I2C_SOFT_GPIO
|
||||
typedef struct
|
||||
{
|
||||
GPIO_TypeDef* scl_port;
|
||||
GPIO_TypeDef* sda_port;
|
||||
uint16 scl_pin;
|
||||
uint16 sda_pin;
|
||||
}S_I2C_GPIO;
|
||||
#endif
|
||||
|
||||
#if WATCHDOG_ENABLE
|
||||
void watchdog_init(void);
|
||||
#endif
|
||||
void uart_hw_pre_init(void);
|
||||
uint32 create_uart_timer(void);
|
||||
uint32 i2c_com_init(uint32 i2c_num);
|
||||
|
||||
void sys_peripheral_clk_init(void);
|
||||
void sys_rcc_init(void);
|
||||
void sys_gpio_init(void);
|
||||
void sys_led_gpio_init(void);
|
||||
void sys_key_gpio_init(void);
|
||||
void sys_lcd_gpio_init(void);
|
||||
void tuner_gpio_init(void);
|
||||
uint32 get_uart_timer_num(void);
|
||||
void run_led_ctl(void);
|
||||
void sys_pvd_init(void);
|
||||
void SoftwareUpdateBegin(void);
|
||||
#if USE_DEBUG_UART
|
||||
void debug_uart_init(void);
|
||||
#endif
|
||||
void tuner_config_power_on(void);
|
||||
void tuner_config_power_reset(void);
|
||||
|
||||
void set_exc_reset(void);
|
||||
|
||||
void spi_fpga_send_buf(uint8 *puc,uint32 length);
|
||||
void spi_fpga_com_init(void);
|
||||
void spi_flash_com_init(void);
|
||||
uint32 sys_get_dev_unique_id(void);
|
||||
void spect_spi_read(uint32 len,void *pdata,uint32 restart);
|
||||
extern uint8 g_ca_value;
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,105 @@
|
||||
/**
|
||||
******************************************************************************
|
||||
* @file system_stm32f4xx.h
|
||||
* @author MCD Application Team
|
||||
* @version V1.0.2
|
||||
* @date 05-March-2012
|
||||
* @brief CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.
|
||||
******************************************************************************
|
||||
* @attention
|
||||
*
|
||||
* <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2>
|
||||
*
|
||||
* Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
|
||||
* You may not use this file except in compliance with the License.
|
||||
* You may obtain a copy of the License at:
|
||||
*
|
||||
* http://www.st.com/software_license_agreement_liberty_v2
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*
|
||||
******************************************************************************
|
||||
*/
|
||||
|
||||
/** @addtogroup CMSIS
|
||||
* @{
|
||||
*/
|
||||
|
||||
/** @addtogroup stm32f4xx_system
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @brief Define to prevent recursive inclusion
|
||||
*/
|
||||
#ifndef __SYSTEM_STM32F4XX_H
|
||||
#define __SYSTEM_STM32F4XX_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Includes
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_types
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
|
||||
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_Constants
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_Macros
|
||||
* @{
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/** @addtogroup STM32F4xx_System_Exported_Functions
|
||||
* @{
|
||||
*/
|
||||
|
||||
extern void SystemInit(void);
|
||||
extern void SystemCoreClockUpdate(void);
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /*__SYSTEM_STM32F4XX_H */
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
|
||||
/**
|
||||
* @}
|
||||
*/
|
||||
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
||||
@@ -0,0 +1,338 @@
|
||||
|
||||
#ifndef _TCP_AUTOCAL_H_
|
||||
#define _TCP_AUTOCAL_H_
|
||||
//tcp>>>>-------------
|
||||
|
||||
#define E_UDP_ADJ_DPD 1
|
||||
|
||||
//tcp-frame
|
||||
#define TCP_AUTOCAL_FRAME_HEADER 0X5AA5
|
||||
#define TCP_AUTOCAL_FRAME_TAIL 0XFEEF
|
||||
|
||||
#define TCP_AUTOCAL_FRAME_LEN_WITHOUT_DATA 16
|
||||
#define TCP_AUTOCAL_FRAME_NOT_SUM_LEN 4 //整报文中,不需要参数校验和计算的长度
|
||||
#define TCP_AUTOCAL_RET_TYPE_SEND 0
|
||||
#define TCP_AUTOCAL_RET_TYPE_RET (1<<15)
|
||||
|
||||
#define TCP_AUTOCAL_FRAME_OK (0)
|
||||
#define TCP_AUTOCAL_FRAME_ERR (1<<14)
|
||||
|
||||
//buf
|
||||
#define TCP_AUTOCAL_REMOTE_MAX_REC_LEN 128
|
||||
#define TCP_AUTOCAL_REMOTE_MAX_SEND_LEN 128
|
||||
#define TCP_AUTOCAL_REMOTE_MAX_PRO_LEN 128
|
||||
|
||||
//port
|
||||
#define PA_TCP_PORT 6000
|
||||
#define METERT_TCP_PORT 6020
|
||||
|
||||
#define EXC_UDP_PORT 6010
|
||||
|
||||
|
||||
|
||||
//err-num
|
||||
#define TCP_AUTOCAL_ERR_NONE 0
|
||||
#define TCP_AUTOCAL_ERR_CHECK_SUM 1
|
||||
#define TCP_AUTOCAL_ERR_CMD_TYPE 2
|
||||
#define TCP_AUTOCAL_ERR_CMD_INDEX 3
|
||||
#define TCP_AUTOCAL_ERR_SET_DATA 4
|
||||
#define TCP_AUTOCAL_ERR_FRAME_FORAMT 5
|
||||
#define TCP_AUTOCAL_ERR_RST_KEY 6
|
||||
#define TCP_AUTOCAL_ERR_LOCAL_MODE 7
|
||||
#define TCP_AUTOCAL_ERR_DST_ID 8
|
||||
#define TCP_AUTOCAL_ERR_SRC_ID 9
|
||||
#define TCP_AUTOCAL_ERR_UNKNOW_FRAME 0XFF //此错误,表示报文格式未知,不做应答
|
||||
|
||||
//link
|
||||
#define DEV_TIMEOUT 20
|
||||
|
||||
//band
|
||||
#define NET_BW_6M 0x0c
|
||||
#define NET_BW_7M 0x0b
|
||||
#define NET_BW_8M 0x0a
|
||||
|
||||
|
||||
//cmd-index
|
||||
typedef enum
|
||||
{
|
||||
E_READ_POWER_METER_PARA = 0x1001,
|
||||
E_READ_POWER_AMP_PARA = 0x2001,
|
||||
E_READ_EXC_PARA = 0x3002,
|
||||
E_READ_DEV_CMD_END=0x9000,
|
||||
}E_TCP_READ_DEV_PARA_CMD;
|
||||
typedef enum
|
||||
{
|
||||
E_WRITE_POWER_METER_PARA = 0x1001,
|
||||
E_WRITE_POWER_AMP_PARA = 0x2001,
|
||||
E_WRITE_EXC_PARA = 0x3002,
|
||||
E_WRITE_DEV_CMD_END=0x9000,
|
||||
}E_TCP_WRITE_DEV_PARA_CMD;
|
||||
|
||||
|
||||
typedef enum{
|
||||
E_AUTOCAL_OK=0,
|
||||
E_PA_LINK_ERR,
|
||||
E_METER_LINK_ERR,
|
||||
E_METER_PARA_ERR,
|
||||
E_PA_PARA_ERR,
|
||||
E_PA_PARA_SEND_TIMEOUT_ERR,
|
||||
E_METER_PARA_ADJ_ERR,
|
||||
E_PA_FWD_PARA_ADJ_ERR,//E_PA_PARA_ADJ_ERR
|
||||
E_PA_REF_PARA_ADJ_ERR,
|
||||
E_DEVS_FREQ_DISACCORD_ERR,
|
||||
E_DEVS_FREQ_SWITCH_ERR,
|
||||
E_EXCITER_OUTPUT_MAX_ERR,
|
||||
|
||||
E_FREQ_OVER_RANGE_ERR,
|
||||
E_FIRST_FREQ_MANUAL_CACLIB_ERR,
|
||||
E_FIRST_FREQ_MANUAL_SAVE_ERR,
|
||||
CALI_STAGE1=0x30,
|
||||
E_AUTOCAL_FINISH=0x66
|
||||
}E_AUTOCAL_ERR;
|
||||
|
||||
typedef enum{
|
||||
CHECK_OK=0,
|
||||
CHECK_ERR
|
||||
}E_CHECK_STATUS;
|
||||
|
||||
typedef enum{
|
||||
STAGE1_STEP_CHECK_LINK=0,
|
||||
STAGE1_STEP_SEND_FIRST_FREQ,
|
||||
STAGE1_STEP_PROMPT_MANUAL_CALIB,
|
||||
|
||||
STAGE1_STEP_CHECK_FIRST_FREQ,
|
||||
STAGE1_STEP_PROMPT_FIRST_FREQ_OK,
|
||||
|
||||
|
||||
STAGE2_STEP_BASE=0x20,
|
||||
STAGE2_STEP_CHECK_LINK,
|
||||
STAGE2_STEP_CONFIG_BASE_PARA,
|
||||
STAGE2_STEP_CHECK_FIRST_FREQ,
|
||||
STAGE2_STEP_SEND_CONFIG_PARA,
|
||||
STAGE2_STEP_CHECK_EXC_POWER,
|
||||
STAGE2_STEP_ADJ_PA_PARA,
|
||||
STAGE2_STEP_NEXT_FREQ,
|
||||
|
||||
|
||||
STAGE_STEP_CHECKED_ERR=0xff
|
||||
|
||||
|
||||
}E_CALIB_SETP;
|
||||
|
||||
typedef enum{AUTO_CALIB_IDLE=0,AUTO_CALIB_STAGE1,AUTO_CALIB_STAGE2,AUTO_CALIB_FIRST_FREQ_CHECK,AUTO_CALIB_END}E_AUTO_CALIB_STAGE;
|
||||
|
||||
typedef enum{
|
||||
E_CALI_OFF=0,
|
||||
E_CALI_HOLD,
|
||||
E_CALI_START,//E_CALI_UPDATE,
|
||||
E_CALI_CHECK,
|
||||
E_CALI_UPDATE,
|
||||
}E_AUTOCAL_STATUS;
|
||||
|
||||
|
||||
//cmd-type
|
||||
typedef enum{CMD_TYPE_READ=1,CMD_TYPE_SET=2,CMD_TYPE_END}E_CMD_TYPE;
|
||||
|
||||
//dev-id PA/CTL公用一个ID
|
||||
typedef enum{DEV_PA_ID=0x100,DEV_EXCITER_ID=0x200,DEV_METER_ID=0x400,DEV_REMOTE_PC_ID=0xA00}E_DEV_ID;
|
||||
|
||||
//dec-index-offset
|
||||
#define POWER_METER_CMD_INDEX_OFFSET 0x1000
|
||||
#define PA_CMD_INDEX_OFFSET 0x2000
|
||||
#define EXCITER_CMD_INDEX_OFFSET 0x3000
|
||||
|
||||
//frame
|
||||
typedef struct
|
||||
{
|
||||
uint16 header;
|
||||
uint16 length; //整帧报文总长度
|
||||
uint16 src_dev_id;
|
||||
uint16 dst_dev_id;
|
||||
uint16 cmd_type;
|
||||
uint16 cmd_index;
|
||||
uint32 data[4]; //实际长度有length域决定
|
||||
uint16 sum;
|
||||
uint16 tail;
|
||||
}S_AUTOCAL_TCP_FRAME;
|
||||
|
||||
//power-meter
|
||||
typedef struct
|
||||
{
|
||||
uint32 fwd_power;
|
||||
uint32 ref_power;
|
||||
uint32 fwd_db;
|
||||
uint32 ref_db;
|
||||
uint32 freq_ch;
|
||||
uint32 band;
|
||||
}S_POWER_METER_PARA;
|
||||
typedef struct
|
||||
{
|
||||
uint32 band;
|
||||
uint32 freq_ch;
|
||||
}S_POWER_METER_TCP_SET_PARA;
|
||||
|
||||
//pa
|
||||
typedef struct
|
||||
{
|
||||
uint32 fwd_power;
|
||||
uint32 ref_power;
|
||||
uint32 fwd_db;
|
||||
uint32 ref_db;
|
||||
uint32 freq_ch;
|
||||
uint32 band;
|
||||
uint32 fwd_adj;
|
||||
uint32 ref_adj;
|
||||
}S_DEV_PA_PARA;
|
||||
typedef struct
|
||||
{
|
||||
uint32 band;
|
||||
uint32 freq_ch;
|
||||
uint32 fwd_adj;
|
||||
uint32 ref_adj;
|
||||
}S_PA_TCP_SET_PARA;
|
||||
|
||||
|
||||
//tcp<<<<-------------
|
||||
|
||||
|
||||
//设备参数>>>>-----------
|
||||
typedef struct
|
||||
{
|
||||
uint16 freq_ch;
|
||||
uint16 band;
|
||||
uint32 fwd_power;
|
||||
uint16 ref_power;
|
||||
uint16 fwd_db;
|
||||
uint16 ref_db;
|
||||
uint8 linkErr;
|
||||
}st_POWER_METER_LOG;
|
||||
typedef struct
|
||||
{
|
||||
uint16 freq_ch;
|
||||
uint16 band;
|
||||
uint32 fwd_power;
|
||||
uint16 ref_power;
|
||||
uint16 fwd_adj;
|
||||
uint16 ref_adj;
|
||||
uint8 linkErr;
|
||||
}st_PA_LOG;
|
||||
typedef struct
|
||||
{
|
||||
st_POWER_METER_LOG meter;
|
||||
st_PA_LOG pa;
|
||||
}st_AUTO_CALIBRATION_LOG;
|
||||
typedef struct
|
||||
{
|
||||
uint16 freq_ch;
|
||||
uint16 band;
|
||||
}st_POWER_METER_SET;
|
||||
typedef struct
|
||||
{
|
||||
uint16 freq_ch;
|
||||
uint16 band;
|
||||
uint16 fwd_adj;
|
||||
uint16 ref_adj;
|
||||
}st_PA_SET;
|
||||
typedef struct
|
||||
{
|
||||
st_POWER_METER_SET meter;
|
||||
st_PA_SET pa;
|
||||
}st_AUTO_CALIBRATION_SET;
|
||||
typedef struct
|
||||
{
|
||||
st_POWER_METER_LOG log;
|
||||
st_POWER_METER_SET set;
|
||||
}st_METER_PARA;
|
||||
typedef struct
|
||||
{
|
||||
st_PA_LOG log;
|
||||
st_PA_SET set;
|
||||
}st_PA_PARA;
|
||||
typedef struct
|
||||
{
|
||||
st_METER_PARA meter;
|
||||
st_PA_PARA pa;
|
||||
uint8 tx_freq;
|
||||
}st_AUTO_CAL_PARA;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 pa_cnt;
|
||||
uint8 pa_link;
|
||||
uint16 meter_cnt;
|
||||
uint8 meter_link;
|
||||
}st_DEV_LINK;
|
||||
|
||||
|
||||
//设备参数<<<<-----------
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 first_freq;
|
||||
uint16 base_freq;
|
||||
uint16 exc_power;
|
||||
uint16 exc_pow_first;// 第一个频点的功率
|
||||
uint16 exc_pow_min;
|
||||
uint16 exc_pow_max;
|
||||
|
||||
uint32 pa_fwd;
|
||||
uint32 pa_fwd_first;
|
||||
uint16 pa_fwd_adj;
|
||||
uint16 pa_fwd_adj_first;// 第一个频点的修正值
|
||||
uint16 pa_fwd_adj_min;
|
||||
uint16 pa_fwd_adj_max;
|
||||
|
||||
uint32 meter_fwd;
|
||||
uint32 meter_fwd_first;
|
||||
|
||||
uint16 exc_dw_range;//频点切换时激励器向下的最大范围
|
||||
uint16 exc_up_range;
|
||||
|
||||
uint16 exc_cal_fwd;//计算调节的功率值
|
||||
}S_AUTOCAL_BASE_PARA;
|
||||
|
||||
|
||||
|
||||
//测试>>>>-------------
|
||||
enum{NET_SOCKET=1,NET_CONNECT};
|
||||
enum{NET_INDEX_PA=0,NET_INDEX_METER,NET_INDEX_END};
|
||||
typedef struct{
|
||||
uint8 socket;
|
||||
uint8 connect;
|
||||
}st_NET_TEST;
|
||||
typedef enum
|
||||
{
|
||||
ERR_NONE=0,
|
||||
PA_SOCKET_ERR,
|
||||
METRT_SOCKET_ERR,
|
||||
PA_CONNECT_ERR,
|
||||
METRT_CONNECT_ERR,
|
||||
PA_SEND_ERR,
|
||||
METER_SEND_ERR,
|
||||
}e_ERR_NUM;
|
||||
//测试<<<<-------------
|
||||
void update_power_meter_para(void);
|
||||
void update_pa_para(void);
|
||||
|
||||
void tcp_write_power_meter_msg(void);
|
||||
void tcp_write_pa_msg(void);
|
||||
|
||||
void tcp_client_task(void * pvParameters);
|
||||
void tcp_client_pa_task(void * pvParameters);
|
||||
void tcp_client_meter_task(void * pvParameters);
|
||||
|
||||
uint8 udp_send_pa_test(void);
|
||||
uint8 update_autocal_base(void);
|
||||
uint8 update_autocal_base(void);
|
||||
uint8 save_autocal_base(void);
|
||||
uint8 init_autocal_base(void);
|
||||
|
||||
void udp_read_pa_info(void);
|
||||
|
||||
void auto_udp_task(void * pvParameters);
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -0,0 +1,231 @@
|
||||
#ifndef _TCP_TASK_H
|
||||
#define _TCP_TASK_H
|
||||
#include "config.h"
|
||||
|
||||
#if USE_SPECT_DATA_TASK
|
||||
#include "type.h"
|
||||
#define SPECT_DEBUG_MODE 0
|
||||
#define SPECT_TASK_UART_DEBUG 0 //串口调试信息开关
|
||||
|
||||
#if SPECT_TASK_UART_DEBUG
|
||||
#define spect_printf printf
|
||||
#else
|
||||
#define spect_printf(p,...) do{;}while(0)
|
||||
#endif
|
||||
|
||||
#define FRAME_WITHOUT_DATA_LEN (10) //FRAME结构中,数据区为空时的最小数据长度
|
||||
|
||||
#define FRAME_HEADER (0X46)
|
||||
#define FRAME_TAIL (0X96)
|
||||
|
||||
#define SPECT_CMD_ACK (1<<15) //高位置1表示ack
|
||||
enum SPECT_CMD_TYPE
|
||||
{
|
||||
FRAME_CMD_READ_1 = 0x0001, //读取复数信息
|
||||
FRAME_CMD_READ_2 = 0X0002, //读取IMD和SNR信息
|
||||
FRAME_CMD_RETURN_ERR_LICENCE = 0x0003, //licence 错误,
|
||||
|
||||
FRAME_CMD_WRITE_1 = 0x0101,
|
||||
FRAME_CMD_OTHER_1 = 0x0201,
|
||||
};
|
||||
|
||||
enum SPECT_FRAME_ERR
|
||||
{
|
||||
FRAME_ERR_NONE = 0,
|
||||
FRAME_ERR_ID,
|
||||
FRAME_ERR_HEADER,
|
||||
FRAME_ERR_LEN,
|
||||
FRAME_ERR_INDEX,
|
||||
FRAME_ERR_DATA,
|
||||
FRAME_ERR_SUM,
|
||||
FRAME_ERR_TAIL,
|
||||
};
|
||||
|
||||
|
||||
struct frame_index
|
||||
{
|
||||
uint8 index1;
|
||||
uint8 index2;
|
||||
};
|
||||
|
||||
//数据结构体,类似于串口通讯的,但进行了部分改动,如长度域由单字节扩充为双字节(数据比较长)
|
||||
//超过1字节的,按照小端序存放,低字节在前,高字节在后
|
||||
//__packed
|
||||
#pragma pack(1)
|
||||
struct tcp_data_frame
|
||||
{
|
||||
uint8 id; //激励器ID
|
||||
uint8 header; //帧头,固定值
|
||||
uint16 len; //帧长度 整帧,从id到tail
|
||||
uint16 cmd; //数据内容类型
|
||||
uint16 index; //当应答数据存在多帧时,为应答序号 高字节为第n帧(从1开始),低字节为总帧号
|
||||
//uint16 reserved; //保留字节 以待扩充(字节对齐)
|
||||
void *pdata; //数据区 也可定义为数组模式 实际长度为len-10
|
||||
uint8 sum; //数据校验和 从帧头道sum前的字节累加和,不包含sum //利用指针直接访问sum和tail域不可
|
||||
uint8 tail; //帧尾,固定值
|
||||
};
|
||||
#pragma pack()
|
||||
|
||||
//字节对齐
|
||||
struct snr_imd
|
||||
{
|
||||
uint8 rsnr;
|
||||
uint8 tsnr;
|
||||
uint8 limd;
|
||||
uint8 uimd;
|
||||
};
|
||||
|
||||
|
||||
|
||||
struct complex
|
||||
{
|
||||
uint16 real;
|
||||
uint16 imag;
|
||||
};
|
||||
|
||||
#define TCP_FRAME_DATA_LEN (1024) //应答数据时,包含的有效数据长度
|
||||
#define TCP_DATA_COMPLEX_NUM (4096*2) //一总数据包含的复数个数 tx和rx共8k个复数 原先是只有tx
|
||||
#define TCP_DATA_BUF_LEN (TCP_DATA_COMPLEX_NUM*sizeof(struct complex))
|
||||
|
||||
#define TCP_FRAM_SNR_IMD_LEN (sizeof(struct snr_imd))
|
||||
|
||||
#define TCP_SPECT_REC_BUF_LEN (64)
|
||||
#define TCP_SPECT_SEND_BUF_LEN (1536+64)
|
||||
|
||||
|
||||
#define TCP_SPECT_COMM_PORT (5700)
|
||||
|
||||
|
||||
|
||||
struct frame_struct
|
||||
{
|
||||
uint8 spect_data[TCP_FRAME_DATA_LEN];
|
||||
struct snr_imd snr_imd_data;
|
||||
};
|
||||
|
||||
|
||||
#ifndef htons
|
||||
#define htons(a) \
|
||||
((((a) >> 8) & 0x00ff) | \
|
||||
(((a) << 8) & 0xff00))
|
||||
#endif
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
#if 1
|
||||
#define FPGA_UPGRADE_CTRL_ADDR (0xe0)
|
||||
#define FPGA_UP_CTRL_RESET_EN_MASK (1<<0)
|
||||
#define FPGA_UP_CTRL_CHECKID_MASK (1<<1)
|
||||
#define FPGA_UP_CTRL_VERIFY_MASK (1<<2)
|
||||
#define FPGA_UP_CTRL_HDRESET_EN_MASK (1<<7)
|
||||
|
||||
#define FPGA_UPGRADE_STATUS_ERROR_MASK (1<<0)
|
||||
#define FPGA_UP_STATUS_DONE_MASK (1<<1)
|
||||
#define FPGA_UP_STATUS_BUSY_MASK (1<<2)
|
||||
#define FPGA_UP_STATUS_EARSE_OK_MASK (1<<3)
|
||||
#endif
|
||||
|
||||
#define __tcp_fpgaUp_task__ 1
|
||||
#if __tcp_fpgaUp_task__
|
||||
|
||||
//-----------------------------------------------
|
||||
#define FPGA1_UPGRADE_ADDRESS (0XFFFF)
|
||||
#define FPGA2_UPGRADE_ADDRESS (0X1FFF)
|
||||
|
||||
#define MAX_PER_FRAME_LEN 100
|
||||
#define MAX_DATA_LEN 544
|
||||
#define TX_DATA_LEN 10
|
||||
|
||||
/*
|
||||
:10F14000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFCF
|
||||
10F14000FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
|
||||
*/
|
||||
#define UPDATA_RAW_FRAME_MIN_LEN 11
|
||||
#define UPDATA_RAW_FRAME_MAX_LEN 50
|
||||
|
||||
|
||||
#define FRAME_NO_DATA_LEN 4
|
||||
|
||||
#define USE_FPGA_UP_WRITE (1)
|
||||
|
||||
//-----------------------------------------------
|
||||
|
||||
enum E_upgrade_step{
|
||||
UPGRADE_START = 0x01, // 发起升级
|
||||
POLL_ERASER = 0x02, // poll MCU 的 eraser 状态，是否完成
|
||||
W_DATA_BLOCK = 0x03, // 取文件数据块发送给 MCU
|
||||
W_DATA_BLOCK_LAST = 0x04, // 最后一个文件数据块发送给MCU的 STEP_BUT
|
||||
};
|
||||
|
||||
enum E_ack{
|
||||
START_OK = 0x01, // MCU 回复 可以开始升级
|
||||
ERASER_ING, // MCU 回复 正在擦除
|
||||
ERASER_END, // MCU 回复 擦除完成
|
||||
READY, // MCU 回复 烧写当前数据块完成，可发送下一数据块
|
||||
NOT_READY, // MCU 回复 当前数据块失败，PC等1ms再重复发送当前数据块
|
||||
ABORT_SUCCESS, // MCU 回复 成功结束
|
||||
ABORT_ERROR, // MCU 回复 失败结束
|
||||
ACKP_BUT
|
||||
};
|
||||
|
||||
/*
|
||||
head | 帧头 0xAA
|
||||
cmd |
|
||||
datalen | 0x0000-0xffff 后面数据断的长度
|
||||
data | datalen长度的字节数据
|
||||
crc | 0xx 1个字节的校验码，从head到crc之前的数据字节sum，head、cmd、datalen、data
|
||||
tail | 帧尾 0xBB
|
||||
*/
|
||||
//__packed
|
||||
#pragma pack(1)
|
||||
typedef struct
|
||||
{
|
||||
uint8 head;
|
||||
uint8 cmd;
|
||||
uint16 datalen;
|
||||
uint8 *pdata;
|
||||
uint8 sum;
|
||||
uint8 tail;
|
||||
}S_FPGA_UP_FRAME_NEW ;
|
||||
#pragma pack()
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 head;
|
||||
uint8 lenH;
|
||||
uint8 lenL;
|
||||
uint8 addr1;
|
||||
uint8 addr2;
|
||||
uint8 addr3;
|
||||
uint8 addr4;
|
||||
uint8 typeH;
|
||||
uint8 typeL;
|
||||
uint8 data[32];
|
||||
uint8 crcH;
|
||||
uint8 crcL;
|
||||
}S_FGPA_UPDATA_FRAME;
|
||||
|
||||
//-----------------------------------------------
|
||||
|
||||
extern int fpga_up_thr(void * pvParameters);
|
||||
extern void * tcp_remote_thr(void *args);
|
||||
extern void * udp_remote_thr(void * args);
|
||||
|
||||
|
||||
#endif//#if __tcp_fpgaUp_task__
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void check_fpga_up_finished_reboot_sys(void);
|
||||
|
||||
void tcp_remote_task(void * pvParameters);
|
||||
void udp_remote_task(void * pvParameters);
|
||||
void fpga_upgrade_task(void * pvParameters);
|
||||
void check_ts_err_status(void);
|
||||
void check_fpga_gps_lock_status(void);
|
||||
extern void check_send_alarm_state(void);
|
||||
|
||||
#endif
|
||||
@@ -0,0 +1,37 @@
|
||||
#ifndef __TSOIP_H__
|
||||
#define __TSOIP_H__
|
||||
|
||||
#include "type.h"
|
||||
|
||||
|
||||
|
||||
// 支持的TSOIP server数量
|
||||
#define TSOIP_FD_TOTAL_NUM 2
|
||||
#define TS_OUTPUT_STATUS_OK 0
|
||||
#define TS_OUTPUT_STATUS_ERR 1
|
||||
|
||||
typedef enum _tsoip_enum_index_{
|
||||
TSOIP_1 = 0,
|
||||
TSOIP_2 = 1,
|
||||
}EN_TSOIP;
|
||||
|
||||
|
||||
typedef struct _tsoip_instance_{
|
||||
int index;
|
||||
int enable_multicast;
|
||||
int udp_socket_fd;
|
||||
char ip[20];
|
||||
char multicast_ip[20];
|
||||
int port;
|
||||
|
||||
BOOL b_start; // TRUE:start
|
||||
|
||||
}TSOIP_INSTANCE;
|
||||
#include "lcd_task.h"
|
||||
extern void inset_tsoip_instance(TSOIP_INSTANCE *p_tsoip_instance, S_TSOIP_CONFIG_PARA *p_tsoip_cfg_param);
|
||||
extern void* tsoip_thr(void * args);
|
||||
extern void tsoip_init(void);
|
||||
extern void change_tsoip_param_flg(int flg);
|
||||
|
||||
|
||||
#endif
|
||||
Executable
+309
@@ -0,0 +1,309 @@
|
||||
#ifndef TYPE_H_
|
||||
#define TYPE_H_
|
||||
|
||||
|
||||
#define RET_FAIL -1
|
||||
#define RET_SUCC 0
|
||||
|
||||
typedef enum{
|
||||
E_SELECT_A=0, // after
|
||||
E_SELECT_B // before
|
||||
}E_AB_SEL;
|
||||
|
||||
#if 1//type_verify
|
||||
typedef unsigned char uint8_t;
|
||||
typedef unsigned short uint16_t;
|
||||
typedef unsigned int uint32_t;
|
||||
typedef unsigned int u32;
|
||||
typedef unsigned long ULONG;
|
||||
typedef unsigned short u16;
|
||||
typedef unsigned char u8;
|
||||
typedef signed char s8;
|
||||
typedef short s16;
|
||||
typedef int s32;
|
||||
#endif//type_verify
|
||||
#define OK 0
|
||||
#define ERROR -1
|
||||
|
||||
|
||||
enum {
|
||||
E_STA_IDLE = 0,
|
||||
E_STA_BOOT_TRIGGER_START = 1,
|
||||
E_STA_BOOT_TRIGGER_END
|
||||
};
|
||||
|
||||
enum {
|
||||
E_DISPLAY_START = 0,
|
||||
E_DISPLAYING = 1,
|
||||
E_DISPLAY_STOP = 2,
|
||||
E_DISPLAY_END = 3,
|
||||
};
|
||||
enum{E_CTRL_SRC_MCU=0,E_CTRL_SRC_FPGA=1};
|
||||
|
||||
|
||||
#define false 0
|
||||
#define true 1
|
||||
typedef unsigned char tBoolean;
|
||||
|
||||
typedef signed char INT8;
|
||||
typedef unsigned char UINT8;
|
||||
typedef signed short INT16;
|
||||
typedef unsigned short UINT16;
|
||||
typedef signed int INT32;
|
||||
typedef unsigned long UINT32;
|
||||
typedef long long INT64;
|
||||
typedef unsigned long long UINT64;
|
||||
|
||||
typedef signed char int8;
|
||||
typedef unsigned char uint8;
|
||||
typedef signed short int16;
|
||||
typedef unsigned short uint16;
|
||||
typedef signed int int32;
|
||||
typedef unsigned int uint32;
|
||||
typedef long long int64;
|
||||
typedef unsigned long long uint64;
|
||||
typedef unsigned char u8_sw;
|
||||
typedef enum { FALSE = 0, TRUE } BOOL;
|
||||
typedef enum {PARITY_NO,PARITY_EVEN,PARITY_ODD}UART_PARITY;
|
||||
typedef enum{AMP_DEBUG,AMP_NORMAL}SYS_RUN;
|
||||
typedef enum{INT_OFF,INT_ON}INT_SWITCH;
|
||||
typedef enum {SW_OFF=0,SW_ON}SWITCH;
|
||||
|
||||
|
||||
typedef unsigned int u32;
|
||||
typedef unsigned short u16;
|
||||
enum{
|
||||
E_QUERY=1,
|
||||
E_QUERY2,
|
||||
E_QUERY_OK_CONTINUE,
|
||||
E_QUERY_ESC_EXIT,
|
||||
E_QUERY_ARROW_SKIP,
|
||||
E_QUERY_CONFIRM,
|
||||
E_QUERY_CANCEL,
|
||||
E_QUERY_SKIP,
|
||||
E_QUERY_UP_STOP,
|
||||
E_QUERY_RF_FLITER,
|
||||
E_QUERY_ESC_SAVE,
|
||||
};
|
||||
|
||||
|
||||
typedef const char cint8;
|
||||
typedef unsigned char u8;
|
||||
|
||||
|
||||
#define INVALID_DATA 0xff
|
||||
#define TIMER_TIMER_A 0
|
||||
#define TIMER_TIMER_B 1
|
||||
#define TIMER_TIMER_BOTH 2
|
||||
|
||||
#define STANDARD_ATSC (0)
|
||||
|
||||
typedef enum
|
||||
{
|
||||
KEY_LEFT =1,
|
||||
KEY_RIGHT,
|
||||
KEY_UP,
|
||||
KEY_DOWN,
|
||||
KEY_ENTER,
|
||||
KEY_EXIT,
|
||||
KEY_LEFT_RIGHT,
|
||||
KEY_RIGHT_UP_DOWN,
|
||||
KEY_LEFT_UP_DOWN,
|
||||
KEY_UP_DOWN,
|
||||
KEY_NULL =0xff,
|
||||
}KEY_EM;
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL (0x0)
|
||||
#endif
|
||||
/*
|
||||
#define USE_ETH_DBG 1
|
||||
#if USE_ETH_DBG
|
||||
typedef enum
|
||||
{
|
||||
USR_ETH_INT=0,
|
||||
USR_ETH_RECV_SEM,
|
||||
USR_ETH_RECV_TCPIP,
|
||||
USR_ETH_IP4_INPUT,
|
||||
USR_ETH_TCP_INPUT,
|
||||
USR_ETH_UDP_INPUT,
|
||||
USR_ETH_ICMP_INPUT,
|
||||
USR_ETH_TCP_LISTEN,
|
||||
|
||||
USR_ETH_HTTP_ACCEPT,
|
||||
USR_ETH_HTTP_RECV,
|
||||
USR_ETH_HTTP_PARSE,
|
||||
USR_ETH_HTTP_SEND,
|
||||
USR_ETH_TCP_OUT,
|
||||
|
||||
USR_LVL_INPUT_ERR,
|
||||
USR_MEMP_TCP_SEG_RESET,
|
||||
}en_USR_ETH_DBG;
|
||||
typedef struct
|
||||
{
|
||||
uint16 eth_int_in_cnt;//eth中断
|
||||
uint16 eth_recv_sem_cnt;//eth处理函数得到信号量
|
||||
uint16 eth_recv_tcpip_cnt;//进入到tcpip处理
|
||||
uint16 eth_tcp_in_cnt;
|
||||
uint16 eth_ip4_in_cnt;
|
||||
uint16 eth_udp_in_cnt;
|
||||
uint16 eth_icmp_in_cnt;
|
||||
uint16 eth_tcp_listen_cnt;
|
||||
|
||||
uint16 eth_http_accept_c;
|
||||
uint16 eth_http_recv_c;
|
||||
uint16 eth_http_parse_c;
|
||||
uint16 eth_http_send_c;
|
||||
uint16 eth_tcp_out_c;
|
||||
|
||||
|
||||
uint16 low_level_in_alloc_err;
|
||||
uint16 memp_tcp_seg_reset_c;
|
||||
}s_USR_DBG_ETH;
|
||||
void inc_eth_dbg_cnt(en_USR_ETH_DBG type);
|
||||
#endif
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint32 prescale; //预分频值
|
||||
uint32 match; //匹配值
|
||||
uint32 loader; //重载值
|
||||
}S_TIMER_INTERVAL;
|
||||
#define USE_STD_LIB_DEFINE 1
|
||||
#if USE_STD_LIB_DEFINE
|
||||
|
||||
#define I2C_Direction_Transmitter ((uint8)0x00)
|
||||
#define I2C_Direction_Receiver ((uint8)0x01)
|
||||
|
||||
#endif
|
||||
|
||||
typedef union
|
||||
{
|
||||
struct
|
||||
{
|
||||
unsigned char addr4;
|
||||
unsigned char addr3;
|
||||
unsigned char addr2;
|
||||
unsigned char addr1;
|
||||
}PART;
|
||||
unsigned int addr;
|
||||
}IPV4,*PIPV4;
|
||||
|
||||
|
||||
typedef enum
|
||||
{
|
||||
LED_OFF = 0,
|
||||
LED_ON
|
||||
}LED_SWTICH;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 sec;
|
||||
uint16 min;
|
||||
uint16 hour;
|
||||
uint16 date;
|
||||
uint16 month;
|
||||
uint16 year;
|
||||
uint32 valid; //上电后GPS锁定标识
|
||||
}S_SYS_TIME;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 hour;
|
||||
uint16 min;
|
||||
uint16 sec;
|
||||
}S_RUN_TIME,*pS_RUN_TIME;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 mac[2];
|
||||
uint32 ip;
|
||||
uint32 mask;
|
||||
uint32 gateway;
|
||||
}S_ETH_ADDRES;
|
||||
|
||||
//__packed
|
||||
#pragma pack(1)
|
||||
//__packed
|
||||
typedef struct
|
||||
{
|
||||
uint8 head;
|
||||
uint16 addres;
|
||||
uint8 cmd;
|
||||
uint16 length;
|
||||
uint8 *pdata;
|
||||
uint8 sum;
|
||||
uint8 end;
|
||||
}S_FPGA_UP_FRAME ;
|
||||
#pragma pack()
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 power; //dryloop 控制状态,若为0或1说明按键控制有效,若为0xff则为无效状态,液晶和串口可正常操作
|
||||
uint32 rf;
|
||||
uint32 amp;
|
||||
}S_DRYLOOP;
|
||||
typedef enum
|
||||
{
|
||||
CK_OK=0,
|
||||
CK_WR_ERR,
|
||||
CK_RD_ERR
|
||||
}E_DPD_CKECK_STATUS;
|
||||
typedef struct
|
||||
{
|
||||
uint16 curSate;
|
||||
uint16 errCnt;
|
||||
uint32 lineCnt;
|
||||
}S_UP_STATE;
|
||||
typedef enum{
|
||||
UPSTATE_IDLE=0,
|
||||
UPSTATE_START,
|
||||
UPSTATE_EARSEING,
|
||||
UPSTATE_EARSE_END,
|
||||
UPSTATE_WRITE,
|
||||
UPSTATE_TIMEOUT,
|
||||
UPSTATE_ERR,
|
||||
UPSTATE_CK_LAST,
|
||||
UPSTATE_FILE_END,
|
||||
UPSTATE_FEADBACK_END
|
||||
}E_UPSTATE;
|
||||
typedef enum{TS_ERR_NO_CHANGE=0,TS_ERR_CHANGE_OK=1,TS_ERR_CHANGE_ERR=2}E_TS_ERR_TYPE;
|
||||
typedef struct
|
||||
{
|
||||
E_TS_ERR_TYPE grp1;
|
||||
E_TS_ERR_TYPE grp2;
|
||||
}S_ALARM_TS_ERR;
|
||||
typedef enum{ALARM_GPS=0,ALARM_TS}E_ALARM;
|
||||
typedef struct
|
||||
{
|
||||
uint8 lock_status;
|
||||
uint8 status;
|
||||
}S_ALARM_GPS_LOCK;
|
||||
|
||||
|
||||
|
||||
|
||||
#define IP_DATA(ipaddr, a,b,c,d) \
|
||||
do{\
|
||||
(ipaddr) = (((uint32)((a) & 0xff) << 24) | \
|
||||
((uint32)((b) & 0xff) << 16) | \
|
||||
((uint32)((c) & 0xff) << 8) | \
|
||||
(uint32)((d) & 0xff));\
|
||||
}while(0)
|
||||
|
||||
//#define OFFSET_OF_STRUCT(s_struct,para) ((uint32)&(((s_struct *)0)->para))
|
||||
#define SIZE_OF_ARRAY(s) (sizeof(s)/sizeof(s[0]))
|
||||
/*
|
||||
#ifndef htons
|
||||
#define htons(a) \
|
||||
((((a) >> 8) & 0x00ff) | \
|
||||
(((a) << 8) & 0xff00))
|
||||
#endif
|
||||
|
||||
#ifndef ntohs
|
||||
#define ntohs(a) htons((a))
|
||||
#endif
|
||||
*/
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,89 @@
|
||||
#ifndef __UART_USER_H__
|
||||
#define __UART_USER_H__
|
||||
|
||||
#include "type.h"
|
||||
#include "config.h"
|
||||
|
||||
#define UART_USER_232_COM 1
|
||||
#define UART_USER_485_COM 2
|
||||
|
||||
|
||||
#define RS232_NUM 8
|
||||
#define RS232_HEAD 0x47
|
||||
#define RS232_WEEPROM 0X82
|
||||
#define RS232_WSPECIAL 0X84
|
||||
#define RS232_TAILH 0x0d
|
||||
#define RS232_TAILL 0x0a
|
||||
typedef enum
|
||||
{
|
||||
OUT_HEAD ,
|
||||
OUT_COMMAND ,
|
||||
OUT_ADDRH ,
|
||||
OUT_ADDRL ,
|
||||
OUT_DATA ,
|
||||
OUT_CHECKSUM,
|
||||
OUT_TAILH ,
|
||||
OUT_TAILL
|
||||
}OUT_ENUM;
|
||||
|
||||
enum
|
||||
{
|
||||
UART_PARA_SET_ERR_OK = 0,
|
||||
UART_PARA_SET_ERR_LOCAL,
|
||||
UART_PARA_SET_ERR_INVALID,
|
||||
UART_PARA_SET_ERR_SUM,
|
||||
UART_PARA_SET_ERR_DRYLOOP,
|
||||
UART_PARA_SET_ERR_AGC_ON,
|
||||
UART_PARA_SET_ERR_UNKNOW_CMD,
|
||||
};
|
||||
|
||||
typedef enum //CMMB与EXCITER共用
|
||||
{
|
||||
CMMB_CONFIG_STEP_9V_VOL=0xa0,
|
||||
CMMB_CONFIG_STEP_50V_VOL,
|
||||
CMMB_CONFIG_STEP_50V_CUR,
|
||||
CMMB_CONFIG_STEP_881_GV,
|
||||
CMMB_CONFIG_STEP_FWD,
|
||||
CMMB_CONFIG_STEP_REF,
|
||||
CMMB_CONFIG_STEP_VSWR,
|
||||
CMMB_CONFIG_STEP_TEMP,
|
||||
CMMB_CONFIG_STEP_REF_ALARM,
|
||||
CMMB_CONFIG_STEP_FWD_ALARM,
|
||||
CMMB_CONFIG_STEP_TEMP_ALARM,
|
||||
|
||||
CMMB_CONFIG_STEP_50V_CUR2,
|
||||
CMMB_CONFIG_STEP_POWER_DEGREE,
|
||||
CMMB_CONFIG_STEP_FWD_HEX,
|
||||
CMMB_CONFIG_STEP_IP_ADDR,
|
||||
CMMB_CONFIG_STEP_MASK_ADDR, //0xaf
|
||||
CMMB_CONFIG_STEP_GATEWAY_ADDR,
|
||||
|
||||
CMMB_CONFIG_STEP_50V_CUR3,
|
||||
CMMB_CONFIG_STEP_50V_CUR4,
|
||||
CMMB_CONFIG_STEP_IN,
|
||||
CMMB_CONFIG_STEP_12V_VOL,
|
||||
|
||||
CMMB_CONFIG_STEP_SLOW_FLAG, //向ATSC激励器发送缓开机标识
|
||||
CMMB_CONFIG_STEP_FINE_POWER,
|
||||
CMMB_CONFIG_STEP_ALARM,
|
||||
|
||||
CMMB_CONFIG_EXC_RESET,//远程复位atsc激励器
|
||||
|
||||
CMMB_CONFIG_STEP_OVER,
|
||||
}EXCITER_SET_CMD;
|
||||
|
||||
extern uint32 uart_init_set_result_frame(uint8 *pin,uint8 *pout,uint32 err);
|
||||
extern void e2rom_save_power(S_RF_PARA *ppara);
|
||||
extern uint32 get_menu_index(void);
|
||||
extern BOOL proc_key_update(void * parg, uint8 key);
|
||||
extern uint32 get_menu_index(void);
|
||||
extern uint32 protocol_read(uint8 *pbufin,uint8 *pbufout);
|
||||
extern uint32 protocol_write(uint8 *pbufin,uint8 *pbufout);
|
||||
|
||||
extern void pa_conn_chk(void);
|
||||
uint32 pa_conn_sta(void);
|
||||
|
||||
void uart_task(void * pvParameters);
|
||||
extern int creat_uart_thread(void);
|
||||
#endif
|
||||
|
||||
@@ -0,0 +1,17 @@
|
||||
#ifndef __UPGRADE_H__
|
||||
#define __UPGRADE_H__
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
#include "type.h"
|
||||
|
||||
#define CHECK_UPGRADE_PACKAGE "sh /aw/anywave/upgrade_shell/check_package.sh"
|
||||
#define DO_UPGRADE_RUN "sh /aw/anywave/upgrade_shell/extract_run_package.sh"
|
||||
|
||||
|
||||
extern void set_upgrade_flg(uint8 flg);
|
||||
extern uint8 get_upgrade_flg(void);
|
||||
extern void* imx_up_thr(void * args);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
Executable
+327
@@ -0,0 +1,327 @@
|
||||
#ifndef _WEB_SERVER_H
|
||||
#define _WEB_SERVER_H
|
||||
#include "config.h"
|
||||
#include "lcd_task.h"
|
||||
#include "type.h"
|
||||
|
||||
#define MAX_USER_NUM 10 //记录访问IP地址数目
|
||||
|
||||
#define WEB_TASK_DEBUG 1
|
||||
|
||||
|
||||
#if WEB_TASK_DEBUG
|
||||
#define web_printf printf
|
||||
#else
|
||||
#define web_printf(p,...) do{;}while(0)
|
||||
#endif
|
||||
|
||||
#define MII_MODE
|
||||
|
||||
#ifdef MII_MODE //phy 使用的是外部25M钟,不用mcu提供
|
||||
//#define PHY_CLOCK_MCO
|
||||
#endif
|
||||
|
||||
typedef enum
|
||||
{
|
||||
WEB_LOGIN = 0,
|
||||
WEB_STATUS,
|
||||
WEB_SET,
|
||||
WEB_RF,
|
||||
WEB_MODE,
|
||||
WEB_TS,
|
||||
WEB_LATCH,
|
||||
WEB_NET,
|
||||
WEB_LOG,
|
||||
WEB_PSIP,
|
||||
|
||||
WEB_STATUS_1,
|
||||
WEB_SET_1,
|
||||
WEB_RF_1,
|
||||
WEB_MODE_1,
|
||||
WEB_TS_1,
|
||||
WEB_LATCH_1,
|
||||
WEB_NET_1,
|
||||
WEB_INDEX_END,
|
||||
WEB_SET_FREQ,
|
||||
|
||||
CGI_CTTB_WEB_TS2IP_1,
|
||||
CGI_CTTB_SYS_ADMIN_IPCFG,
|
||||
|
||||
WEB_IP_CFG,
|
||||
WEB_TS2IP1,
|
||||
|
||||
} WEB_FLAG_INDEX;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 ip[4]; // 本地IP
|
||||
uint8 mask[4]; // 子网掩码
|
||||
uint8 gateway[4]; // 网关
|
||||
uint8 multi_address[4]; // 组播地址
|
||||
uint16 port; // 本地端口号
|
||||
uint16 udp_rtp;
|
||||
uint16 packet_len;
|
||||
uint16 receive_type;
|
||||
uint32 update_flag;
|
||||
}S_CGITS_PARA,*PS_CGITS_PARA;
|
||||
|
||||
|
||||
#define MAX_NO_OP_TIME (60*60*SYSTICKHZ) //最大无操作时间, 60分*60秒*100tick
|
||||
typedef struct
|
||||
{
|
||||
uint8 input0;
|
||||
uint8 input;
|
||||
uint8 status;
|
||||
uint8 agc;
|
||||
|
||||
uint32 temp;
|
||||
uint32 ts_rate;
|
||||
|
||||
uint32 ts_mh;
|
||||
uint32 ts_under;
|
||||
|
||||
uint8 mode;
|
||||
uint8 tsnr;
|
||||
uint8 l_imd;
|
||||
uint8 u_imd;
|
||||
|
||||
int8 rssi;
|
||||
uint8 rsnr;
|
||||
uint8 hz_10m;
|
||||
uint8 syserr;
|
||||
|
||||
uint8 fwd;
|
||||
uint8 amp;
|
||||
uint8 txfreq;
|
||||
uint8 hz_; // 0表示整数 1表示负数
|
||||
uint32 hz;
|
||||
|
||||
uint8 ntp_en; // sntp
|
||||
uint8 ntp_sip[4];
|
||||
uint8 ntp_date[SNTP_DATE_STRING_LEN];
|
||||
uint8 ntp_time[SNTP_TIME_STRING_LEN];
|
||||
|
||||
uint16 tcp_seg;
|
||||
uint16 tcp_occupy;
|
||||
|
||||
uint8 a_fssi;
|
||||
uint8 b_fssi;
|
||||
uint8 temp_unit;
|
||||
|
||||
uint8 agc_state;
|
||||
int agc_adj;
|
||||
}S_CGI_STATUS,*PS_CGI_STATUS;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 gps_use;
|
||||
uint8 gps_lock;
|
||||
uint8 status;
|
||||
uint8 gps_1pps;
|
||||
|
||||
uint8 freq[2];
|
||||
uint8 reserved[2];
|
||||
}S_CGI_GPS,*PS_CGI_GPS;
|
||||
|
||||
#if ATSC_USA_AMP
|
||||
typedef struct
|
||||
{
|
||||
uint32 vol_9v;
|
||||
uint32 vol_12v;
|
||||
uint32 vol_50v;
|
||||
uint32 cur1_50v;
|
||||
uint32 cur2_50v;
|
||||
uint32 cur3_50v;
|
||||
uint32 cur4_50v;
|
||||
|
||||
uint32 pa_in;
|
||||
uint32 gv_881; //前级栅极电压
|
||||
uint32 pa_fwd; //发射功率
|
||||
uint32 pa_reflect; //反射功率
|
||||
uint32 vswr; //驻波比
|
||||
uint32 temp_pa; //功放温度
|
||||
|
||||
uint8 signal_reflect; //反射功率异常信号;
|
||||
uint8 signal_fwd; //发射功率异常信号
|
||||
uint8 signal_temp; //温度异常信号
|
||||
uint8 pac_lev; //功率等级
|
||||
}S_CGI_AMP,*PS_CGI_AMP;
|
||||
#endif
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 init_status;
|
||||
uint8 lock_status;
|
||||
int8 rssi;
|
||||
uint8 resevd1;
|
||||
uint32 rsnr;
|
||||
uint32 rxfreq; //M
|
||||
}S_CGI_TUNER;
|
||||
|
||||
#if ERR_TO_LCM
|
||||
typedef struct
|
||||
{
|
||||
uint8 reset;
|
||||
uint8 u1;
|
||||
uint8 u2;
|
||||
uint8 rf;
|
||||
|
||||
uint8 gps;
|
||||
uint8 ts;
|
||||
uint8 sys;
|
||||
uint8 m_1pps;
|
||||
|
||||
uint8 sfn;
|
||||
uint8 reserved[3];
|
||||
}S_CGI_LATCH,*PS_CGI_LATCH;
|
||||
#endif
|
||||
|
||||
typedef struct
|
||||
{
|
||||
IPV4 ip;
|
||||
IPV4 mask;
|
||||
IPV4 gateway;
|
||||
uint8 mac[4]; //另外3字节固定,实际使用前3字节,方便对齐,
|
||||
}S_NET_PARA;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint8 ip[4]; // local network
|
||||
uint8 mask[4];
|
||||
uint8 gateway[4];
|
||||
uint8 dns[4];
|
||||
}LOCAL_NETWORK_CFG;
|
||||
typedef struct
|
||||
{
|
||||
uint8 input;
|
||||
uint8 net;
|
||||
uint8 adpc;
|
||||
uint8 reserverd1;
|
||||
|
||||
uint8 adpc_err;
|
||||
uint8 mode;
|
||||
uint8 gps;
|
||||
uint8 mon;
|
||||
|
||||
uint8 cor;
|
||||
uint8 ctrl;
|
||||
uint8 reserved[2];
|
||||
|
||||
uint8 web_title[ATSC_TITLE_LEN];
|
||||
uint8 sntp_en; // 0:dis 1:en
|
||||
uint8 sntp_sip[4]; // sntp 的服务器ip
|
||||
|
||||
LOCAL_NETWORK_CFG netcfg;
|
||||
uint8 fwd_cal;
|
||||
uint64 sn;
|
||||
uint8 pdt;
|
||||
uint8 pa_link_ctrl_rf;
|
||||
uint8 sys_reset;//@NEED_ADD_FUNC
|
||||
uint16 dpd_tst;
|
||||
uint8 roll_off_sel;
|
||||
uint8 ab_mode;
|
||||
uint16 gl; // gain limit
|
||||
uint8 agc_att;
|
||||
uint16 adrv9009_att;
|
||||
uint8 orx_manu_gain;
|
||||
}S_CGI_SET,*PS_CGI_SET;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
//uint32 hz_; // 0表示整数 1表示负数
|
||||
//uint32 hz;
|
||||
uint8 power[4]; //byte 1 0:正数 1负数 byte2 整数部分 byte3 小数部分
|
||||
|
||||
uint8 rxfreq;
|
||||
uint8 txfreq;
|
||||
uint8 cw;
|
||||
uint8 rf;
|
||||
|
||||
uint8 agc;
|
||||
|
||||
uint8 rc_cmd;
|
||||
uint8 tx;
|
||||
uint8 reserved[2];
|
||||
}S_CGI_RF,*PS_CGI_RF;
|
||||
typedef struct
|
||||
{
|
||||
uint32 freq;
|
||||
}S_CGI_FREQ_PARA,*PS_CGI_FREQ_PARA;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 delay;
|
||||
uint16 txid;
|
||||
uint16 netid;
|
||||
|
||||
uint8 bratio;
|
||||
uint8 reserved[3];
|
||||
}S_CGI_NET,*PS_CGI_NET;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint16 pid_det;
|
||||
uint8 sync;
|
||||
uint8 tcp_c;
|
||||
|
||||
uint8 zp1f;
|
||||
uint8 reserved[3];
|
||||
}S_CGI_MODE,*PS_CGI_MODE;
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 ip_addr; //访问端IP地址
|
||||
uint32 pw_state; //访问端密码校验状态
|
||||
uint32 url_reset; //刚登陆成功时,需要重置网址(否则地址栏会保留登陆信息)
|
||||
uint32 login_err; //登陆出错标志
|
||||
uint32 login_tick; //验证密码成功时间
|
||||
uint32 latest_tick; //最近访问时间
|
||||
}S_IP_STATE,*PS_IP_STATE;
|
||||
|
||||
|
||||
|
||||
typedef struct
|
||||
{
|
||||
uint32 current_ip;
|
||||
uint32 index;
|
||||
S_IP_STATE state[MAX_USER_NUM];
|
||||
}S_LOGIN_STATE,*PS_LOGIN_STATE;
|
||||
|
||||
|
||||
extern void lan_http_start(void);
|
||||
extern int32 degree2fah(int32 degree);
|
||||
|
||||
void web_task(void * pvParameters);
|
||||
void load_net_para(S_ETH_ADDRES *peth);
|
||||
void local_ip_change(void);
|
||||
uint32 Net_write_RF(uint8 param);
|
||||
void http_save_change_para(void *);
|
||||
void spect_data_task(void * pvParameters);
|
||||
void http_load_default_para(uint32 type,void *ppara);
|
||||
|
||||
extern void http_load_sys(S_CGI_SET *ppara);
|
||||
extern void http_load_rf(S_CGI_RF *ppara);
|
||||
extern void http_load_net(S_CGI_NET *ppara);
|
||||
extern void http_load_mh(S_CGI_MODE *ppara);
|
||||
extern void http_load_latch(S_CGI_LATCH *ppara);
|
||||
extern void http_load_pac(S_CGI_AMP *ppara);
|
||||
extern void http_load_gps(S_CGI_GPS *ppara);
|
||||
extern void http_load_ts(TS_NET_STRUCT *ppara);
|
||||
extern void http_load_status(S_CGI_STATUS *ppara);
|
||||
extern void http_load_tuner_info(S_CGI_TUNER *ppara);
|
||||
extern int getNowTime(void);
|
||||
|
||||
extern void check_fpga_gps_lock_status(void);
|
||||
extern void check_ts_err_status(void);
|
||||
extern void check_temperature_status(void);
|
||||
extern void check_overflow_status(void);
|
||||
extern void check_ts_err_log(void);
|
||||
#if USE_SWAP_DATA
|
||||
void swap_data_task(void * pvParameters);
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
Reference in New Issue
Block a user